gcc/config/avr/avr.h

   1 /* Definitions of target machine for GNU compiler,
   2    for ATMEL AVR at90s8515, ATmega103/103L, ATmega603/603L microcontrollers.
   3    Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
   4    2008, 2009, 2010, 2011
   5    Free Software Foundation, Inc.
   6    Contributed by Denis Chertykov (chertykov@gmail.com)
   7
   8 This file is part of GCC.
   9
  10 GCC is free software; you can redistribute it and/or modify
  11 it under the terms of the GNU General Public License as published by
  12 the Free Software Foundation; either version 3, or (at your option)
  13 any later version.
  14
  15 GCC is distributed in the hope that it will be useful,
  16 but WITHOUT ANY WARRANTY; without even the implied warranty of
  17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18 GNU General Public License for more details.
  19
  20 You should have received a copy of the GNU General Public License
  21 along with GCC; see the file COPYING3.  If not see
  22 <http://www.gnu.org/licenses/>.  */
  23
  24 /* Names to predefine in the preprocessor for this target machine.  */
  25
  26 struct base_arch_s
  27 {
  28   /* Assembler only.  */
  29   int asm_only;
  30
  31   /* Core have 'MUL*' instructions.  */
  32   int have_mul;
  33
  34   /* Core have 'CALL' and 'JMP' instructions.  */
  35   int have_jmp_call;
  36
  37   /* Core have 'MOVW' and 'LPM Rx,Z' instructions.  */
  38   int have_movw_lpmx;
  39
  40   /* Core have 'ELPM' instructions.  */
  41   int have_elpm;
  42
  43   /* Core have 'ELPM Rx,Z' instructions.  */
  44   int have_elpmx;
  45
  46   /* Core have 'EICALL' and 'EIJMP' instructions.  */
  47   int have_eijmp_eicall;
  48
  49   /* This is an XMEGA core.  */
  50   int xmega_p;
  51
  52   /* This core has the RAMPD special function register
  53      and thus also the RAMPX, RAMPY and RAMPZ registers.  */
  54   int have_rampd;
  55
  56   /* Default start of data section address for architecture.  */
  57   int default_data_section_start;
  58
  59   /* Offset between SFR address and RAM address:
  60      SFR-address = RAM-address - sfr_offset  */
  61   int sfr_offset;
  62
  63   /* Architecture id to built-in define __AVR_ARCH__ (NULL -> no macro) */
  64   const char *const macro;
  65
  66   /* Architecture name.  */
  67   const char *const arch_name;
  68 };
  69
  70 /* These names are used as the index into the avr_arch_types[] table
  71    above.  */
  72
  73 enum avr_arch
  74 {
  75   ARCH_UNKNOWN,
  76   ARCH_AVR1,
  77   ARCH_AVR2,
  78   ARCH_AVR25,
  79   ARCH_AVR3,
  80   ARCH_AVR31,
  81   ARCH_AVR35,
  82   ARCH_AVR4,
  83   ARCH_AVR5,
  84   ARCH_AVR51,
  85   ARCH_AVR6,
  86   ARCH_AVRXMEGA2,
  87   ARCH_AVRXMEGA4,
  88   ARCH_AVRXMEGA5,
  89   ARCH_AVRXMEGA6,
  90   ARCH_AVRXMEGA7
  91 };
  92
  93 struct mcu_type_s {
  94   /* Device name.  */
  95   const char *const name;
  96
  97   /* Index in avr_arch_types[].  */
  98   int arch;
  99
 100   /* Must lie outside user's namespace.  NULL == no macro.  */
 101   const char *const macro;
 102
 103   /* Stack pointer have 8 bits width.  */
 104   int short_sp;
 105
 106   /* Some AVR devices have a core erratum when skipping a 2-word instruction.
 107      Skip instructions are:  SBRC, SBRS, SBIC, SBIS, CPSE.
 108      Problems will occur with return address is IRQ executes during the
 109      skip sequence.
 110
 111      A support ticket from Atmel returned the following information:
 112
 113          Subject: (ATTicket:644469) On AVR skip-bug core Erratum
 114          From: avr@atmel.com                    Date: 2011-07-27
 115          (Please keep the subject when replying to this mail)
 116
 117          This errata exists only in AT90S8515 and ATmega103 devices.
 118
 119          For information please refer the following respective errata links
 120             http://www.atmel.com/dyn/resources/prod_documents/doc2494.pdf
 121             http://www.atmel.com/dyn/resources/prod_documents/doc1436.pdf  */
 122
 123   /* Core Erratum:  Must not skip 2-word instruction.  */
 124   int errata_skip;
 125
 126   /* Start of data section.  */
 127   int data_section_start;
 128
 129   /* Number of 64k segments in the flash.  */
 130   int n_flash;
 131
 132   /* Name of device library.  */
 133   const char *const library_name;
 134 };
 135
 136 struct arch_info_s {
 137   /* Architecture ID.  */
 138   enum avr_arch arch;
 139
 140   /* textinfo source to describe the archtiecture.  */
 141   const char *texinfo;
 142 };
 143
 144 /* Preprocessor macros to define depending on MCU type.  */
 145 extern const char *avr_extra_arch_macro;
 146 extern const struct base_arch_s *avr_current_arch;
 147 extern const struct mcu_type_s *avr_current_device;
 148 extern const struct mcu_type_s avr_mcu_types[];
 149 extern const struct base_arch_s avr_arch_types[];
 150
 151 typedef struct
 152 {
 153   /* Id of the address space as used in c_register_addr_space */
 154   unsigned char id;
 155
 156   /* Flavour of memory: 0 = RAM, 1 = Flash */
 157   int memory_class;
 158
 159   /* Width of pointer (in bytes) */
 160   int pointer_size;
 161
 162   /* Name of the address space as visible to the user */
 163   const char *name;
 164
 165   /* Segment (i.e. 64k memory chunk) number.  */
 166   int segment;
 167 } avr_addrspace_t;
 168
 169 extern const avr_addrspace_t avr_addrspace[];
 170
 171 /* Known address spaces */
 172
 173 enum
 174   {
 175     ADDR_SPACE_RAM,
 176     ADDR_SPACE_FLASH,
 177     ADDR_SPACE_FLASH1,
 178     ADDR_SPACE_FLASH2,
 179     ADDR_SPACE_FLASH3,
 180     ADDR_SPACE_FLASH4,
 181     ADDR_SPACE_FLASH5,
 182     ADDR_SPACE_MEMX
 183   };
 184
 185 #define TARGET_CPU_CPP_BUILTINS()       avr_cpu_cpp_builtins (pfile)
 186
 187 #define AVR_HAVE_JMP_CALL (avr_current_arch->have_jmp_call && !TARGET_SHORT_CALLS)
 188 #define AVR_HAVE_MUL (avr_current_arch->have_mul)
 189 #define AVR_HAVE_MOVW (avr_current_arch->have_movw_lpmx)
 190 #define AVR_HAVE_LPMX (avr_current_arch->have_movw_lpmx)
 191 #define AVR_HAVE_ELPM (avr_current_arch->have_elpm)
 192 #define AVR_HAVE_ELPMX (avr_current_arch->have_elpmx)
 193 #define AVR_HAVE_RAMPD (avr_current_arch->have_rampd)
 194 #define AVR_HAVE_RAMPX (avr_current_arch->have_rampd)
 195 #define AVR_HAVE_RAMPY (avr_current_arch->have_rampd)
 196 #define AVR_HAVE_RAMPZ (avr_current_arch->have_elpm             \
 197                         || avr_current_arch->have_rampd)
 198 #define AVR_HAVE_EIJMP_EICALL (avr_current_arch->have_eijmp_eicall)
 199
 200 /* Handling of 8-bit SP versus 16-bit SP is as follows:
 201
 202    -msp8 is used internally to select the right multilib for targets with
 203    8-bit SP.  -msp8 is set automatically by DRIVER_SELF_SPECS for devices
 204    with 8-bit SP or by multilib generation machinery.  If a frame pointer is
 205    needed and SP is only 8 bits wide, SP is zero-extended to get FP.
 206
 207    TARGET_TINY_STACK is triggered by -mtiny-stack which is a user option.
 208    This option has no effect on multilib selection.  It serves to save some
 209    bytes on 16-bit SP devices by only changing SP_L and leaving SP_H alone.
 210
 211    These two properties are reflected by built-in macros __AVR_SP8__ resp.
 212    __AVR_HAVE_8BIT_SP__ and __AVR_HAVE_16BIT_SP__.  During multilib generation
 213    there is always __AVR_SP8__ == __AVR_HAVE_8BIT_SP__.  */
 214
 215 #define AVR_HAVE_8BIT_SP                                                \
 216   (avr_current_device->short_sp || TARGET_TINY_STACK || avr_sp8)
 217
 218 #define AVR_HAVE_SPH (!avr_sp8)
 219
 220 #define AVR_2_BYTE_PC (!AVR_HAVE_EIJMP_EICALL)
 221 #define AVR_3_BYTE_PC (AVR_HAVE_EIJMP_EICALL)
 222
 223 #define AVR_XMEGA (avr_current_arch->xmega_p)
 224
 225 #define BITS_BIG_ENDIAN 0
 226 #define BYTES_BIG_ENDIAN 0
 227 #define WORDS_BIG_ENDIAN 0
 228
 229 #ifdef IN_LIBGCC2
 230 /* This is to get correct SI and DI modes in libgcc2.c (32 and 64 bits).  */
 231 #define UNITS_PER_WORD 4
 232 #else
 233 /* Width of a word, in units (bytes).  */
 234 #define UNITS_PER_WORD 1
 235 #endif
 236
 237 #define POINTER_SIZE 16
 238
 239
 240 /* Maximum sized of reasonable data type
 241    DImode or Dfmode ...  */
 242 #define MAX_FIXED_MODE_SIZE 32
 243
 244 #define PARM_BOUNDARY 8
 245
 246 #define FUNCTION_BOUNDARY 8
 247
 248 #define EMPTY_FIELD_BOUNDARY 8
 249
 250 /* No data type wants to be aligned rounder than this.  */
 251 #define BIGGEST_ALIGNMENT 8
 252
 253 #define TARGET_VTABLE_ENTRY_ALIGN 8
 254
 255 #define STRICT_ALIGNMENT 0
 256
 257 #define INT_TYPE_SIZE (TARGET_INT8 ? 8 : 16)
 258 #define SHORT_TYPE_SIZE (INT_TYPE_SIZE == 8 ? INT_TYPE_SIZE : 16)
 259 #define LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 16 : 32)
 260 #define LONG_LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 32 : 64)
 261 #define FLOAT_TYPE_SIZE 32
 262 #define DOUBLE_TYPE_SIZE 32
 263 #define LONG_DOUBLE_TYPE_SIZE 32
 264
 265 #define DEFAULT_SIGNED_CHAR 1
 266
 267 #define SIZE_TYPE (INT_TYPE_SIZE == 8 ? "long unsigned int" : "unsigned int")
 268 #define PTRDIFF_TYPE (INT_TYPE_SIZE == 8 ? "long int" :"int")
 269
 270 #define WCHAR_TYPE_SIZE 16
 271
 272 #define FIRST_PSEUDO_REGISTER 36
 273
 274 #define FIXED_REGISTERS {\
 275   1,1,/* r0 r1 */\
 276   0,0,/* r2 r3 */\
 277   0,0,/* r4 r5 */\
 278   0,0,/* r6 r7 */\
 279   0,0,/* r8 r9 */\
 280   0,0,/* r10 r11 */\
 281   0,0,/* r12 r13 */\
 282   0,0,/* r14 r15 */\
 283   0,0,/* r16 r17 */\
 284   0,0,/* r18 r19 */\
 285   0,0,/* r20 r21 */\
 286   0,0,/* r22 r23 */\
 287   0,0,/* r24 r25 */\
 288   0,0,/* r26 r27 */\
 289   0,0,/* r28 r29 */\
 290   0,0,/* r30 r31 */\
 291   1,1,/*  STACK */\
 292   1,1 /* arg pointer */  }
 293
 294 #define CALL_USED_REGISTERS {                   \
 295   1,1,/* r0 r1 */                               \
 296     0,0,/* r2 r3 */                             \
 297     0,0,/* r4 r5 */                             \
 298     0,0,/* r6 r7 */                             \
 299     0,0,/* r8 r9 */                             \
 300     0,0,/* r10 r11 */                           \
 301     0,0,/* r12 r13 */                           \
 302     0,0,/* r14 r15 */                           \
 303     0,0,/* r16 r17 */                           \
 304     1,1,/* r18 r19 */                           \
 305     1,1,/* r20 r21 */                           \
 306     1,1,/* r22 r23 */                           \
 307     1,1,/* r24 r25 */                           \
 308     1,1,/* r26 r27 */                           \
 309     0,0,/* r28 r29 */                           \
 310     1,1,/* r30 r31 */                           \
 311     1,1,/*  STACK */                            \
 312     1,1 /* arg pointer */  }
 313
 314 #define REG_ALLOC_ORDER {                       \
 315     24,25,                                      \
 316     18,19,                                      \
 317     20,21,                                      \
 318     22,23,                                      \
 319     30,31,                                      \
 320     26,27,                                      \
 321     28,29,                                      \
 322     17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,    \
 323     0,1,                                        \
 324     32,33,34,35                                 \
 325     }
 326
 327 #define ADJUST_REG_ALLOC_ORDER order_regs_for_local_alloc ()
 328
 329
 330 #define HARD_REGNO_NREGS(REGNO, MODE) ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
 331
 332 #define HARD_REGNO_MODE_OK(REGNO, MODE) avr_hard_regno_mode_ok(REGNO, MODE)
 333
 334 #define MODES_TIEABLE_P(MODE1, MODE2) 1
 335
 336 enum reg_class {
 337   NO_REGS,
 338   R0_REG,                       /* r0 */
 339   POINTER_X_REGS,               /* r26 - r27 */
 340   POINTER_Y_REGS,               /* r28 - r29 */
 341   POINTER_Z_REGS,               /* r30 - r31 */
 342   STACK_REG,                    /* STACK */
 343   BASE_POINTER_REGS,            /* r28 - r31 */
 344   POINTER_REGS,                 /* r26 - r31 */
 345   ADDW_REGS,                    /* r24 - r31 */
 346   SIMPLE_LD_REGS,               /* r16 - r23 */
 347   LD_REGS,                      /* r16 - r31 */
 348   NO_LD_REGS,                   /* r0 - r15 */
 349   GENERAL_REGS,                 /* r0 - r31 */
 350   ALL_REGS, LIM_REG_CLASSES
 351 };
 352
 353
 354 #define N_REG_CLASSES (int)LIM_REG_CLASSES
 355
 356 #define REG_CLASS_NAMES {                                       \
 357                  "NO_REGS",                                     \
 358                    "R0_REG",    /* r0 */                        \
 359                    "POINTER_X_REGS", /* r26 - r27 */            \
 360                    "POINTER_Y_REGS", /* r28 - r29 */            \
 361                    "POINTER_Z_REGS", /* r30 - r31 */            \
 362                    "STACK_REG", /* STACK */                     \
 363                    "BASE_POINTER_REGS", /* r28 - r31 */         \
 364                    "POINTER_REGS", /* r26 - r31 */              \
 365                    "ADDW_REGS", /* r24 - r31 */                 \
 366                    "SIMPLE_LD_REGS", /* r16 - r23 */            \
 367                    "LD_REGS",   /* r16 - r31 */                 \
 368                    "NO_LD_REGS", /* r0 - r15 */                 \
 369                    "GENERAL_REGS", /* r0 - r31 */               \
 370                    "ALL_REGS" }
 371
 372 #define REG_CLASS_CONTENTS {                                            \
 373   {0x00000000,0x00000000},      /* NO_REGS */                           \
 374   {0x00000001,0x00000000},      /* R0_REG */                            \
 375   {3 << REG_X,0x00000000},      /* POINTER_X_REGS, r26 - r27 */         \
 376   {3 << REG_Y,0x00000000},      /* POINTER_Y_REGS, r28 - r29 */         \
 377   {3 << REG_Z,0x00000000},      /* POINTER_Z_REGS, r30 - r31 */         \
 378   {0x00000000,0x00000003},      /* STACK_REG, STACK */                  \
 379   {(3 << REG_Y) | (3 << REG_Z),                                         \
 380      0x00000000},               /* BASE_POINTER_REGS, r28 - r31 */      \
 381   {(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z),                          \
 382      0x00000000},               /* POINTER_REGS, r26 - r31 */           \
 383   {(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z) | (3 << REG_W),           \
 384      0x00000000},               /* ADDW_REGS, r24 - r31 */              \
 385   {0x00ff0000,0x00000000},      /* SIMPLE_LD_REGS r16 - r23 */          \
 386   {(3 << REG_X)|(3 << REG_Y)|(3 << REG_Z)|(3 << REG_W)|(0xff << 16),    \
 387      0x00000000},       /* LD_REGS, r16 - r31 */                        \
 388   {0x0000ffff,0x00000000},      /* NO_LD_REGS  r0 - r15 */              \
 389   {0xffffffff,0x00000000},      /* GENERAL_REGS, r0 - r31 */            \
 390   {0xffffffff,0x00000003}       /* ALL_REGS */                          \
 391 }
 392
 393 #define REGNO_REG_CLASS(R) avr_regno_reg_class(R)
 394
 395 #define MODE_CODE_BASE_REG_CLASS(mode, as, outer_code, index_code)   \
 396   avr_mode_code_base_reg_class (mode, as, outer_code, index_code)
 397
 398 #define INDEX_REG_CLASS NO_REGS
 399
 400 #define REGNO_MODE_CODE_OK_FOR_BASE_P(num, mode, as, outer_code, index_code) \
 401   avr_regno_mode_code_ok_for_base_p (num, mode, as, outer_code, index_code)
 402
 403 #define REGNO_OK_FOR_INDEX_P(NUM) 0
 404
 405 #define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE)                    \
 406   (((REGNO) < 18 && (REGNO) + GET_MODE_SIZE (MODE) > 18)               \
 407    || ((REGNO) < REG_Y && (REGNO) + GET_MODE_SIZE (MODE) > REG_Y)      \
 408    || ((REGNO) < REG_Z && (REGNO) + GET_MODE_SIZE (MODE) > REG_Z))
 409
 410 #define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true
 411
 412 #define STACK_PUSH_CODE POST_DEC
 413
 414 #define STACK_GROWS_DOWNWARD
 415
 416 #define STARTING_FRAME_OFFSET avr_starting_frame_offset()
 417
 418 #define STACK_POINTER_OFFSET 1
 419
 420 #define FIRST_PARM_OFFSET(FUNDECL) 0
 421
 422 #define STACK_BOUNDARY 8
 423
 424 #define STACK_POINTER_REGNUM 32
 425
 426 #define FRAME_POINTER_REGNUM REG_Y
 427
 428 #define ARG_POINTER_REGNUM 34
 429
 430 #define STATIC_CHAIN_REGNUM 2
 431
 432 #define ELIMINABLE_REGS {                                       \
 433       {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM},               \
 434         {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}            \
 435        ,{FRAME_POINTER_REGNUM+1,STACK_POINTER_REGNUM+1}}
 436
 437 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET)                    \
 438   OFFSET = avr_initial_elimination_offset (FROM, TO)
 439
 440 #define RETURN_ADDR_RTX(count, tem) avr_return_addr_rtx (count, tem)
 441
 442 /* Don't use Push rounding. expr.c: emit_single_push_insn is broken
 443    for POST_DEC targets (PR27386).  */
 444 /*#define PUSH_ROUNDING(NPUSHED) (NPUSHED)*/
 445
 446 typedef struct avr_args {
 447   int nregs;                    /* # registers available for passing */
 448   int regno;                    /* next available register number */
 449 } CUMULATIVE_ARGS;
 450
 451 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
 452   init_cumulative_args (&(CUM), FNTYPE, LIBNAME, FNDECL)
 453
 454 #define FUNCTION_ARG_REGNO_P(r) function_arg_regno_p(r)
 455
 456 #define DEFAULT_PCC_STRUCT_RETURN 0
 457
 458 #define EPILOGUE_USES(REGNO) avr_epilogue_uses(REGNO)
 459
 460 #define HAVE_POST_INCREMENT 1
 461 #define HAVE_PRE_DECREMENT 1
 462
 463 #define MAX_REGS_PER_ADDRESS 1
 464
 465 #define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_L,WIN)          \
 466   do {                                                                  \
 467     rtx new_x = avr_legitimize_reload_address (&(X), MODE, OPNUM, TYPE, \
 468                                                ADDR_TYPE (TYPE),        \
 469                                                IND_L, make_memloc);     \
 470     if (new_x)                                                          \
 471       {                                                                 \
 472         X = new_x;                                                      \
 473         goto WIN;                                                       \
 474       }                                                                 \
 475   } while (0)
 476
 477 #define BRANCH_COST(speed_p, predictable_p) avr_branch_cost
 478
 479 #define SLOW_BYTE_ACCESS 0
 480
 481 #define NO_FUNCTION_CSE
 482
 483 #define REGISTER_TARGET_PRAGMAS()                                       \
 484   do {                                                                  \
 485     avr_register_target_pragmas();                                      \
 486   } while (0)
 487
 488 #define TEXT_SECTION_ASM_OP "\t.text"
 489
 490 #define DATA_SECTION_ASM_OP "\t.data"
 491
 492 #define BSS_SECTION_ASM_OP "\t.section .bss"
 493
 494 /* Define the pseudo-ops used to switch to the .ctors and .dtors sections.
 495    There are no shared libraries on this target, and these sections are
 496    placed in the read-only program memory, so they are not writable.  */
 497
 498 #undef CTORS_SECTION_ASM_OP
 499 #define CTORS_SECTION_ASM_OP "\t.section .ctors,\"a\",@progbits"
 500
 501 #undef DTORS_SECTION_ASM_OP
 502 #define DTORS_SECTION_ASM_OP "\t.section .dtors,\"a\",@progbits"
 503
 504 #define TARGET_ASM_CONSTRUCTOR avr_asm_out_ctor
 505
 506 #define TARGET_ASM_DESTRUCTOR avr_asm_out_dtor
 507
 508 #define SUPPORTS_INIT_PRIORITY 0
 509
 510 #define JUMP_TABLES_IN_TEXT_SECTION 0
 511
 512 #define ASM_COMMENT_START " ; "
 513
 514 #define ASM_APP_ON "/* #APP */\n"
 515
 516 #define ASM_APP_OFF "/* #NOAPP */\n"
 517
 518 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == '\n' || ((C) == '$'))
 519
 520 #define ASM_OUTPUT_ALIGNED_DECL_COMMON(STREAM, DECL, NAME, SIZE, ALIGN) \
 521   avr_asm_output_aligned_decl_common (STREAM, DECL, NAME, SIZE, ALIGN, false)
 522
 523 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
 524   asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN)
 525
 526 #define ASM_OUTPUT_ALIGNED_DECL_LOCAL(STREAM, DECL, NAME, SIZE, ALIGN)  \
 527   avr_asm_output_aligned_decl_common (STREAM, DECL, NAME, SIZE, ALIGN, true)
 528
 529 /* Globalizing directive for a label.  */
 530 #define GLOBAL_ASM_OP ".global\t"
 531
 532 #define SUPPORTS_WEAK 1
 533
 534 #define HAS_INIT_SECTION 1
 535
 536 #define REGISTER_NAMES {                                \
 537   "r0","r1","r2","r3","r4","r5","r6","r7",              \
 538     "r8","r9","r10","r11","r12","r13","r14","r15",      \
 539     "r16","r17","r18","r19","r20","r21","r22","r23",    \
 540     "r24","r25","r26","r27","r28","r29","r30","r31",    \
 541     "__SP_L__","__SP_H__","argL","argH"}
 542
 543 #define FINAL_PRESCAN_INSN(insn, operand, nop) final_prescan_insn (insn, operand,nop)
 544
 545 #define ASM_OUTPUT_REG_PUSH(STREAM, REGNO)      \
 546 {                                               \
 547   gcc_assert (REGNO < 32);                      \
 548   fprintf (STREAM, "\tpush\tr%d", REGNO);       \
 549 }
 550
 551 #define ASM_OUTPUT_REG_POP(STREAM, REGNO)       \
 552 {                                               \
 553   gcc_assert (REGNO < 32);                      \
 554   fprintf (STREAM, "\tpop\tr%d", REGNO);        \
 555 }
 556
 557 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE)          \
 558   avr_output_addr_vec_elt(STREAM, VALUE)
 559
 560 #define ASM_OUTPUT_ALIGN(STREAM, POWER)                 \
 561   do {                                                  \
 562     if ((POWER) > 0)                                    \
 563       fprintf (STREAM, "\t.p2align\t%d\n", POWER);      \
 564   } while (0)
 565
 566 #define CASE_VECTOR_MODE HImode
 567
 568 #undef WORD_REGISTER_OPERATIONS
 569
 570 #define MOVE_MAX 4
 571
 572 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
 573
 574 #define Pmode HImode
 575
 576 #define FUNCTION_MODE HImode
 577
 578 #define DOLLARS_IN_IDENTIFIERS 0
 579
 580 #define TRAMPOLINE_SIZE 4
 581
 582 /* Store in cc_status the expressions
 583    that the condition codes will describe
 584    after execution of an instruction whose pattern is EXP.
 585    Do not alter them if the instruction would not alter the cc's.  */
 586
 587 #define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc(EXP, INSN)
 588
 589 /* The add insns don't set overflow in a usable way.  */
 590 #define CC_OVERFLOW_UNUSABLE 01000
 591 /* The mov,and,or,xor insns don't set carry.  That's ok though as the
 592    Z bit is all we need when doing unsigned comparisons on the result of
 593    these insns (since they're always with 0).  However, conditions.h has
 594    CC_NO_OVERFLOW defined for this purpose.  Rename it to something more
 595    understandable.  */
 596 #define CC_NO_CARRY CC_NO_OVERFLOW
 597
 598
 599 /* Output assembler code to FILE to increment profiler label # LABELNO
 600    for profiling a function entry.  */
 601
 602 #define FUNCTION_PROFILER(FILE, LABELNO)  \
 603   fprintf (FILE, "/* profiler %d */", (LABELNO))
 604
 605 #define ADJUST_INSN_LENGTH(INSN, LENGTH) (LENGTH =\
 606                                           adjust_insn_length (INSN, LENGTH))
 607
 608 extern const char *avr_device_to_arch (int argc, const char **argv);
 609 extern const char *avr_device_to_data_start (int argc, const char **argv);
 610 extern const char *avr_device_to_startfiles (int argc, const char **argv);
 611 extern const char *avr_device_to_devicelib (int argc, const char **argv);
 612 extern const char *avr_device_to_sp8 (int argc, const char **argv);
 613
 614 #define EXTRA_SPEC_FUNCTIONS                            \
 615   { "device_to_arch", avr_device_to_arch },             \
 616   { "device_to_data_start", avr_device_to_data_start }, \
 617   { "device_to_startfile", avr_device_to_startfiles },  \
 618   { "device_to_devicelib", avr_device_to_devicelib },   \
 619   { "device_to_sp8", avr_device_to_sp8 },
 620
 621 #define DRIVER_SELF_SPECS " %:device_to_sp8(%{mmcu=*:%*}) "
 622 #define CPP_SPEC ""
 623
 624 #define CC1_SPEC ""
 625
 626 #define CC1PLUS_SPEC "%{!frtti:-fno-rtti} \
 627     %{!fenforce-eh-specs:-fno-enforce-eh-specs} \
 628     %{!fexceptions:-fno-exceptions}"
 629 /* A C string constant that tells the GCC driver program options to
 630    pass to `cc1plus'.  */
 631
 632 #define ASM_SPEC "%{mmcu=avr25:-mmcu=avr2;mmcu=avr35:-mmcu=avr3;mmcu=avr31:-mmcu=avr3;mmcu=avr51:-mmcu=avr5;\
 633 mmcu=*:-mmcu=%*} \
 634 %{mmcu=*:%{!mmcu=avr2:%{!mmcu=at90s8515:%{!mmcu=avr31:%{!mmcu=atmega103:\
 635 -mno-skip-bug}}}}}"
 636
 637 #define LINK_SPEC "\
 638 %{mrelax:--relax\
 639          %{mpmem-wrap-around:%{mmcu=at90usb8*:--pmem-wrap-around=8k}\
 640                              %{mmcu=atmega16*:--pmem-wrap-around=16k}\
 641                              %{mmcu=atmega32*|\
 642                                mmcu=at90can32*:--pmem-wrap-around=32k}\
 643                              %{mmcu=atmega64*|\
 644                                mmcu=at90can64*|\
 645                                mmcu=at90usb64*:--pmem-wrap-around=64k}}}\
 646 %:device_to_arch(%{mmcu=*:%*})\
 647 %:device_to_data_start(%{mmcu=*:%*})"
 648
 649 #define LIB_SPEC \
 650   "%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lc }}}}}"
 651
 652 #define LIBSTDCXX "gcc"
 653 /* No libstdc++ for now.  Empty string doesn't work.  */
 654
 655 #define LIBGCC_SPEC \
 656   "%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lgcc }}}}}"
 657
 658 #define STARTFILE_SPEC "%:device_to_startfile(%{mmcu=*:%*})"
 659
 660 #define ENDFILE_SPEC ""
 661
 662 /* This is the default without any -mmcu=* option (AT90S*).  */
 663 #define MULTILIB_DEFAULTS { "mmcu=avr2" }
 664
 665 #define TEST_HARD_REG_CLASS(CLASS, REGNO) \
 666   TEST_HARD_REG_BIT (reg_class_contents[ (int) (CLASS)], REGNO)
 667
 668 #define CR_TAB "\n\t"
 669
 670 #define DWARF2_ADDR_SIZE 4
 671
 672 #define INCOMING_RETURN_ADDR_RTX   avr_incoming_return_addr_rtx ()
 673 #define INCOMING_FRAME_SP_OFFSET   (AVR_3_BYTE_PC ? 3 : 2)
 674
 675 /* The caller's stack pointer value immediately before the call
 676    is one byte below the first argument.  */
 677 #define ARG_POINTER_CFA_OFFSET(FNDECL)  -1
 678
 679 #define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \
 680   avr_hard_regno_rename_ok (OLD_REG, NEW_REG)
 681
 682 /* A C structure for machine-specific, per-function data.
 683    This is added to the cfun structure.  */
 684 struct GTY(()) machine_function
 685 {
 686   /* 'true' - if current function is a naked function.  */
 687   int is_naked;
 688
 689   /* 'true' - if current function is an interrupt function
 690      as specified by the "interrupt" attribute.  */
 691   int is_interrupt;
 692
 693   /* 'true' - if current function is a signal function
 694      as specified by the "signal" attribute.  */
 695   int is_signal;
 696
 697   /* 'true' - if current function is a 'task' function
 698      as specified by the "OS_task" attribute.  */
 699   int is_OS_task;
 700
 701   /* 'true' - if current function is a 'main' function
 702      as specified by the "OS_main" attribute.  */
 703   int is_OS_main;
 704
 705   /* Current function stack size.  */
 706   int stack_usage;
 707
 708   /* 'true' if a callee might be tail called */
 709   int sibcall_fails;
 710
 711   /* 'true' if the above is_foo predicates are sanity-checked to avoid
 712      multiple diagnose for the same function.  */
 713   int attributes_checked_p;
 714 };
 715
 716 /* AVR does not round pushes, but the existance of this macro is
 717    required in order for pushes to be generated.  */
 718 #define PUSH_ROUNDING(X)        (X)
 719
 720 /* Define prototype here to avoid build warning.  Some files using
 721    ACCUMULATE_OUTGOING_ARGS (directly or indirectly) include
 722    tm.h but not tm_p.h.  */
 723 extern int avr_accumulate_outgoing_args (void);
 724 #define ACCUMULATE_OUTGOING_ARGS avr_accumulate_outgoing_args()
 725
 726 #define INIT_EXPANDERS avr_init_expanders()