gcc/config/bfin/bfin.opt

   1 ; Options for the Blackfin port of the compiler
   2 ;
   3 ; Copyright (C) 2005-2021 Free Software Foundation, Inc.
   4 ;
   5 ; This file is part of GCC.
   6 ;
   7 ; GCC is free software; you can redistribute it and/or modify it under
   8 ; the terms of the GNU General Public License as published by the Free
   9 ; Software Foundation; either version 3, or (at your option) any later
  10 ; version.
  11 ;
  12 ; GCC is distributed in the hope that it will be useful, but WITHOUT
  13 ; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  14 ; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  15 ; License for more details.
  16 ;
  17 ; You should have received a copy of the GNU General Public License
  18 ; along with GCC; see the file COPYING3.  If not see
  19 ; <http://www.gnu.org/licenses/>.
  20
  21 HeaderInclude
  22 config/bfin/bfin-opts.h
  23
  24 ; Value of -mcpu=.
  25 Variable
  26 bfin_cpu_t bfin_cpu_type = BFIN_CPU_UNKNOWN
  27
  28 ; -msi-revision support. There are three special values:
  29 ; -1      -msi-revision=none.
  30 ; 0xffff  -msi-revision=any.
  31 Variable
  32 int bfin_si_revision
  33
  34 ; The workarounds enabled.
  35 Variable
  36 unsigned int bfin_workarounds = 0
  37
  38 msim
  39 Target RejectNegative
  40 Use simulator runtime.
  41
  42 mcpu=
  43 Target RejectNegative Joined
  44 Specify the name of the target CPU.
  45
  46 momit-leaf-frame-pointer
  47 Target Mask(OMIT_LEAF_FRAME_POINTER)
  48 Omit frame pointer for leaf functions.
  49
  50 mlow64k
  51 Target Mask(LOW_64K)
  52 Program is entirely located in low 64k of memory.
  53
  54 mcsync-anomaly
  55 Target Var(bfin_csync_anomaly) Init(-1)
  56 Work around a hardware anomaly by adding a number of NOPs before a
  57 CSYNC or SSYNC instruction.
  58
  59 mspecld-anomaly
  60 Target Var(bfin_specld_anomaly) Init(-1)
  61 Avoid speculative loads to work around a hardware anomaly.
  62
  63 mid-shared-library
  64 Target Mask(ID_SHARED_LIBRARY)
  65 Enabled ID based shared library.
  66
  67 mleaf-id-shared-library
  68 Target Mask(LEAF_ID_SHARED_LIBRARY)
  69 Generate code that won't be linked against any other ID shared libraries,
  70 but may be used as a shared library.
  71
  72 mshared-library-id=
  73 Target RejectNegative Joined UInteger Var(bfin_library_id)
  74 ID of shared library to build.
  75
  76 msep-data
  77 Target Mask(SEP_DATA)
  78 Enable separate data segment.
  79
  80 mlong-calls
  81 Target Mask(LONG_CALLS)
  82 Avoid generating pc-relative calls; use indirection.
  83
  84 mfast-fp
  85 Target Mask(FAST_FP)
  86 Link with the fast floating-point library.
  87
  88 mfdpic
  89 Target Mask(FDPIC)
  90 Enable Function Descriptor PIC mode.
  91
  92 minline-plt
  93 Target Mask(INLINE_PLT)
  94 Enable inlining of PLT in function calls.
  95
  96 mstack-check-l1
  97 Target Mask(STACK_CHECK_L1)
  98 Do stack checking using bounds in L1 scratch memory.
  99
 100 mmulticore
 101 Target Mask(MULTICORE)
 102 Enable multicore support.
 103
 104 mcorea
 105 Target Mask(COREA)
 106 Build for Core A.
 107
 108 mcoreb
 109 Target Mask(COREB)
 110 Build for Core B.
 111
 112 msdram
 113 Target Mask(SDRAM)
 114 Build for SDRAM.
 115
 116 micplb
 117 Target Mask(ICPLB)
 118 Assume ICPLBs are enabled at runtime.