1 /* Definitions of target machine for GNU compiler, Argonaut EPIPHANY cpu.
2 Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2004, 2005,
3 2007, 2009, 2011 Free Software Foundation, Inc.
4 Contributed by Embecosm on behalf of Adapteva, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
13 GCC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 #ifndef GCC_EPIPHANY_H
23 #define GCC_EPIPHANY_H
31 #undef WCHAR_TYPE_SIZE
33 /* Names to predefine in the preprocessor for this target machine. */
34 #define TARGET_CPU_CPP_BUILTINS() \
37 builtin_define ("__epiphany__"); \
38 builtin_define ("__little_endian__"); \
39 builtin_define_with_int_value ("__EPIPHANY_STACK_OFFSET__", \
40 epiphany_stack_offset); \
41 builtin_assert ("cpu=epiphany"); \
42 builtin_assert ("machine=epiphany"); \
45 /* Pick up the libgloss library. One day we may do this by linker script, but
46 for now its static. */
48 #define LIB_SPEC "%{!shared:%{g*:-lg} %{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}} -lepiphany"
50 #define LINK_SPEC "%{v}"
52 #define STARTFILE_SPEC "%{!shared:crt0.o%s} crti.o%s " \
53 "%{mfp-mode=int:crtint.o%s} %{mfp-mode=truncate:crtrunc.o%s} " \
54 "%{m1reg-r43:crtm1reg-r43.o%s} %{m1reg-r63:crtm1reg-r63.o%s} " \
57 #define ENDFILE_SPEC "crtend.o%s crtn.o%s"
59 #undef USER_LABEL_PREFIX
60 #define USER_LABEL_PREFIX "_"
62 #define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \
64 mov r0,%low(" USER_LABEL_PREFIX #FUNC")\n\
65 movt r0,%high(" USER_LABEL_PREFIX #FUNC")\n\
69 #if 0 /* We would like to use Posix for profiling, but the simulator
70 interface still lacks mkdir. */
71 #define TARGET_POSIX_IO
74 /* Target machine storage layout. */
76 /* Define this if most significant bit is lowest numbered
77 in instructions that operate on numbered bit-fields. */
78 #define BITS_BIG_ENDIAN 0
80 /* Define this if most significant byte of a word is the lowest numbered. */
81 #define BYTES_BIG_ENDIAN 0
83 /* Define this if most significant word of a multiword number is the lowest
85 #define WORDS_BIG_ENDIAN 0
87 /* Width of a word, in units (bytes). */
88 #define UNITS_PER_WORD 4
90 /* Define this macro if it is advisable to hold scalars in registers
91 in a wider mode than that declared by the program. In such cases,
92 the value is constrained to be within the bounds of the declared
93 type, but kept valid in the wider mode. The signedness of the
94 extension may differ from that of the type. */
95 /* It is far faster to zero extend chars than to sign extend them */
97 #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \
98 if (GET_MODE_CLASS (MODE) == MODE_INT \
99 && GET_MODE_SIZE (MODE) < 4) \
101 if (MODE == QImode) \
103 else if (MODE == HImode) \
108 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
109 #define PARM_BOUNDARY 32
111 /* Boundary (in *bits*) on which stack pointer should be aligned. */
112 #define STACK_BOUNDARY 64
114 /* ALIGN FRAMES on word boundaries */
115 #define EPIPHANY_STACK_ALIGN(LOC) (((LOC)+7) & ~7)
117 /* Allocation boundary (in *bits*) for the code of a function. */
118 #define FUNCTION_BOUNDARY 32
120 /* Every structure's size must be a multiple of this. */
121 #define STRUCTURE_SIZE_BOUNDARY 8
123 /* A bit-field declared as `int' forces `int' alignment for the struct. */
124 #define PCC_BITFIELD_TYPE_MATTERS 1
126 /* No data type wants to be aligned rounder than this. */
127 /* This is bigger than currently necessary for the EPIPHANY. If 8 byte floats are
128 ever added it's not clear whether they'll need such alignment or not. For
129 now we assume they will. We can always relax it if necessary but the
130 reverse isn't true. */
131 #define BIGGEST_ALIGNMENT 64
133 /* The best alignment to use in cases where we have a choice. */
134 #define FASTEST_ALIGNMENT 64
136 #define MALLOC_ABI_ALIGNMENT BIGGEST_ALIGNMENT
138 /* Make strings dword-aligned so strcpy from constants will be faster. */
139 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
140 ((TREE_CODE (EXP) == STRING_CST \
141 && (ALIGN) < FASTEST_ALIGNMENT) \
142 ? FASTEST_ALIGNMENT : (ALIGN))
144 /* Make arrays of chars dword-aligned for the same reasons.
145 Also, align arrays of SImode items. */
146 #define DATA_ALIGNMENT(TYPE, ALIGN) \
147 (TREE_CODE (TYPE) == ARRAY_TYPE \
148 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
149 && (ALIGN) < FASTEST_ALIGNMENT \
150 ? FASTEST_ALIGNMENT \
151 : (TREE_CODE (TYPE) == ARRAY_TYPE \
152 && TYPE_MODE (TREE_TYPE (TYPE)) == SImode \
153 && (ALIGN) < FASTEST_ALIGNMENT) \
154 ? FASTEST_ALIGNMENT \
157 /* Set this nonzero if move instructions will actually fail to work
158 when given unaligned data. */
159 /* On the EPIPHANY the lower address bits are masked to 0 as necessary. The chip
160 won't croak when given an unaligned address, but the insn will still fail
161 to produce the correct result. */
162 #define STRICT_ALIGNMENT 1
164 /* layout_type overrides our ADJUST_ALIGNMENT settings from epiphany-modes.def
165 for vector modes, so we have to override it back. */
166 #define ROUND_TYPE_ALIGN(TYPE, MANGLED_ALIGN, SPECIFIED_ALIGN) \
167 (TREE_CODE (TYPE) == VECTOR_TYPE && !TYPE_USER_ALIGN (TYPE) \
168 && SPECIFIED_ALIGN <= GET_MODE_ALIGNMENT (TYPE_MODE (TYPE)) \
169 ? GET_MODE_ALIGNMENT (TYPE_MODE (TYPE)) \
170 : ((TREE_CODE (TYPE) == RECORD_TYPE \
171 || TREE_CODE (TYPE) == UNION_TYPE \
172 || TREE_CODE (TYPE) == QUAL_UNION_TYPE) \
173 && !TYPE_PACKED (TYPE)) \
174 ? epiphany_special_round_type_align ((TYPE), (MANGLED_ALIGN), \
176 : MAX ((MANGLED_ALIGN), (SPECIFIED_ALIGN)))
178 #define ADJUST_FIELD_ALIGN(FIELD, COMPUTED) \
179 epiphany_adjust_field_align((FIELD), (COMPUTED))
181 /* Layout of source language data types. */
183 #define SHORT_TYPE_SIZE 16
184 #define INT_TYPE_SIZE 32
185 #define LONG_TYPE_SIZE 32
186 #define LONG_LONG_TYPE_SIZE 64
187 #define FLOAT_TYPE_SIZE 32
188 #define DOUBLE_TYPE_SIZE 64
189 #define LONG_DOUBLE_TYPE_SIZE 64
191 /* Define this as 1 if `char' should by default be signed; else as 0. */
192 #define DEFAULT_SIGNED_CHAR 0
194 #define SIZE_TYPE "long unsigned int"
195 #define PTRDIFF_TYPE "long int"
196 #define WCHAR_TYPE "unsigned int"
197 #define WCHAR_TYPE_SIZE BITS_PER_WORD
199 /* Standard register usage. */
201 /* Number of actual hardware registers.
202 The hardware registers are assigned numbers for the compiler
203 from 0 to just below FIRST_PSEUDO_REGISTER.
204 All registers that the compiler knows about must be given numbers,
205 even those that are not normally considered general registers. */
207 #define FIRST_PSEUDO_REGISTER 78
210 /* General purpose registers. */
211 #define GPR_FIRST 0 /* First gpr */
213 #define PIC_REGNO (GPR_FIRST + 28) /* PIC register. */
214 #define GPR_LAST (GPR_FIRST + 63) /* Last gpr */
215 #define CORE_CONTROL_FIRST CONFIG_REGNUM
216 #define CORE_CONTROL_LAST IRET_REGNUM
218 #define GPR_P(R) IN_RANGE (R, GPR_FIRST, GPR_LAST)
219 #define GPR_OR_AP_P(R) (GPR_P (R) || (R) == ARG_POINTER_REGNUM)
221 #define GPR_OR_PSEUDO_P(R) (GPR_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
222 #define GPR_AP_OR_PSEUDO_P(R) (GPR_OR_AP_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
224 #define FIXED_REGISTERS \
225 { /* Integer Registers */ \
226 0, 0, 0, 0, 0, 0, 0, 0, /* 000-007, gr0 - gr7 */ \
227 0, 0, 0, 0, 0, 1, 0, 0, /* 008-015, gr8 - gr15 */ \
228 0, 0, 0, 0, 0, 0, 0, 0, /* 016-023, gr16 - gr23 */ \
229 0, 0, 0, 0, 1, 1, 1, 1, /* 024-031, gr24 - gr31 */ \
230 0, 0, 0, 0, 0, 0, 0, 0, /* 032-039, gr32 - gr39 */ \
231 1, 1, 1, 1, 0, 0, 0, 0, /* 040-047, gr40 - gr47 */ \
232 0, 0, 0, 0, 0, 0, 0, 0, /* 048-055, gr48 - gr55 */ \
233 0, 0, 0, 0, 0, 0, 0, 0, /* 056-063, gr56 - gr63 */ \
234 /* Other registers */ \
235 1, /* 64 AP - fake arg ptr */ \
236 1, /* soft frame pointer */ \
237 1, /* CC_REGNUM - integer conditions */\
238 1, /* CCFP_REGNUM - fp conditions */\
239 1, 1, 1, 1, 1, 1, /* Core Control Registers. */ \
240 1, 1, 1, /* FP_{NEAREST,...}_REGNUM */\
241 1, /* UNKNOWN_REGNUM - placeholder. */\
244 /* Like `FIXED_REGISTERS' but has 1 for each register that is clobbered (in
245 general) by function calls as well as for fixed registers. This macro
246 therefore identifies the registers that are not available for general
247 allocation of values that must live across function calls.
249 If a register has 0 in `CALL_USED_REGISTERS', the compiler automatically
250 saves it on function entry and restores it on function exit, if the register
251 is used within the function. */
253 #define CALL_USED_REGISTERS \
254 { /* Integer Registers */ \
255 1, 1, 1, 1, 0, 0, 0, 0, /* 000-007, gr0 - gr7 */ \
256 0, 0, 0, 0, 1, 1, 1, 0, /* 008-015, gr8 - gr15 */ \
257 1, 1, 1, 1, 1, 1, 1, 1, /* 016-023, gr16 - gr23 */ \
258 1, 1, 1, 1, 1, 1, 1, 1, /* 024-031, gr24 - gr31 */ \
259 0, 0, 0, 0, 0, 0, 0, 0, /* 032-039, gr32 - gr38 */ \
260 1, 1, 1, 1, 1, 1, 1, 1, /* 040-047, gr40 - gr47 */ \
261 1, 1, 1, 1, 1, 1, 1, 1, /* 048-055, gr48 - gr55 */ \
262 1, 1, 1, 1, 1, 1, 1, 1, /* 056-063, gr56 - gr63 */ \
263 1, /* 64 AP - fake arg ptr */ \
264 1, /* soft frame pointer */ \
265 1, /* 66 CC_REGNUM */ \
266 1, /* 67 CCFP_REGNUM */ \
267 1, 1, 1, 1, 1, 1, /* Core Control Registers. */ \
268 1, 1, 1, /* FP_{NEAREST,...}_REGNUM */\
269 1, /* UNKNOWN_REGNUM - placeholder. */\
272 #define REG_ALLOC_ORDER \
274 0, 1, 2, 3, /* Caller-saved 'small' registers. */ \
275 12, /* Caller-saved unpaired register. */ \
276 /* Caller-saved registers. */ \
277 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, \
279 48, 49, 50, 51, 52, 53, 54, 55, \
280 56, 57, 58, 59, 60, 61, 62, 63, \
281 4, 5, 6, 7, /* Calle-saved 'small' registers. */ \
282 15, /* Calle-saved unpaired register. */ \
283 8, 9, 10, 11, /* Calle-saved registers. */ \
284 32, 33, 34, 35, 36, 37, 38, 39, \
285 14, 13, /* Link register, stack pointer. */ \
286 40, 41, 42, 43, /* Usually constant, but might be made callee-saved. */ \
287 /* Can't allocate, but must name these... */ \
289 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77 \
292 /* Return number of consecutive hard regs needed starting at reg REGNO
293 to hold something of mode MODE.
294 This is ordinarily the length in words of a value of mode MODE
295 but can be less for certain modes in special long registers. */
296 #define HARD_REGNO_NREGS(REGNO, MODE) \
297 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
299 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. */
300 extern const unsigned int epiphany_hard_regno_mode_ok
[];
301 extern unsigned int epiphany_mode_class
[];
302 #define HARD_REGNO_MODE_OK(REGNO, MODE) hard_regno_mode_ok((REGNO), (MODE))
304 /* A C expression that is nonzero if it is desirable to choose
305 register allocation so as to avoid move instructions between a
306 value of mode MODE1 and a value of mode MODE2.
308 If `HARD_REGNO_MODE_OK (R, MODE1)' and `HARD_REGNO_MODE_OK (R,
309 MODE2)' are ever different for any R, then `MODES_TIEABLE_P (MODE1,
310 MODE2)' must be zero. */
312 #define MODES_TIEABLE_P(MODE1, MODE2) 1
314 /* Register classes and constants. */
316 /* Define the classes of registers for register constraints in the
317 machine description. Also define ranges of constants.
319 One of the classes must always be named ALL_REGS and include all hard regs.
320 If there is more than one class, another class must be named NO_REGS
321 and contain no registers.
323 The name GENERAL_REGS must be the name of a class (or an alias for
324 another name such as ALL_REGS). This is the class of registers
325 that is allowed by "g" or "r" in a register constraint.
326 Also, registers outside this class are allocated only when
327 instructions express preferences for them.
329 The classes must be numbered in nondecreasing order; that is,
330 a larger-numbered class must never be contained completely
331 in a smaller-numbered class.
333 For any two classes, it is very desirable that there be another
334 class that represents their union.
336 It is important that any condition codes have class NO_REGS.
337 See `register_operand'. */
350 #define N_REG_CLASSES ((int) LIM_REG_CLASSES)
352 /* Give names of register classes as strings for dump file. */
353 #define REG_CLASS_NAMES \
360 "CORE_CONTROL_REGS", \
364 /* Define which registers fit in which classes.
365 This is an initializer for a vector of HARD_REG_SET
366 of length N_REG_CLASSES. */
368 #define REG_CLASS_CONTENTS \
369 { /* r0-r31 r32-r63 ap/sfp/cc1/cc2/iret/status */ \
370 { 0x00000000,0x00000000,0x0}, /* NO_REGS */ \
371 { 0x00004000,0x00000000,0x0}, /* LR_REGS */ \
372 { 0x000000ff,0x00000000,0x0}, /* SHORT_INSN_REGS */ \
373 { 0xffff100f,0xffffff00,0x0}, /* SIBCALL_REGS */ \
374 { 0xffffffff,0xffffffff,0x0003}, /* GENERAL_REGS */ \
375 { 0x00000000,0x00000000,0x03f0}, /* CORE_CONTROL_REGS */ \
376 { 0xffffffff,0xffffffff,0x3fff}, /* ALL_REGS */ \
380 /* The same information, inverted:
381 Return the class number of the smallest class containing
382 reg number REGNO. This could be a conditional expression
383 or could index an array. */
384 extern enum reg_class epiphany_regno_reg_class
[FIRST_PSEUDO_REGISTER
];
385 #define REGNO_REG_CLASS(REGNO) \
386 (epiphany_regno_reg_class[REGNO])
388 /* The class value for index registers, and the one for base regs. */
389 #define BASE_REG_CLASS GENERAL_REGS
390 #define INDEX_REG_CLASS GENERAL_REGS
392 /* These assume that REGNO is a hard or pseudo reg number.
393 They give nonzero only if REGNO is a hard reg of the suitable class
394 or a pseudo reg currently allocated to a suitable hard reg.
395 Since they use reg_renumber, they are safe only once reg_renumber
396 has been allocated, which happens in local-alloc.c. */
397 #define REGNO_OK_FOR_BASE_P(REGNO) \
398 ((REGNO) < FIRST_PSEUDO_REGISTER || (unsigned) reg_renumber[REGNO] < FIRST_PSEUDO_REGISTER)
399 #define REGNO_OK_FOR_INDEX_P(REGNO) \
400 ((REGNO) < FIRST_PSEUDO_REGISTER || (unsigned) reg_renumber[REGNO] < FIRST_PSEUDO_REGISTER)
404 /* Given an rtx X being reloaded into a reg required to be
405 in class CLASS, return the class of reg to actually use.
406 In general this is just CLASS; but on some machines
407 in some cases it is preferable to use a more restrictive class. */
408 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
411 /* Return the maximum number of consecutive registers
412 needed to represent mode MODE in a register of class CLASS. */
413 #define CLASS_MAX_NREGS(CLASS, MODE) \
414 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
416 /* The letters I, J, K, L, M, N, O, P in a register constraint string
417 can be used to stand for particular ranges of immediate operands.
418 This macro defines what the ranges are.
419 C is the letter, and VALUE is a constant value.
420 Return 1 if VALUE is in the range specified by C. */
422 /* 'I' is used for 16 bit unsigned.
423 'Cal' is used for long immediates (32 bits)
424 'K' is used for any constant up to 5 bits.
425 'L' is used for any 11 bit signed.
428 #define IMM16(X) (IN_RANGE ((X), 0, 0xFFFF))
429 #define SIMM16(X) (IN_RANGE ((X), -65536, 65535))
430 #define SIMM11(X) (IN_RANGE ((X), -1024, 1023))
431 #define IMM5(X) (IN_RANGE ((X), 0, 0x1F))
433 typedef struct GTY (()) machine_function
435 unsigned args_parsed
: 1;
436 unsigned pretend_args_odd
: 1;
437 unsigned lr_clobbered
: 1;
438 unsigned control_use_inserted
: 1;
439 unsigned sw_entities_processed
: 6;
443 unsigned unknown_mode_uses
;
444 unsigned unknown_mode_sets
;
445 } machine_function_t
;
447 #define MACHINE_FUNCTION(fun) (fun)->machine
449 #define INIT_EXPANDERS epiphany_init_expanders ()
451 /* Stack layout and stack pointer usage. */
453 /* Define this macro if pushing a word onto the stack moves the stack
454 pointer to a smaller address. */
455 #define STACK_GROWS_DOWNWARD
457 /* Define this to nonzero if the nominal address of the stack frame
458 is at the high-address end of the local variables;
459 that is, each additional local variable allocated
460 goes at a more negative offset in the frame. */
461 #define FRAME_GROWS_DOWNWARD 1
463 /* Offset within stack frame to start allocating local variables at.
464 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
465 first local allocated. Otherwise, it is the offset to the BEGINNING
466 of the first local allocated. */
467 #define STARTING_FRAME_OFFSET epiphany_stack_offset
469 /* Offset from the stack pointer register to the first location at which
470 outgoing arguments are placed. */
471 #define STACK_POINTER_OFFSET epiphany_stack_offset
473 /* Offset of first parameter from the argument pointer register value. */
474 /* 4 bytes for each of previous fp, return address, and previous gp.
475 4 byte reserved area for future considerations. */
476 #define FIRST_PARM_OFFSET(FNDECL) \
477 (epiphany_stack_offset \
478 + (MACHINE_FUNCTION (DECL_STRUCT_FUNCTION (FNDECL))->pretend_args_odd \
481 #define INCOMING_FRAME_SP_OFFSET epiphany_stack_offset
483 /* Register to use for pushing function arguments. */
484 #define STACK_POINTER_REGNUM GPR_SP
486 /* Base register for access to local variables of the function. */
487 #define HARD_FRAME_POINTER_REGNUM GPR_FP
489 /* Register in which static-chain is passed to a function. This must
490 not be a register used by the prologue. */
491 #define STATIC_CHAIN_REGNUM GPR_IP
493 /* Define the offset between two registers, one to be eliminated, and the other
494 its replacement, at the start of a routine. */
496 #define ELIMINABLE_REGS \
497 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
498 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
499 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
500 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
503 /* Define the offset between two registers, one to be eliminated, and the other
504 its replacement, at the start of a routine. */
506 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
507 ((OFFSET) = epiphany_initial_elimination_offset ((FROM), (TO)))
509 /* Function argument passing. */
511 /* If defined, the maximum amount of space required for outgoing
512 arguments will be computed and placed into the variable
513 `current_function_outgoing_args_size'. No space will be pushed
514 onto the stack for each call; instead, the function prologue should
515 increase the stack frame size by this amount. */
516 #define ACCUMULATE_OUTGOING_ARGS 1
518 /* Define a data type for recording info about an argument list
519 during the scan of that argument list. This data type should
520 hold all necessary information about the function itself
521 and about the args processed so far, enough to enable macros
522 such as FUNCTION_ARG to determine where the next arg should go. */
523 #define CUMULATIVE_ARGS int
525 /* Initialize a variable CUM of type CUMULATIVE_ARGS
526 for a call to a function whose data type is FNTYPE.
527 For a library call, FNTYPE is 0. */
528 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
531 /* The number of registers used for parameter passing. Local to this file. */
532 #define MAX_EPIPHANY_PARM_REGS 4
534 /* 1 if N is a possible register number for function argument passing. */
535 #define FUNCTION_ARG_REGNO_P(N) \
536 ((unsigned) (N) < MAX_EPIPHANY_PARM_REGS)
538 /* Return boolean indicating arg of type TYPE and mode MODE will be passed in
539 a reg. This includes arguments that have to be passed by reference as the
540 pointer to them is passed in a reg if one is available (and that is what
542 This macro is only used in this file. */
543 /* We must use partial argument passing because of the chosen mode
544 of varargs handling. */
545 #define PASS_IN_REG_P(CUM, MODE, TYPE) \
546 (ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE)) < MAX_EPIPHANY_PARM_REGS)
548 /* Tell GCC to use TARGET_RETURN_IN_MEMORY. */
549 #define DEFAULT_PCC_STRUCT_RETURN 0
551 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
552 the stack pointer does not matter. The value is tested only in
553 functions that have frame pointers.
554 No definition is equivalent to always zero. */
555 #define EXIT_IGNORE_STACK 1
557 #define EPILOGUE_USES(REGNO) epiphany_epilogue_uses (REGNO)
559 /* Output assembler code to FILE to increment profiler label # LABELNO
560 for profiling a function entry. */
561 #define FUNCTION_PROFILER(FILE, LABELNO)
563 /* Given an rtx for the frame pointer,
564 return an rtx for the address of the frame. */
565 #define FRAME_ADDR_RTX(frame) \
566 ((frame) == hard_frame_pointer_rtx ? arg_pointer_rtx : NULL)
568 /* This is not only for dwarf unwind info, but also for the benefit of
569 df-scan.c to tell it that LR is live at the function start. */
570 #define INCOMING_RETURN_ADDR_RTX \
571 gen_rtx_REG (Pmode, \
572 (current_function_decl != NULL \
573 && epiphany_is_interrupt_p (current_function_decl) \
574 ? IRET_REGNUM : GPR_LR))
576 /* However, we haven't implemented the rest needed for dwarf2 unwind info. */
577 #define DWARF2_UNWIND_INFO 0
579 #define RETURN_ADDR_RTX(count, frame) \
581 : gen_rtx_UNSPEC (SImode, gen_rtvec (1, const0_rtx), UNSPEC_RETURN_ADDR))
584 An epiphany trampoline looks like this:
586 movt r16,%high(fnaddr)
591 /* Length in units of the trampoline for entering a nested function. */
592 #define TRAMPOLINE_SIZE 20
594 /* Addressing modes, and classification of registers for them. */
596 /* Maximum number of registers that can appear in a valid memory address. */
597 #define MAX_REGS_PER_ADDRESS 2
599 /* We have post_modify (load/store with update). */
600 #define HAVE_POST_INCREMENT TARGET_POST_INC
601 #define HAVE_POST_DECREMENT TARGET_POST_INC
602 #define HAVE_POST_MODIFY_DISP TARGET_POST_MODIFY
603 #define HAVE_POST_MODIFY_REG TARGET_POST_MODIFY
605 /* Currently, the only users of the USE_*CREMENT macros are
606 move_by_pieces / store_by_pieces_1 . We don't want them to use
607 POST_MODIFY modes, because we got ample addressing range for the
608 reg+offset addressing mode; besides, there are short index+offset loads,
609 but the only short post-modify load uses POST_MODIFY_REG.
610 Moreover, using auto-increment in move_by_pieces from structure copying
611 in the prologue causes confused debug output.
612 If another pass starts using these macros where the use of these
613 addressing modes would make more sense, we can try checking the
615 #define USE_LOAD_POST_INCREMENT(MODE) 0
616 #define USE_LOAD_POST_DECREMENT(MODE) 0
617 #define USE_STORE_POST_INCREMENT(MODE) 0
618 #define USE_STORE_POST_DECREMENT(MODE) 0
620 /* Recognize any constant value that is a valid address. */
621 #define CONSTANT_ADDRESS_P(X) \
622 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
623 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST)
625 #define RTX_OK_FOR_OFFSET_P(MODE, X) \
626 RTX_OK_FOR_OFFSET_1 (GET_MODE_CLASS (MODE) == MODE_VECTOR_INT \
627 && epiphany_vect_align == 4 ? SImode : (MODE), X)
628 #define RTX_OK_FOR_OFFSET_1(MODE, X) \
629 (GET_CODE (X) == CONST_INT \
630 && !(INTVAL (X) & (GET_MODE_SIZE (MODE) - 1)) \
631 && INTVAL (X) >= -2047 * (int) GET_MODE_SIZE (MODE) \
632 && INTVAL (X) <= 2047 * (int) GET_MODE_SIZE (MODE))
634 /* Frame offsets cannot be evaluated till the frame pointer is eliminated. */
635 #define RTX_FRAME_OFFSET_P(X) \
636 ((X) == frame_pointer_rtx \
637 || (GET_CODE (X) == PLUS && XEXP ((X), 0) == frame_pointer_rtx \
638 && CONST_INT_P (XEXP ((X), 1))))
640 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
641 return the mode to be used for the comparison. */
642 #define SELECT_CC_MODE(OP, X, Y) \
643 epiphany_select_cc_mode (OP, X, Y)
645 /* Return nonzero if SELECT_CC_MODE will never return MODE for a
646 floating point inequality comparison. */
648 #define REVERSE_CONDITION(CODE, MODE) \
649 ((MODE) == CC_FPmode || (MODE) == CC_FP_EQmode || (MODE) == CC_FP_GTEmode \
650 || (MODE) == CC_FP_ORDmode || (MODE) == CC_FP_UNEQmode \
651 ? reverse_condition_maybe_unordered (CODE) \
652 : (MODE) == CCmode ? reverse_condition (CODE) \
655 /* We can reverse all CCmodes with REVERSE_CONDITION. */
656 #define REVERSIBLE_CC_MODE(MODE) \
657 ((MODE) == CCmode || (MODE) == CC_FPmode || (MODE) == CC_FP_EQmode \
658 || (MODE) == CC_FP_GTEmode || (MODE) == CC_FP_ORDmode \
659 || (MODE) == CC_FP_UNEQmode)
663 /* The cost of a branch insn. */
664 /* ??? What's the right value here? Branches are certainly more
665 expensive than reg->reg moves. */
666 #define BRANCH_COST(speed_p, predictable_p) \
667 (speed_p ? epiphany_branch_cost : 1)
669 /* Nonzero if access to memory by bytes is slow and undesirable.
670 For RISC chips, it means that access to memory by bytes is no
671 better than access by words when possible, so grab a whole word
672 and maybe make use of that. */
673 #define SLOW_BYTE_ACCESS 1
675 /* Define this macro if it is as good or better to call a constant
676 function address than to call an address kept in a register. */
677 /* On the EPIPHANY, calling through registers is slow. */
678 #define NO_FUNCTION_CSE
680 /* Section selection. */
681 /* WARNING: These section names also appear in dwarf2out.c. */
683 #define TEXT_SECTION_ASM_OP "\t.section .text"
684 #define DATA_SECTION_ASM_OP "\t.section .data"
686 #undef READONLY_DATA_SECTION_ASM_OP
687 #define READONLY_DATA_SECTION_ASM_OP "\t.section .rodata"
689 #define BSS_SECTION_ASM_OP "\t.section .bss"
691 /* Define this macro if jump tables (for tablejump insns) should be
692 output in the text section, along with the assembler instructions.
693 Otherwise, the readonly data section is used.
694 This macro is irrelevant if there is no separate readonly data section. */
695 #define JUMP_TABLES_IN_TEXT_SECTION (flag_pic)
699 /* The register number of the register used to address a table of static
700 data addresses in memory. In some cases this register is defined by a
701 processor's ``application binary interface'' (ABI). When this macro
702 is defined, RTL is generated for this register once, as with the stack
703 pointer and frame pointer registers. If this macro is not defined, it
704 is up to the machine-dependent files to allocate such a register (if
706 #define PIC_OFFSET_TABLE_REGNUM (flag_pic ? PIC_REGNO : INVALID_REGNUM)
708 /* Control the assembler format that we output. */
710 /* A C string constant describing how to begin a comment in the target
711 assembler language. The compiler assumes that the comment will
712 end at the end of the line. */
713 #define ASM_COMMENT_START ";"
715 /* Output to assembler file text saying following lines
716 may contain character constants, extra white space, comments, etc. */
717 #define ASM_APP_ON ""
719 /* Output to assembler file text saying following lines
720 no longer contain unusual constructs. */
721 #define ASM_APP_OFF ""
723 /* Globalizing directive for a label. */
724 #define GLOBAL_ASM_OP "\t.global\t"
726 /* How to refer to registers in assembler output.
727 This sequence is indexed by compiler's hard-register-number (see above). */
729 #define REGISTER_NAMES \
731 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
732 "r8", "r9", "r10", "fp", "ip", "sp", "lr", "r15", \
733 "r16", "r17","r18", "r19", "r20", "r21", "r22", "r23", \
734 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", \
735 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39", \
736 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47", \
737 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55", \
738 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63", \
739 "ap", "sfp", "cc1", "cc2", \
740 "config", "status", "lc", "ls", "le", "iret", \
741 "fp_near", "fp_trunc", "fp_anyfp", "unknown" \
744 #define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS) \
745 epiphany_final_prescan_insn (INSN, OPVEC, NOPERANDS)
747 #define LOCAL_LABEL_PREFIX "."
749 /* A C expression which evaluates to true if CODE is a valid
750 punctuation character for use in the `PRINT_OPERAND' macro. */
751 extern char epiphany_punct_chars
[256];
752 #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
753 epiphany_punct_chars[(unsigned char) (CHAR)]
755 /* This is how to output an element of a case-vector that is absolute. */
756 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
758 if (CASE_VECTOR_MODE == Pmode) \
759 asm_fprintf ((FILE), "\t.word %LL%d\n", (VALUE)); \
761 asm_fprintf ((FILE), "\t.short %LL%d\n", (VALUE)); \
764 /* This is how to output an element of a case-vector that is relative. */
765 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
767 if (CASE_VECTOR_MODE == Pmode) \
768 asm_fprintf ((FILE), "\t.word"); \
770 asm_fprintf ((FILE), "\t.short"); \
771 asm_fprintf ((FILE), " %LL%d-%LL%d\n", (VALUE), (REL)); \
774 /* This is how to output an assembler line
775 that says to advance the location counter
776 to a multiple of 2**LOG bytes. */
777 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
778 do { if ((LOG) != 0) fprintf (FILE, "\t.balign %d\n", 1 << (LOG)); } while (0)
780 /* Debugging information. */
782 /* Generate DBX and DWARF debugging information. */
783 #define DBX_DEBUGGING_INFO 1
785 #undef PREFERRED_DEBUGGING_TYPE
786 #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
788 /* Turn off splitting of long stabs. */
789 #define DBX_CONTIN_LENGTH 0
793 /* Specify the machine mode that this machine uses
794 for the index in the tablejump instruction. */
795 #define CASE_VECTOR_MODE (TARGET_SMALL16 && optimize_size ? HImode : Pmode)
797 /* Define if operations between registers always perform the operation
798 on the full register even if a narrower mode is specified. */
799 #define WORD_REGISTER_OPERATIONS
801 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
802 will either zero-extend or sign-extend. The value of this macro should
803 be the code that says which one of the two operations is implicitly
804 done, UNKNOWN if none. */
805 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
807 /* Max number of bytes we can move from memory to memory
808 in one reasonably fast instruction. */
811 /* Define this to be nonzero if shift instructions ignore all but the low-order
813 #define SHIFT_COUNT_TRUNCATED 1
815 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
816 is done just by pretending it is already truncated. */
817 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
819 /* Specify the machine mode that pointers have.
820 After generation of rtl, the compiler makes no further distinction
821 between pointers and any other objects of this machine mode. */
825 /* A function address in a call instruction. */
826 #define FUNCTION_MODE SImode
828 /* EPIPHANY function types. */
829 enum epiphany_function_type
831 EPIPHANY_FUNCTION_UNKNOWN
, EPIPHANY_FUNCTION_NORMAL
,
832 /* These are interrupt handlers. The name corresponds to the register
833 name that contains the return address. */
834 EPIPHANY_FUNCTION_ILINK1
, EPIPHANY_FUNCTION_ILINK2
,
835 /* These are interrupt handlers. The name corresponds to which type
836 of interrupt handler we're dealing with. */
837 EPIPHANY_FUNCTION_RESET
, EPIPHANY_FUNCTION_SOFTWARE_EXCEPTION
,
838 EPIPHANY_FUNCTION_TIMER
, EPIPHANY_FUNCTION_DMA0
,
839 EPIPHANY_FUNCTION_DMA1
, EPIPHANY_FUNCTION_STATIC_FLAG
,
840 EPIPHANY_FUNCTION_SWI
843 #define EPIPHANY_INTERRUPT_P(TYPE) \
844 ((TYPE) >= EPIPHANY_FUNCTION_RESET && (TYPE) <= EPIPHANY_FUNCTION_SWI)
846 /* Compute the type of a function from its DECL. */
848 #define IMMEDIATE_PREFIX "#"
850 #define OPTIMIZE_MODE_SWITCHING(ENTITY) \
851 (epiphany_optimize_mode_switching (ENTITY))
853 /* We have two fake entities for lazy code motion of the mask constants,
854 one entity each for round-to-nearest / truncating
855 with a different idea what FP_MODE_ROUND_UNKNOWN will be, and
856 finally an entity that runs in a second mode switching pass to
857 resolve FP_MODE_ROUND_UNKNOWN. */
858 #define NUM_MODES_FOR_MODE_SWITCHING \
859 { 2, 2, FP_MODE_NONE, FP_MODE_NONE, FP_MODE_NONE, FP_MODE_NONE, FP_MODE_NONE }
861 #define MODE_NEEDED(ENTITY, INSN) epiphany_mode_needed((ENTITY), (INSN))
863 #define MODE_PRIORITY_TO_MODE(ENTITY, N) \
864 (epiphany_mode_priority_to_mode ((ENTITY), (N)))
866 #define EMIT_MODE_SET(ENTITY, MODE, HARD_REGS_LIVE) \
867 emit_set_fp_mode ((ENTITY), (MODE), (HARD_REGS_LIVE))
869 #define MODE_ENTRY(ENTITY) (epiphany_mode_entry_exit ((ENTITY), false))
870 #define MODE_EXIT(ENTITY) (epiphany_mode_entry_exit ((ENTITY), true))
871 #define MODE_AFTER(LAST_MODE, INSN) \
872 (epiphany_mode_after (e, (LAST_MODE), (INSN)))
874 #define TARGET_INSERT_MODE_SWITCH_USE epiphany_insert_mode_switch_use
876 /* Mode switching entities. */
879 EPIPHANY_MSW_ENTITY_AND
,
880 EPIPHANY_MSW_ENTITY_OR
,
881 EPIPHANY_MSW_ENTITY_NEAREST
,
882 EPIPHANY_MSW_ENTITY_TRUNC
,
883 EPIPHANY_MSW_ENTITY_ROUND_UNKNOWN
,
884 EPIPHANY_MSW_ENTITY_ROUND_KNOWN
,
885 EPIPHANY_MSW_ENTITY_FPU_OMNIBUS
888 extern int epiphany_normal_fp_rounding
;
889 extern struct rtl_opt_pass pass_mode_switch_use
;
890 extern struct rtl_opt_pass pass_resolve_sw_modes
;
892 /* This will need to be adjusted when FP_CONTRACT_ON is properly
894 #define TARGET_FUSED_MADD (flag_fp_contract_mode == FP_CONTRACT_FAST)
896 #endif /* !GCC_EPIPHANY_H */