1 /* Definitions of target machine for GNU compiler, Argonaut EPIPHANY cpu.
2 Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2004, 2005,
3 2007, 2009, 2011 Free Software Foundation, Inc.
4 Contributed by Embecosm on behalf of Adapteva, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
13 GCC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 #ifndef GCC_EPIPHANY_H
23 #define GCC_EPIPHANY_H
31 #undef WCHAR_TYPE_SIZE
33 /* Names to predefine in the preprocessor for this target machine. */
34 #define TARGET_CPU_CPP_BUILTINS() \
37 builtin_define ("__epiphany__"); \
38 builtin_define ("__little_endian__"); \
39 builtin_define_with_int_value ("__EPIPHANY_STACK_OFFSET__", \
40 epiphany_stack_offset); \
41 builtin_assert ("cpu=epiphany"); \
42 builtin_assert ("machine=epiphany"); \
45 /* Pick up the libgloss library. One day we may do this by linker script, but
47 libgloss might use errno/__errno, which might not have been needed when we
48 saw libc the first time, so link with libc a second time. */
50 #define LIB_SPEC "%{!shared:%{g*:-lg} %{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}} -lepiphany %{!shared:%{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}}"
52 #define LINK_SPEC "%{v}"
54 #define STARTFILE_SPEC "%{!shared:crt0.o%s} crti.o%s " \
55 "%{mfp-mode=int:crtint.o%s} %{mfp-mode=truncate:crtrunc.o%s} " \
56 "%{m1reg-r43:crtm1reg-r43.o%s} %{m1reg-r63:crtm1reg-r63.o%s} " \
59 #define ENDFILE_SPEC "crtend.o%s crtn.o%s"
61 #define EPIPHANY_LIBRARY_EXTRA_SPEC \
62 "-ffixed-r40 -ffixed-r41 -ffixed-r42 -ffixed-r43"
64 /* In the "spec:" rule,, t-epiphany changes this to epiphany_library_stub_spec
65 and epiphany_library_extra_spec, respectively. */
67 { "epiphany_library_extra_spec", "" }, \
68 { "epiphany_library_build_spec", EPIPHANY_LIBRARY_EXTRA_SPEC }, \
70 #define DRIVER_SELF_SPECS " %(epiphany_library_extra_spec) "
72 #undef USER_LABEL_PREFIX
73 #define USER_LABEL_PREFIX "_"
75 #define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \
77 mov r0,%low(" USER_LABEL_PREFIX #FUNC")\n\
78 movt r0,%high(" USER_LABEL_PREFIX #FUNC")\n\
82 #if 0 /* We would like to use Posix for profiling, but the simulator
83 interface still lacks mkdir. */
84 #define TARGET_POSIX_IO
87 /* Target machine storage layout. */
89 /* Define this if most significant bit is lowest numbered
90 in instructions that operate on numbered bit-fields. */
91 #define BITS_BIG_ENDIAN 0
93 /* Define this if most significant byte of a word is the lowest numbered. */
94 #define BYTES_BIG_ENDIAN 0
96 /* Define this if most significant word of a multiword number is the lowest
98 #define WORDS_BIG_ENDIAN 0
100 /* Width of a word, in units (bytes). */
101 #define UNITS_PER_WORD 4
103 /* Define this macro if it is advisable to hold scalars in registers
104 in a wider mode than that declared by the program. In such cases,
105 the value is constrained to be within the bounds of the declared
106 type, but kept valid in the wider mode. The signedness of the
107 extension may differ from that of the type. */
108 /* It is far faster to zero extend chars than to sign extend them */
110 #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \
111 if (GET_MODE_CLASS (MODE) == MODE_INT \
112 && GET_MODE_SIZE (MODE) < 4) \
114 if (MODE == QImode) \
116 else if (MODE == HImode) \
121 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
122 #define PARM_BOUNDARY 32
124 /* Boundary (in *bits*) on which stack pointer should be aligned. */
125 #define STACK_BOUNDARY 64
127 /* ALIGN FRAMES on word boundaries */
128 #define EPIPHANY_STACK_ALIGN(LOC) (((LOC)+7) & ~7)
130 /* Allocation boundary (in *bits*) for the code of a function. */
131 #define FUNCTION_BOUNDARY 32
133 /* Every structure's size must be a multiple of this. */
134 #define STRUCTURE_SIZE_BOUNDARY 8
136 /* A bit-field declared as `int' forces `int' alignment for the struct. */
137 #define PCC_BITFIELD_TYPE_MATTERS 1
139 /* No data type wants to be aligned rounder than this. */
140 /* This is bigger than currently necessary for the EPIPHANY. If 8 byte floats are
141 ever added it's not clear whether they'll need such alignment or not. For
142 now we assume they will. We can always relax it if necessary but the
143 reverse isn't true. */
144 #define BIGGEST_ALIGNMENT 64
146 /* The best alignment to use in cases where we have a choice. */
147 #define FASTEST_ALIGNMENT 64
149 #define MALLOC_ABI_ALIGNMENT BIGGEST_ALIGNMENT
151 /* Make strings dword-aligned so strcpy from constants will be faster. */
152 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
153 ((TREE_CODE (EXP) == STRING_CST \
154 && (ALIGN) < FASTEST_ALIGNMENT) \
155 ? FASTEST_ALIGNMENT : (ALIGN))
157 /* Make arrays of chars dword-aligned for the same reasons.
158 Also, align arrays of SImode items. */
159 #define DATA_ALIGNMENT(TYPE, ALIGN) \
160 (TREE_CODE (TYPE) == ARRAY_TYPE \
161 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
162 && (ALIGN) < FASTEST_ALIGNMENT \
163 ? FASTEST_ALIGNMENT \
164 : (TREE_CODE (TYPE) == ARRAY_TYPE \
165 && TYPE_MODE (TREE_TYPE (TYPE)) == SImode \
166 && (ALIGN) < FASTEST_ALIGNMENT) \
167 ? FASTEST_ALIGNMENT \
170 /* Set this nonzero if move instructions will actually fail to work
171 when given unaligned data. */
172 /* On the EPIPHANY the lower address bits are masked to 0 as necessary. The chip
173 won't croak when given an unaligned address, but the insn will still fail
174 to produce the correct result. */
175 #define STRICT_ALIGNMENT 1
177 /* layout_type overrides our ADJUST_ALIGNMENT settings from epiphany-modes.def
178 for vector modes, so we have to override it back. */
179 #define ROUND_TYPE_ALIGN(TYPE, MANGLED_ALIGN, SPECIFIED_ALIGN) \
180 (TREE_CODE (TYPE) == VECTOR_TYPE && !TYPE_USER_ALIGN (TYPE) \
181 && SPECIFIED_ALIGN <= GET_MODE_ALIGNMENT (TYPE_MODE (TYPE)) \
182 ? GET_MODE_ALIGNMENT (TYPE_MODE (TYPE)) \
183 : ((TREE_CODE (TYPE) == RECORD_TYPE \
184 || TREE_CODE (TYPE) == UNION_TYPE \
185 || TREE_CODE (TYPE) == QUAL_UNION_TYPE) \
186 && !TYPE_PACKED (TYPE)) \
187 ? epiphany_special_round_type_align ((TYPE), (MANGLED_ALIGN), \
189 : MAX ((MANGLED_ALIGN), (SPECIFIED_ALIGN)))
191 #define ADJUST_FIELD_ALIGN(FIELD, COMPUTED) \
192 epiphany_adjust_field_align((FIELD), (COMPUTED))
194 /* Layout of source language data types. */
196 #define SHORT_TYPE_SIZE 16
197 #define INT_TYPE_SIZE 32
198 #define LONG_TYPE_SIZE 32
199 #define LONG_LONG_TYPE_SIZE 64
200 #define FLOAT_TYPE_SIZE 32
201 #define DOUBLE_TYPE_SIZE 64
202 #define LONG_DOUBLE_TYPE_SIZE 64
204 /* Define this as 1 if `char' should by default be signed; else as 0. */
205 #define DEFAULT_SIGNED_CHAR 0
207 #define SIZE_TYPE "long unsigned int"
208 #define PTRDIFF_TYPE "long int"
209 #define WCHAR_TYPE "unsigned int"
210 #define WCHAR_TYPE_SIZE BITS_PER_WORD
212 /* Standard register usage. */
214 /* Number of actual hardware registers.
215 The hardware registers are assigned numbers for the compiler
216 from 0 to just below FIRST_PSEUDO_REGISTER.
217 All registers that the compiler knows about must be given numbers,
218 even those that are not normally considered general registers. */
220 #define FIRST_PSEUDO_REGISTER 78
223 /* General purpose registers. */
224 #define GPR_FIRST 0 /* First gpr */
226 #define PIC_REGNO (GPR_FIRST + 28) /* PIC register. */
227 #define GPR_LAST (GPR_FIRST + 63) /* Last gpr */
228 #define CORE_CONTROL_FIRST CONFIG_REGNUM
229 #define CORE_CONTROL_LAST IRET_REGNUM
231 #define GPR_P(R) IN_RANGE (R, GPR_FIRST, GPR_LAST)
232 #define GPR_OR_AP_P(R) (GPR_P (R) || (R) == ARG_POINTER_REGNUM)
234 #define GPR_OR_PSEUDO_P(R) (GPR_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
235 #define GPR_AP_OR_PSEUDO_P(R) (GPR_OR_AP_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
237 #define FIXED_REGISTERS \
238 { /* Integer Registers */ \
239 0, 0, 0, 0, 0, 0, 0, 0, /* 000-007, gr0 - gr7 */ \
240 0, 0, 0, 0, 0, 1, 0, 0, /* 008-015, gr8 - gr15 */ \
241 0, 0, 0, 0, 0, 0, 0, 0, /* 016-023, gr16 - gr23 */ \
242 0, 0, 0, 0, 1, 1, 1, 1, /* 024-031, gr24 - gr31 */ \
243 0, 0, 0, 0, 0, 0, 0, 0, /* 032-039, gr32 - gr39 */ \
244 0, 0, 0, 0, 0, 0, 0, 0, /* 040-047, gr40 - gr47 */ \
245 0, 0, 0, 0, 0, 0, 0, 0, /* 048-055, gr48 - gr55 */ \
246 0, 0, 0, 0, 0, 0, 0, 0, /* 056-063, gr56 - gr63 */ \
247 /* Other registers */ \
248 1, /* 64 AP - fake arg ptr */ \
249 1, /* soft frame pointer */ \
250 1, /* CC_REGNUM - integer conditions */\
251 1, /* CCFP_REGNUM - fp conditions */\
252 1, 1, 1, 1, 1, 1, /* Core Control Registers. */ \
253 1, 1, 1, /* FP_{NEAREST,...}_REGNUM */\
254 1, /* UNKNOWN_REGNUM - placeholder. */\
257 /* Like `FIXED_REGISTERS' but has 1 for each register that is clobbered (in
258 general) by function calls as well as for fixed registers. This macro
259 therefore identifies the registers that are not available for general
260 allocation of values that must live across function calls.
262 If a register has 0 in `CALL_USED_REGISTERS', the compiler automatically
263 saves it on function entry and restores it on function exit, if the register
264 is used within the function. */
266 #define CALL_USED_REGISTERS \
267 { /* Integer Registers */ \
268 1, 1, 1, 1, 0, 0, 0, 0, /* 000-007, gr0 - gr7 */ \
269 0, 0, 0, 0, 1, 1, 1, 0, /* 008-015, gr8 - gr15 */ \
270 1, 1, 1, 1, 1, 1, 1, 1, /* 016-023, gr16 - gr23 */ \
271 1, 1, 1, 1, 1, 1, 1, 1, /* 024-031, gr24 - gr31 */ \
272 0, 0, 0, 0, 0, 0, 0, 0, /* 032-039, gr32 - gr38 */ \
273 0, 0, 0, 0, 1, 1, 1, 1, /* 040-047, gr40 - gr47 */ \
274 1, 1, 1, 1, 1, 1, 1, 1, /* 048-055, gr48 - gr55 */ \
275 1, 1, 1, 1, 1, 1, 1, 1, /* 056-063, gr56 - gr63 */ \
276 1, /* 64 AP - fake arg ptr */ \
277 1, /* soft frame pointer */ \
278 1, /* 66 CC_REGNUM */ \
279 1, /* 67 CCFP_REGNUM */ \
280 1, 1, 1, 1, 1, 1, /* Core Control Registers. */ \
281 1, 1, 1, /* FP_{NEAREST,...}_REGNUM */\
282 1, /* UNKNOWN_REGNUM - placeholder. */\
285 #define REG_ALLOC_ORDER \
287 0, 1, 2, 3, /* Caller-saved 'small' registers. */ \
288 12, /* Caller-saved unpaired register. */ \
289 /* Caller-saved registers. */ \
290 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, \
292 48, 49, 50, 51, 52, 53, 54, 55, \
293 56, 57, 58, 59, 60, 61, 62, 63, \
294 4, 5, 6, 7, /* Calle-saved 'small' registers. */ \
295 15, /* Calle-saved unpaired register. */ \
296 8, 9, 10, 11, /* Calle-saved registers. */ \
297 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, \
298 14, 13, /* Link register, stack pointer. */ \
299 /* Can't allocate, but must name these... */ \
301 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77 \
304 #define HARD_REGNO_RENAME_OK(SRC, DST) epiphany_regno_rename_ok (SRC, DST)
306 /* Return number of consecutive hard regs needed starting at reg REGNO
307 to hold something of mode MODE.
308 This is ordinarily the length in words of a value of mode MODE
309 but can be less for certain modes in special long registers. */
310 #define HARD_REGNO_NREGS(REGNO, MODE) \
311 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
313 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. */
314 extern const unsigned int epiphany_hard_regno_mode_ok
[];
315 extern unsigned int epiphany_mode_class
[];
316 #define HARD_REGNO_MODE_OK(REGNO, MODE) hard_regno_mode_ok((REGNO), (MODE))
318 /* A C expression that is nonzero if it is desirable to choose
319 register allocation so as to avoid move instructions between a
320 value of mode MODE1 and a value of mode MODE2.
322 If `HARD_REGNO_MODE_OK (R, MODE1)' and `HARD_REGNO_MODE_OK (R,
323 MODE2)' are ever different for any R, then `MODES_TIEABLE_P (MODE1,
324 MODE2)' must be zero. */
326 #define MODES_TIEABLE_P(MODE1, MODE2) 1
328 /* Register classes and constants. */
330 /* Define the classes of registers for register constraints in the
331 machine description. Also define ranges of constants.
333 One of the classes must always be named ALL_REGS and include all hard regs.
334 If there is more than one class, another class must be named NO_REGS
335 and contain no registers.
337 The name GENERAL_REGS must be the name of a class (or an alias for
338 another name such as ALL_REGS). This is the class of registers
339 that is allowed by "g" or "r" in a register constraint.
340 Also, registers outside this class are allocated only when
341 instructions express preferences for them.
343 The classes must be numbered in nondecreasing order; that is,
344 a larger-numbered class must never be contained completely
345 in a smaller-numbered class.
347 For any two classes, it is very desirable that there be another
348 class that represents their union.
350 It is important that any condition codes have class NO_REGS.
351 See `register_operand'. */
364 #define N_REG_CLASSES ((int) LIM_REG_CLASSES)
366 /* Give names of register classes as strings for dump file. */
367 #define REG_CLASS_NAMES \
374 "CORE_CONTROL_REGS", \
378 /* Define which registers fit in which classes.
379 This is an initializer for a vector of HARD_REG_SET
380 of length N_REG_CLASSES. */
382 #define REG_CLASS_CONTENTS \
383 { /* r0-r31 r32-r63 ap/sfp/cc1/cc2/iret/status */ \
384 { 0x00000000,0x00000000,0x0}, /* NO_REGS */ \
385 { 0x00004000,0x00000000,0x0}, /* LR_REGS */ \
386 { 0x000000ff,0x00000000,0x0}, /* SHORT_INSN_REGS */ \
387 { 0xffff100f,0xffffff00,0x0}, /* SIBCALL_REGS */ \
388 { 0xffffffff,0xffffffff,0x0003}, /* GENERAL_REGS */ \
389 { 0x00000000,0x00000000,0x03f0}, /* CORE_CONTROL_REGS */ \
390 { 0xffffffff,0xffffffff,0x3fff}, /* ALL_REGS */ \
394 /* The same information, inverted:
395 Return the class number of the smallest class containing
396 reg number REGNO. This could be a conditional expression
397 or could index an array. */
398 extern enum reg_class epiphany_regno_reg_class
[FIRST_PSEUDO_REGISTER
];
399 #define REGNO_REG_CLASS(REGNO) \
400 (epiphany_regno_reg_class[REGNO])
402 /* The class value for index registers, and the one for base regs. */
403 #define BASE_REG_CLASS GENERAL_REGS
404 #define INDEX_REG_CLASS GENERAL_REGS
406 /* These assume that REGNO is a hard or pseudo reg number.
407 They give nonzero only if REGNO is a hard reg of the suitable class
408 or a pseudo reg currently allocated to a suitable hard reg.
409 Since they use reg_renumber, they are safe only once reg_renumber
410 has been allocated, which happens in local-alloc.c. */
411 #define REGNO_OK_FOR_BASE_P(REGNO) \
412 ((REGNO) < FIRST_PSEUDO_REGISTER || (unsigned) reg_renumber[REGNO] < FIRST_PSEUDO_REGISTER)
413 #define REGNO_OK_FOR_INDEX_P(REGNO) \
414 ((REGNO) < FIRST_PSEUDO_REGISTER || (unsigned) reg_renumber[REGNO] < FIRST_PSEUDO_REGISTER)
418 /* Given an rtx X being reloaded into a reg required to be
419 in class CLASS, return the class of reg to actually use.
420 In general this is just CLASS; but on some machines
421 in some cases it is preferable to use a more restrictive class. */
422 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
425 /* Return the maximum number of consecutive registers
426 needed to represent mode MODE in a register of class CLASS. */
427 #define CLASS_MAX_NREGS(CLASS, MODE) \
428 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
430 /* The letters I, J, K, L, M, N, O, P in a register constraint string
431 can be used to stand for particular ranges of immediate operands.
432 This macro defines what the ranges are.
433 C is the letter, and VALUE is a constant value.
434 Return 1 if VALUE is in the range specified by C. */
436 /* 'I' is used for 16 bit unsigned.
437 'Cal' is used for long immediates (32 bits)
438 'K' is used for any constant up to 5 bits.
439 'L' is used for any 11 bit signed.
442 #define IMM16(X) (IN_RANGE ((X), 0, 0xFFFF))
443 #define SIMM16(X) (IN_RANGE ((X), -65536, 65535))
444 #define SIMM11(X) (IN_RANGE ((X), -1024, 1023))
445 #define IMM5(X) (IN_RANGE ((X), 0, 0x1F))
447 typedef struct GTY (()) machine_function
449 unsigned args_parsed
: 1;
450 unsigned pretend_args_odd
: 1;
451 unsigned lr_clobbered
: 1;
452 unsigned control_use_inserted
: 1;
453 unsigned sw_entities_processed
: 6;
457 unsigned unknown_mode_uses
;
458 unsigned unknown_mode_sets
;
459 } machine_function_t
;
461 #define MACHINE_FUNCTION(fun) (fun)->machine
463 #define INIT_EXPANDERS epiphany_init_expanders ()
465 /* Stack layout and stack pointer usage. */
467 /* Define this macro if pushing a word onto the stack moves the stack
468 pointer to a smaller address. */
469 #define STACK_GROWS_DOWNWARD
471 /* Define this to nonzero if the nominal address of the stack frame
472 is at the high-address end of the local variables;
473 that is, each additional local variable allocated
474 goes at a more negative offset in the frame. */
475 #define FRAME_GROWS_DOWNWARD 1
477 /* Offset within stack frame to start allocating local variables at.
478 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
479 first local allocated. Otherwise, it is the offset to the BEGINNING
480 of the first local allocated. */
481 #define STARTING_FRAME_OFFSET epiphany_stack_offset
483 /* Offset from the stack pointer register to the first location at which
484 outgoing arguments are placed. */
485 #define STACK_POINTER_OFFSET epiphany_stack_offset
487 /* Offset of first parameter from the argument pointer register value. */
488 /* 4 bytes for each of previous fp, return address, and previous gp.
489 4 byte reserved area for future considerations. */
490 #define FIRST_PARM_OFFSET(FNDECL) \
491 (epiphany_stack_offset \
492 + (MACHINE_FUNCTION (DECL_STRUCT_FUNCTION (FNDECL))->pretend_args_odd \
495 #define INCOMING_FRAME_SP_OFFSET epiphany_stack_offset
497 /* Register to use for pushing function arguments. */
498 #define STACK_POINTER_REGNUM GPR_SP
500 /* Base register for access to local variables of the function. */
501 #define HARD_FRAME_POINTER_REGNUM GPR_FP
503 /* Register in which static-chain is passed to a function. This must
504 not be a register used by the prologue. */
505 #define STATIC_CHAIN_REGNUM GPR_IP
507 /* Define the offset between two registers, one to be eliminated, and the other
508 its replacement, at the start of a routine. */
510 #define ELIMINABLE_REGS \
511 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
512 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
513 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
514 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
517 /* Define the offset between two registers, one to be eliminated, and the other
518 its replacement, at the start of a routine. */
520 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
521 ((OFFSET) = epiphany_initial_elimination_offset ((FROM), (TO)))
523 /* Function argument passing. */
525 /* If defined, the maximum amount of space required for outgoing
526 arguments will be computed and placed into the variable
527 `current_function_outgoing_args_size'. No space will be pushed
528 onto the stack for each call; instead, the function prologue should
529 increase the stack frame size by this amount. */
530 #define ACCUMULATE_OUTGOING_ARGS 1
532 /* Define a data type for recording info about an argument list
533 during the scan of that argument list. This data type should
534 hold all necessary information about the function itself
535 and about the args processed so far, enough to enable macros
536 such as FUNCTION_ARG to determine where the next arg should go. */
537 #define CUMULATIVE_ARGS int
539 /* Initialize a variable CUM of type CUMULATIVE_ARGS
540 for a call to a function whose data type is FNTYPE.
541 For a library call, FNTYPE is 0. */
542 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
545 /* The number of registers used for parameter passing. Local to this file. */
546 #define MAX_EPIPHANY_PARM_REGS 4
548 /* 1 if N is a possible register number for function argument passing. */
549 #define FUNCTION_ARG_REGNO_P(N) \
550 ((unsigned) (N) < MAX_EPIPHANY_PARM_REGS)
552 /* Return boolean indicating arg of type TYPE and mode MODE will be passed in
553 a reg. This includes arguments that have to be passed by reference as the
554 pointer to them is passed in a reg if one is available (and that is what
556 This macro is only used in this file. */
557 /* We must use partial argument passing because of the chosen mode
558 of varargs handling. */
559 #define PASS_IN_REG_P(CUM, MODE, TYPE) \
560 (ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE)) < MAX_EPIPHANY_PARM_REGS)
562 /* Tell GCC to use TARGET_RETURN_IN_MEMORY. */
563 #define DEFAULT_PCC_STRUCT_RETURN 0
565 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
566 the stack pointer does not matter. The value is tested only in
567 functions that have frame pointers.
568 No definition is equivalent to always zero. */
569 #define EXIT_IGNORE_STACK 1
571 #define EPILOGUE_USES(REGNO) epiphany_epilogue_uses (REGNO)
573 /* Output assembler code to FILE to increment profiler label # LABELNO
574 for profiling a function entry. */
575 #define FUNCTION_PROFILER(FILE, LABELNO)
577 /* Given an rtx for the frame pointer,
578 return an rtx for the address of the frame. */
579 #define FRAME_ADDR_RTX(frame) \
580 ((frame) == hard_frame_pointer_rtx ? arg_pointer_rtx : NULL)
582 #define EPIPHANY_RETURN_REGNO \
583 ((current_function_decl != NULL \
584 && epiphany_is_interrupt_p (current_function_decl)) \
585 ? IRET_REGNUM : GPR_LR)
586 /* This is not only for dwarf unwind info, but also for the benefit of
587 df-scan.c to tell it that LR is live at the function start. */
588 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, EPIPHANY_RETURN_REGNO)
590 /* However, we haven't implemented the rest needed for dwarf2 unwind info. */
591 #define DWARF2_UNWIND_INFO 0
593 #define RETURN_ADDR_RTX(count, frame) \
595 : gen_rtx_UNSPEC (SImode, gen_rtvec (1, const0_rtx), UNSPEC_RETURN_ADDR))
597 #define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (EPIPHANY_RETURN_REGNO)
600 An epiphany trampoline looks like this:
602 movt r16,%high(fnaddr)
607 /* Length in units of the trampoline for entering a nested function. */
608 #define TRAMPOLINE_SIZE 20
610 /* Addressing modes, and classification of registers for them. */
612 /* Maximum number of registers that can appear in a valid memory address. */
613 #define MAX_REGS_PER_ADDRESS 2
615 /* We have post_modify (load/store with update). */
616 #define HAVE_POST_INCREMENT TARGET_POST_INC
617 #define HAVE_POST_DECREMENT TARGET_POST_INC
618 #define HAVE_POST_MODIFY_DISP TARGET_POST_MODIFY
619 #define HAVE_POST_MODIFY_REG TARGET_POST_MODIFY
621 /* Currently, the only users of the USE_*CREMENT macros are
622 move_by_pieces / store_by_pieces_1 . We don't want them to use
623 POST_MODIFY modes, because we got ample addressing range for the
624 reg+offset addressing mode; besides, there are short index+offset loads,
625 but the only short post-modify load uses POST_MODIFY_REG.
626 Moreover, using auto-increment in move_by_pieces from structure copying
627 in the prologue causes confused debug output.
628 If another pass starts using these macros where the use of these
629 addressing modes would make more sense, we can try checking the
631 #define USE_LOAD_POST_INCREMENT(MODE) 0
632 #define USE_LOAD_POST_DECREMENT(MODE) 0
633 #define USE_STORE_POST_INCREMENT(MODE) 0
634 #define USE_STORE_POST_DECREMENT(MODE) 0
636 /* Recognize any constant value that is a valid address. */
637 #define CONSTANT_ADDRESS_P(X) \
638 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
639 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST)
641 #define RTX_OK_FOR_OFFSET_P(MODE, X) \
642 RTX_OK_FOR_OFFSET_1 (GET_MODE_CLASS (MODE) == MODE_VECTOR_INT \
643 && epiphany_vect_align == 4 ? SImode : (MODE), X)
644 #define RTX_OK_FOR_OFFSET_1(MODE, X) \
645 (GET_CODE (X) == CONST_INT \
646 && !(INTVAL (X) & (GET_MODE_SIZE (MODE) - 1)) \
647 && INTVAL (X) >= -2047 * (int) GET_MODE_SIZE (MODE) \
648 && INTVAL (X) <= 2047 * (int) GET_MODE_SIZE (MODE))
650 /* Frame offsets cannot be evaluated till the frame pointer is eliminated. */
651 #define RTX_FRAME_OFFSET_P(X) \
652 ((X) == frame_pointer_rtx \
653 || (GET_CODE (X) == PLUS && XEXP ((X), 0) == frame_pointer_rtx \
654 && CONST_INT_P (XEXP ((X), 1))))
656 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
657 return the mode to be used for the comparison. */
658 #define SELECT_CC_MODE(OP, X, Y) \
659 epiphany_select_cc_mode (OP, X, Y)
661 /* Return nonzero if SELECT_CC_MODE will never return MODE for a
662 floating point inequality comparison. */
664 #define REVERSE_CONDITION(CODE, MODE) \
665 ((MODE) == CC_FPmode || (MODE) == CC_FP_EQmode || (MODE) == CC_FP_GTEmode \
666 || (MODE) == CC_FP_ORDmode || (MODE) == CC_FP_UNEQmode \
667 ? reverse_condition_maybe_unordered (CODE) \
668 : (MODE) == CCmode ? reverse_condition (CODE) \
671 /* We can reverse all CCmodes with REVERSE_CONDITION. */
672 #define REVERSIBLE_CC_MODE(MODE) \
673 ((MODE) == CCmode || (MODE) == CC_FPmode || (MODE) == CC_FP_EQmode \
674 || (MODE) == CC_FP_GTEmode || (MODE) == CC_FP_ORDmode \
675 || (MODE) == CC_FP_UNEQmode)
679 /* The cost of a branch insn. */
680 /* ??? What's the right value here? Branches are certainly more
681 expensive than reg->reg moves. */
682 #define BRANCH_COST(speed_p, predictable_p) \
683 (speed_p ? epiphany_branch_cost : 1)
685 /* Nonzero if access to memory by bytes is slow and undesirable.
686 For RISC chips, it means that access to memory by bytes is no
687 better than access by words when possible, so grab a whole word
688 and maybe make use of that. */
689 #define SLOW_BYTE_ACCESS 1
691 /* Define this macro if it is as good or better to call a constant
692 function address than to call an address kept in a register. */
693 /* On the EPIPHANY, calling through registers is slow. */
694 #define NO_FUNCTION_CSE
696 /* Section selection. */
697 /* WARNING: These section names also appear in dwarf2out.c. */
699 #define TEXT_SECTION_ASM_OP "\t.section .text"
700 #define DATA_SECTION_ASM_OP "\t.section .data"
702 #undef READONLY_DATA_SECTION_ASM_OP
703 #define READONLY_DATA_SECTION_ASM_OP "\t.section .rodata"
705 #define BSS_SECTION_ASM_OP "\t.section .bss"
707 /* Define this macro if jump tables (for tablejump insns) should be
708 output in the text section, along with the assembler instructions.
709 Otherwise, the readonly data section is used.
710 This macro is irrelevant if there is no separate readonly data section. */
711 #define JUMP_TABLES_IN_TEXT_SECTION (flag_pic)
715 /* The register number of the register used to address a table of static
716 data addresses in memory. In some cases this register is defined by a
717 processor's ``application binary interface'' (ABI). When this macro
718 is defined, RTL is generated for this register once, as with the stack
719 pointer and frame pointer registers. If this macro is not defined, it
720 is up to the machine-dependent files to allocate such a register (if
722 #define PIC_OFFSET_TABLE_REGNUM (flag_pic ? PIC_REGNO : INVALID_REGNUM)
724 /* Control the assembler format that we output. */
726 /* A C string constant describing how to begin a comment in the target
727 assembler language. The compiler assumes that the comment will
728 end at the end of the line. */
729 #define ASM_COMMENT_START ";"
731 /* Output to assembler file text saying following lines
732 may contain character constants, extra white space, comments, etc. */
733 #define ASM_APP_ON ""
735 /* Output to assembler file text saying following lines
736 no longer contain unusual constructs. */
737 #define ASM_APP_OFF ""
739 /* Globalizing directive for a label. */
740 #define GLOBAL_ASM_OP "\t.global\t"
742 /* How to refer to registers in assembler output.
743 This sequence is indexed by compiler's hard-register-number (see above). */
745 #define REGISTER_NAMES \
747 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
748 "r8", "r9", "r10", "fp", "ip", "sp", "lr", "r15", \
749 "r16", "r17","r18", "r19", "r20", "r21", "r22", "r23", \
750 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", \
751 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39", \
752 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47", \
753 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55", \
754 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63", \
755 "ap", "sfp", "cc1", "cc2", \
756 "config", "status", "lc", "ls", "le", "iret", \
757 "fp_near", "fp_trunc", "fp_anyfp", "unknown" \
760 #define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS) \
761 epiphany_final_prescan_insn (INSN, OPVEC, NOPERANDS)
763 #define LOCAL_LABEL_PREFIX "."
765 /* A C expression which evaluates to true if CODE is a valid
766 punctuation character for use in the `PRINT_OPERAND' macro. */
767 extern char epiphany_punct_chars
[256];
768 #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
769 epiphany_punct_chars[(unsigned char) (CHAR)]
771 /* This is how to output an element of a case-vector that is absolute. */
772 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
774 if (CASE_VECTOR_MODE == Pmode) \
775 asm_fprintf ((FILE), "\t.word %LL%d\n", (VALUE)); \
777 asm_fprintf ((FILE), "\t.short %LL%d\n", (VALUE)); \
780 /* This is how to output an element of a case-vector that is relative. */
781 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
783 if (CASE_VECTOR_MODE == Pmode) \
784 asm_fprintf ((FILE), "\t.word"); \
786 asm_fprintf ((FILE), "\t.short"); \
787 asm_fprintf ((FILE), " %LL%d-%LL%d\n", (VALUE), (REL)); \
790 /* This is how to output an assembler line
791 that says to advance the location counter
792 to a multiple of 2**LOG bytes. */
793 #define ASM_OUTPUT_ALIGN(FILE, LOG) \
794 do { if ((LOG) != 0) fprintf (FILE, "\t.balign %d\n", 1 << (LOG)); } while (0)
796 /* Inside the text section, align with nops rather than zeros. */
797 #define ASM_OUTPUT_ALIGN_WITH_NOP(FILE, LOG) \
800 if ((LOG) != 0) fprintf (FILE, "\t.balignw %d,0x01a2\n", 1 << (LOG)); \
803 /* This is how to declare the size of a function. */
804 #undef ASM_DECLARE_FUNCTION_SIZE
805 #define ASM_DECLARE_FUNCTION_SIZE(FILE, FNAME, DECL) \
808 const char *__name = (FNAME); \
809 tree attrs = DECL_ATTRIBUTES ((DECL)); \
811 if (!flag_inhibit_size_directive) \
813 if (lookup_attribute ("forwarder_section", attrs)) \
815 const char *prefix = "__forwarder_dst_"; \
817 = (char *) alloca (strlen (prefix) + strlen (__name) + 1); \
819 strcpy (dst_name, prefix); \
820 strcat (dst_name, __name); \
823 ASM_OUTPUT_MEASURED_SIZE ((FILE), __name); \
828 /* Debugging information. */
830 /* Generate DBX and DWARF debugging information. */
831 #define DBX_DEBUGGING_INFO 1
833 #undef PREFERRED_DEBUGGING_TYPE
834 #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
836 /* Turn off splitting of long stabs. */
837 #define DBX_CONTIN_LENGTH 0
841 /* Specify the machine mode that this machine uses
842 for the index in the tablejump instruction. */
843 #define CASE_VECTOR_MODE (TARGET_SMALL16 && optimize_size ? HImode : Pmode)
845 /* Define if operations between registers always perform the operation
846 on the full register even if a narrower mode is specified. */
847 #define WORD_REGISTER_OPERATIONS
849 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
850 will either zero-extend or sign-extend. The value of this macro should
851 be the code that says which one of the two operations is implicitly
852 done, UNKNOWN if none. */
853 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
855 /* Max number of bytes we can move from memory to memory
856 in one reasonably fast instruction. */
859 /* Define this to be nonzero if shift instructions ignore all but the low-order
861 #define SHIFT_COUNT_TRUNCATED 1
863 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
864 is done just by pretending it is already truncated. */
865 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
867 /* Specify the machine mode that pointers have.
868 After generation of rtl, the compiler makes no further distinction
869 between pointers and any other objects of this machine mode. */
873 /* A function address in a call instruction. */
874 #define FUNCTION_MODE SImode
876 /* EPIPHANY function types. */
877 enum epiphany_function_type
879 EPIPHANY_FUNCTION_UNKNOWN
, EPIPHANY_FUNCTION_NORMAL
,
880 EPIPHANY_FUNCTION_INTERRUPT
883 #define EPIPHANY_INTERRUPT_P(TYPE) ((TYPE) == EPIPHANY_FUNCTION_INTERRUPT)
885 /* Compute the type of a function from its DECL. */
887 #define IMMEDIATE_PREFIX "#"
889 #define OPTIMIZE_MODE_SWITCHING(ENTITY) \
890 (epiphany_optimize_mode_switching (ENTITY))
892 /* We have two fake entities for lazy code motion of the mask constants,
893 one entity each for round-to-nearest / truncating
894 with a different idea what FP_MODE_ROUND_UNKNOWN will be, and
895 finally an entity that runs in a second mode switching pass to
896 resolve FP_MODE_ROUND_UNKNOWN. */
897 #define NUM_MODES_FOR_MODE_SWITCHING \
898 { 2, 2, FP_MODE_NONE, FP_MODE_NONE, FP_MODE_NONE, FP_MODE_NONE, FP_MODE_NONE }
900 #define MODE_NEEDED(ENTITY, INSN) epiphany_mode_needed((ENTITY), (INSN))
902 #define MODE_PRIORITY_TO_MODE(ENTITY, N) \
903 (epiphany_mode_priority_to_mode ((ENTITY), (N)))
905 #define EMIT_MODE_SET(ENTITY, MODE, HARD_REGS_LIVE) \
906 emit_set_fp_mode ((ENTITY), (MODE), (HARD_REGS_LIVE))
908 #define MODE_ENTRY(ENTITY) (epiphany_mode_entry_exit ((ENTITY), false))
909 #define MODE_EXIT(ENTITY) (epiphany_mode_entry_exit ((ENTITY), true))
910 #define MODE_AFTER(ENTITY, LAST_MODE, INSN) \
911 (epiphany_mode_after ((ENTITY), (LAST_MODE), (INSN)))
913 #define TARGET_INSERT_MODE_SWITCH_USE epiphany_insert_mode_switch_use
915 /* Mode switching entities. */
918 EPIPHANY_MSW_ENTITY_AND
,
919 EPIPHANY_MSW_ENTITY_OR
,
920 EPIPHANY_MSW_ENTITY_NEAREST
,
921 EPIPHANY_MSW_ENTITY_TRUNC
,
922 EPIPHANY_MSW_ENTITY_ROUND_UNKNOWN
,
923 EPIPHANY_MSW_ENTITY_ROUND_KNOWN
,
924 EPIPHANY_MSW_ENTITY_FPU_OMNIBUS
927 extern int epiphany_normal_fp_rounding
;
928 extern struct rtl_opt_pass pass_mode_switch_use
;
929 extern struct rtl_opt_pass pass_resolve_sw_modes
;
931 /* This will need to be adjusted when FP_CONTRACT_ON is properly
933 #define TARGET_FUSED_MADD (flag_fp_contract_mode == FP_CONTRACT_FAST)
935 #undef ASM_DECLARE_FUNCTION_NAME
936 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
937 epiphany_start_function ((FILE), (NAME), (DECL))
939 #endif /* !GCC_EPIPHANY_H */