]> git.ipfire.org Git - thirdparty/gcc.git/blob - gcc/config/ft32/ft32.c
2015-06-17 Andrew MacLeod <amacleod@redhat.com>
[thirdparty/gcc.git] / gcc / config / ft32 / ft32.c
1 /* Target Code for ft32
2 Copyright (C) 2015 Free Software Foundation
3 Contributed by FTDI <support@ftdi.com>
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published
9 by the Free Software Foundation; either version 3, or (at your
10 option) any later version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
20
21 #include "config.h"
22 #include "system.h"
23 #include "coretypes.h"
24 #include "tm.h"
25 #include "rtl.h"
26 #include "regs.h"
27 #include "hard-reg-set.h"
28 #include "insn-config.h"
29 #include "conditions.h"
30 #include "insn-flags.h"
31 #include "output.h"
32 #include "insn-attr.h"
33 #include "flags.h"
34 #include "recog.h"
35 #include "reload.h"
36 #include "diagnostic-core.h"
37 #include "obstack.h"
38 #include "alias.h"
39 #include "symtab.h"
40 #include "tree.h"
41 #include "stor-layout.h"
42 #include "calls.h"
43 #include "expr.h"
44 #include "optabs.h"
45 #include "except.h"
46 #include "function.h"
47 #include "target.h"
48 #include "target-def.h"
49 #include "tm_p.h"
50 #include "langhooks.h"
51 #include "dominance.h"
52 #include "cfg.h"
53 #include "cfgrtl.h"
54 #include "cfganal.h"
55 #include "lcm.h"
56 #include "cfgbuild.h"
57 #include "cfgcleanup.h"
58 #include "predict.h"
59 #include "basic-block.h"
60 #include "df.h"
61 #include "builtins.h"
62
63
64 #include <stdint.h>
65
66 #define LOSE_AND_RETURN(msgid, x) \
67 do \
68 { \
69 ft32_operand_lossage (msgid, x); \
70 return; \
71 } while (0)
72
73 /* Worker function for TARGET_RETURN_IN_MEMORY. */
74
75 static bool
76 ft32_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED)
77 {
78 const HOST_WIDE_INT size = int_size_in_bytes (type);
79 return (size == -1 || size > 2 * UNITS_PER_WORD);
80 }
81
82 /* Define how to find the value returned by a function.
83 VALTYPE is the data type of the value (as a tree).
84 If the precise function being called is known, FUNC is its
85 FUNCTION_DECL; otherwise, FUNC is 0.
86
87 We always return values in register $r0 for ft32. */
88
89 static rtx
90 ft32_function_value (const_tree valtype,
91 const_tree fntype_or_decl ATTRIBUTE_UNUSED,
92 bool outgoing ATTRIBUTE_UNUSED)
93 {
94 return gen_rtx_REG (TYPE_MODE (valtype), FT32_R0);
95 }
96
97 /* Define how to find the value returned by a library function.
98
99 We always return values in register $r0 for ft32. */
100
101 static rtx
102 ft32_libcall_value (enum machine_mode mode, const_rtx fun ATTRIBUTE_UNUSED)
103 {
104 return gen_rtx_REG (mode, FT32_R0);
105 }
106
107 /* Handle TARGET_FUNCTION_VALUE_REGNO_P.
108
109 We always return values in register $r0 for ft32. */
110
111 static bool
112 ft32_function_value_regno_p (const unsigned int regno)
113 {
114 return (regno == FT32_R0);
115 }
116
117 /* Emit an error message when we're in an asm, and a fatal error for
118 "normal" insns. Formatted output isn't easily implemented, since we
119 use output_operand_lossage to output the actual message and handle the
120 categorization of the error. */
121
122 static void
123 ft32_operand_lossage (const char *msgid, rtx op)
124 {
125 debug_rtx (op);
126 output_operand_lossage ("%s", msgid);
127 }
128
129 /* The PRINT_OPERAND_ADDRESS worker. */
130
131 void
132 ft32_print_operand_address (FILE * file, rtx x)
133 {
134 switch (GET_CODE (x))
135 {
136 case REG:
137 fprintf (file, "%s,0", reg_names[REGNO (x)]);
138 break;
139
140 case PLUS:
141 switch (GET_CODE (XEXP (x, 1)))
142 {
143 case CONST_INT:
144 fprintf (file, "%s,%ld",
145 reg_names[REGNO (XEXP (x, 0))], INTVAL (XEXP (x, 1)));
146 break;
147 case SYMBOL_REF:
148 output_addr_const (file, XEXP (x, 1));
149 fprintf (file, "(%s)", reg_names[REGNO (XEXP (x, 0))]);
150 break;
151 case CONST:
152 {
153 rtx plus = XEXP (XEXP (x, 1), 0);
154 if (GET_CODE (XEXP (plus, 0)) == SYMBOL_REF
155 && CONST_INT_P (XEXP (plus, 1)))
156 {
157 output_addr_const (file, XEXP (plus, 0));
158 fprintf (file, "+%ld(%s)", INTVAL (XEXP (plus, 1)),
159 reg_names[REGNO (XEXP (x, 0))]);
160 }
161 else
162 abort ();
163 }
164 break;
165 default:
166 abort ();
167 }
168 break;
169
170 default:
171 output_addr_const (file, x);
172 break;
173 }
174 }
175
176 /* The PRINT_OPERAND worker. */
177
178 void
179 ft32_print_operand (FILE * file, rtx x, int code)
180 {
181 rtx operand = x;
182
183 /* New code entries should just be added to the switch below. If
184 handling is finished, just return. If handling was just a
185 modification of the operand, the modified operand should be put in
186 "operand", and then do a break to let default handling
187 (zero-modifier) output the operand. */
188
189 switch (code)
190 {
191 case 0:
192 /* No code, print as usual. */
193 break;
194
195 case 'h':
196 if (GET_CODE (operand) != REG)
197 internal_error ("'h' applied to non-register operand");
198 fprintf (file, "%s", reg_names[REGNO (operand) + 1]);
199 return;
200
201 case 'm':
202 fprintf (file, "%d", -INTVAL(x));
203 return;
204
205 case 'd': // a DW spec, from an integer alignment (for BLKmode insns)
206 {
207 int i = INTVAL (x);
208 char dwspec;
209 switch (i)
210 {
211 case 1:
212 dwspec = 'b';
213 break;
214 case 2:
215 dwspec = 's';
216 break;
217 case 4:
218 dwspec = 'l';
219 break;
220 default:
221 if ((i % 4) != 0)
222 internal_error ("bad alignment: %d", i);
223 else
224 dwspec = 'l';
225 break;
226 }
227 fprintf (file, "%c", dwspec);
228 return;
229 }
230
231 case 'f':
232 {
233 int bf = ft32_as_bitfield (INTVAL (x));
234 fprintf (file, "512|(%d<<5)|%d", bf >> 5, bf & 31);
235 return;
236 }
237
238 case 'g':
239 {
240 int bf = ft32_as_bitfield (0xffffffff ^ INTVAL (x));
241 fprintf (file, "(%d<<5)|%d", bf >> 5, bf & 31);
242 return;
243 }
244
245 case 'b':
246 {
247 ft32_print_operand (file, XEXP (x, 0), 0);
248 return;
249 }
250
251 default:
252 LOSE_AND_RETURN ("invalid operand modifier letter", x);
253 }
254
255 /* Print an operand as without a modifier letter. */
256 switch (GET_CODE (operand))
257 {
258 case REG:
259 fprintf (file, "%s", reg_names[REGNO (operand)]);
260 return;
261
262 case MEM:
263 output_address (XEXP (operand, 0));
264 return;
265
266 default:
267 /* No need to handle all strange variants, let output_addr_const
268 do it for us. */
269 if (CONSTANT_P (operand))
270 {
271 output_addr_const (file, operand);
272 return;
273 }
274
275 LOSE_AND_RETURN ("unexpected operand", x);
276 }
277 }
278
279 const char *
280 ft32_load_immediate (rtx dst, int32_t i)
281 {
282 char pattern[100];
283
284 if ((-524288 <= i) && (i <= 524287))
285 {
286 sprintf (pattern, "ldk.l %%0,%d", i);
287 output_asm_insn (pattern, &dst);
288 }
289 else if ((-536870912 <= i) && (i <= 536870911))
290 {
291 ft32_load_immediate (dst, i >> 10);
292 sprintf (pattern, "ldl.l %%0,%%0,%d", i & 1023);
293 output_asm_insn (pattern, &dst);
294 }
295 else
296 {
297 int rd; // rotate distance
298 uint32_t u = i;
299 for (rd = 1; rd < 32; rd++)
300 {
301 u = ((u >> 31) & 1) | (u << 1);
302 if ((-524288 <= (int32_t) u) && ((int32_t) u <= 524287))
303 {
304 ft32_load_immediate (dst, (int32_t) u);
305 sprintf (pattern, "ror.l %%0,%%0,%d", rd);
306 output_asm_insn (pattern, &dst);
307 return "";
308 }
309 }
310 ft32_load_immediate (dst, i >> 10);
311 sprintf (pattern, "ldl.l %%0,%%0,%d", i & 1023);
312 output_asm_insn (pattern, &dst);
313 }
314
315 return "";
316 }
317
318 // x is a bit mask, for example:
319 // 00000000000000000000001111111110
320 // If x contains a single bit mask, return the bitfield spec.
321 // in the above case it returns ((9 << 5) | 1)
322 // Otherwise return -1.
323 //
324
325 #define NBITS(n) ((1U << (n)) - 1U)
326
327 int
328 ft32_as_bitfield (unsigned int x)
329 {
330 int lobit, hibit;
331
332 if (x == 0)
333 return -1;
334
335 for (lobit = 0; lobit < 32; lobit++)
336 if (x & (1 << lobit))
337 break;
338 for (hibit = 31; hibit >= 0; hibit--)
339 if (x & (1 << hibit))
340 break;
341
342 int width = 1 + hibit - lobit;
343 if (width > 16)
344 return -1;
345
346 if (x != (NBITS (width) << lobit))
347 return -1; // not a clean bitfield
348
349 return ((width & 15) << 5) | lobit;
350 }
351
352 /* Per-function machine data. */
353 struct GTY (()) machine_function
354 {
355 /* Number of bytes saved on the stack for callee saved registers. */
356 int callee_saved_reg_size;
357
358 /* Number of bytes saved on the stack for local variables. */
359 int local_vars_size;
360
361 /* The sum of 2 sizes: locals vars and padding byte for saving the
362 * registers. Used in expand_prologue () and expand_epilogue (). */
363 int size_for_adjusting_sp;
364 };
365
366 /* Zero initialization is OK for all current fields. */
367
368 static struct machine_function *
369 ft32_init_machine_status (void)
370 {
371 return ggc_cleared_alloc < machine_function > ();
372 }
373
374
375 /* The TARGET_OPTION_OVERRIDE worker.
376 All this curently does is set init_machine_status. */
377 static void
378 ft32_option_override (void)
379 {
380 /* Set the per-function-data initializer. */
381 init_machine_status = ft32_init_machine_status;
382 }
383
384 /* Implement targetm.select_section. */
385 static section *
386 ft32_select_section (tree decl, int reloc, unsigned HOST_WIDE_INT align)
387 {
388 /* Variables and constants defined in the __ea address space
389 go into a special section named "._ea". */
390 if (TREE_TYPE (decl) != error_mark_node
391 && TYPE_ADDR_SPACE (TREE_TYPE (decl)) == ADDR_SPACE_PM)
392 {
393 /* We might get called with string constants, but get_named_section
394 doesn't like them as they are not DECLs. Also, we need to set
395 flags in that case. */
396 if (!DECL_P (decl))
397 return get_section ("._pm", SECTION_WRITE | SECTION_DEBUG, NULL);
398
399 return get_named_section (decl, "._pm", reloc);
400 }
401
402 return default_elf_select_section (decl, reloc, align);
403 }
404
405 /* Compute the size of the local area and the size to be adjusted by the
406 * prologue and epilogue. */
407
408 static void
409 ft32_compute_frame (void)
410 {
411 /* For aligning the local variables. */
412 int stack_alignment = STACK_BOUNDARY / BITS_PER_UNIT;
413 int padding_locals;
414 int regno;
415
416 /* Padding needed for each element of the frame. */
417 cfun->machine->local_vars_size = get_frame_size ();
418
419 /* Align to the stack alignment. */
420 padding_locals = cfun->machine->local_vars_size % stack_alignment;
421 if (padding_locals)
422 padding_locals = stack_alignment - padding_locals;
423
424 cfun->machine->local_vars_size += padding_locals;
425
426 cfun->machine->callee_saved_reg_size = 0;
427
428 /* Save callee-saved registers. */
429 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
430 if (df_regs_ever_live_p (regno) && (!call_used_regs[regno]))
431 cfun->machine->callee_saved_reg_size += 4;
432
433 cfun->machine->size_for_adjusting_sp =
434 crtl->args.pretend_args_size
435 + cfun->machine->local_vars_size
436 + (ACCUMULATE_OUTGOING_ARGS ? crtl->outgoing_args_size : 0);
437 }
438
439 // Must use LINK/UNLINK when...
440 // the frame is bigger than 512 bytes so cannot just "SUB" from SP
441 // the function actually uses $fp
442
443 static int
444 must_link (void)
445 {
446 int bigframe = (cfun->machine->size_for_adjusting_sp >= 512);
447 return (bigframe || frame_pointer_needed || df_regs_ever_live_p (FT32_FP)
448 || df_regs_ever_live_p (FT32_FP));
449 }
450
451 void
452 ft32_expand_prologue (void)
453 {
454 int regno;
455 rtx insn;
456
457 ft32_compute_frame ();
458
459 if (!must_link () && (cfun->machine->callee_saved_reg_size == 4))
460 {
461 insn =
462 emit_insn (gen_link
463 (gen_rtx_REG (Pmode, FT32_R13),
464 GEN_INT (-cfun->machine->size_for_adjusting_sp)));
465 RTX_FRAME_RELATED_P (insn) = 1;
466 return;
467 }
468 /* Save callee-saved registers. */
469 if (optimize_size)
470 {
471 for (regno = FIRST_PSEUDO_REGISTER; regno-- > 0;)
472 {
473 if (!fixed_regs[regno] && !call_used_regs[regno]
474 && df_regs_ever_live_p (regno))
475 {
476 rtx preg = gen_rtx_REG (Pmode, regno);
477 emit_insn (gen_call_prolog (preg));
478 break;
479 }
480 }
481 }
482 else
483 {
484 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
485 {
486 if (!fixed_regs[regno] && df_regs_ever_live_p (regno)
487 && !call_used_regs[regno])
488 {
489 insn = emit_insn (gen_movsi_push (gen_rtx_REG (Pmode, regno)));
490 RTX_FRAME_RELATED_P (insn) = 1;
491 }
492 }
493 }
494
495 if (65536 <= cfun->machine->size_for_adjusting_sp)
496 {
497 error ("stack frame must be smaller than 64K");
498 return;
499 }
500 if (must_link ())
501 {
502 insn =
503 emit_insn (gen_link
504 (gen_rtx_REG (Pmode, FT32_FP),
505 GEN_INT (-cfun->machine->size_for_adjusting_sp)));
506 RTX_FRAME_RELATED_P (insn) = 1;
507 }
508 else if (cfun->machine->size_for_adjusting_sp > 0)
509 {
510 insn = emit_insn (gen_addsi3 (gen_rtx_REG (SImode, FT32_SP),
511 gen_rtx_REG (SImode, FT32_SP),
512 GEN_INT (-(cfun->machine->
513 size_for_adjusting_sp))));
514 RTX_FRAME_RELATED_P (insn) = 1;
515 }
516 }
517
518 void
519 ft32_expand_epilogue (void)
520 {
521 int regno;
522
523 if (!must_link ()
524 && (cfun->machine->size_for_adjusting_sp == 24)
525 && (cfun->machine->callee_saved_reg_size == 0))
526 {
527 emit_jump_insn (gen_returner24 ());
528 return;
529 }
530
531 // Set when the epilog code will also add 24 to $sp
532 int epilog24 = (!must_link ()
533 && (cfun->machine->size_for_adjusting_sp == 24)
534 && optimize_size);
535
536 if (must_link ())
537 {
538 emit_insn (gen_unlink ());
539 }
540 else if (!epilog24 && (cfun->machine->size_for_adjusting_sp > 0))
541 {
542 emit_insn (gen_addsi3 (gen_rtx_REG (SImode, FT32_SP),
543 gen_rtx_REG (SImode, FT32_SP),
544 GEN_INT (cfun->machine->size_for_adjusting_sp)));
545 }
546
547 if (cfun->machine->callee_saved_reg_size != 0)
548 {
549 for (regno = FIRST_PSEUDO_REGISTER; regno-- > 0;)
550 {
551 if (!fixed_regs[regno] && !call_used_regs[regno]
552 && df_regs_ever_live_p (regno))
553 {
554 rtx preg = gen_rtx_REG (Pmode, regno);
555 if (optimize_size)
556 {
557 if (epilog24)
558 emit_insn (gen_jump_epilog24 (preg));
559 else
560 emit_insn (gen_jump_epilog (preg));
561 return;
562 }
563 emit_insn (gen_movsi_pop (preg));
564 }
565 }
566 }
567
568 emit_jump_insn (gen_returner ());
569 }
570
571 #undef TARGET_FRAME_POINTER_REQUIRED
572 #define TARGET_FRAME_POINTER_REQUIRED ft32_frame_pointer_required
573 static bool
574 ft32_frame_pointer_required (void)
575 {
576 return cfun->calls_alloca;
577 }
578
579 #undef TARGET_CAN_ELIMINATE
580 #define TARGET_CAN_ELIMINATE ft32_can_eliminate
581
582 /* Return true if register FROM can be eliminated via register TO. */
583
584 static bool
585 ft32_can_eliminate (const int from ATTRIBUTE_UNUSED, const int to)
586 {
587 return 1;
588 return (to == FRAME_POINTER_REGNUM) || !ft32_frame_pointer_required ();
589 }
590
591 /* Implements the macro INITIAL_ELIMINATION_OFFSET, return the OFFSET. */
592
593 int
594 ft32_initial_elimination_offset (int from, int to)
595 {
596 ft32_compute_frame ();
597
598 if (from == ARG_POINTER_REGNUM && to == FRAME_POINTER_REGNUM)
599 {
600 return cfun->machine->callee_saved_reg_size + 2 * UNITS_PER_WORD;
601 }
602
603 if (from == ARG_POINTER_REGNUM && to == STACK_POINTER_REGNUM)
604 {
605 int arg_offset;
606 arg_offset = must_link ()? 2 : 1;
607 return ((cfun->machine->callee_saved_reg_size
608 + arg_offset * UNITS_PER_WORD)
609 + cfun->machine->size_for_adjusting_sp);
610 }
611
612 if ((from == FRAME_POINTER_REGNUM) && (to == STACK_POINTER_REGNUM))
613 {
614 return cfun->machine->size_for_adjusting_sp;
615 }
616
617 gcc_unreachable ();
618 }
619
620 /* Worker function for TARGET_SETUP_INCOMING_VARARGS. */
621
622 static void
623 ft32_setup_incoming_varargs (cumulative_args_t cum_v,
624 enum machine_mode mode ATTRIBUTE_UNUSED,
625 tree type ATTRIBUTE_UNUSED,
626 int *pretend_size, int no_rtl)
627 {
628 CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
629 int regno;
630 int regs = 8 - *cum;
631
632 *pretend_size = regs < 0 ? 0 : GET_MODE_SIZE (SImode) * regs;
633
634 if (no_rtl)
635 return;
636
637 for (regno = *cum; regno < 8; regno++)
638 {
639 rtx reg = gen_rtx_REG (SImode, regno);
640 rtx slot = gen_rtx_PLUS (Pmode,
641 gen_rtx_REG (SImode, ARG_POINTER_REGNUM),
642 GEN_INT (UNITS_PER_WORD * (regno - FT32_R0)));
643
644 emit_move_insn (gen_rtx_MEM (SImode, slot), reg);
645 }
646 }
647
648
649 /* Return the fixed registers used for condition codes. */
650
651 static bool
652 ft32_fixed_condition_code_regs (unsigned int *p1, unsigned int *p2)
653 {
654 *p1 = CC_REG;
655 *p2 = INVALID_REGNUM;
656 return true;
657 }
658
659 /* Return the next register to be used to hold a function argument or
660 NULL_RTX if there's no more space. */
661
662 static rtx
663 ft32_function_arg (cumulative_args_t cum_v, enum machine_mode mode,
664 const_tree type ATTRIBUTE_UNUSED,
665 bool named ATTRIBUTE_UNUSED)
666 {
667 CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
668
669 if (*cum < 8)
670 return gen_rtx_REG (mode, *cum);
671 else
672 return NULL_RTX;
673 }
674
675 #define FT32_FUNCTION_ARG_SIZE(MODE, TYPE) \
676 ((MODE) != BLKmode ? GET_MODE_SIZE (MODE) \
677 : (unsigned) int_size_in_bytes (TYPE))
678
679 static void
680 ft32_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode,
681 const_tree type, bool named ATTRIBUTE_UNUSED)
682 {
683 CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
684
685 *cum = (*cum < FT32_R6
686 ? *cum + ((3 + FT32_FUNCTION_ARG_SIZE (mode, type)) / 4) : *cum);
687 }
688
689 /* Return non-zero if the function argument described by TYPE is to be
690 passed by reference. */
691
692 static bool
693 ft32_pass_by_reference (cumulative_args_t cum ATTRIBUTE_UNUSED,
694 enum machine_mode mode, const_tree type,
695 bool named ATTRIBUTE_UNUSED)
696 {
697 unsigned HOST_WIDE_INT size;
698
699 if (type)
700 {
701 if (AGGREGATE_TYPE_P (type))
702 return true;
703 size = int_size_in_bytes (type);
704 }
705 else
706 size = GET_MODE_SIZE (mode);
707
708 return size > 4 * 6;
709 }
710
711 /* Some function arguments will only partially fit in the registers
712 that hold arguments. Given a new arg, return the number of bytes
713 that fit in argument passing registers. */
714
715 static int
716 ft32_arg_partial_bytes (cumulative_args_t cum_v,
717 enum machine_mode mode, tree type, bool named)
718 {
719 CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
720 int bytes_left, size;
721
722 if (*cum >= 8)
723 return 0;
724
725 if (ft32_pass_by_reference (cum_v, mode, type, named))
726 size = 4;
727 else if (type)
728 {
729 if (AGGREGATE_TYPE_P (type))
730 return 0;
731 size = int_size_in_bytes (type);
732 }
733 else
734 size = GET_MODE_SIZE (mode);
735
736 bytes_left = (4 * 6) - ((*cum - 2) * 4);
737
738 if (size > bytes_left)
739 return bytes_left;
740 else
741 return 0;
742 }
743
744 /* Used by constraints.md to distinguish between GENERIC and PM
745 memory addresses. */
746
747 int
748 ft32_is_mem_pm (rtx o)
749 {
750 if (GET_CODE (o) != MEM)
751 return false;
752 if (MEM_EXPR (o))
753 return TYPE_ADDR_SPACE (TREE_TYPE (MEM_EXPR (o))) == ADDR_SPACE_PM;
754 else
755 return MEM_ADDR_SPACE (o) == ADDR_SPACE_PM;
756 }
757
758 /* The Global `targetm' Variable. */
759
760 /* Initialize the GCC target structure. */
761
762 #undef TARGET_PROMOTE_PROTOTYPES
763 #define TARGET_PROMOTE_PROTOTYPES hook_bool_const_tree_true
764
765 #undef TARGET_RETURN_IN_MEMORY
766 #define TARGET_RETURN_IN_MEMORY ft32_return_in_memory
767 #undef TARGET_MUST_PASS_IN_STACK
768 #define TARGET_MUST_PASS_IN_STACK must_pass_in_stack_var_size
769 #undef TARGET_PASS_BY_REFERENCE
770 #define TARGET_PASS_BY_REFERENCE ft32_pass_by_reference
771 #undef TARGET_ARG_PARTIAL_BYTES
772 #define TARGET_ARG_PARTIAL_BYTES ft32_arg_partial_bytes
773 #undef TARGET_FUNCTION_ARG
774 #define TARGET_FUNCTION_ARG ft32_function_arg
775 #undef TARGET_FUNCTION_ARG_ADVANCE
776 #define TARGET_FUNCTION_ARG_ADVANCE ft32_function_arg_advance
777
778
779 #undef TARGET_SETUP_INCOMING_VARARGS
780 #define TARGET_SETUP_INCOMING_VARARGS ft32_setup_incoming_varargs
781
782 #undef TARGET_FIXED_CONDITION_CODE_REGS
783 #define TARGET_FIXED_CONDITION_CODE_REGS ft32_fixed_condition_code_regs
784
785 /* Define this to return an RTX representing the place where a
786 function returns or receives a value of data type RET_TYPE, a tree
787 node node representing a data type. */
788 #undef TARGET_FUNCTION_VALUE
789 #define TARGET_FUNCTION_VALUE ft32_function_value
790 #undef TARGET_LIBCALL_VALUE
791 #define TARGET_LIBCALL_VALUE ft32_libcall_value
792 #undef TARGET_FUNCTION_VALUE_REGNO_P
793 #define TARGET_FUNCTION_VALUE_REGNO_P ft32_function_value_regno_p
794
795 #undef TARGET_OPTION_OVERRIDE
796 #define TARGET_OPTION_OVERRIDE ft32_option_override
797
798 #undef TARGET_ASM_SELECT_SECTION
799 #define TARGET_ASM_SELECT_SECTION ft32_select_section
800
801 #undef TARGET_VALID_POINTER_MODE
802 #define TARGET_VALID_POINTER_MODE ft32_valid_pointer_mode
803 static bool
804 ft32_valid_pointer_mode (enum machine_mode mode)
805 {
806 if (mode == SImode)
807 return 1;
808 return 0;
809 }
810
811 #undef TARGET_ADDR_SPACE_POINTER_MODE
812 #define TARGET_ADDR_SPACE_POINTER_MODE ft32_addr_space_pointer_mode
813 static enum machine_mode
814 ft32_addr_space_pointer_mode (addr_space_t addrspace ATTRIBUTE_UNUSED)
815 {
816 return Pmode;
817 }
818
819 #undef TARGET_ADDR_SPACE_ADDRESS_MODE
820 #define TARGET_ADDR_SPACE_ADDRESS_MODE ft32_addr_space_address_mode
821 static enum machine_mode
822 ft32_addr_space_address_mode (addr_space_t addrspace ATTRIBUTE_UNUSED)
823 {
824 return Pmode;
825 }
826
827 #undef TARGET_ADDR_SPACE_SUBSET_P
828 #define TARGET_ADDR_SPACE_SUBSET_P ft32_addr_space_subset_p
829 static bool
830 ft32_addr_space_subset_p (addr_space_t subset ATTRIBUTE_UNUSED,
831 addr_space_t superset ATTRIBUTE_UNUSED)
832 {
833 return false;
834 }
835
836 #undef TARGET_CASE_VALUES_THRESHOLD
837 #define TARGET_CASE_VALUES_THRESHOLD ft32_target_case_values_threshold
838
839 static unsigned int
840 ft32_target_case_values_threshold (void)
841 {
842 return 4;
843 }
844
845 #undef TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P
846 #define TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P \
847 ft32_addr_space_legitimate_address_p
848
849
850 // Enabling LRA gives the infamous
851 // internal compiler error: Max. number of generated reload insns per insn is achieved (90)
852 // errors e.g. when compiling sieve.c
853
854 static bool
855 ft32_lra_p (void)
856 {
857 return ft32_lra_flag;
858 }
859
860 #undef TARGET_LRA_P
861 #define TARGET_LRA_P ft32_lra_p
862
863 static bool
864 reg_ok_for_base_p (rtx r, bool strict)
865 {
866 int NUM = REGNO (r);
867 if (strict)
868 return (HARD_REGNO_OK_FOR_BASE_P (NUM)
869 || HARD_REGNO_OK_FOR_BASE_P (reg_renumber[(NUM)]));
870 else
871 return ((NUM) >= FIRST_PSEUDO_REGISTER || HARD_REGNO_OK_FOR_BASE_P (NUM));
872 }
873
874 static bool
875 ft32_addr_space_legitimate_address_p (enum machine_mode mode, rtx x,
876 bool strict,
877 addr_space_t as ATTRIBUTE_UNUSED)
878 {
879 if (mode != BLKmode)
880 {
881 if (GET_CODE (x) == PLUS)
882 {
883 rtx op1, op2;
884 op1 = XEXP (x, 0);
885 op2 = XEXP (x, 1);
886 if (GET_CODE (op1) == REG
887 && CONST_INT_P (op2)
888 && INTVAL (op2) >= -128
889 && INTVAL (op2) < 128 && reg_ok_for_base_p (op1, strict))
890 goto yes;
891 if (GET_CODE (op1) == SYMBOL_REF && CONST_INT_P (op2))
892 goto yes;
893 }
894 if (REG_P (x) && reg_ok_for_base_p (x, strict))
895 goto yes;
896 if (GET_CODE (x) == SYMBOL_REF
897 || GET_CODE (x) == LABEL_REF || CONST_INT_P (x))
898 goto yes;
899 }
900 else
901 {
902 if (REG_P (x) && reg_ok_for_base_p (x, strict))
903 goto yes;
904 }
905
906 return 0;
907 yes:
908 return 1;
909 }
910
911 struct gcc_target targetm = TARGET_INITIALIZER;
912
913 #include "gt-ft32.h"