gcc/config/h8300/constraints.md

   1 ;; Constraint definitions for Renesas H8/300.
   2 ;; Copyright (C) 2011-2024 Free Software Foundation, Inc.
   3 ;;
   4 ;; This file is part of GCC.
   5 ;;
   6 ;; GCC is free software; you can redistribute it and/or modify
   7 ;; it under the terms of the GNU General Public License as published by
   8 ;; the Free Software Foundation; either version 3, or (at your option)
   9 ;; any later version.
  10 ;;
  11 ;; GCC is distributed in the hope that it will be useful,
  12 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14 ;; GNU General Public License for more details.
  15 ;;
  16 ;; You should have received a copy of the GNU General Public License
  17 ;; along with GCC; see the file COPYING3.  If not see
  18 ;; <http://www.gnu.org/licenses/>.
  19
  20 ;; Register constraints.
  21 (define_register_constraint "a" "MAC_REGS"
  22   "@internal")
  23
  24 (define_register_constraint "c" "COUNTER_REGS"
  25   "@internal")
  26
  27 ;; Some patterns need to use er6 as a scratch register.  This is
  28 ;; difficult to arrange since er6 is the frame pointer and usually can't
  29 ;; be spilled.
  30
  31 ;; Such patterns should define two alternatives, one which allows only
  32 ;; er6 and one which allows any general register.  The former
  33 ;; alternative should have a 'd' constraint while the latter should be
  34 ;; disparaged and use 'D'.
  35
  36 ;; Normally, 'd' maps to DESTINATION_REGS and 'D' maps to GENERAL_REGS.
  37 ;; However, there are cases where they should be NO_REGS:
  38
  39 ;;   - 'd' should be NO_REGS when reloading a function that uses the
  40 ;;     frame pointer.  In this case, DESTINATION_REGS won't contain any
  41 ;;     spillable registers, so the first alternative can't be used.
  42
  43 ;;   - -fno-omit-frame-pointer means that the frame pointer will
  44 ;;     always be in use.  It's therefore better to map 'd' to NO_REGS
  45 ;;     before reload so that register allocator will pick the second
  46 ;;     alternative.
  47
  48 ;;   - we would like 'D' to be NO_REGS when the frame pointer isn't
  49 ;;     live, but we the frame pointer may turn out to be needed after
  50 ;;     we start reload, and then we may have already decided we don't
  51 ;;     have a choice, so we can't do that.  Forcing the register
  52 ;;     allocator to use er6 if possible might produce better code for
  53 ;;     small functions: it's more efficient to save and restore er6 in
  54 ;;     the prologue & epilogue than to do it in a define_split.
  55 ;;     Hopefully disparaging 'D' will have a similar effect, without
  56 ;;     forcing a reload failure if the frame pointer is found to be
  57 ;;     needed too late.
  58
  59 (define_register_constraint "d"
  60   "(!flag_omit_frame_pointer && !reload_completed
  61     ? NO_REGS
  62     : (frame_pointer_needed && reload_in_progress
  63        ? NO_REGS
  64        : DESTINATION_REGS))"
  65   "@internal")
  66
  67 (define_register_constraint "D" "GENERAL_REGS"
  68   "@internal")
  69
  70 (define_register_constraint "f" "SOURCE_REGS"
  71   "@internal")
  72
  73 ;; Integer constraints.
  74 (define_constraint "I"
  75   "Integer zero."
  76   (and (match_code "const_int")
  77        (match_test "ival == 0")))
  78
  79 (define_constraint "J"
  80   "An integer with its low byte clear."
  81   (and (match_code "const_int")
  82        (match_test "(ival & 0xff) == 0")))
  83
  84 (define_constraint "L"
  85   "Integer 1, 2 or 4"
  86   (and (match_code "const_int")
  87        (match_test "ival == 1 || ival == 2 || ival == 4")))
  88
  89 (define_constraint "M"
  90   "Integer 1 or 2."
  91   (and (match_code "const_int")
  92        (match_test "ival == 1 || ival == 2")))
  93
  94 (define_constraint "N"
  95   "Integer -1, -2 or -4"
  96   (and (match_code "const_int")
  97        (match_test "ival == -1 || ival == -2 || ival == -4")))
  98
  99 (define_constraint "O"
 100   "Integer -1 or -2."
 101   (and (match_code "const_int")
 102        (match_test "ival == -1 || ival == -2")))
 103
 104 (define_constraint "P1>X"
 105   "A positive, non-zero integer that fits in 1 bits."
 106   (and (match_code "const_int")
 107        (match_test "TARGET_H8300SX")
 108        (match_test "IN_RANGE (ival, 1, (1 << 1) - 1)")))
 109
 110 (define_constraint "P3>X"
 111   "A positive, non-zero integer that fits in 3 bits."
 112   (and (match_code "const_int")
 113        (match_test "TARGET_H8300SX")
 114        (match_test "IN_RANGE (ival, 1, (1 << 3) - 1)")))
 115
 116 (define_constraint "P4>X"
 117   "A positive, non-zero integer that fits in 4 bits."
 118   (and (match_code "const_int")
 119        (match_test "TARGET_H8300SX")
 120        (match_test "IN_RANGE (ival, 1, (1 << 4) - 1)")))
 121
 122 (define_constraint "P5>X"
 123   "A positive, non-zero integer that fits in 5 bits."
 124   (and (match_code "const_int")
 125        (match_test "TARGET_H8300SX")
 126        (match_test "IN_RANGE (ival, 1, (1 << 5) - 1)")))
 127
 128 (define_constraint "P8>X"
 129   "A positive, non-zero integer that fits in 8 bits."
 130   (and (match_code "const_int")
 131        (match_test "TARGET_H8300SX")
 132        (match_test "IN_RANGE (ival, 1, (1 << 8) - 1)")))
 133
 134 (define_constraint "P3<X"
 135   "A negative, non-zero integer that fits in 3 bits."
 136   (and (match_code "const_int")
 137        (match_test "TARGET_H8300SX")
 138        (match_test "IN_RANGE (ival, (-(1 << 3)) + 1, -1)")))
 139
 140 ;; Floating-point constraints.
 141 (define_constraint "G"
 142   "Single-float zero."
 143   (and (match_code "const_double")
 144        (match_test "op == CONST0_RTX (SFmode)")))
 145
 146 ;; Extra constraints.
 147 (define_special_memory_constraint "Q"
 148   "@internal"
 149   (and (match_test "TARGET_H8300SX")
 150        (match_operand 0 "memory_operand")))
 151
 152 (define_constraint "R"
 153   "@internal"
 154   (and (match_code "const_int")
 155        (match_test "!h8300_shift_needs_scratch_p (ival, QImode, CLOBBER)")))
 156
 157 (define_constraint "C"
 158   "@internal"
 159   (match_code "symbol_ref"))
 160
 161 (define_constraint "S"
 162   "@internal"
 163   (and (match_code "const_int")
 164        (match_test "!h8300_shift_needs_scratch_p (ival, HImode, CLOBBER)")))
 165
 166 (define_constraint "T"
 167   "@internal"
 168   (and (match_code "const_int")
 169        (match_test "!h8300_shift_needs_scratch_p (ival, SImode, CLOBBER)")))
 170
 171 (define_constraint "U"
 172   "An operand valid for a bset destination."
 173   (ior (and (match_code "reg")
 174             (match_test "(reload_in_progress || reload_completed)
 175                          ? REG_OK_FOR_BASE_STRICT_P (op)
 176                          : REG_OK_FOR_BASE_P (op)"))
 177        (and (match_code "mem")
 178             (match_code "reg" "0")
 179             (match_test "(reload_in_progress || reload_completed)
 180                          ? REG_OK_FOR_BASE_STRICT_P (XEXP (op, 0))
 181                          : REG_OK_FOR_BASE_P (XEXP (op, 0))"))
 182        (and (match_code "mem")
 183             (match_code "symbol_ref" "0")
 184             (match_test "TARGET_H8300S"))
 185        (and (match_code "mem")
 186             (match_code "const" "0")
 187             (match_code "plus" "00")
 188             (match_code "symbol_ref" "000")
 189             (match_code "const_int" "001")
 190             (ior (match_test "TARGET_H8300S")
 191                  (match_test "(SYMBOL_REF_FLAGS (XEXP (XEXP (XEXP (op, 0), 0), 0)) & SYMBOL_FLAG_EIGHTBIT_DATA) != 0")))
 192        (and (match_code "mem")
 193             (match_test "h8300_eightbit_constant_address_p (XEXP (op, 0))"))
 194        (and (match_code "mem")
 195             (ior (match_test "TARGET_H8300S")
 196                  (match_test "TARGET_H8300SX"))
 197             (match_code "const_int" "0"))))
 198
 199 (define_memory_constraint "WU"
 200   "@internal"
 201   (and (match_code "mem")
 202        (match_test "satisfies_constraint_U (op)")))
 203
 204 (define_constraint "Y0"
 205   "@internal"
 206   (and (match_code "const_int")
 207        (match_test "exact_log2 (~ival & 0xff) != -1")))
 208
 209 (define_constraint "Y2"
 210   "@internal"
 211   (and (match_code "const_int")
 212        (match_test "exact_log2 (ival & 0xff) != -1")))
 213
 214 (define_constraint "Zz"
 215   "@internal"
 216   (and (match_test "TARGET_H8300SX")
 217        (match_code "mem")
 218        (match_test "CONSTANT_P (XEXP (op, 0))")))
 219
 220 (define_register_constraint "Z0" "NOT_R0_REGS"
 221   "@internal")
 222
 223 (define_register_constraint "Z1" "NOT_R1_REGS"
 224   "@internal")
 225
 226 (define_register_constraint "Z2" "NOT_R2_REGS"
 227   "@internal")
 228
 229 (define_register_constraint "Z3" "NOT_R3_REGS"
 230   "@internal")
 231
 232 (define_register_constraint "Z4" "NOT_R4_REGS"
 233   "@internal")
 234
 235 (define_register_constraint "Z5" "NOT_R5_REGS"
 236   "@internal")
 237
 238 (define_register_constraint "Z6" "NOT_R6_REGS"
 239   "@internal")
 240
 241 (define_register_constraint "Z7" "NOT_SP_REGS"
 242   "@internal")
 243
 244 (define_constraint "Za" "@internal" (match_test "pre_incdec_with_reg (op, 0)"))
 245 (define_constraint "Zb" "@internal" (match_test "pre_incdec_with_reg (op, 1)"))
 246 (define_constraint "Zc" "@internal" (match_test "pre_incdec_with_reg (op, 2)"))
 247 (define_constraint "Zd" "@internal" (match_test "pre_incdec_with_reg (op, 3)"))
 248 (define_constraint "Ze" "@internal" (match_test "pre_incdec_with_reg (op, 4)"))
 249 (define_constraint "Zf" "@internal" (match_test "pre_incdec_with_reg (op, 5)"))
 250 (define_constraint "Zg" "@internal" (match_test "pre_incdec_with_reg (op, 6)"))
 251 (define_constraint "Zh" "@internal" (match_test "pre_incdec_with_reg (op, 7)"))