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Enable support for bfloat16 which will be in Future Cooper Lake.
[thirdparty/gcc.git] / gcc / config / i386 / i386-builtins.c
1 /* Copyright (C) 1988-2019 Free Software Foundation, Inc.
2
3 This file is part of GCC.
4
5 GCC is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 3, or (at your option)
8 any later version.
9
10 GCC is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with GCC; see the file COPYING3. If not see
17 <http://www.gnu.org/licenses/>. */
18
19 #define IN_TARGET_CODE 1
20
21 #include "config.h"
22 #include "system.h"
23 #include "coretypes.h"
24 #include "backend.h"
25 #include "rtl.h"
26 #include "tree.h"
27 #include "memmodel.h"
28 #include "gimple.h"
29 #include "cfghooks.h"
30 #include "cfgloop.h"
31 #include "df.h"
32 #include "tm_p.h"
33 #include "stringpool.h"
34 #include "expmed.h"
35 #include "optabs.h"
36 #include "regs.h"
37 #include "emit-rtl.h"
38 #include "recog.h"
39 #include "cgraph.h"
40 #include "diagnostic.h"
41 #include "cfgbuild.h"
42 #include "alias.h"
43 #include "fold-const.h"
44 #include "attribs.h"
45 #include "calls.h"
46 #include "stor-layout.h"
47 #include "varasm.h"
48 #include "output.h"
49 #include "insn-attr.h"
50 #include "flags.h"
51 #include "except.h"
52 #include "explow.h"
53 #include "expr.h"
54 #include "cfgrtl.h"
55 #include "common/common-target.h"
56 #include "langhooks.h"
57 #include "reload.h"
58 #include "gimplify.h"
59 #include "dwarf2.h"
60 #include "tm-constrs.h"
61 #include "params.h"
62 #include "cselib.h"
63 #include "sched-int.h"
64 #include "opts.h"
65 #include "tree-pass.h"
66 #include "context.h"
67 #include "pass_manager.h"
68 #include "target-globals.h"
69 #include "gimple-iterator.h"
70 #include "tree-vectorizer.h"
71 #include "shrink-wrap.h"
72 #include "builtins.h"
73 #include "rtl-iter.h"
74 #include "tree-iterator.h"
75 #include "dbgcnt.h"
76 #include "case-cfn-macros.h"
77 #include "dojump.h"
78 #include "fold-const-call.h"
79 #include "tree-vrp.h"
80 #include "tree-ssanames.h"
81 #include "selftest.h"
82 #include "selftest-rtl.h"
83 #include "print-rtl.h"
84 #include "intl.h"
85 #include "ifcvt.h"
86 #include "symbol-summary.h"
87 #include "ipa-prop.h"
88 #include "ipa-fnsummary.h"
89 #include "wide-int-bitmask.h"
90 #include "tree-vector-builder.h"
91 #include "debug.h"
92 #include "dwarf2out.h"
93 #include "i386-builtins.h"
94
95 #undef BDESC
96 #undef BDESC_FIRST
97 #undef BDESC_END
98
99 /* Macros for verification of enum ix86_builtins order. */
100 #define BDESC_VERIFY(x, y, z) \
101 gcc_checking_assert ((x) == (enum ix86_builtins) ((y) + (z)))
102 #define BDESC_VERIFYS(x, y, z) \
103 STATIC_ASSERT ((x) == (enum ix86_builtins) ((y) + (z)))
104
105 BDESC_VERIFYS (IX86_BUILTIN__BDESC_PCMPESTR_FIRST,
106 IX86_BUILTIN__BDESC_COMI_LAST, 1);
107 BDESC_VERIFYS (IX86_BUILTIN__BDESC_PCMPISTR_FIRST,
108 IX86_BUILTIN__BDESC_PCMPESTR_LAST, 1);
109 BDESC_VERIFYS (IX86_BUILTIN__BDESC_SPECIAL_ARGS_FIRST,
110 IX86_BUILTIN__BDESC_PCMPISTR_LAST, 1);
111 BDESC_VERIFYS (IX86_BUILTIN__BDESC_ARGS_FIRST,
112 IX86_BUILTIN__BDESC_SPECIAL_ARGS_LAST, 1);
113 BDESC_VERIFYS (IX86_BUILTIN__BDESC_ROUND_ARGS_FIRST,
114 IX86_BUILTIN__BDESC_ARGS_LAST, 1);
115 BDESC_VERIFYS (IX86_BUILTIN__BDESC_MULTI_ARG_FIRST,
116 IX86_BUILTIN__BDESC_ROUND_ARGS_LAST, 1);
117 BDESC_VERIFYS (IX86_BUILTIN__BDESC_CET_FIRST,
118 IX86_BUILTIN__BDESC_MULTI_ARG_LAST, 1);
119 BDESC_VERIFYS (IX86_BUILTIN__BDESC_CET_NORMAL_FIRST,
120 IX86_BUILTIN__BDESC_CET_LAST, 1);
121 BDESC_VERIFYS (IX86_BUILTIN_MAX,
122 IX86_BUILTIN__BDESC_CET_NORMAL_LAST, 1);
123
124
125 /* Table for the ix86 builtin non-function types. */
126 static GTY(()) tree ix86_builtin_type_tab[(int) IX86_BT_LAST_CPTR + 1];
127
128 /* Retrieve an element from the above table, building some of
129 the types lazily. */
130
131 static tree
132 ix86_get_builtin_type (enum ix86_builtin_type tcode)
133 {
134 unsigned int index;
135 tree type, itype;
136
137 gcc_assert ((unsigned)tcode < ARRAY_SIZE(ix86_builtin_type_tab));
138
139 type = ix86_builtin_type_tab[(int) tcode];
140 if (type != NULL)
141 return type;
142
143 gcc_assert (tcode > IX86_BT_LAST_PRIM);
144 if (tcode <= IX86_BT_LAST_VECT)
145 {
146 machine_mode mode;
147
148 index = tcode - IX86_BT_LAST_PRIM - 1;
149 itype = ix86_get_builtin_type (ix86_builtin_type_vect_base[index]);
150 mode = ix86_builtin_type_vect_mode[index];
151
152 type = build_vector_type_for_mode (itype, mode);
153 }
154 else
155 {
156 int quals;
157
158 index = tcode - IX86_BT_LAST_VECT - 1;
159 if (tcode <= IX86_BT_LAST_PTR)
160 quals = TYPE_UNQUALIFIED;
161 else
162 quals = TYPE_QUAL_CONST;
163
164 itype = ix86_get_builtin_type (ix86_builtin_type_ptr_base[index]);
165 if (quals != TYPE_UNQUALIFIED)
166 itype = build_qualified_type (itype, quals);
167
168 type = build_pointer_type (itype);
169 }
170
171 ix86_builtin_type_tab[(int) tcode] = type;
172 return type;
173 }
174
175 /* Table for the ix86 builtin function types. */
176 static GTY(()) tree ix86_builtin_func_type_tab[(int) IX86_BT_LAST_ALIAS + 1];
177
178 /* Retrieve an element from the above table, building some of
179 the types lazily. */
180
181 static tree
182 ix86_get_builtin_func_type (enum ix86_builtin_func_type tcode)
183 {
184 tree type;
185
186 gcc_assert ((unsigned)tcode < ARRAY_SIZE (ix86_builtin_func_type_tab));
187
188 type = ix86_builtin_func_type_tab[(int) tcode];
189 if (type != NULL)
190 return type;
191
192 if (tcode <= IX86_BT_LAST_FUNC)
193 {
194 unsigned start = ix86_builtin_func_start[(int) tcode];
195 unsigned after = ix86_builtin_func_start[(int) tcode + 1];
196 tree rtype, atype, args = void_list_node;
197 unsigned i;
198
199 rtype = ix86_get_builtin_type (ix86_builtin_func_args[start]);
200 for (i = after - 1; i > start; --i)
201 {
202 atype = ix86_get_builtin_type (ix86_builtin_func_args[i]);
203 args = tree_cons (NULL, atype, args);
204 }
205
206 type = build_function_type (rtype, args);
207 }
208 else
209 {
210 unsigned index = tcode - IX86_BT_LAST_FUNC - 1;
211 enum ix86_builtin_func_type icode;
212
213 icode = ix86_builtin_func_alias_base[index];
214 type = ix86_get_builtin_func_type (icode);
215 }
216
217 ix86_builtin_func_type_tab[(int) tcode] = type;
218 return type;
219 }
220
221 /* Table for the ix86 builtin decls. */
222 static GTY(()) tree ix86_builtins[(int) IX86_BUILTIN_MAX];
223
224 struct builtin_isa ix86_builtins_isa[(int) IX86_BUILTIN_MAX];
225
226 tree get_ix86_builtin (enum ix86_builtins c)
227 {
228 return ix86_builtins[c];
229 }
230
231 /* Bits that can still enable any inclusion of a builtin. */
232 HOST_WIDE_INT deferred_isa_values = 0;
233 HOST_WIDE_INT deferred_isa_values2 = 0;
234
235 /* Add an ix86 target builtin function with CODE, NAME and TYPE. Save the
236 MASK and MASK2 of which isa_flags and ix86_isa_flags2 to use in the
237 ix86_builtins_isa array. Stores the function decl in the ix86_builtins
238 array. Returns the function decl or NULL_TREE, if the builtin was not
239 added.
240
241 If the front end has a special hook for builtin functions, delay adding
242 builtin functions that aren't in the current ISA until the ISA is changed
243 with function specific optimization. Doing so, can save about 300K for the
244 default compiler. When the builtin is expanded, check at that time whether
245 it is valid.
246
247 If the front end doesn't have a special hook, record all builtins, even if
248 it isn't an instruction set in the current ISA in case the user uses
249 function specific options for a different ISA, so that we don't get scope
250 errors if a builtin is added in the middle of a function scope. */
251
252 static inline tree
253 def_builtin (HOST_WIDE_INT mask, HOST_WIDE_INT mask2,
254 const char *name,
255 enum ix86_builtin_func_type tcode,
256 enum ix86_builtins code)
257 {
258 tree decl = NULL_TREE;
259
260 /* An instruction may be 64bit only regardless of ISAs. */
261 if (!(mask & OPTION_MASK_ISA_64BIT) || TARGET_64BIT)
262 {
263 ix86_builtins_isa[(int) code].isa = mask;
264 ix86_builtins_isa[(int) code].isa2 = mask2;
265
266 mask &= ~OPTION_MASK_ISA_64BIT;
267
268 /* Filter out the masks most often ored together with others. */
269 if ((mask & ix86_isa_flags & OPTION_MASK_ISA_AVX512VL)
270 && mask != OPTION_MASK_ISA_AVX512VL)
271 mask &= ~OPTION_MASK_ISA_AVX512VL;
272 if ((mask & ix86_isa_flags & OPTION_MASK_ISA_AVX512BW)
273 && mask != OPTION_MASK_ISA_AVX512BW)
274 mask &= ~OPTION_MASK_ISA_AVX512BW;
275
276 if (((mask2 == 0 || (mask2 & ix86_isa_flags2) != 0)
277 && (mask == 0 || (mask & ix86_isa_flags) != 0))
278 || (lang_hooks.builtin_function
279 == lang_hooks.builtin_function_ext_scope))
280 {
281 tree type = ix86_get_builtin_func_type (tcode);
282 decl = add_builtin_function (name, type, code, BUILT_IN_MD,
283 NULL, NULL_TREE);
284 ix86_builtins[(int) code] = decl;
285 ix86_builtins_isa[(int) code].set_and_not_built_p = false;
286 }
287 else
288 {
289 /* Just MASK and MASK2 where set_and_not_built_p == true can potentially
290 include a builtin. */
291 deferred_isa_values |= mask;
292 deferred_isa_values2 |= mask2;
293 ix86_builtins[(int) code] = NULL_TREE;
294 ix86_builtins_isa[(int) code].tcode = tcode;
295 ix86_builtins_isa[(int) code].name = name;
296 ix86_builtins_isa[(int) code].const_p = false;
297 ix86_builtins_isa[(int) code].pure_p = false;
298 ix86_builtins_isa[(int) code].set_and_not_built_p = true;
299 }
300 }
301
302 return decl;
303 }
304
305 /* Like def_builtin, but also marks the function decl "const". */
306
307 static inline tree
308 def_builtin_const (HOST_WIDE_INT mask, HOST_WIDE_INT mask2, const char *name,
309 enum ix86_builtin_func_type tcode, enum ix86_builtins code)
310 {
311 tree decl = def_builtin (mask, mask2, name, tcode, code);
312 if (decl)
313 TREE_READONLY (decl) = 1;
314 else
315 ix86_builtins_isa[(int) code].const_p = true;
316
317 return decl;
318 }
319
320 /* Like def_builtin, but also marks the function decl "pure". */
321
322 static inline tree
323 def_builtin_pure (HOST_WIDE_INT mask, HOST_WIDE_INT mask2, const char *name,
324 enum ix86_builtin_func_type tcode, enum ix86_builtins code)
325 {
326 tree decl = def_builtin (mask, mask2, name, tcode, code);
327 if (decl)
328 DECL_PURE_P (decl) = 1;
329 else
330 ix86_builtins_isa[(int) code].pure_p = true;
331
332 return decl;
333 }
334
335 /* Add any new builtin functions for a given ISA that may not have been
336 declared. This saves a bit of space compared to adding all of the
337 declarations to the tree, even if we didn't use them. */
338
339 void
340 ix86_add_new_builtins (HOST_WIDE_INT isa, HOST_WIDE_INT isa2)
341 {
342 isa &= ~OPTION_MASK_ISA_64BIT;
343
344 if ((isa & deferred_isa_values) == 0
345 && (isa2 & deferred_isa_values2) == 0)
346 return;
347
348 /* Bits in ISA value can be removed from potential isa values. */
349 deferred_isa_values &= ~isa;
350 deferred_isa_values2 &= ~isa2;
351
352 int i;
353 tree saved_current_target_pragma = current_target_pragma;
354 current_target_pragma = NULL_TREE;
355
356 for (i = 0; i < (int)IX86_BUILTIN_MAX; i++)
357 {
358 if (((ix86_builtins_isa[i].isa & isa) != 0
359 || (ix86_builtins_isa[i].isa2 & isa2) != 0)
360 && ix86_builtins_isa[i].set_and_not_built_p)
361 {
362 tree decl, type;
363
364 /* Don't define the builtin again. */
365 ix86_builtins_isa[i].set_and_not_built_p = false;
366
367 type = ix86_get_builtin_func_type (ix86_builtins_isa[i].tcode);
368 decl = add_builtin_function_ext_scope (ix86_builtins_isa[i].name,
369 type, i, BUILT_IN_MD, NULL,
370 NULL_TREE);
371
372 ix86_builtins[i] = decl;
373 if (ix86_builtins_isa[i].const_p)
374 TREE_READONLY (decl) = 1;
375 }
376 }
377
378 current_target_pragma = saved_current_target_pragma;
379 }
380 \f
381 /* TM vector builtins. */
382
383 /* Reuse the existing x86-specific `struct builtin_description' cause
384 we're lazy. Add casts to make them fit. */
385 static const struct builtin_description bdesc_tm[] =
386 {
387 { OPTION_MASK_ISA_MMX, 0, CODE_FOR_nothing, "__builtin__ITM_WM64", (enum ix86_builtins) BUILT_IN_TM_STORE_M64, UNKNOWN, VOID_FTYPE_PV2SI_V2SI },
388 { OPTION_MASK_ISA_MMX, 0, CODE_FOR_nothing, "__builtin__ITM_WaRM64", (enum ix86_builtins) BUILT_IN_TM_STORE_WAR_M64, UNKNOWN, VOID_FTYPE_PV2SI_V2SI },
389 { OPTION_MASK_ISA_MMX, 0, CODE_FOR_nothing, "__builtin__ITM_WaWM64", (enum ix86_builtins) BUILT_IN_TM_STORE_WAW_M64, UNKNOWN, VOID_FTYPE_PV2SI_V2SI },
390 { OPTION_MASK_ISA_MMX, 0, CODE_FOR_nothing, "__builtin__ITM_RM64", (enum ix86_builtins) BUILT_IN_TM_LOAD_M64, UNKNOWN, V2SI_FTYPE_PCV2SI },
391 { OPTION_MASK_ISA_MMX, 0, CODE_FOR_nothing, "__builtin__ITM_RaRM64", (enum ix86_builtins) BUILT_IN_TM_LOAD_RAR_M64, UNKNOWN, V2SI_FTYPE_PCV2SI },
392 { OPTION_MASK_ISA_MMX, 0, CODE_FOR_nothing, "__builtin__ITM_RaWM64", (enum ix86_builtins) BUILT_IN_TM_LOAD_RAW_M64, UNKNOWN, V2SI_FTYPE_PCV2SI },
393 { OPTION_MASK_ISA_MMX, 0, CODE_FOR_nothing, "__builtin__ITM_RfWM64", (enum ix86_builtins) BUILT_IN_TM_LOAD_RFW_M64, UNKNOWN, V2SI_FTYPE_PCV2SI },
394
395 { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_WM128", (enum ix86_builtins) BUILT_IN_TM_STORE_M128, UNKNOWN, VOID_FTYPE_PV4SF_V4SF },
396 { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_WaRM128", (enum ix86_builtins) BUILT_IN_TM_STORE_WAR_M128, UNKNOWN, VOID_FTYPE_PV4SF_V4SF },
397 { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_WaWM128", (enum ix86_builtins) BUILT_IN_TM_STORE_WAW_M128, UNKNOWN, VOID_FTYPE_PV4SF_V4SF },
398 { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_RM128", (enum ix86_builtins) BUILT_IN_TM_LOAD_M128, UNKNOWN, V4SF_FTYPE_PCV4SF },
399 { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_RaRM128", (enum ix86_builtins) BUILT_IN_TM_LOAD_RAR_M128, UNKNOWN, V4SF_FTYPE_PCV4SF },
400 { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_RaWM128", (enum ix86_builtins) BUILT_IN_TM_LOAD_RAW_M128, UNKNOWN, V4SF_FTYPE_PCV4SF },
401 { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_RfWM128", (enum ix86_builtins) BUILT_IN_TM_LOAD_RFW_M128, UNKNOWN, V4SF_FTYPE_PCV4SF },
402
403 { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_WM256", (enum ix86_builtins) BUILT_IN_TM_STORE_M256, UNKNOWN, VOID_FTYPE_PV8SF_V8SF },
404 { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_WaRM256", (enum ix86_builtins) BUILT_IN_TM_STORE_WAR_M256, UNKNOWN, VOID_FTYPE_PV8SF_V8SF },
405 { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_WaWM256", (enum ix86_builtins) BUILT_IN_TM_STORE_WAW_M256, UNKNOWN, VOID_FTYPE_PV8SF_V8SF },
406 { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_RM256", (enum ix86_builtins) BUILT_IN_TM_LOAD_M256, UNKNOWN, V8SF_FTYPE_PCV8SF },
407 { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_RaRM256", (enum ix86_builtins) BUILT_IN_TM_LOAD_RAR_M256, UNKNOWN, V8SF_FTYPE_PCV8SF },
408 { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_RaWM256", (enum ix86_builtins) BUILT_IN_TM_LOAD_RAW_M256, UNKNOWN, V8SF_FTYPE_PCV8SF },
409 { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_RfWM256", (enum ix86_builtins) BUILT_IN_TM_LOAD_RFW_M256, UNKNOWN, V8SF_FTYPE_PCV8SF },
410
411 { OPTION_MASK_ISA_MMX, 0, CODE_FOR_nothing, "__builtin__ITM_LM64", (enum ix86_builtins) BUILT_IN_TM_LOG_M64, UNKNOWN, VOID_FTYPE_PCVOID },
412 { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_LM128", (enum ix86_builtins) BUILT_IN_TM_LOG_M128, UNKNOWN, VOID_FTYPE_PCVOID },
413 { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_LM256", (enum ix86_builtins) BUILT_IN_TM_LOG_M256, UNKNOWN, VOID_FTYPE_PCVOID },
414 };
415
416 /* Initialize the transactional memory vector load/store builtins. */
417
418 static void
419 ix86_init_tm_builtins (void)
420 {
421 enum ix86_builtin_func_type ftype;
422 const struct builtin_description *d;
423 size_t i;
424 tree decl;
425 tree attrs_load, attrs_type_load, attrs_store, attrs_type_store;
426 tree attrs_log, attrs_type_log;
427
428 if (!flag_tm)
429 return;
430
431 /* If there are no builtins defined, we must be compiling in a
432 language without trans-mem support. */
433 if (!builtin_decl_explicit_p (BUILT_IN_TM_LOAD_1))
434 return;
435
436 /* Use whatever attributes a normal TM load has. */
437 decl = builtin_decl_explicit (BUILT_IN_TM_LOAD_1);
438 attrs_load = DECL_ATTRIBUTES (decl);
439 attrs_type_load = TYPE_ATTRIBUTES (TREE_TYPE (decl));
440 /* Use whatever attributes a normal TM store has. */
441 decl = builtin_decl_explicit (BUILT_IN_TM_STORE_1);
442 attrs_store = DECL_ATTRIBUTES (decl);
443 attrs_type_store = TYPE_ATTRIBUTES (TREE_TYPE (decl));
444 /* Use whatever attributes a normal TM log has. */
445 decl = builtin_decl_explicit (BUILT_IN_TM_LOG);
446 attrs_log = DECL_ATTRIBUTES (decl);
447 attrs_type_log = TYPE_ATTRIBUTES (TREE_TYPE (decl));
448
449 for (i = 0, d = bdesc_tm;
450 i < ARRAY_SIZE (bdesc_tm);
451 i++, d++)
452 {
453 if ((d->mask & ix86_isa_flags) != 0
454 || (lang_hooks.builtin_function
455 == lang_hooks.builtin_function_ext_scope))
456 {
457 tree type, attrs, attrs_type;
458 enum built_in_function code = (enum built_in_function) d->code;
459
460 ftype = (enum ix86_builtin_func_type) d->flag;
461 type = ix86_get_builtin_func_type (ftype);
462
463 if (BUILTIN_TM_LOAD_P (code))
464 {
465 attrs = attrs_load;
466 attrs_type = attrs_type_load;
467 }
468 else if (BUILTIN_TM_STORE_P (code))
469 {
470 attrs = attrs_store;
471 attrs_type = attrs_type_store;
472 }
473 else
474 {
475 attrs = attrs_log;
476 attrs_type = attrs_type_log;
477 }
478 decl = add_builtin_function (d->name, type, code, BUILT_IN_NORMAL,
479 /* The builtin without the prefix for
480 calling it directly. */
481 d->name + strlen ("__builtin_"),
482 attrs);
483 /* add_builtin_function() will set the DECL_ATTRIBUTES, now
484 set the TYPE_ATTRIBUTES. */
485 decl_attributes (&TREE_TYPE (decl), attrs_type, ATTR_FLAG_BUILT_IN);
486
487 set_builtin_decl (code, decl, false);
488 }
489 }
490 }
491
492 /* Set up all the MMX/SSE builtins, even builtins for instructions that are not
493 in the current target ISA to allow the user to compile particular modules
494 with different target specific options that differ from the command line
495 options. */
496 static void
497 ix86_init_mmx_sse_builtins (void)
498 {
499 const struct builtin_description * d;
500 enum ix86_builtin_func_type ftype;
501 size_t i;
502
503 /* Add all special builtins with variable number of operands. */
504 for (i = 0, d = bdesc_special_args;
505 i < ARRAY_SIZE (bdesc_special_args);
506 i++, d++)
507 {
508 BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_SPECIAL_ARGS_FIRST, i);
509 if (d->name == 0)
510 continue;
511
512 ftype = (enum ix86_builtin_func_type) d->flag;
513 def_builtin (d->mask, d->mask2, d->name, ftype, d->code);
514 }
515 BDESC_VERIFYS (IX86_BUILTIN__BDESC_SPECIAL_ARGS_LAST,
516 IX86_BUILTIN__BDESC_SPECIAL_ARGS_FIRST,
517 ARRAY_SIZE (bdesc_special_args) - 1);
518
519 /* Add all builtins with variable number of operands. */
520 for (i = 0, d = bdesc_args;
521 i < ARRAY_SIZE (bdesc_args);
522 i++, d++)
523 {
524 BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_ARGS_FIRST, i);
525 if (d->name == 0)
526 continue;
527
528 ftype = (enum ix86_builtin_func_type) d->flag;
529 def_builtin_const (d->mask, d->mask2, d->name, ftype, d->code);
530 }
531 BDESC_VERIFYS (IX86_BUILTIN__BDESC_ARGS_LAST,
532 IX86_BUILTIN__BDESC_ARGS_FIRST,
533 ARRAY_SIZE (bdesc_args) - 1);
534
535 /* Add all builtins with rounding. */
536 for (i = 0, d = bdesc_round_args;
537 i < ARRAY_SIZE (bdesc_round_args);
538 i++, d++)
539 {
540 BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_ROUND_ARGS_FIRST, i);
541 if (d->name == 0)
542 continue;
543
544 ftype = (enum ix86_builtin_func_type) d->flag;
545 def_builtin_const (d->mask, d->mask2, d->name, ftype, d->code);
546 }
547 BDESC_VERIFYS (IX86_BUILTIN__BDESC_ROUND_ARGS_LAST,
548 IX86_BUILTIN__BDESC_ROUND_ARGS_FIRST,
549 ARRAY_SIZE (bdesc_round_args) - 1);
550
551 /* pcmpestr[im] insns. */
552 for (i = 0, d = bdesc_pcmpestr;
553 i < ARRAY_SIZE (bdesc_pcmpestr);
554 i++, d++)
555 {
556 BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_PCMPESTR_FIRST, i);
557 if (d->code == IX86_BUILTIN_PCMPESTRM128)
558 ftype = V16QI_FTYPE_V16QI_INT_V16QI_INT_INT;
559 else
560 ftype = INT_FTYPE_V16QI_INT_V16QI_INT_INT;
561 def_builtin_const (d->mask, d->mask2, d->name, ftype, d->code);
562 }
563 BDESC_VERIFYS (IX86_BUILTIN__BDESC_PCMPESTR_LAST,
564 IX86_BUILTIN__BDESC_PCMPESTR_FIRST,
565 ARRAY_SIZE (bdesc_pcmpestr) - 1);
566
567 /* pcmpistr[im] insns. */
568 for (i = 0, d = bdesc_pcmpistr;
569 i < ARRAY_SIZE (bdesc_pcmpistr);
570 i++, d++)
571 {
572 BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_PCMPISTR_FIRST, i);
573 if (d->code == IX86_BUILTIN_PCMPISTRM128)
574 ftype = V16QI_FTYPE_V16QI_V16QI_INT;
575 else
576 ftype = INT_FTYPE_V16QI_V16QI_INT;
577 def_builtin_const (d->mask, d->mask2, d->name, ftype, d->code);
578 }
579 BDESC_VERIFYS (IX86_BUILTIN__BDESC_PCMPISTR_LAST,
580 IX86_BUILTIN__BDESC_PCMPISTR_FIRST,
581 ARRAY_SIZE (bdesc_pcmpistr) - 1);
582
583 /* comi/ucomi insns. */
584 for (i = 0, d = bdesc_comi; i < ARRAY_SIZE (bdesc_comi); i++, d++)
585 {
586 BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_COMI_FIRST, i);
587 if (d->mask == OPTION_MASK_ISA_SSE2)
588 ftype = INT_FTYPE_V2DF_V2DF;
589 else
590 ftype = INT_FTYPE_V4SF_V4SF;
591 def_builtin_const (d->mask, d->mask2, d->name, ftype, d->code);
592 }
593 BDESC_VERIFYS (IX86_BUILTIN__BDESC_COMI_LAST,
594 IX86_BUILTIN__BDESC_COMI_FIRST,
595 ARRAY_SIZE (bdesc_comi) - 1);
596
597 /* SSE */
598 def_builtin (OPTION_MASK_ISA_SSE, 0, "__builtin_ia32_ldmxcsr",
599 VOID_FTYPE_UNSIGNED, IX86_BUILTIN_LDMXCSR);
600 def_builtin_pure (OPTION_MASK_ISA_SSE, 0, "__builtin_ia32_stmxcsr",
601 UNSIGNED_FTYPE_VOID, IX86_BUILTIN_STMXCSR);
602
603 /* SSE or 3DNow!A */
604 def_builtin (OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_3DNOW_A
605 /* As it uses V4HImode, we have to require -mmmx too. */
606 | OPTION_MASK_ISA_MMX, 0,
607 "__builtin_ia32_maskmovq", VOID_FTYPE_V8QI_V8QI_PCHAR,
608 IX86_BUILTIN_MASKMOVQ);
609
610 /* SSE2 */
611 def_builtin (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_maskmovdqu",
612 VOID_FTYPE_V16QI_V16QI_PCHAR, IX86_BUILTIN_MASKMOVDQU);
613
614 def_builtin (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_clflush",
615 VOID_FTYPE_PCVOID, IX86_BUILTIN_CLFLUSH);
616 x86_mfence = def_builtin (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_mfence",
617 VOID_FTYPE_VOID, IX86_BUILTIN_MFENCE);
618
619 /* SSE3. */
620 def_builtin (OPTION_MASK_ISA_SSE3, 0, "__builtin_ia32_monitor",
621 VOID_FTYPE_PCVOID_UNSIGNED_UNSIGNED, IX86_BUILTIN_MONITOR);
622 def_builtin (OPTION_MASK_ISA_SSE3, 0, "__builtin_ia32_mwait",
623 VOID_FTYPE_UNSIGNED_UNSIGNED, IX86_BUILTIN_MWAIT);
624
625 /* AES */
626 def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2, 0,
627 "__builtin_ia32_aesenc128",
628 V2DI_FTYPE_V2DI_V2DI, IX86_BUILTIN_AESENC128);
629 def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2, 0,
630 "__builtin_ia32_aesenclast128",
631 V2DI_FTYPE_V2DI_V2DI, IX86_BUILTIN_AESENCLAST128);
632 def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2, 0,
633 "__builtin_ia32_aesdec128",
634 V2DI_FTYPE_V2DI_V2DI, IX86_BUILTIN_AESDEC128);
635 def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2, 0,
636 "__builtin_ia32_aesdeclast128",
637 V2DI_FTYPE_V2DI_V2DI, IX86_BUILTIN_AESDECLAST128);
638 def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2, 0,
639 "__builtin_ia32_aesimc128",
640 V2DI_FTYPE_V2DI, IX86_BUILTIN_AESIMC128);
641 def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2, 0,
642 "__builtin_ia32_aeskeygenassist128",
643 V2DI_FTYPE_V2DI_INT, IX86_BUILTIN_AESKEYGENASSIST128);
644
645 /* PCLMUL */
646 def_builtin_const (OPTION_MASK_ISA_PCLMUL | OPTION_MASK_ISA_SSE2, 0,
647 "__builtin_ia32_pclmulqdq128",
648 V2DI_FTYPE_V2DI_V2DI_INT, IX86_BUILTIN_PCLMULQDQ128);
649
650 /* RDRND */
651 def_builtin (OPTION_MASK_ISA_RDRND, 0, "__builtin_ia32_rdrand16_step",
652 INT_FTYPE_PUSHORT, IX86_BUILTIN_RDRAND16_STEP);
653 def_builtin (OPTION_MASK_ISA_RDRND, 0, "__builtin_ia32_rdrand32_step",
654 INT_FTYPE_PUNSIGNED, IX86_BUILTIN_RDRAND32_STEP);
655 def_builtin (OPTION_MASK_ISA_RDRND | OPTION_MASK_ISA_64BIT, 0,
656 "__builtin_ia32_rdrand64_step", INT_FTYPE_PULONGLONG,
657 IX86_BUILTIN_RDRAND64_STEP);
658
659 /* AVX2 */
660 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv2df",
661 V2DF_FTYPE_V2DF_PCDOUBLE_V4SI_V2DF_INT,
662 IX86_BUILTIN_GATHERSIV2DF);
663
664 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv4df",
665 V4DF_FTYPE_V4DF_PCDOUBLE_V4SI_V4DF_INT,
666 IX86_BUILTIN_GATHERSIV4DF);
667
668 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv2df",
669 V2DF_FTYPE_V2DF_PCDOUBLE_V2DI_V2DF_INT,
670 IX86_BUILTIN_GATHERDIV2DF);
671
672 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv4df",
673 V4DF_FTYPE_V4DF_PCDOUBLE_V4DI_V4DF_INT,
674 IX86_BUILTIN_GATHERDIV4DF);
675
676 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv4sf",
677 V4SF_FTYPE_V4SF_PCFLOAT_V4SI_V4SF_INT,
678 IX86_BUILTIN_GATHERSIV4SF);
679
680 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv8sf",
681 V8SF_FTYPE_V8SF_PCFLOAT_V8SI_V8SF_INT,
682 IX86_BUILTIN_GATHERSIV8SF);
683
684 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv4sf",
685 V4SF_FTYPE_V4SF_PCFLOAT_V2DI_V4SF_INT,
686 IX86_BUILTIN_GATHERDIV4SF);
687
688 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv4sf256",
689 V4SF_FTYPE_V4SF_PCFLOAT_V4DI_V4SF_INT,
690 IX86_BUILTIN_GATHERDIV8SF);
691
692 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv2di",
693 V2DI_FTYPE_V2DI_PCINT64_V4SI_V2DI_INT,
694 IX86_BUILTIN_GATHERSIV2DI);
695
696 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv4di",
697 V4DI_FTYPE_V4DI_PCINT64_V4SI_V4DI_INT,
698 IX86_BUILTIN_GATHERSIV4DI);
699
700 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv2di",
701 V2DI_FTYPE_V2DI_PCINT64_V2DI_V2DI_INT,
702 IX86_BUILTIN_GATHERDIV2DI);
703
704 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv4di",
705 V4DI_FTYPE_V4DI_PCINT64_V4DI_V4DI_INT,
706 IX86_BUILTIN_GATHERDIV4DI);
707
708 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv4si",
709 V4SI_FTYPE_V4SI_PCINT_V4SI_V4SI_INT,
710 IX86_BUILTIN_GATHERSIV4SI);
711
712 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv8si",
713 V8SI_FTYPE_V8SI_PCINT_V8SI_V8SI_INT,
714 IX86_BUILTIN_GATHERSIV8SI);
715
716 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv4si",
717 V4SI_FTYPE_V4SI_PCINT_V2DI_V4SI_INT,
718 IX86_BUILTIN_GATHERDIV4SI);
719
720 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv4si256",
721 V4SI_FTYPE_V4SI_PCINT_V4DI_V4SI_INT,
722 IX86_BUILTIN_GATHERDIV8SI);
723
724 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatheraltsiv4df ",
725 V4DF_FTYPE_V4DF_PCDOUBLE_V8SI_V4DF_INT,
726 IX86_BUILTIN_GATHERALTSIV4DF);
727
728 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatheraltdiv8sf ",
729 V8SF_FTYPE_V8SF_PCFLOAT_V4DI_V8SF_INT,
730 IX86_BUILTIN_GATHERALTDIV8SF);
731
732 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatheraltsiv4di ",
733 V4DI_FTYPE_V4DI_PCINT64_V8SI_V4DI_INT,
734 IX86_BUILTIN_GATHERALTSIV4DI);
735
736 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatheraltdiv8si ",
737 V8SI_FTYPE_V8SI_PCINT_V4DI_V8SI_INT,
738 IX86_BUILTIN_GATHERALTDIV8SI);
739
740 /* AVX512F */
741 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gathersiv16sf",
742 V16SF_FTYPE_V16SF_PCVOID_V16SI_HI_INT,
743 IX86_BUILTIN_GATHER3SIV16SF);
744
745 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gathersiv8df",
746 V8DF_FTYPE_V8DF_PCVOID_V8SI_QI_INT,
747 IX86_BUILTIN_GATHER3SIV8DF);
748
749 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gatherdiv16sf",
750 V8SF_FTYPE_V8SF_PCVOID_V8DI_QI_INT,
751 IX86_BUILTIN_GATHER3DIV16SF);
752
753 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gatherdiv8df",
754 V8DF_FTYPE_V8DF_PCVOID_V8DI_QI_INT,
755 IX86_BUILTIN_GATHER3DIV8DF);
756
757 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gathersiv16si",
758 V16SI_FTYPE_V16SI_PCVOID_V16SI_HI_INT,
759 IX86_BUILTIN_GATHER3SIV16SI);
760
761 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gathersiv8di",
762 V8DI_FTYPE_V8DI_PCVOID_V8SI_QI_INT,
763 IX86_BUILTIN_GATHER3SIV8DI);
764
765 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gatherdiv16si",
766 V8SI_FTYPE_V8SI_PCVOID_V8DI_QI_INT,
767 IX86_BUILTIN_GATHER3DIV16SI);
768
769 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gatherdiv8di",
770 V8DI_FTYPE_V8DI_PCVOID_V8DI_QI_INT,
771 IX86_BUILTIN_GATHER3DIV8DI);
772
773 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gather3altsiv8df ",
774 V8DF_FTYPE_V8DF_PCDOUBLE_V16SI_QI_INT,
775 IX86_BUILTIN_GATHER3ALTSIV8DF);
776
777 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gather3altdiv16sf ",
778 V16SF_FTYPE_V16SF_PCFLOAT_V8DI_HI_INT,
779 IX86_BUILTIN_GATHER3ALTDIV16SF);
780
781 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gather3altsiv8di ",
782 V8DI_FTYPE_V8DI_PCINT64_V16SI_QI_INT,
783 IX86_BUILTIN_GATHER3ALTSIV8DI);
784
785 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gather3altdiv16si ",
786 V16SI_FTYPE_V16SI_PCINT_V8DI_HI_INT,
787 IX86_BUILTIN_GATHER3ALTDIV16SI);
788
789 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scattersiv16sf",
790 VOID_FTYPE_PVOID_HI_V16SI_V16SF_INT,
791 IX86_BUILTIN_SCATTERSIV16SF);
792
793 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scattersiv8df",
794 VOID_FTYPE_PVOID_QI_V8SI_V8DF_INT,
795 IX86_BUILTIN_SCATTERSIV8DF);
796
797 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatterdiv16sf",
798 VOID_FTYPE_PVOID_QI_V8DI_V8SF_INT,
799 IX86_BUILTIN_SCATTERDIV16SF);
800
801 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatterdiv8df",
802 VOID_FTYPE_PVOID_QI_V8DI_V8DF_INT,
803 IX86_BUILTIN_SCATTERDIV8DF);
804
805 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scattersiv16si",
806 VOID_FTYPE_PVOID_HI_V16SI_V16SI_INT,
807 IX86_BUILTIN_SCATTERSIV16SI);
808
809 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scattersiv8di",
810 VOID_FTYPE_PVOID_QI_V8SI_V8DI_INT,
811 IX86_BUILTIN_SCATTERSIV8DI);
812
813 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatterdiv16si",
814 VOID_FTYPE_PVOID_QI_V8DI_V8SI_INT,
815 IX86_BUILTIN_SCATTERDIV16SI);
816
817 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatterdiv8di",
818 VOID_FTYPE_PVOID_QI_V8DI_V8DI_INT,
819 IX86_BUILTIN_SCATTERDIV8DI);
820
821 /* AVX512VL */
822 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv2df",
823 V2DF_FTYPE_V2DF_PCVOID_V4SI_QI_INT,
824 IX86_BUILTIN_GATHER3SIV2DF);
825
826 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv4df",
827 V4DF_FTYPE_V4DF_PCVOID_V4SI_QI_INT,
828 IX86_BUILTIN_GATHER3SIV4DF);
829
830 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div2df",
831 V2DF_FTYPE_V2DF_PCVOID_V2DI_QI_INT,
832 IX86_BUILTIN_GATHER3DIV2DF);
833
834 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div4df",
835 V4DF_FTYPE_V4DF_PCVOID_V4DI_QI_INT,
836 IX86_BUILTIN_GATHER3DIV4DF);
837
838 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv4sf",
839 V4SF_FTYPE_V4SF_PCVOID_V4SI_QI_INT,
840 IX86_BUILTIN_GATHER3SIV4SF);
841
842 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv8sf",
843 V8SF_FTYPE_V8SF_PCVOID_V8SI_QI_INT,
844 IX86_BUILTIN_GATHER3SIV8SF);
845
846 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div4sf",
847 V4SF_FTYPE_V4SF_PCVOID_V2DI_QI_INT,
848 IX86_BUILTIN_GATHER3DIV4SF);
849
850 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div8sf",
851 V4SF_FTYPE_V4SF_PCVOID_V4DI_QI_INT,
852 IX86_BUILTIN_GATHER3DIV8SF);
853
854 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv2di",
855 V2DI_FTYPE_V2DI_PCVOID_V4SI_QI_INT,
856 IX86_BUILTIN_GATHER3SIV2DI);
857
858 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv4di",
859 V4DI_FTYPE_V4DI_PCVOID_V4SI_QI_INT,
860 IX86_BUILTIN_GATHER3SIV4DI);
861
862 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div2di",
863 V2DI_FTYPE_V2DI_PCVOID_V2DI_QI_INT,
864 IX86_BUILTIN_GATHER3DIV2DI);
865
866 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div4di",
867 V4DI_FTYPE_V4DI_PCVOID_V4DI_QI_INT,
868 IX86_BUILTIN_GATHER3DIV4DI);
869
870 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv4si",
871 V4SI_FTYPE_V4SI_PCVOID_V4SI_QI_INT,
872 IX86_BUILTIN_GATHER3SIV4SI);
873
874 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv8si",
875 V8SI_FTYPE_V8SI_PCVOID_V8SI_QI_INT,
876 IX86_BUILTIN_GATHER3SIV8SI);
877
878 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div4si",
879 V4SI_FTYPE_V4SI_PCVOID_V2DI_QI_INT,
880 IX86_BUILTIN_GATHER3DIV4SI);
881
882 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div8si",
883 V4SI_FTYPE_V4SI_PCVOID_V4DI_QI_INT,
884 IX86_BUILTIN_GATHER3DIV8SI);
885
886 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3altsiv4df ",
887 V4DF_FTYPE_V4DF_PCDOUBLE_V8SI_QI_INT,
888 IX86_BUILTIN_GATHER3ALTSIV4DF);
889
890 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3altdiv8sf ",
891 V8SF_FTYPE_V8SF_PCFLOAT_V4DI_QI_INT,
892 IX86_BUILTIN_GATHER3ALTDIV8SF);
893
894 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3altsiv4di ",
895 V4DI_FTYPE_V4DI_PCINT64_V8SI_QI_INT,
896 IX86_BUILTIN_GATHER3ALTSIV4DI);
897
898 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3altdiv8si ",
899 V8SI_FTYPE_V8SI_PCINT_V4DI_QI_INT,
900 IX86_BUILTIN_GATHER3ALTDIV8SI);
901
902 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv8sf",
903 VOID_FTYPE_PVOID_QI_V8SI_V8SF_INT,
904 IX86_BUILTIN_SCATTERSIV8SF);
905
906 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv4sf",
907 VOID_FTYPE_PVOID_QI_V4SI_V4SF_INT,
908 IX86_BUILTIN_SCATTERSIV4SF);
909
910 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv4df",
911 VOID_FTYPE_PVOID_QI_V4SI_V4DF_INT,
912 IX86_BUILTIN_SCATTERSIV4DF);
913
914 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv2df",
915 VOID_FTYPE_PVOID_QI_V4SI_V2DF_INT,
916 IX86_BUILTIN_SCATTERSIV2DF);
917
918 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv8sf",
919 VOID_FTYPE_PVOID_QI_V4DI_V4SF_INT,
920 IX86_BUILTIN_SCATTERDIV8SF);
921
922 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv4sf",
923 VOID_FTYPE_PVOID_QI_V2DI_V4SF_INT,
924 IX86_BUILTIN_SCATTERDIV4SF);
925
926 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv4df",
927 VOID_FTYPE_PVOID_QI_V4DI_V4DF_INT,
928 IX86_BUILTIN_SCATTERDIV4DF);
929
930 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv2df",
931 VOID_FTYPE_PVOID_QI_V2DI_V2DF_INT,
932 IX86_BUILTIN_SCATTERDIV2DF);
933
934 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv8si",
935 VOID_FTYPE_PVOID_QI_V8SI_V8SI_INT,
936 IX86_BUILTIN_SCATTERSIV8SI);
937
938 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv4si",
939 VOID_FTYPE_PVOID_QI_V4SI_V4SI_INT,
940 IX86_BUILTIN_SCATTERSIV4SI);
941
942 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv4di",
943 VOID_FTYPE_PVOID_QI_V4SI_V4DI_INT,
944 IX86_BUILTIN_SCATTERSIV4DI);
945
946 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv2di",
947 VOID_FTYPE_PVOID_QI_V4SI_V2DI_INT,
948 IX86_BUILTIN_SCATTERSIV2DI);
949
950 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv8si",
951 VOID_FTYPE_PVOID_QI_V4DI_V4SI_INT,
952 IX86_BUILTIN_SCATTERDIV8SI);
953
954 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv4si",
955 VOID_FTYPE_PVOID_QI_V2DI_V4SI_INT,
956 IX86_BUILTIN_SCATTERDIV4SI);
957
958 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv4di",
959 VOID_FTYPE_PVOID_QI_V4DI_V4DI_INT,
960 IX86_BUILTIN_SCATTERDIV4DI);
961
962 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv2di",
963 VOID_FTYPE_PVOID_QI_V2DI_V2DI_INT,
964 IX86_BUILTIN_SCATTERDIV2DI);
965
966 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatteraltsiv8df ",
967 VOID_FTYPE_PDOUBLE_QI_V16SI_V8DF_INT,
968 IX86_BUILTIN_SCATTERALTSIV8DF);
969
970 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatteraltdiv16sf ",
971 VOID_FTYPE_PFLOAT_HI_V8DI_V16SF_INT,
972 IX86_BUILTIN_SCATTERALTDIV16SF);
973
974 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatteraltsiv8di ",
975 VOID_FTYPE_PLONGLONG_QI_V16SI_V8DI_INT,
976 IX86_BUILTIN_SCATTERALTSIV8DI);
977
978 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatteraltdiv16si ",
979 VOID_FTYPE_PINT_HI_V8DI_V16SI_INT,
980 IX86_BUILTIN_SCATTERALTDIV16SI);
981
982 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltsiv4df ",
983 VOID_FTYPE_PDOUBLE_QI_V8SI_V4DF_INT,
984 IX86_BUILTIN_SCATTERALTSIV4DF);
985
986 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltdiv8sf ",
987 VOID_FTYPE_PFLOAT_QI_V4DI_V8SF_INT,
988 IX86_BUILTIN_SCATTERALTDIV8SF);
989
990 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltsiv4di ",
991 VOID_FTYPE_PLONGLONG_QI_V8SI_V4DI_INT,
992 IX86_BUILTIN_SCATTERALTSIV4DI);
993
994 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltdiv8si ",
995 VOID_FTYPE_PINT_QI_V4DI_V8SI_INT,
996 IX86_BUILTIN_SCATTERALTDIV8SI);
997
998 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltsiv2df ",
999 VOID_FTYPE_PDOUBLE_QI_V4SI_V2DF_INT,
1000 IX86_BUILTIN_SCATTERALTSIV2DF);
1001
1002 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltdiv4sf ",
1003 VOID_FTYPE_PFLOAT_QI_V2DI_V4SF_INT,
1004 IX86_BUILTIN_SCATTERALTDIV4SF);
1005
1006 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltsiv2di ",
1007 VOID_FTYPE_PLONGLONG_QI_V4SI_V2DI_INT,
1008 IX86_BUILTIN_SCATTERALTSIV2DI);
1009
1010 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltdiv4si ",
1011 VOID_FTYPE_PINT_QI_V2DI_V4SI_INT,
1012 IX86_BUILTIN_SCATTERALTDIV4SI);
1013
1014 /* AVX512PF */
1015 def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_gatherpfdpd",
1016 VOID_FTYPE_QI_V8SI_PCVOID_INT_INT,
1017 IX86_BUILTIN_GATHERPFDPD);
1018 def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_gatherpfdps",
1019 VOID_FTYPE_HI_V16SI_PCVOID_INT_INT,
1020 IX86_BUILTIN_GATHERPFDPS);
1021 def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_gatherpfqpd",
1022 VOID_FTYPE_QI_V8DI_PCVOID_INT_INT,
1023 IX86_BUILTIN_GATHERPFQPD);
1024 def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_gatherpfqps",
1025 VOID_FTYPE_QI_V8DI_PCVOID_INT_INT,
1026 IX86_BUILTIN_GATHERPFQPS);
1027 def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_scatterpfdpd",
1028 VOID_FTYPE_QI_V8SI_PCVOID_INT_INT,
1029 IX86_BUILTIN_SCATTERPFDPD);
1030 def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_scatterpfdps",
1031 VOID_FTYPE_HI_V16SI_PCVOID_INT_INT,
1032 IX86_BUILTIN_SCATTERPFDPS);
1033 def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_scatterpfqpd",
1034 VOID_FTYPE_QI_V8DI_PCVOID_INT_INT,
1035 IX86_BUILTIN_SCATTERPFQPD);
1036 def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_scatterpfqps",
1037 VOID_FTYPE_QI_V8DI_PCVOID_INT_INT,
1038 IX86_BUILTIN_SCATTERPFQPS);
1039
1040 /* SHA */
1041 def_builtin_const (OPTION_MASK_ISA_SHA, 0, "__builtin_ia32_sha1msg1",
1042 V4SI_FTYPE_V4SI_V4SI, IX86_BUILTIN_SHA1MSG1);
1043 def_builtin_const (OPTION_MASK_ISA_SHA, 0, "__builtin_ia32_sha1msg2",
1044 V4SI_FTYPE_V4SI_V4SI, IX86_BUILTIN_SHA1MSG2);
1045 def_builtin_const (OPTION_MASK_ISA_SHA, 0, "__builtin_ia32_sha1nexte",
1046 V4SI_FTYPE_V4SI_V4SI, IX86_BUILTIN_SHA1NEXTE);
1047 def_builtin_const (OPTION_MASK_ISA_SHA, 0, "__builtin_ia32_sha1rnds4",
1048 V4SI_FTYPE_V4SI_V4SI_INT, IX86_BUILTIN_SHA1RNDS4);
1049 def_builtin_const (OPTION_MASK_ISA_SHA, 0, "__builtin_ia32_sha256msg1",
1050 V4SI_FTYPE_V4SI_V4SI, IX86_BUILTIN_SHA256MSG1);
1051 def_builtin_const (OPTION_MASK_ISA_SHA, 0, "__builtin_ia32_sha256msg2",
1052 V4SI_FTYPE_V4SI_V4SI, IX86_BUILTIN_SHA256MSG2);
1053 def_builtin_const (OPTION_MASK_ISA_SHA, 0, "__builtin_ia32_sha256rnds2",
1054 V4SI_FTYPE_V4SI_V4SI_V4SI, IX86_BUILTIN_SHA256RNDS2);
1055
1056 /* RTM. */
1057 def_builtin (OPTION_MASK_ISA_RTM, 0, "__builtin_ia32_xabort",
1058 VOID_FTYPE_UNSIGNED, IX86_BUILTIN_XABORT);
1059
1060 /* MMX access to the vec_init patterns. */
1061 def_builtin_const (OPTION_MASK_ISA_MMX, 0, "__builtin_ia32_vec_init_v2si",
1062 V2SI_FTYPE_INT_INT, IX86_BUILTIN_VEC_INIT_V2SI);
1063
1064 def_builtin_const (OPTION_MASK_ISA_MMX, 0, "__builtin_ia32_vec_init_v4hi",
1065 V4HI_FTYPE_HI_HI_HI_HI,
1066 IX86_BUILTIN_VEC_INIT_V4HI);
1067
1068 def_builtin_const (OPTION_MASK_ISA_MMX, 0, "__builtin_ia32_vec_init_v8qi",
1069 V8QI_FTYPE_QI_QI_QI_QI_QI_QI_QI_QI,
1070 IX86_BUILTIN_VEC_INIT_V8QI);
1071
1072 /* Access to the vec_extract patterns. */
1073 def_builtin_const (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_vec_ext_v2df",
1074 DOUBLE_FTYPE_V2DF_INT, IX86_BUILTIN_VEC_EXT_V2DF);
1075 def_builtin_const (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_vec_ext_v2di",
1076 DI_FTYPE_V2DI_INT, IX86_BUILTIN_VEC_EXT_V2DI);
1077 def_builtin_const (OPTION_MASK_ISA_SSE, 0, "__builtin_ia32_vec_ext_v4sf",
1078 FLOAT_FTYPE_V4SF_INT, IX86_BUILTIN_VEC_EXT_V4SF);
1079 def_builtin_const (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_vec_ext_v4si",
1080 SI_FTYPE_V4SI_INT, IX86_BUILTIN_VEC_EXT_V4SI);
1081 def_builtin_const (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_vec_ext_v8hi",
1082 HI_FTYPE_V8HI_INT, IX86_BUILTIN_VEC_EXT_V8HI);
1083
1084 def_builtin_const (OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_3DNOW_A
1085 /* As it uses V4HImode, we have to require -mmmx too. */
1086 | OPTION_MASK_ISA_MMX, 0,
1087 "__builtin_ia32_vec_ext_v4hi",
1088 HI_FTYPE_V4HI_INT, IX86_BUILTIN_VEC_EXT_V4HI);
1089
1090 def_builtin_const (OPTION_MASK_ISA_MMX, 0, "__builtin_ia32_vec_ext_v2si",
1091 SI_FTYPE_V2SI_INT, IX86_BUILTIN_VEC_EXT_V2SI);
1092
1093 def_builtin_const (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_vec_ext_v16qi",
1094 QI_FTYPE_V16QI_INT, IX86_BUILTIN_VEC_EXT_V16QI);
1095
1096 /* Access to the vec_set patterns. */
1097 def_builtin_const (OPTION_MASK_ISA_SSE4_1 | OPTION_MASK_ISA_64BIT, 0,
1098 "__builtin_ia32_vec_set_v2di",
1099 V2DI_FTYPE_V2DI_DI_INT, IX86_BUILTIN_VEC_SET_V2DI);
1100
1101 def_builtin_const (OPTION_MASK_ISA_SSE4_1, 0, "__builtin_ia32_vec_set_v4sf",
1102 V4SF_FTYPE_V4SF_FLOAT_INT, IX86_BUILTIN_VEC_SET_V4SF);
1103
1104 def_builtin_const (OPTION_MASK_ISA_SSE4_1, 0, "__builtin_ia32_vec_set_v4si",
1105 V4SI_FTYPE_V4SI_SI_INT, IX86_BUILTIN_VEC_SET_V4SI);
1106
1107 def_builtin_const (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_vec_set_v8hi",
1108 V8HI_FTYPE_V8HI_HI_INT, IX86_BUILTIN_VEC_SET_V8HI);
1109
1110 def_builtin_const (OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_3DNOW_A
1111 /* As it uses V4HImode, we have to require -mmmx too. */
1112 | OPTION_MASK_ISA_MMX, 0,
1113 "__builtin_ia32_vec_set_v4hi",
1114 V4HI_FTYPE_V4HI_HI_INT, IX86_BUILTIN_VEC_SET_V4HI);
1115
1116 def_builtin_const (OPTION_MASK_ISA_SSE4_1, 0, "__builtin_ia32_vec_set_v16qi",
1117 V16QI_FTYPE_V16QI_QI_INT, IX86_BUILTIN_VEC_SET_V16QI);
1118
1119 /* RDSEED */
1120 def_builtin (OPTION_MASK_ISA_RDSEED, 0, "__builtin_ia32_rdseed_hi_step",
1121 INT_FTYPE_PUSHORT, IX86_BUILTIN_RDSEED16_STEP);
1122 def_builtin (OPTION_MASK_ISA_RDSEED, 0, "__builtin_ia32_rdseed_si_step",
1123 INT_FTYPE_PUNSIGNED, IX86_BUILTIN_RDSEED32_STEP);
1124 def_builtin (OPTION_MASK_ISA_RDSEED | OPTION_MASK_ISA_64BIT, 0,
1125 "__builtin_ia32_rdseed_di_step",
1126 INT_FTYPE_PULONGLONG, IX86_BUILTIN_RDSEED64_STEP);
1127
1128 /* ADCX */
1129 def_builtin (0, 0, "__builtin_ia32_addcarryx_u32",
1130 UCHAR_FTYPE_UCHAR_UINT_UINT_PUNSIGNED, IX86_BUILTIN_ADDCARRYX32);
1131 def_builtin (OPTION_MASK_ISA_64BIT, 0,
1132 "__builtin_ia32_addcarryx_u64",
1133 UCHAR_FTYPE_UCHAR_ULONGLONG_ULONGLONG_PULONGLONG,
1134 IX86_BUILTIN_ADDCARRYX64);
1135
1136 /* SBB */
1137 def_builtin (0, 0, "__builtin_ia32_sbb_u32",
1138 UCHAR_FTYPE_UCHAR_UINT_UINT_PUNSIGNED, IX86_BUILTIN_SBB32);
1139 def_builtin (OPTION_MASK_ISA_64BIT, 0,
1140 "__builtin_ia32_sbb_u64",
1141 UCHAR_FTYPE_UCHAR_ULONGLONG_ULONGLONG_PULONGLONG,
1142 IX86_BUILTIN_SBB64);
1143
1144 /* Read/write FLAGS. */
1145 if (TARGET_64BIT)
1146 {
1147 def_builtin (OPTION_MASK_ISA_64BIT, 0, "__builtin_ia32_readeflags_u64",
1148 UINT64_FTYPE_VOID, IX86_BUILTIN_READ_FLAGS);
1149 def_builtin (OPTION_MASK_ISA_64BIT, 0, "__builtin_ia32_writeeflags_u64",
1150 VOID_FTYPE_UINT64, IX86_BUILTIN_WRITE_FLAGS);
1151 }
1152 else
1153 {
1154 def_builtin (0, 0, "__builtin_ia32_readeflags_u32",
1155 UNSIGNED_FTYPE_VOID, IX86_BUILTIN_READ_FLAGS);
1156 def_builtin (0, 0, "__builtin_ia32_writeeflags_u32",
1157 VOID_FTYPE_UNSIGNED, IX86_BUILTIN_WRITE_FLAGS);
1158 }
1159
1160 /* CLFLUSHOPT. */
1161 def_builtin (OPTION_MASK_ISA_CLFLUSHOPT, 0, "__builtin_ia32_clflushopt",
1162 VOID_FTYPE_PCVOID, IX86_BUILTIN_CLFLUSHOPT);
1163
1164 /* CLWB. */
1165 def_builtin (OPTION_MASK_ISA_CLWB, 0, "__builtin_ia32_clwb",
1166 VOID_FTYPE_PCVOID, IX86_BUILTIN_CLWB);
1167
1168 /* MONITORX and MWAITX. */
1169 def_builtin (0, OPTION_MASK_ISA_MWAITX, "__builtin_ia32_monitorx",
1170 VOID_FTYPE_PCVOID_UNSIGNED_UNSIGNED, IX86_BUILTIN_MONITORX);
1171 def_builtin (0, OPTION_MASK_ISA_MWAITX, "__builtin_ia32_mwaitx",
1172 VOID_FTYPE_UNSIGNED_UNSIGNED_UNSIGNED, IX86_BUILTIN_MWAITX);
1173
1174 /* CLZERO. */
1175 def_builtin (0, OPTION_MASK_ISA_CLZERO, "__builtin_ia32_clzero",
1176 VOID_FTYPE_PCVOID, IX86_BUILTIN_CLZERO);
1177
1178 /* WAITPKG. */
1179 def_builtin (0, OPTION_MASK_ISA_WAITPKG, "__builtin_ia32_umonitor",
1180 VOID_FTYPE_PVOID, IX86_BUILTIN_UMONITOR);
1181 def_builtin (0, OPTION_MASK_ISA_WAITPKG, "__builtin_ia32_umwait",
1182 UINT8_FTYPE_UNSIGNED_UINT64, IX86_BUILTIN_UMWAIT);
1183 def_builtin (0, OPTION_MASK_ISA_WAITPKG, "__builtin_ia32_tpause",
1184 UINT8_FTYPE_UNSIGNED_UINT64, IX86_BUILTIN_TPAUSE);
1185
1186 /* CLDEMOTE. */
1187 def_builtin (0, OPTION_MASK_ISA_CLDEMOTE, "__builtin_ia32_cldemote",
1188 VOID_FTYPE_PCVOID, IX86_BUILTIN_CLDEMOTE);
1189
1190 /* Add FMA4 multi-arg argument instructions */
1191 for (i = 0, d = bdesc_multi_arg; i < ARRAY_SIZE (bdesc_multi_arg); i++, d++)
1192 {
1193 BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_MULTI_ARG_FIRST, i);
1194 if (d->name == 0)
1195 continue;
1196
1197 ftype = (enum ix86_builtin_func_type) d->flag;
1198 def_builtin_const (d->mask, d->mask2, d->name, ftype, d->code);
1199 }
1200 BDESC_VERIFYS (IX86_BUILTIN__BDESC_MULTI_ARG_LAST,
1201 IX86_BUILTIN__BDESC_MULTI_ARG_FIRST,
1202 ARRAY_SIZE (bdesc_multi_arg) - 1);
1203
1204 /* Add CET inrinsics. */
1205 for (i = 0, d = bdesc_cet; i < ARRAY_SIZE (bdesc_cet); i++, d++)
1206 {
1207 BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_CET_FIRST, i);
1208 if (d->name == 0)
1209 continue;
1210
1211 ftype = (enum ix86_builtin_func_type) d->flag;
1212 def_builtin (d->mask, d->mask2, d->name, ftype, d->code);
1213 }
1214 BDESC_VERIFYS (IX86_BUILTIN__BDESC_CET_LAST,
1215 IX86_BUILTIN__BDESC_CET_FIRST,
1216 ARRAY_SIZE (bdesc_cet) - 1);
1217
1218 for (i = 0, d = bdesc_cet_rdssp;
1219 i < ARRAY_SIZE (bdesc_cet_rdssp);
1220 i++, d++)
1221 {
1222 BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_CET_NORMAL_FIRST, i);
1223 if (d->name == 0)
1224 continue;
1225
1226 ftype = (enum ix86_builtin_func_type) d->flag;
1227 def_builtin (d->mask, d->mask2, d->name, ftype, d->code);
1228 }
1229 BDESC_VERIFYS (IX86_BUILTIN__BDESC_CET_NORMAL_LAST,
1230 IX86_BUILTIN__BDESC_CET_NORMAL_FIRST,
1231 ARRAY_SIZE (bdesc_cet_rdssp) - 1);
1232 }
1233
1234 #undef BDESC_VERIFY
1235 #undef BDESC_VERIFYS
1236
1237 /* Make builtins to detect cpu type and features supported. NAME is
1238 the builtin name, CODE is the builtin code, and FTYPE is the function
1239 type of the builtin. */
1240
1241 static void
1242 make_cpu_type_builtin (const char* name, int code,
1243 enum ix86_builtin_func_type ftype, bool is_const)
1244 {
1245 tree decl;
1246 tree type;
1247
1248 type = ix86_get_builtin_func_type (ftype);
1249 decl = add_builtin_function (name, type, code, BUILT_IN_MD,
1250 NULL, NULL_TREE);
1251 gcc_assert (decl != NULL_TREE);
1252 ix86_builtins[(int) code] = decl;
1253 TREE_READONLY (decl) = is_const;
1254 }
1255
1256 /* Make builtins to get CPU type and features supported. The created
1257 builtins are :
1258
1259 __builtin_cpu_init (), to detect cpu type and features,
1260 __builtin_cpu_is ("<CPUNAME>"), to check if cpu is of type <CPUNAME>,
1261 __builtin_cpu_supports ("<FEATURE>"), to check if cpu supports <FEATURE>
1262 */
1263
1264 static void
1265 ix86_init_platform_type_builtins (void)
1266 {
1267 make_cpu_type_builtin ("__builtin_cpu_init", IX86_BUILTIN_CPU_INIT,
1268 INT_FTYPE_VOID, false);
1269 make_cpu_type_builtin ("__builtin_cpu_is", IX86_BUILTIN_CPU_IS,
1270 INT_FTYPE_PCCHAR, true);
1271 make_cpu_type_builtin ("__builtin_cpu_supports", IX86_BUILTIN_CPU_SUPPORTS,
1272 INT_FTYPE_PCCHAR, true);
1273 }
1274
1275 /* Internal method for ix86_init_builtins. */
1276
1277 static void
1278 ix86_init_builtins_va_builtins_abi (void)
1279 {
1280 tree ms_va_ref, sysv_va_ref;
1281 tree fnvoid_va_end_ms, fnvoid_va_end_sysv;
1282 tree fnvoid_va_start_ms, fnvoid_va_start_sysv;
1283 tree fnvoid_va_copy_ms, fnvoid_va_copy_sysv;
1284 tree fnattr_ms = NULL_TREE, fnattr_sysv = NULL_TREE;
1285
1286 if (!TARGET_64BIT)
1287 return;
1288 fnattr_ms = build_tree_list (get_identifier ("ms_abi"), NULL_TREE);
1289 fnattr_sysv = build_tree_list (get_identifier ("sysv_abi"), NULL_TREE);
1290 ms_va_ref = build_reference_type (ms_va_list_type_node);
1291 sysv_va_ref = build_pointer_type (TREE_TYPE (sysv_va_list_type_node));
1292
1293 fnvoid_va_end_ms = build_function_type_list (void_type_node, ms_va_ref,
1294 NULL_TREE);
1295 fnvoid_va_start_ms
1296 = build_varargs_function_type_list (void_type_node, ms_va_ref, NULL_TREE);
1297 fnvoid_va_end_sysv
1298 = build_function_type_list (void_type_node, sysv_va_ref, NULL_TREE);
1299 fnvoid_va_start_sysv
1300 = build_varargs_function_type_list (void_type_node, sysv_va_ref,
1301 NULL_TREE);
1302 fnvoid_va_copy_ms
1303 = build_function_type_list (void_type_node, ms_va_ref,
1304 ms_va_list_type_node, NULL_TREE);
1305 fnvoid_va_copy_sysv
1306 = build_function_type_list (void_type_node, sysv_va_ref,
1307 sysv_va_ref, NULL_TREE);
1308
1309 add_builtin_function ("__builtin_ms_va_start", fnvoid_va_start_ms,
1310 BUILT_IN_VA_START, BUILT_IN_NORMAL, NULL, fnattr_ms);
1311 add_builtin_function ("__builtin_ms_va_end", fnvoid_va_end_ms,
1312 BUILT_IN_VA_END, BUILT_IN_NORMAL, NULL, fnattr_ms);
1313 add_builtin_function ("__builtin_ms_va_copy", fnvoid_va_copy_ms,
1314 BUILT_IN_VA_COPY, BUILT_IN_NORMAL, NULL, fnattr_ms);
1315 add_builtin_function ("__builtin_sysv_va_start", fnvoid_va_start_sysv,
1316 BUILT_IN_VA_START, BUILT_IN_NORMAL, NULL, fnattr_sysv);
1317 add_builtin_function ("__builtin_sysv_va_end", fnvoid_va_end_sysv,
1318 BUILT_IN_VA_END, BUILT_IN_NORMAL, NULL, fnattr_sysv);
1319 add_builtin_function ("__builtin_sysv_va_copy", fnvoid_va_copy_sysv,
1320 BUILT_IN_VA_COPY, BUILT_IN_NORMAL, NULL, fnattr_sysv);
1321 }
1322
1323 static void
1324 ix86_init_builtin_types (void)
1325 {
1326 tree float80_type_node, const_string_type_node;
1327
1328 /* The __float80 type. */
1329 float80_type_node = long_double_type_node;
1330 if (TYPE_MODE (float80_type_node) != XFmode)
1331 {
1332 if (float64x_type_node != NULL_TREE
1333 && TYPE_MODE (float64x_type_node) == XFmode)
1334 float80_type_node = float64x_type_node;
1335 else
1336 {
1337 /* The __float80 type. */
1338 float80_type_node = make_node (REAL_TYPE);
1339
1340 TYPE_PRECISION (float80_type_node) = 80;
1341 layout_type (float80_type_node);
1342 }
1343 }
1344 lang_hooks.types.register_builtin_type (float80_type_node, "__float80");
1345
1346 /* The __float128 type. The node has already been created as
1347 _Float128, so we only need to register the __float128 name for
1348 it. */
1349 lang_hooks.types.register_builtin_type (float128_type_node, "__float128");
1350
1351 const_string_type_node
1352 = build_pointer_type (build_qualified_type
1353 (char_type_node, TYPE_QUAL_CONST));
1354
1355 /* This macro is built by i386-builtin-types.awk. */
1356 DEFINE_BUILTIN_PRIMITIVE_TYPES;
1357 }
1358
1359 void
1360 ix86_init_builtins (void)
1361 {
1362 tree ftype, decl;
1363
1364 ix86_init_builtin_types ();
1365
1366 /* Builtins to get CPU type and features. */
1367 ix86_init_platform_type_builtins ();
1368
1369 /* TFmode support builtins. */
1370 def_builtin_const (0, 0, "__builtin_infq",
1371 FLOAT128_FTYPE_VOID, IX86_BUILTIN_INFQ);
1372 def_builtin_const (0, 0, "__builtin_huge_valq",
1373 FLOAT128_FTYPE_VOID, IX86_BUILTIN_HUGE_VALQ);
1374
1375 ftype = ix86_get_builtin_func_type (FLOAT128_FTYPE_CONST_STRING);
1376 decl = add_builtin_function ("__builtin_nanq", ftype, IX86_BUILTIN_NANQ,
1377 BUILT_IN_MD, "nanq", NULL_TREE);
1378 TREE_READONLY (decl) = 1;
1379 ix86_builtins[(int) IX86_BUILTIN_NANQ] = decl;
1380
1381 decl = add_builtin_function ("__builtin_nansq", ftype, IX86_BUILTIN_NANSQ,
1382 BUILT_IN_MD, "nansq", NULL_TREE);
1383 TREE_READONLY (decl) = 1;
1384 ix86_builtins[(int) IX86_BUILTIN_NANSQ] = decl;
1385
1386 /* We will expand them to normal call if SSE isn't available since
1387 they are used by libgcc. */
1388 ftype = ix86_get_builtin_func_type (FLOAT128_FTYPE_FLOAT128);
1389 decl = add_builtin_function ("__builtin_fabsq", ftype, IX86_BUILTIN_FABSQ,
1390 BUILT_IN_MD, "__fabstf2", NULL_TREE);
1391 TREE_READONLY (decl) = 1;
1392 ix86_builtins[(int) IX86_BUILTIN_FABSQ] = decl;
1393
1394 ftype = ix86_get_builtin_func_type (FLOAT128_FTYPE_FLOAT128_FLOAT128);
1395 decl = add_builtin_function ("__builtin_copysignq", ftype,
1396 IX86_BUILTIN_COPYSIGNQ, BUILT_IN_MD,
1397 "__copysigntf3", NULL_TREE);
1398 TREE_READONLY (decl) = 1;
1399 ix86_builtins[(int) IX86_BUILTIN_COPYSIGNQ] = decl;
1400
1401 ix86_init_tm_builtins ();
1402 ix86_init_mmx_sse_builtins ();
1403
1404 if (TARGET_LP64)
1405 ix86_init_builtins_va_builtins_abi ();
1406
1407 #ifdef SUBTARGET_INIT_BUILTINS
1408 SUBTARGET_INIT_BUILTINS;
1409 #endif
1410 }
1411
1412 /* Return the ix86 builtin for CODE. */
1413
1414 tree
1415 ix86_builtin_decl (unsigned code, bool)
1416 {
1417 if (code >= IX86_BUILTIN_MAX)
1418 return error_mark_node;
1419
1420 return ix86_builtins[code];
1421 }
1422
1423 /* This returns the target-specific builtin with code CODE if
1424 current_function_decl has visibility on this builtin, which is checked
1425 using isa flags. Returns NULL_TREE otherwise. */
1426
1427 static tree ix86_get_builtin (enum ix86_builtins code)
1428 {
1429 struct cl_target_option *opts;
1430 tree target_tree = NULL_TREE;
1431
1432 /* Determine the isa flags of current_function_decl. */
1433
1434 if (current_function_decl)
1435 target_tree = DECL_FUNCTION_SPECIFIC_TARGET (current_function_decl);
1436
1437 if (target_tree == NULL)
1438 target_tree = target_option_default_node;
1439
1440 opts = TREE_TARGET_OPTION (target_tree);
1441
1442 if ((ix86_builtins_isa[(int) code].isa & opts->x_ix86_isa_flags)
1443 || (ix86_builtins_isa[(int) code].isa2 & opts->x_ix86_isa_flags2))
1444 return ix86_builtin_decl (code, true);
1445 else
1446 return NULL_TREE;
1447 }
1448
1449 /* Vectorization library interface and handlers. */
1450 tree (*ix86_veclib_handler) (combined_fn, tree, tree);
1451
1452 /* Returns a function decl for a vectorized version of the combined function
1453 with combined_fn code FN and the result vector type TYPE, or NULL_TREE
1454 if it is not available. */
1455
1456 tree
1457 ix86_builtin_vectorized_function (unsigned int fn, tree type_out,
1458 tree type_in)
1459 {
1460 machine_mode in_mode, out_mode;
1461 int in_n, out_n;
1462
1463 if (TREE_CODE (type_out) != VECTOR_TYPE
1464 || TREE_CODE (type_in) != VECTOR_TYPE)
1465 return NULL_TREE;
1466
1467 out_mode = TYPE_MODE (TREE_TYPE (type_out));
1468 out_n = TYPE_VECTOR_SUBPARTS (type_out);
1469 in_mode = TYPE_MODE (TREE_TYPE (type_in));
1470 in_n = TYPE_VECTOR_SUBPARTS (type_in);
1471
1472 switch (fn)
1473 {
1474 CASE_CFN_EXP2:
1475 if (out_mode == SFmode && in_mode == SFmode)
1476 {
1477 if (out_n == 16 && in_n == 16)
1478 return ix86_get_builtin (IX86_BUILTIN_EXP2PS);
1479 }
1480 break;
1481
1482 CASE_CFN_IFLOOR:
1483 CASE_CFN_LFLOOR:
1484 CASE_CFN_LLFLOOR:
1485 /* The round insn does not trap on denormals. */
1486 if (flag_trapping_math || !TARGET_SSE4_1)
1487 break;
1488
1489 if (out_mode == SImode && in_mode == DFmode)
1490 {
1491 if (out_n == 4 && in_n == 2)
1492 return ix86_get_builtin (IX86_BUILTIN_FLOORPD_VEC_PACK_SFIX);
1493 else if (out_n == 8 && in_n == 4)
1494 return ix86_get_builtin (IX86_BUILTIN_FLOORPD_VEC_PACK_SFIX256);
1495 else if (out_n == 16 && in_n == 8)
1496 return ix86_get_builtin (IX86_BUILTIN_FLOORPD_VEC_PACK_SFIX512);
1497 }
1498 if (out_mode == SImode && in_mode == SFmode)
1499 {
1500 if (out_n == 4 && in_n == 4)
1501 return ix86_get_builtin (IX86_BUILTIN_FLOORPS_SFIX);
1502 else if (out_n == 8 && in_n == 8)
1503 return ix86_get_builtin (IX86_BUILTIN_FLOORPS_SFIX256);
1504 else if (out_n == 16 && in_n == 16)
1505 return ix86_get_builtin (IX86_BUILTIN_FLOORPS_SFIX512);
1506 }
1507 break;
1508
1509 CASE_CFN_ICEIL:
1510 CASE_CFN_LCEIL:
1511 CASE_CFN_LLCEIL:
1512 /* The round insn does not trap on denormals. */
1513 if (flag_trapping_math || !TARGET_SSE4_1)
1514 break;
1515
1516 if (out_mode == SImode && in_mode == DFmode)
1517 {
1518 if (out_n == 4 && in_n == 2)
1519 return ix86_get_builtin (IX86_BUILTIN_CEILPD_VEC_PACK_SFIX);
1520 else if (out_n == 8 && in_n == 4)
1521 return ix86_get_builtin (IX86_BUILTIN_CEILPD_VEC_PACK_SFIX256);
1522 else if (out_n == 16 && in_n == 8)
1523 return ix86_get_builtin (IX86_BUILTIN_CEILPD_VEC_PACK_SFIX512);
1524 }
1525 if (out_mode == SImode && in_mode == SFmode)
1526 {
1527 if (out_n == 4 && in_n == 4)
1528 return ix86_get_builtin (IX86_BUILTIN_CEILPS_SFIX);
1529 else if (out_n == 8 && in_n == 8)
1530 return ix86_get_builtin (IX86_BUILTIN_CEILPS_SFIX256);
1531 else if (out_n == 16 && in_n == 16)
1532 return ix86_get_builtin (IX86_BUILTIN_CEILPS_SFIX512);
1533 }
1534 break;
1535
1536 CASE_CFN_IRINT:
1537 CASE_CFN_LRINT:
1538 CASE_CFN_LLRINT:
1539 if (out_mode == SImode && in_mode == DFmode)
1540 {
1541 if (out_n == 4 && in_n == 2)
1542 return ix86_get_builtin (IX86_BUILTIN_VEC_PACK_SFIX);
1543 else if (out_n == 8 && in_n == 4)
1544 return ix86_get_builtin (IX86_BUILTIN_VEC_PACK_SFIX256);
1545 else if (out_n == 16 && in_n == 8)
1546 return ix86_get_builtin (IX86_BUILTIN_VEC_PACK_SFIX512);
1547 }
1548 if (out_mode == SImode && in_mode == SFmode)
1549 {
1550 if (out_n == 4 && in_n == 4)
1551 return ix86_get_builtin (IX86_BUILTIN_CVTPS2DQ);
1552 else if (out_n == 8 && in_n == 8)
1553 return ix86_get_builtin (IX86_BUILTIN_CVTPS2DQ256);
1554 else if (out_n == 16 && in_n == 16)
1555 return ix86_get_builtin (IX86_BUILTIN_CVTPS2DQ512);
1556 }
1557 break;
1558
1559 CASE_CFN_IROUND:
1560 CASE_CFN_LROUND:
1561 CASE_CFN_LLROUND:
1562 /* The round insn does not trap on denormals. */
1563 if (flag_trapping_math || !TARGET_SSE4_1)
1564 break;
1565
1566 if (out_mode == SImode && in_mode == DFmode)
1567 {
1568 if (out_n == 4 && in_n == 2)
1569 return ix86_get_builtin (IX86_BUILTIN_ROUNDPD_AZ_VEC_PACK_SFIX);
1570 else if (out_n == 8 && in_n == 4)
1571 return ix86_get_builtin (IX86_BUILTIN_ROUNDPD_AZ_VEC_PACK_SFIX256);
1572 else if (out_n == 16 && in_n == 8)
1573 return ix86_get_builtin (IX86_BUILTIN_ROUNDPD_AZ_VEC_PACK_SFIX512);
1574 }
1575 if (out_mode == SImode && in_mode == SFmode)
1576 {
1577 if (out_n == 4 && in_n == 4)
1578 return ix86_get_builtin (IX86_BUILTIN_ROUNDPS_AZ_SFIX);
1579 else if (out_n == 8 && in_n == 8)
1580 return ix86_get_builtin (IX86_BUILTIN_ROUNDPS_AZ_SFIX256);
1581 else if (out_n == 16 && in_n == 16)
1582 return ix86_get_builtin (IX86_BUILTIN_ROUNDPS_AZ_SFIX512);
1583 }
1584 break;
1585
1586 CASE_CFN_FLOOR:
1587 /* The round insn does not trap on denormals. */
1588 if (flag_trapping_math || !TARGET_SSE4_1)
1589 break;
1590
1591 if (out_mode == DFmode && in_mode == DFmode)
1592 {
1593 if (out_n == 2 && in_n == 2)
1594 return ix86_get_builtin (IX86_BUILTIN_FLOORPD);
1595 else if (out_n == 4 && in_n == 4)
1596 return ix86_get_builtin (IX86_BUILTIN_FLOORPD256);
1597 else if (out_n == 8 && in_n == 8)
1598 return ix86_get_builtin (IX86_BUILTIN_FLOORPD512);
1599 }
1600 if (out_mode == SFmode && in_mode == SFmode)
1601 {
1602 if (out_n == 4 && in_n == 4)
1603 return ix86_get_builtin (IX86_BUILTIN_FLOORPS);
1604 else if (out_n == 8 && in_n == 8)
1605 return ix86_get_builtin (IX86_BUILTIN_FLOORPS256);
1606 else if (out_n == 16 && in_n == 16)
1607 return ix86_get_builtin (IX86_BUILTIN_FLOORPS512);
1608 }
1609 break;
1610
1611 CASE_CFN_CEIL:
1612 /* The round insn does not trap on denormals. */
1613 if (flag_trapping_math || !TARGET_SSE4_1)
1614 break;
1615
1616 if (out_mode == DFmode && in_mode == DFmode)
1617 {
1618 if (out_n == 2 && in_n == 2)
1619 return ix86_get_builtin (IX86_BUILTIN_CEILPD);
1620 else if (out_n == 4 && in_n == 4)
1621 return ix86_get_builtin (IX86_BUILTIN_CEILPD256);
1622 else if (out_n == 8 && in_n == 8)
1623 return ix86_get_builtin (IX86_BUILTIN_CEILPD512);
1624 }
1625 if (out_mode == SFmode && in_mode == SFmode)
1626 {
1627 if (out_n == 4 && in_n == 4)
1628 return ix86_get_builtin (IX86_BUILTIN_CEILPS);
1629 else if (out_n == 8 && in_n == 8)
1630 return ix86_get_builtin (IX86_BUILTIN_CEILPS256);
1631 else if (out_n == 16 && in_n == 16)
1632 return ix86_get_builtin (IX86_BUILTIN_CEILPS512);
1633 }
1634 break;
1635
1636 CASE_CFN_TRUNC:
1637 /* The round insn does not trap on denormals. */
1638 if (flag_trapping_math || !TARGET_SSE4_1)
1639 break;
1640
1641 if (out_mode == DFmode && in_mode == DFmode)
1642 {
1643 if (out_n == 2 && in_n == 2)
1644 return ix86_get_builtin (IX86_BUILTIN_TRUNCPD);
1645 else if (out_n == 4 && in_n == 4)
1646 return ix86_get_builtin (IX86_BUILTIN_TRUNCPD256);
1647 else if (out_n == 8 && in_n == 8)
1648 return ix86_get_builtin (IX86_BUILTIN_TRUNCPD512);
1649 }
1650 if (out_mode == SFmode && in_mode == SFmode)
1651 {
1652 if (out_n == 4 && in_n == 4)
1653 return ix86_get_builtin (IX86_BUILTIN_TRUNCPS);
1654 else if (out_n == 8 && in_n == 8)
1655 return ix86_get_builtin (IX86_BUILTIN_TRUNCPS256);
1656 else if (out_n == 16 && in_n == 16)
1657 return ix86_get_builtin (IX86_BUILTIN_TRUNCPS512);
1658 }
1659 break;
1660
1661 CASE_CFN_RINT:
1662 /* The round insn does not trap on denormals. */
1663 if (flag_trapping_math || !TARGET_SSE4_1)
1664 break;
1665
1666 if (out_mode == DFmode && in_mode == DFmode)
1667 {
1668 if (out_n == 2 && in_n == 2)
1669 return ix86_get_builtin (IX86_BUILTIN_RINTPD);
1670 else if (out_n == 4 && in_n == 4)
1671 return ix86_get_builtin (IX86_BUILTIN_RINTPD256);
1672 }
1673 if (out_mode == SFmode && in_mode == SFmode)
1674 {
1675 if (out_n == 4 && in_n == 4)
1676 return ix86_get_builtin (IX86_BUILTIN_RINTPS);
1677 else if (out_n == 8 && in_n == 8)
1678 return ix86_get_builtin (IX86_BUILTIN_RINTPS256);
1679 }
1680 break;
1681
1682 CASE_CFN_FMA:
1683 if (out_mode == DFmode && in_mode == DFmode)
1684 {
1685 if (out_n == 2 && in_n == 2)
1686 return ix86_get_builtin (IX86_BUILTIN_VFMADDPD);
1687 if (out_n == 4 && in_n == 4)
1688 return ix86_get_builtin (IX86_BUILTIN_VFMADDPD256);
1689 }
1690 if (out_mode == SFmode && in_mode == SFmode)
1691 {
1692 if (out_n == 4 && in_n == 4)
1693 return ix86_get_builtin (IX86_BUILTIN_VFMADDPS);
1694 if (out_n == 8 && in_n == 8)
1695 return ix86_get_builtin (IX86_BUILTIN_VFMADDPS256);
1696 }
1697 break;
1698
1699 default:
1700 break;
1701 }
1702
1703 /* Dispatch to a handler for a vectorization library. */
1704 if (ix86_veclib_handler)
1705 return ix86_veclib_handler (combined_fn (fn), type_out, type_in);
1706
1707 return NULL_TREE;
1708 }
1709
1710 /* Returns a decl of a function that implements gather load with
1711 memory type MEM_VECTYPE and index type INDEX_VECTYPE and SCALE.
1712 Return NULL_TREE if it is not available. */
1713
1714 tree
1715 ix86_vectorize_builtin_gather (const_tree mem_vectype,
1716 const_tree index_type, int scale)
1717 {
1718 bool si;
1719 enum ix86_builtins code;
1720
1721 if (! TARGET_AVX2 || !TARGET_USE_GATHER)
1722 return NULL_TREE;
1723
1724 if ((TREE_CODE (index_type) != INTEGER_TYPE
1725 && !POINTER_TYPE_P (index_type))
1726 || (TYPE_MODE (index_type) != SImode
1727 && TYPE_MODE (index_type) != DImode))
1728 return NULL_TREE;
1729
1730 if (TYPE_PRECISION (index_type) > POINTER_SIZE)
1731 return NULL_TREE;
1732
1733 /* v*gather* insn sign extends index to pointer mode. */
1734 if (TYPE_PRECISION (index_type) < POINTER_SIZE
1735 && TYPE_UNSIGNED (index_type))
1736 return NULL_TREE;
1737
1738 if (scale <= 0
1739 || scale > 8
1740 || (scale & (scale - 1)) != 0)
1741 return NULL_TREE;
1742
1743 si = TYPE_MODE (index_type) == SImode;
1744 switch (TYPE_MODE (mem_vectype))
1745 {
1746 case E_V2DFmode:
1747 if (TARGET_AVX512VL)
1748 code = si ? IX86_BUILTIN_GATHER3SIV2DF : IX86_BUILTIN_GATHER3DIV2DF;
1749 else
1750 code = si ? IX86_BUILTIN_GATHERSIV2DF : IX86_BUILTIN_GATHERDIV2DF;
1751 break;
1752 case E_V4DFmode:
1753 if (TARGET_AVX512VL)
1754 code = si ? IX86_BUILTIN_GATHER3ALTSIV4DF : IX86_BUILTIN_GATHER3DIV4DF;
1755 else
1756 code = si ? IX86_BUILTIN_GATHERALTSIV4DF : IX86_BUILTIN_GATHERDIV4DF;
1757 break;
1758 case E_V2DImode:
1759 if (TARGET_AVX512VL)
1760 code = si ? IX86_BUILTIN_GATHER3SIV2DI : IX86_BUILTIN_GATHER3DIV2DI;
1761 else
1762 code = si ? IX86_BUILTIN_GATHERSIV2DI : IX86_BUILTIN_GATHERDIV2DI;
1763 break;
1764 case E_V4DImode:
1765 if (TARGET_AVX512VL)
1766 code = si ? IX86_BUILTIN_GATHER3ALTSIV4DI : IX86_BUILTIN_GATHER3DIV4DI;
1767 else
1768 code = si ? IX86_BUILTIN_GATHERALTSIV4DI : IX86_BUILTIN_GATHERDIV4DI;
1769 break;
1770 case E_V4SFmode:
1771 if (TARGET_AVX512VL)
1772 code = si ? IX86_BUILTIN_GATHER3SIV4SF : IX86_BUILTIN_GATHER3DIV4SF;
1773 else
1774 code = si ? IX86_BUILTIN_GATHERSIV4SF : IX86_BUILTIN_GATHERDIV4SF;
1775 break;
1776 case E_V8SFmode:
1777 if (TARGET_AVX512VL)
1778 code = si ? IX86_BUILTIN_GATHER3SIV8SF : IX86_BUILTIN_GATHER3ALTDIV8SF;
1779 else
1780 code = si ? IX86_BUILTIN_GATHERSIV8SF : IX86_BUILTIN_GATHERALTDIV8SF;
1781 break;
1782 case E_V4SImode:
1783 if (TARGET_AVX512VL)
1784 code = si ? IX86_BUILTIN_GATHER3SIV4SI : IX86_BUILTIN_GATHER3DIV4SI;
1785 else
1786 code = si ? IX86_BUILTIN_GATHERSIV4SI : IX86_BUILTIN_GATHERDIV4SI;
1787 break;
1788 case E_V8SImode:
1789 if (TARGET_AVX512VL)
1790 code = si ? IX86_BUILTIN_GATHER3SIV8SI : IX86_BUILTIN_GATHER3ALTDIV8SI;
1791 else
1792 code = si ? IX86_BUILTIN_GATHERSIV8SI : IX86_BUILTIN_GATHERALTDIV8SI;
1793 break;
1794 case E_V8DFmode:
1795 if (TARGET_AVX512F)
1796 code = si ? IX86_BUILTIN_GATHER3ALTSIV8DF : IX86_BUILTIN_GATHER3DIV8DF;
1797 else
1798 return NULL_TREE;
1799 break;
1800 case E_V8DImode:
1801 if (TARGET_AVX512F)
1802 code = si ? IX86_BUILTIN_GATHER3ALTSIV8DI : IX86_BUILTIN_GATHER3DIV8DI;
1803 else
1804 return NULL_TREE;
1805 break;
1806 case E_V16SFmode:
1807 if (TARGET_AVX512F)
1808 code = si ? IX86_BUILTIN_GATHER3SIV16SF : IX86_BUILTIN_GATHER3ALTDIV16SF;
1809 else
1810 return NULL_TREE;
1811 break;
1812 case E_V16SImode:
1813 if (TARGET_AVX512F)
1814 code = si ? IX86_BUILTIN_GATHER3SIV16SI : IX86_BUILTIN_GATHER3ALTDIV16SI;
1815 else
1816 return NULL_TREE;
1817 break;
1818 default:
1819 return NULL_TREE;
1820 }
1821
1822 return ix86_get_builtin (code);
1823 }
1824
1825 /* Returns a code for a target-specific builtin that implements
1826 reciprocal of the function, or NULL_TREE if not available. */
1827
1828 tree
1829 ix86_builtin_reciprocal (tree fndecl)
1830 {
1831 enum ix86_builtins fn_code
1832 = (enum ix86_builtins) DECL_FUNCTION_CODE (fndecl);
1833 switch (fn_code)
1834 {
1835 /* Vectorized version of sqrt to rsqrt conversion. */
1836 case IX86_BUILTIN_SQRTPS_NR:
1837 return ix86_get_builtin (IX86_BUILTIN_RSQRTPS_NR);
1838
1839 case IX86_BUILTIN_SQRTPS_NR256:
1840 return ix86_get_builtin (IX86_BUILTIN_RSQRTPS_NR256);
1841
1842 default:
1843 return NULL_TREE;
1844 }
1845 }
1846
1847 /* Priority of i386 features, greater value is higher priority. This is
1848 used to decide the order in which function dispatch must happen. For
1849 instance, a version specialized for SSE4.2 should be checked for dispatch
1850 before a version for SSE3, as SSE4.2 implies SSE3. */
1851 enum feature_priority
1852 {
1853 P_ZERO = 0,
1854 P_MMX,
1855 P_SSE,
1856 P_SSE2,
1857 P_SSE3,
1858 P_SSSE3,
1859 P_PROC_SSSE3,
1860 P_SSE4_A,
1861 P_PROC_SSE4_A,
1862 P_SSE4_1,
1863 P_SSE4_2,
1864 P_PROC_SSE4_2,
1865 P_POPCNT,
1866 P_AES,
1867 P_PCLMUL,
1868 P_AVX,
1869 P_PROC_AVX,
1870 P_BMI,
1871 P_PROC_BMI,
1872 P_FMA4,
1873 P_XOP,
1874 P_PROC_XOP,
1875 P_FMA,
1876 P_PROC_FMA,
1877 P_BMI2,
1878 P_AVX2,
1879 P_PROC_AVX2,
1880 P_AVX512F,
1881 P_PROC_AVX512F
1882 };
1883
1884 /* This is the order of bit-fields in __processor_features in cpuinfo.c */
1885 enum processor_features
1886 {
1887 F_CMOV = 0,
1888 F_MMX,
1889 F_POPCNT,
1890 F_SSE,
1891 F_SSE2,
1892 F_SSE3,
1893 F_SSSE3,
1894 F_SSE4_1,
1895 F_SSE4_2,
1896 F_AVX,
1897 F_AVX2,
1898 F_SSE4_A,
1899 F_FMA4,
1900 F_XOP,
1901 F_FMA,
1902 F_AVX512F,
1903 F_BMI,
1904 F_BMI2,
1905 F_AES,
1906 F_PCLMUL,
1907 F_AVX512VL,
1908 F_AVX512BW,
1909 F_AVX512DQ,
1910 F_AVX512CD,
1911 F_AVX512ER,
1912 F_AVX512PF,
1913 F_AVX512VBMI,
1914 F_AVX512IFMA,
1915 F_AVX5124VNNIW,
1916 F_AVX5124FMAPS,
1917 F_AVX512VPOPCNTDQ,
1918 F_AVX512VBMI2,
1919 F_GFNI,
1920 F_VPCLMULQDQ,
1921 F_AVX512VNNI,
1922 F_AVX512BITALG,
1923 F_AVX512BF16,
1924 F_MAX
1925 };
1926
1927 /* These are the values for vendor types and cpu types and subtypes
1928 in cpuinfo.c. Cpu types and subtypes should be subtracted by
1929 the corresponding start value. */
1930 enum processor_model
1931 {
1932 M_INTEL = 1,
1933 M_AMD,
1934 M_CPU_TYPE_START,
1935 M_INTEL_BONNELL,
1936 M_INTEL_CORE2,
1937 M_INTEL_COREI7,
1938 M_AMDFAM10H,
1939 M_AMDFAM15H,
1940 M_INTEL_SILVERMONT,
1941 M_INTEL_KNL,
1942 M_AMD_BTVER1,
1943 M_AMD_BTVER2,
1944 M_AMDFAM17H,
1945 M_INTEL_KNM,
1946 M_INTEL_GOLDMONT,
1947 M_INTEL_GOLDMONT_PLUS,
1948 M_INTEL_TREMONT,
1949 M_CPU_SUBTYPE_START,
1950 M_INTEL_COREI7_NEHALEM,
1951 M_INTEL_COREI7_WESTMERE,
1952 M_INTEL_COREI7_SANDYBRIDGE,
1953 M_AMDFAM10H_BARCELONA,
1954 M_AMDFAM10H_SHANGHAI,
1955 M_AMDFAM10H_ISTANBUL,
1956 M_AMDFAM15H_BDVER1,
1957 M_AMDFAM15H_BDVER2,
1958 M_AMDFAM15H_BDVER3,
1959 M_AMDFAM15H_BDVER4,
1960 M_AMDFAM17H_ZNVER1,
1961 M_INTEL_COREI7_IVYBRIDGE,
1962 M_INTEL_COREI7_HASWELL,
1963 M_INTEL_COREI7_BROADWELL,
1964 M_INTEL_COREI7_SKYLAKE,
1965 M_INTEL_COREI7_SKYLAKE_AVX512,
1966 M_INTEL_COREI7_CANNONLAKE,
1967 M_INTEL_COREI7_ICELAKE_CLIENT,
1968 M_INTEL_COREI7_ICELAKE_SERVER,
1969 M_AMDFAM17H_ZNVER2,
1970 M_INTEL_COREI7_CASCADELAKE
1971 };
1972
1973 struct _arch_names_table
1974 {
1975 const char *const name;
1976 const enum processor_model model;
1977 };
1978
1979 static const _arch_names_table arch_names_table[] =
1980 {
1981 {"amd", M_AMD},
1982 {"intel", M_INTEL},
1983 {"atom", M_INTEL_BONNELL},
1984 {"slm", M_INTEL_SILVERMONT},
1985 {"core2", M_INTEL_CORE2},
1986 {"corei7", M_INTEL_COREI7},
1987 {"nehalem", M_INTEL_COREI7_NEHALEM},
1988 {"westmere", M_INTEL_COREI7_WESTMERE},
1989 {"sandybridge", M_INTEL_COREI7_SANDYBRIDGE},
1990 {"ivybridge", M_INTEL_COREI7_IVYBRIDGE},
1991 {"haswell", M_INTEL_COREI7_HASWELL},
1992 {"broadwell", M_INTEL_COREI7_BROADWELL},
1993 {"skylake", M_INTEL_COREI7_SKYLAKE},
1994 {"skylake-avx512", M_INTEL_COREI7_SKYLAKE_AVX512},
1995 {"cannonlake", M_INTEL_COREI7_CANNONLAKE},
1996 {"icelake-client", M_INTEL_COREI7_ICELAKE_CLIENT},
1997 {"icelake-server", M_INTEL_COREI7_ICELAKE_SERVER},
1998 {"cascadelake", M_INTEL_COREI7_CASCADELAKE},
1999 {"bonnell", M_INTEL_BONNELL},
2000 {"silvermont", M_INTEL_SILVERMONT},
2001 {"goldmont", M_INTEL_GOLDMONT},
2002 {"goldmont-plus", M_INTEL_GOLDMONT_PLUS},
2003 {"tremont", M_INTEL_TREMONT},
2004 {"knl", M_INTEL_KNL},
2005 {"knm", M_INTEL_KNM},
2006 {"amdfam10h", M_AMDFAM10H},
2007 {"barcelona", M_AMDFAM10H_BARCELONA},
2008 {"shanghai", M_AMDFAM10H_SHANGHAI},
2009 {"istanbul", M_AMDFAM10H_ISTANBUL},
2010 {"btver1", M_AMD_BTVER1},
2011 {"amdfam15h", M_AMDFAM15H},
2012 {"bdver1", M_AMDFAM15H_BDVER1},
2013 {"bdver2", M_AMDFAM15H_BDVER2},
2014 {"bdver3", M_AMDFAM15H_BDVER3},
2015 {"bdver4", M_AMDFAM15H_BDVER4},
2016 {"btver2", M_AMD_BTVER2},
2017 {"amdfam17h", M_AMDFAM17H},
2018 {"znver1", M_AMDFAM17H_ZNVER1},
2019 {"znver2", M_AMDFAM17H_ZNVER2},
2020 };
2021
2022 /* These are the target attribute strings for which a dispatcher is
2023 available, from fold_builtin_cpu. */
2024 struct _isa_names_table
2025 {
2026 const char *const name;
2027 const enum processor_features feature;
2028 const enum feature_priority priority;
2029 };
2030
2031 static const _isa_names_table isa_names_table[] =
2032 {
2033 {"cmov", F_CMOV, P_ZERO},
2034 {"mmx", F_MMX, P_MMX},
2035 {"popcnt", F_POPCNT, P_POPCNT},
2036 {"sse", F_SSE, P_SSE},
2037 {"sse2", F_SSE2, P_SSE2},
2038 {"sse3", F_SSE3, P_SSE3},
2039 {"ssse3", F_SSSE3, P_SSSE3},
2040 {"sse4a", F_SSE4_A, P_SSE4_A},
2041 {"sse4.1", F_SSE4_1, P_SSE4_1},
2042 {"sse4.2", F_SSE4_2, P_SSE4_2},
2043 {"avx", F_AVX, P_AVX},
2044 {"fma4", F_FMA4, P_FMA4},
2045 {"xop", F_XOP, P_XOP},
2046 {"fma", F_FMA, P_FMA},
2047 {"avx2", F_AVX2, P_AVX2},
2048 {"avx512f", F_AVX512F, P_AVX512F},
2049 {"bmi", F_BMI, P_BMI},
2050 {"bmi2", F_BMI2, P_BMI2},
2051 {"aes", F_AES, P_AES},
2052 {"pclmul", F_PCLMUL, P_PCLMUL},
2053 {"avx512vl",F_AVX512VL, P_ZERO},
2054 {"avx512bw",F_AVX512BW, P_ZERO},
2055 {"avx512dq",F_AVX512DQ, P_ZERO},
2056 {"avx512cd",F_AVX512CD, P_ZERO},
2057 {"avx512er",F_AVX512ER, P_ZERO},
2058 {"avx512pf",F_AVX512PF, P_ZERO},
2059 {"avx512vbmi",F_AVX512VBMI, P_ZERO},
2060 {"avx512ifma",F_AVX512IFMA, P_ZERO},
2061 {"avx5124vnniw",F_AVX5124VNNIW, P_ZERO},
2062 {"avx5124fmaps",F_AVX5124FMAPS, P_ZERO},
2063 {"avx512vpopcntdq",F_AVX512VPOPCNTDQ, P_ZERO},
2064 {"avx512vbmi2", F_AVX512VBMI2, P_ZERO},
2065 {"gfni", F_GFNI, P_ZERO},
2066 {"vpclmulqdq", F_VPCLMULQDQ, P_ZERO},
2067 {"avx512vnni", F_AVX512VNNI, P_ZERO},
2068 {"avx512bitalg", F_AVX512BITALG, P_ZERO},
2069 {"avx512bf16", F_AVX512BF16, P_ZERO}
2070 };
2071
2072 /* This parses the attribute arguments to target in DECL and determines
2073 the right builtin to use to match the platform specification.
2074 It returns the priority value for this version decl. If PREDICATE_LIST
2075 is not NULL, it stores the list of cpu features that need to be checked
2076 before dispatching this function. */
2077
2078 unsigned int
2079 get_builtin_code_for_version (tree decl, tree *predicate_list)
2080 {
2081 tree attrs;
2082 struct cl_target_option cur_target;
2083 tree target_node;
2084 struct cl_target_option *new_target;
2085 const char *arg_str = NULL;
2086 const char *attrs_str = NULL;
2087 char *tok_str = NULL;
2088 char *token;
2089
2090 enum feature_priority priority = P_ZERO;
2091
2092 static unsigned int NUM_FEATURES
2093 = sizeof (isa_names_table) / sizeof (_isa_names_table);
2094
2095 unsigned int i;
2096
2097 tree predicate_chain = NULL_TREE;
2098 tree predicate_decl, predicate_arg;
2099
2100 attrs = lookup_attribute ("target", DECL_ATTRIBUTES (decl));
2101 gcc_assert (attrs != NULL);
2102
2103 attrs = TREE_VALUE (TREE_VALUE (attrs));
2104
2105 gcc_assert (TREE_CODE (attrs) == STRING_CST);
2106 attrs_str = TREE_STRING_POINTER (attrs);
2107
2108 /* Return priority zero for default function. */
2109 if (strcmp (attrs_str, "default") == 0)
2110 return 0;
2111
2112 /* Handle arch= if specified. For priority, set it to be 1 more than
2113 the best instruction set the processor can handle. For instance, if
2114 there is a version for atom and a version for ssse3 (the highest ISA
2115 priority for atom), the atom version must be checked for dispatch
2116 before the ssse3 version. */
2117 if (strstr (attrs_str, "arch=") != NULL)
2118 {
2119 cl_target_option_save (&cur_target, &global_options);
2120 target_node
2121 = ix86_valid_target_attribute_tree (decl, attrs, &global_options,
2122 &global_options_set, 0);
2123
2124 gcc_assert (target_node);
2125 if (target_node == error_mark_node)
2126 return 0;
2127 new_target = TREE_TARGET_OPTION (target_node);
2128 gcc_assert (new_target);
2129
2130 if (new_target->arch_specified && new_target->arch > 0)
2131 {
2132 switch (new_target->arch)
2133 {
2134 case PROCESSOR_CORE2:
2135 arg_str = "core2";
2136 priority = P_PROC_SSSE3;
2137 break;
2138 case PROCESSOR_NEHALEM:
2139 if (new_target->x_ix86_isa_flags & OPTION_MASK_ISA_PCLMUL)
2140 {
2141 arg_str = "westmere";
2142 priority = P_PCLMUL;
2143 }
2144 else
2145 {
2146 /* We translate "arch=corei7" and "arch=nehalem" to
2147 "corei7" so that it will be mapped to M_INTEL_COREI7
2148 as cpu type to cover all M_INTEL_COREI7_XXXs. */
2149 arg_str = "corei7";
2150 priority = P_PROC_SSE4_2;
2151 }
2152 break;
2153 case PROCESSOR_SANDYBRIDGE:
2154 if (new_target->x_ix86_isa_flags & OPTION_MASK_ISA_F16C)
2155 arg_str = "ivybridge";
2156 else
2157 arg_str = "sandybridge";
2158 priority = P_PROC_AVX;
2159 break;
2160 case PROCESSOR_HASWELL:
2161 if (new_target->x_ix86_isa_flags & OPTION_MASK_ISA_ADX)
2162 arg_str = "broadwell";
2163 else
2164 arg_str = "haswell";
2165 priority = P_PROC_AVX2;
2166 break;
2167 case PROCESSOR_SKYLAKE:
2168 arg_str = "skylake";
2169 priority = P_PROC_AVX2;
2170 break;
2171 case PROCESSOR_SKYLAKE_AVX512:
2172 arg_str = "skylake-avx512";
2173 priority = P_PROC_AVX512F;
2174 break;
2175 case PROCESSOR_CANNONLAKE:
2176 arg_str = "cannonlake";
2177 priority = P_PROC_AVX512F;
2178 break;
2179 case PROCESSOR_ICELAKE_CLIENT:
2180 arg_str = "icelake-client";
2181 priority = P_PROC_AVX512F;
2182 break;
2183 case PROCESSOR_ICELAKE_SERVER:
2184 arg_str = "icelake-server";
2185 priority = P_PROC_AVX512F;
2186 break;
2187 case PROCESSOR_CASCADELAKE:
2188 arg_str = "cascadelake";
2189 priority = P_PROC_AVX512F;
2190 break;
2191 case PROCESSOR_BONNELL:
2192 arg_str = "bonnell";
2193 priority = P_PROC_SSSE3;
2194 break;
2195 case PROCESSOR_KNL:
2196 arg_str = "knl";
2197 priority = P_PROC_AVX512F;
2198 break;
2199 case PROCESSOR_KNM:
2200 arg_str = "knm";
2201 priority = P_PROC_AVX512F;
2202 break;
2203 case PROCESSOR_SILVERMONT:
2204 arg_str = "silvermont";
2205 priority = P_PROC_SSE4_2;
2206 break;
2207 case PROCESSOR_GOLDMONT:
2208 arg_str = "goldmont";
2209 priority = P_PROC_SSE4_2;
2210 break;
2211 case PROCESSOR_GOLDMONT_PLUS:
2212 arg_str = "goldmont-plus";
2213 priority = P_PROC_SSE4_2;
2214 break;
2215 case PROCESSOR_TREMONT:
2216 arg_str = "tremont";
2217 priority = P_PROC_SSE4_2;
2218 break;
2219 case PROCESSOR_AMDFAM10:
2220 arg_str = "amdfam10h";
2221 priority = P_PROC_SSE4_A;
2222 break;
2223 case PROCESSOR_BTVER1:
2224 arg_str = "btver1";
2225 priority = P_PROC_SSE4_A;
2226 break;
2227 case PROCESSOR_BTVER2:
2228 arg_str = "btver2";
2229 priority = P_PROC_BMI;
2230 break;
2231 case PROCESSOR_BDVER1:
2232 arg_str = "bdver1";
2233 priority = P_PROC_XOP;
2234 break;
2235 case PROCESSOR_BDVER2:
2236 arg_str = "bdver2";
2237 priority = P_PROC_FMA;
2238 break;
2239 case PROCESSOR_BDVER3:
2240 arg_str = "bdver3";
2241 priority = P_PROC_FMA;
2242 break;
2243 case PROCESSOR_BDVER4:
2244 arg_str = "bdver4";
2245 priority = P_PROC_AVX2;
2246 break;
2247 case PROCESSOR_ZNVER1:
2248 arg_str = "znver1";
2249 priority = P_PROC_AVX2;
2250 break;
2251 case PROCESSOR_ZNVER2:
2252 arg_str = "znver2";
2253 priority = P_PROC_AVX2;
2254 break;
2255 }
2256 }
2257
2258 cl_target_option_restore (&global_options, &cur_target);
2259
2260 if (predicate_list && arg_str == NULL)
2261 {
2262 error_at (DECL_SOURCE_LOCATION (decl),
2263 "no dispatcher found for the versioning attributes");
2264 return 0;
2265 }
2266
2267 if (predicate_list)
2268 {
2269 predicate_decl = ix86_builtins [(int) IX86_BUILTIN_CPU_IS];
2270 /* For a C string literal the length includes the trailing NULL. */
2271 predicate_arg = build_string_literal (strlen (arg_str) + 1, arg_str);
2272 predicate_chain = tree_cons (predicate_decl, predicate_arg,
2273 predicate_chain);
2274 }
2275 }
2276
2277 /* Process feature name. */
2278 tok_str = (char *) xmalloc (strlen (attrs_str) + 1);
2279 strcpy (tok_str, attrs_str);
2280 token = strtok (tok_str, ",");
2281 predicate_decl = ix86_builtins [(int) IX86_BUILTIN_CPU_SUPPORTS];
2282
2283 while (token != NULL)
2284 {
2285 /* Do not process "arch=" */
2286 if (strncmp (token, "arch=", 5) == 0)
2287 {
2288 token = strtok (NULL, ",");
2289 continue;
2290 }
2291 for (i = 0; i < NUM_FEATURES; ++i)
2292 {
2293 if (strcmp (token, isa_names_table[i].name) == 0)
2294 {
2295 if (predicate_list)
2296 {
2297 predicate_arg = build_string_literal (
2298 strlen (isa_names_table[i].name) + 1,
2299 isa_names_table[i].name);
2300 predicate_chain = tree_cons (predicate_decl, predicate_arg,
2301 predicate_chain);
2302 }
2303 /* Find the maximum priority feature. */
2304 if (isa_names_table[i].priority > priority)
2305 priority = isa_names_table[i].priority;
2306
2307 break;
2308 }
2309 }
2310 if (predicate_list && priority == P_ZERO)
2311 {
2312 error_at (DECL_SOURCE_LOCATION (decl),
2313 "ISA %qs is not supported in %<target%> attribute, "
2314 "use %<arch=%> syntax", token);
2315 return 0;
2316 }
2317 token = strtok (NULL, ",");
2318 }
2319 free (tok_str);
2320
2321 if (predicate_list && predicate_chain == NULL_TREE)
2322 {
2323 error_at (DECL_SOURCE_LOCATION (decl),
2324 "no dispatcher found for the versioning attributes: %s",
2325 attrs_str);
2326 return 0;
2327 }
2328 else if (predicate_list)
2329 {
2330 predicate_chain = nreverse (predicate_chain);
2331 *predicate_list = predicate_chain;
2332 }
2333
2334 return priority;
2335 }
2336
2337 /* This builds the processor_model struct type defined in
2338 libgcc/config/i386/cpuinfo.c */
2339
2340 static tree
2341 build_processor_model_struct (void)
2342 {
2343 const char *field_name[] = {"__cpu_vendor", "__cpu_type", "__cpu_subtype",
2344 "__cpu_features"};
2345 tree field = NULL_TREE, field_chain = NULL_TREE;
2346 int i;
2347 tree type = make_node (RECORD_TYPE);
2348
2349 /* The first 3 fields are unsigned int. */
2350 for (i = 0; i < 3; ++i)
2351 {
2352 field = build_decl (UNKNOWN_LOCATION, FIELD_DECL,
2353 get_identifier (field_name[i]), unsigned_type_node);
2354 if (field_chain != NULL_TREE)
2355 DECL_CHAIN (field) = field_chain;
2356 field_chain = field;
2357 }
2358
2359 /* The last field is an array of unsigned integers of size one. */
2360 field = build_decl (UNKNOWN_LOCATION, FIELD_DECL,
2361 get_identifier (field_name[3]),
2362 build_array_type (unsigned_type_node,
2363 build_index_type (size_one_node)));
2364 if (field_chain != NULL_TREE)
2365 DECL_CHAIN (field) = field_chain;
2366 field_chain = field;
2367
2368 finish_builtin_struct (type, "__processor_model", field_chain, NULL_TREE);
2369 return type;
2370 }
2371
2372 /* Returns a extern, comdat VAR_DECL of type TYPE and name NAME. */
2373
2374 static tree
2375 make_var_decl (tree type, const char *name)
2376 {
2377 tree new_decl;
2378
2379 new_decl = build_decl (UNKNOWN_LOCATION,
2380 VAR_DECL,
2381 get_identifier(name),
2382 type);
2383
2384 DECL_EXTERNAL (new_decl) = 1;
2385 TREE_STATIC (new_decl) = 1;
2386 TREE_PUBLIC (new_decl) = 1;
2387 DECL_INITIAL (new_decl) = 0;
2388 DECL_ARTIFICIAL (new_decl) = 0;
2389 DECL_PRESERVE_P (new_decl) = 1;
2390
2391 make_decl_one_only (new_decl, DECL_ASSEMBLER_NAME (new_decl));
2392 assemble_variable (new_decl, 0, 0, 0);
2393
2394 return new_decl;
2395 }
2396
2397 /* FNDECL is a __builtin_cpu_is or a __builtin_cpu_supports call that is folded
2398 into an integer defined in libgcc/config/i386/cpuinfo.c */
2399
2400 tree
2401 fold_builtin_cpu (tree fndecl, tree *args)
2402 {
2403 unsigned int i;
2404 enum ix86_builtins fn_code = (enum ix86_builtins)
2405 DECL_FUNCTION_CODE (fndecl);
2406 tree param_string_cst = NULL;
2407
2408 tree __processor_model_type = build_processor_model_struct ();
2409 tree __cpu_model_var = make_var_decl (__processor_model_type,
2410 "__cpu_model");
2411
2412
2413 varpool_node::add (__cpu_model_var);
2414
2415 gcc_assert ((args != NULL) && (*args != NULL));
2416
2417 param_string_cst = *args;
2418 while (param_string_cst
2419 && TREE_CODE (param_string_cst) != STRING_CST)
2420 {
2421 /* *args must be a expr that can contain other EXPRS leading to a
2422 STRING_CST. */
2423 if (!EXPR_P (param_string_cst))
2424 {
2425 error ("parameter to builtin must be a string constant or literal");
2426 return integer_zero_node;
2427 }
2428 param_string_cst = TREE_OPERAND (EXPR_CHECK (param_string_cst), 0);
2429 }
2430
2431 gcc_assert (param_string_cst);
2432
2433 if (fn_code == IX86_BUILTIN_CPU_IS)
2434 {
2435 tree ref;
2436 tree field;
2437 tree final;
2438
2439 unsigned int field_val = 0;
2440 unsigned int NUM_ARCH_NAMES
2441 = sizeof (arch_names_table) / sizeof (struct _arch_names_table);
2442
2443 for (i = 0; i < NUM_ARCH_NAMES; i++)
2444 if (strcmp (arch_names_table[i].name,
2445 TREE_STRING_POINTER (param_string_cst)) == 0)
2446 break;
2447
2448 if (i == NUM_ARCH_NAMES)
2449 {
2450 error ("parameter to builtin not valid: %s",
2451 TREE_STRING_POINTER (param_string_cst));
2452 return integer_zero_node;
2453 }
2454
2455 field = TYPE_FIELDS (__processor_model_type);
2456 field_val = arch_names_table[i].model;
2457
2458 /* CPU types are stored in the next field. */
2459 if (field_val > M_CPU_TYPE_START
2460 && field_val < M_CPU_SUBTYPE_START)
2461 {
2462 field = DECL_CHAIN (field);
2463 field_val -= M_CPU_TYPE_START;
2464 }
2465
2466 /* CPU subtypes are stored in the next field. */
2467 if (field_val > M_CPU_SUBTYPE_START)
2468 {
2469 field = DECL_CHAIN ( DECL_CHAIN (field));
2470 field_val -= M_CPU_SUBTYPE_START;
2471 }
2472
2473 /* Get the appropriate field in __cpu_model. */
2474 ref = build3 (COMPONENT_REF, TREE_TYPE (field), __cpu_model_var,
2475 field, NULL_TREE);
2476
2477 /* Check the value. */
2478 final = build2 (EQ_EXPR, unsigned_type_node, ref,
2479 build_int_cstu (unsigned_type_node, field_val));
2480 return build1 (CONVERT_EXPR, integer_type_node, final);
2481 }
2482 else if (fn_code == IX86_BUILTIN_CPU_SUPPORTS)
2483 {
2484 tree ref;
2485 tree array_elt;
2486 tree field;
2487 tree final;
2488
2489 unsigned int field_val = 0;
2490 unsigned int NUM_ISA_NAMES
2491 = sizeof (isa_names_table) / sizeof (struct _isa_names_table);
2492
2493 for (i = 0; i < NUM_ISA_NAMES; i++)
2494 if (strcmp (isa_names_table[i].name,
2495 TREE_STRING_POINTER (param_string_cst)) == 0)
2496 break;
2497
2498 if (i == NUM_ISA_NAMES)
2499 {
2500 error ("parameter to builtin not valid: %s",
2501 TREE_STRING_POINTER (param_string_cst));
2502 return integer_zero_node;
2503 }
2504
2505 if (isa_names_table[i].feature >= 32)
2506 {
2507 tree __cpu_features2_var = make_var_decl (unsigned_type_node,
2508 "__cpu_features2");
2509
2510 varpool_node::add (__cpu_features2_var);
2511 field_val = (1U << (isa_names_table[i].feature - 32));
2512 /* Return __cpu_features2 & field_val */
2513 final = build2 (BIT_AND_EXPR, unsigned_type_node,
2514 __cpu_features2_var,
2515 build_int_cstu (unsigned_type_node, field_val));
2516 return build1 (CONVERT_EXPR, integer_type_node, final);
2517 }
2518
2519 field = TYPE_FIELDS (__processor_model_type);
2520 /* Get the last field, which is __cpu_features. */
2521 while (DECL_CHAIN (field))
2522 field = DECL_CHAIN (field);
2523
2524 /* Get the appropriate field: __cpu_model.__cpu_features */
2525 ref = build3 (COMPONENT_REF, TREE_TYPE (field), __cpu_model_var,
2526 field, NULL_TREE);
2527
2528 /* Access the 0th element of __cpu_features array. */
2529 array_elt = build4 (ARRAY_REF, unsigned_type_node, ref,
2530 integer_zero_node, NULL_TREE, NULL_TREE);
2531
2532 field_val = (1U << isa_names_table[i].feature);
2533 /* Return __cpu_model.__cpu_features[0] & field_val */
2534 final = build2 (BIT_AND_EXPR, unsigned_type_node, array_elt,
2535 build_int_cstu (unsigned_type_node, field_val));
2536 return build1 (CONVERT_EXPR, integer_type_node, final);
2537 }
2538 gcc_unreachable ();
2539 }
2540
2541 #include "gt-i386-builtins.h"
Mirror of https://gcc.gnu.org/git/gcc.git