1 /* Subroutines used for macro/preprocessor support on the ia-32.
2 Copyright (C) 2008-2021 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GCC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
20 #define IN_TARGET_CODE 1
24 #include "coretypes.h"
26 #include "c-family/c-common.h"
29 #include "c-family/c-pragma.h"
31 static bool ix86_pragma_target_parse (tree
, tree
);
32 static void ix86_target_macros_internal
33 (HOST_WIDE_INT
, HOST_WIDE_INT
, enum processor_type
, enum processor_type
, enum fpmath_unit
,
34 void (*def_or_undef
) (cpp_reader
*, const char *));
36 /* Internal function to either define or undef the appropriate system
39 ix86_target_macros_internal (HOST_WIDE_INT isa_flag
,
40 HOST_WIDE_INT isa_flag2
,
41 enum processor_type arch
,
42 enum processor_type tune
,
43 enum fpmath_unit fpmath
,
44 void (*def_or_undef
) (cpp_reader
*,
47 /* For some of the k6/pentium varients there weren't separate ISA bits to
48 identify which tune/arch flag was passed, so figure it out here. */
49 size_t arch_len
= strlen (ix86_arch_string
);
50 size_t tune_len
= strlen (ix86_tune_string
);
51 int last_arch_char
= ix86_arch_string
[arch_len
- 1];
52 int last_tune_char
= ix86_tune_string
[tune_len
- 1];
54 /* Built-ins based on -march=. */
60 def_or_undef (parse_in
, "__i486");
61 def_or_undef (parse_in
, "__i486__");
63 case PROCESSOR_LAKEMONT
:
64 /* Intel MCU is based on Intel Pentium CPU. */
65 case PROCESSOR_PENTIUM
:
66 def_or_undef (parse_in
, "__i586");
67 def_or_undef (parse_in
, "__i586__");
68 def_or_undef (parse_in
, "__pentium");
69 def_or_undef (parse_in
, "__pentium__");
70 if (isa_flag
& OPTION_MASK_ISA_MMX
)
71 def_or_undef (parse_in
, "__pentium_mmx__");
73 case PROCESSOR_PENTIUMPRO
:
74 def_or_undef (parse_in
, "__i686");
75 def_or_undef (parse_in
, "__i686__");
76 def_or_undef (parse_in
, "__pentiumpro");
77 def_or_undef (parse_in
, "__pentiumpro__");
80 def_or_undef (parse_in
, "__geode");
81 def_or_undef (parse_in
, "__geode__");
84 def_or_undef (parse_in
, "__k6");
85 def_or_undef (parse_in
, "__k6__");
86 if (last_arch_char
== '2')
87 def_or_undef (parse_in
, "__k6_2__");
88 else if (last_arch_char
== '3')
89 def_or_undef (parse_in
, "__k6_3__");
90 else if (isa_flag
& OPTION_MASK_ISA_3DNOW
)
91 def_or_undef (parse_in
, "__k6_3__");
93 case PROCESSOR_ATHLON
:
94 def_or_undef (parse_in
, "__athlon");
95 def_or_undef (parse_in
, "__athlon__");
96 if (isa_flag
& OPTION_MASK_ISA_SSE
)
97 def_or_undef (parse_in
, "__athlon_sse__");
100 def_or_undef (parse_in
, "__k8");
101 def_or_undef (parse_in
, "__k8__");
103 case PROCESSOR_AMDFAM10
:
104 def_or_undef (parse_in
, "__amdfam10");
105 def_or_undef (parse_in
, "__amdfam10__");
107 case PROCESSOR_BDVER1
:
108 def_or_undef (parse_in
, "__bdver1");
109 def_or_undef (parse_in
, "__bdver1__");
111 case PROCESSOR_BDVER2
:
112 def_or_undef (parse_in
, "__bdver2");
113 def_or_undef (parse_in
, "__bdver2__");
115 case PROCESSOR_BDVER3
:
116 def_or_undef (parse_in
, "__bdver3");
117 def_or_undef (parse_in
, "__bdver3__");
119 case PROCESSOR_BDVER4
:
120 def_or_undef (parse_in
, "__bdver4");
121 def_or_undef (parse_in
, "__bdver4__");
123 case PROCESSOR_ZNVER1
:
124 def_or_undef (parse_in
, "__znver1");
125 def_or_undef (parse_in
, "__znver1__");
127 case PROCESSOR_ZNVER2
:
128 def_or_undef (parse_in
, "__znver2");
129 def_or_undef (parse_in
, "__znver2__");
131 case PROCESSOR_ZNVER3
:
132 def_or_undef (parse_in
, "__znver3");
133 def_or_undef (parse_in
, "__znver3__");
135 case PROCESSOR_BTVER1
:
136 def_or_undef (parse_in
, "__btver1");
137 def_or_undef (parse_in
, "__btver1__");
139 case PROCESSOR_BTVER2
:
140 def_or_undef (parse_in
, "__btver2");
141 def_or_undef (parse_in
, "__btver2__");
143 case PROCESSOR_PENTIUM4
:
144 def_or_undef (parse_in
, "__pentium4");
145 def_or_undef (parse_in
, "__pentium4__");
147 case PROCESSOR_NOCONA
:
148 def_or_undef (parse_in
, "__nocona");
149 def_or_undef (parse_in
, "__nocona__");
151 case PROCESSOR_CORE2
:
152 def_or_undef (parse_in
, "__core2");
153 def_or_undef (parse_in
, "__core2__");
155 case PROCESSOR_NEHALEM
:
156 def_or_undef (parse_in
, "__corei7");
157 def_or_undef (parse_in
, "__corei7__");
158 def_or_undef (parse_in
, "__nehalem");
159 def_or_undef (parse_in
, "__nehalem__");
161 case PROCESSOR_SANDYBRIDGE
:
162 def_or_undef (parse_in
, "__corei7_avx");
163 def_or_undef (parse_in
, "__corei7_avx__");
164 def_or_undef (parse_in
, "__sandybridge");
165 def_or_undef (parse_in
, "__sandybridge__");
167 case PROCESSOR_HASWELL
:
168 def_or_undef (parse_in
, "__core_avx2");
169 def_or_undef (parse_in
, "__core_avx2__");
170 def_or_undef (parse_in
, "__haswell");
171 def_or_undef (parse_in
, "__haswell__");
173 case PROCESSOR_BONNELL
:
174 def_or_undef (parse_in
, "__atom");
175 def_or_undef (parse_in
, "__atom__");
176 def_or_undef (parse_in
, "__bonnell");
177 def_or_undef (parse_in
, "__bonnell__");
179 case PROCESSOR_SILVERMONT
:
180 def_or_undef (parse_in
, "__slm");
181 def_or_undef (parse_in
, "__slm__");
182 def_or_undef (parse_in
, "__silvermont");
183 def_or_undef (parse_in
, "__silvermont__");
185 case PROCESSOR_GOLDMONT
:
186 def_or_undef (parse_in
, "__goldmont");
187 def_or_undef (parse_in
, "__goldmont__");
189 case PROCESSOR_GOLDMONT_PLUS
:
190 def_or_undef (parse_in
, "__goldmont_plus");
191 def_or_undef (parse_in
, "__goldmont_plus__");
193 case PROCESSOR_TREMONT
:
194 def_or_undef (parse_in
, "__tremont");
195 def_or_undef (parse_in
, "__tremont__");
198 def_or_undef (parse_in
, "__knl");
199 def_or_undef (parse_in
, "__knl__");
202 def_or_undef (parse_in
, "__knm");
203 def_or_undef (parse_in
, "__knm__");
205 case PROCESSOR_SKYLAKE
:
206 def_or_undef (parse_in
, "__skylake");
207 def_or_undef (parse_in
, "__skylake__");
209 case PROCESSOR_SKYLAKE_AVX512
:
210 def_or_undef (parse_in
, "__skylake_avx512");
211 def_or_undef (parse_in
, "__skylake_avx512__");
213 case PROCESSOR_CANNONLAKE
:
214 def_or_undef (parse_in
, "__cannonlake");
215 def_or_undef (parse_in
, "__cannonlake__");
217 case PROCESSOR_ICELAKE_CLIENT
:
218 def_or_undef (parse_in
, "__icelake_client");
219 def_or_undef (parse_in
, "__icelake_client__");
221 case PROCESSOR_ICELAKE_SERVER
:
222 def_or_undef (parse_in
, "__icelake_server");
223 def_or_undef (parse_in
, "__icelake_server__");
225 case PROCESSOR_CASCADELAKE
:
226 def_or_undef (parse_in
, "__cascadelake");
227 def_or_undef (parse_in
, "__cascadelake__");
229 case PROCESSOR_TIGERLAKE
:
230 def_or_undef (parse_in
, "__tigerlake");
231 def_or_undef (parse_in
, "__tigerlake__");
233 case PROCESSOR_COOPERLAKE
:
234 def_or_undef (parse_in
, "__cooperlake");
235 def_or_undef (parse_in
, "__cooperlake__");
237 case PROCESSOR_SAPPHIRERAPIDS
:
238 def_or_undef (parse_in
, "__sapphirerapids");
239 def_or_undef (parse_in
, "__sapphirerapids__");
241 case PROCESSOR_ALDERLAKE
:
242 def_or_undef (parse_in
, "__alderlake");
243 def_or_undef (parse_in
, "__alderlake__");
245 /* use PROCESSOR_max to not set/unset the arch macro. */
248 case PROCESSOR_INTEL
:
249 case PROCESSOR_GENERIC
:
253 /* Built-ins based on -mtune=. */
257 def_or_undef (parse_in
, "__tune_i386__");
260 def_or_undef (parse_in
, "__tune_i486__");
262 case PROCESSOR_PENTIUM
:
263 def_or_undef (parse_in
, "__tune_i586__");
264 def_or_undef (parse_in
, "__tune_pentium__");
265 if (last_tune_char
== 'x')
266 def_or_undef (parse_in
, "__tune_pentium_mmx__");
268 case PROCESSOR_PENTIUMPRO
:
269 def_or_undef (parse_in
, "__tune_i686__");
270 def_or_undef (parse_in
, "__tune_pentiumpro__");
271 switch (last_tune_char
)
274 def_or_undef (parse_in
, "__tune_pentium3__");
277 def_or_undef (parse_in
, "__tune_pentium2__");
281 case PROCESSOR_GEODE
:
282 def_or_undef (parse_in
, "__tune_geode__");
285 def_or_undef (parse_in
, "__tune_k6__");
286 if (last_tune_char
== '2')
287 def_or_undef (parse_in
, "__tune_k6_2__");
288 else if (last_tune_char
== '3')
289 def_or_undef (parse_in
, "__tune_k6_3__");
290 else if (isa_flag
& OPTION_MASK_ISA_3DNOW
)
291 def_or_undef (parse_in
, "__tune_k6_3__");
293 case PROCESSOR_ATHLON
:
294 def_or_undef (parse_in
, "__tune_athlon__");
295 if (isa_flag
& OPTION_MASK_ISA_SSE
)
296 def_or_undef (parse_in
, "__tune_athlon_sse__");
299 def_or_undef (parse_in
, "__tune_k8__");
301 case PROCESSOR_AMDFAM10
:
302 def_or_undef (parse_in
, "__tune_amdfam10__");
304 case PROCESSOR_BDVER1
:
305 def_or_undef (parse_in
, "__tune_bdver1__");
307 case PROCESSOR_BDVER2
:
308 def_or_undef (parse_in
, "__tune_bdver2__");
310 case PROCESSOR_BDVER3
:
311 def_or_undef (parse_in
, "__tune_bdver3__");
313 case PROCESSOR_BDVER4
:
314 def_or_undef (parse_in
, "__tune_bdver4__");
316 case PROCESSOR_ZNVER1
:
317 def_or_undef (parse_in
, "__tune_znver1__");
319 case PROCESSOR_ZNVER2
:
320 def_or_undef (parse_in
, "__tune_znver2__");
322 case PROCESSOR_ZNVER3
:
323 def_or_undef (parse_in
, "__tune_znver3__");
325 case PROCESSOR_BTVER1
:
326 def_or_undef (parse_in
, "__tune_btver1__");
328 case PROCESSOR_BTVER2
:
329 def_or_undef (parse_in
, "__tune_btver2__");
331 case PROCESSOR_PENTIUM4
:
332 def_or_undef (parse_in
, "__tune_pentium4__");
334 case PROCESSOR_NOCONA
:
335 def_or_undef (parse_in
, "__tune_nocona__");
337 case PROCESSOR_CORE2
:
338 def_or_undef (parse_in
, "__tune_core2__");
340 case PROCESSOR_NEHALEM
:
341 def_or_undef (parse_in
, "__tune_corei7__");
342 def_or_undef (parse_in
, "__tune_nehalem__");
344 case PROCESSOR_SANDYBRIDGE
:
345 def_or_undef (parse_in
, "__tune_corei7_avx__");
346 def_or_undef (parse_in
, "__tune_sandybridge__");
348 case PROCESSOR_HASWELL
:
349 def_or_undef (parse_in
, "__tune_core_avx2__");
350 def_or_undef (parse_in
, "__tune_haswell__");
352 case PROCESSOR_BONNELL
:
353 def_or_undef (parse_in
, "__tune_atom__");
354 def_or_undef (parse_in
, "__tune_bonnell__");
356 case PROCESSOR_SILVERMONT
:
357 def_or_undef (parse_in
, "__tune_slm__");
358 def_or_undef (parse_in
, "__tune_silvermont__");
360 case PROCESSOR_GOLDMONT
:
361 def_or_undef (parse_in
, "__tune_goldmont__");
363 case PROCESSOR_GOLDMONT_PLUS
:
364 def_or_undef (parse_in
, "__tune_goldmont_plus__");
366 case PROCESSOR_TREMONT
:
367 def_or_undef (parse_in
, "__tune_tremont__");
370 def_or_undef (parse_in
, "__tune_knl__");
373 def_or_undef (parse_in
, "__tune_knm__");
375 case PROCESSOR_SKYLAKE
:
376 def_or_undef (parse_in
, "__tune_skylake__");
378 case PROCESSOR_SKYLAKE_AVX512
:
379 def_or_undef (parse_in
, "__tune_skylake_avx512__");
381 case PROCESSOR_CANNONLAKE
:
382 def_or_undef (parse_in
, "__tune_cannonlake__");
384 case PROCESSOR_ICELAKE_CLIENT
:
385 def_or_undef (parse_in
, "__tune_icelake_client__");
387 case PROCESSOR_ICELAKE_SERVER
:
388 def_or_undef (parse_in
, "__tune_icelake_server__");
390 case PROCESSOR_LAKEMONT
:
391 def_or_undef (parse_in
, "__tune_lakemont__");
393 case PROCESSOR_CASCADELAKE
:
394 def_or_undef (parse_in
, "__tune_cascadelake__");
396 case PROCESSOR_TIGERLAKE
:
397 def_or_undef (parse_in
, "__tune_tigerlake__");
399 case PROCESSOR_COOPERLAKE
:
400 def_or_undef (parse_in
, "__tune_cooperlake__");
402 case PROCESSOR_SAPPHIRERAPIDS
:
403 def_or_undef (parse_in
, "__tune_sapphirerapids__");
405 case PROCESSOR_ALDERLAKE
:
406 def_or_undef (parse_in
, "__tune_alderlake__");
408 case PROCESSOR_INTEL
:
409 case PROCESSOR_GENERIC
:
411 /* use PROCESSOR_max to not set/unset the tune macro. */
420 def_or_undef (parse_in
, "__code_model_small__");
424 def_or_undef (parse_in
, "__code_model_medium__");
428 def_or_undef (parse_in
, "__code_model_large__");
431 def_or_undef (parse_in
, "__code_model_32__");
434 def_or_undef (parse_in
, "__code_model_kernel__");
440 if (isa_flag2
& OPTION_MASK_ISA2_WBNOINVD
)
441 def_or_undef (parse_in
, "__WBNOINVD__");
442 if (isa_flag2
& OPTION_MASK_ISA2_AVX512VP2INTERSECT
)
443 def_or_undef (parse_in
, "__AVX512VP2INTERSECT__");
444 if (isa_flag
& OPTION_MASK_ISA_MMX
)
445 def_or_undef (parse_in
, "__MMX__");
446 if (isa_flag
& OPTION_MASK_ISA_3DNOW
)
447 def_or_undef (parse_in
, "__3dNOW__");
448 if (isa_flag
& OPTION_MASK_ISA_3DNOW_A
)
449 def_or_undef (parse_in
, "__3dNOW_A__");
450 if (isa_flag
& OPTION_MASK_ISA_SSE
)
451 def_or_undef (parse_in
, "__SSE__");
452 if (isa_flag
& OPTION_MASK_ISA_SSE2
)
453 def_or_undef (parse_in
, "__SSE2__");
454 if (isa_flag
& OPTION_MASK_ISA_SSE3
)
455 def_or_undef (parse_in
, "__SSE3__");
456 if (isa_flag
& OPTION_MASK_ISA_SSSE3
)
457 def_or_undef (parse_in
, "__SSSE3__");
458 if (isa_flag
& OPTION_MASK_ISA_SSE4_1
)
459 def_or_undef (parse_in
, "__SSE4_1__");
460 if (isa_flag
& OPTION_MASK_ISA_SSE4_2
)
461 def_or_undef (parse_in
, "__SSE4_2__");
462 if (isa_flag
& OPTION_MASK_ISA_AES
)
463 def_or_undef (parse_in
, "__AES__");
464 if (isa_flag
& OPTION_MASK_ISA_SHA
)
465 def_or_undef (parse_in
, "__SHA__");
466 if (isa_flag
& OPTION_MASK_ISA_PCLMUL
)
467 def_or_undef (parse_in
, "__PCLMUL__");
468 if (isa_flag
& OPTION_MASK_ISA_AVX
)
469 def_or_undef (parse_in
, "__AVX__");
470 if (isa_flag
& OPTION_MASK_ISA_AVX2
)
471 def_or_undef (parse_in
, "__AVX2__");
472 if (isa_flag
& OPTION_MASK_ISA_AVX512F
)
473 def_or_undef (parse_in
, "__AVX512F__");
474 if (isa_flag
& OPTION_MASK_ISA_AVX512ER
)
475 def_or_undef (parse_in
, "__AVX512ER__");
476 if (isa_flag
& OPTION_MASK_ISA_AVX512CD
)
477 def_or_undef (parse_in
, "__AVX512CD__");
478 if (isa_flag
& OPTION_MASK_ISA_AVX512PF
)
479 def_or_undef (parse_in
, "__AVX512PF__");
480 if (isa_flag
& OPTION_MASK_ISA_AVX512DQ
)
481 def_or_undef (parse_in
, "__AVX512DQ__");
482 if (isa_flag
& OPTION_MASK_ISA_AVX512BW
)
483 def_or_undef (parse_in
, "__AVX512BW__");
484 if (isa_flag
& OPTION_MASK_ISA_AVX512VL
)
485 def_or_undef (parse_in
, "__AVX512VL__");
486 if (isa_flag
& OPTION_MASK_ISA_AVX512VBMI
)
487 def_or_undef (parse_in
, "__AVX512VBMI__");
488 if (isa_flag
& OPTION_MASK_ISA_AVX512IFMA
)
489 def_or_undef (parse_in
, "__AVX512IFMA__");
490 if (isa_flag2
& OPTION_MASK_ISA2_AVX5124VNNIW
)
491 def_or_undef (parse_in
, "__AVX5124VNNIW__");
492 if (isa_flag
& OPTION_MASK_ISA_AVX512VBMI2
)
493 def_or_undef (parse_in
, "__AVX512VBMI2__");
494 if (isa_flag
& OPTION_MASK_ISA_AVX512VNNI
)
495 def_or_undef (parse_in
, "__AVX512VNNI__");
496 if (isa_flag2
& OPTION_MASK_ISA2_PCONFIG
)
497 def_or_undef (parse_in
, "__PCONFIG__");
498 if (isa_flag2
& OPTION_MASK_ISA2_SGX
)
499 def_or_undef (parse_in
, "__SGX__");
500 if (isa_flag2
& OPTION_MASK_ISA2_AVX5124FMAPS
)
501 def_or_undef (parse_in
, "__AVX5124FMAPS__");
502 if (isa_flag
& OPTION_MASK_ISA_AVX512BITALG
)
503 def_or_undef (parse_in
, "__AVX512BITALG__");
504 if (isa_flag
& OPTION_MASK_ISA_AVX512VPOPCNTDQ
)
505 def_or_undef (parse_in
, "__AVX512VPOPCNTDQ__");
506 if (isa_flag
& OPTION_MASK_ISA_FMA
)
507 def_or_undef (parse_in
, "__FMA__");
508 if (isa_flag
& OPTION_MASK_ISA_RTM
)
509 def_or_undef (parse_in
, "__RTM__");
510 if (isa_flag
& OPTION_MASK_ISA_SSE4A
)
511 def_or_undef (parse_in
, "__SSE4A__");
512 if (isa_flag
& OPTION_MASK_ISA_FMA4
)
513 def_or_undef (parse_in
, "__FMA4__");
514 if (isa_flag
& OPTION_MASK_ISA_XOP
)
515 def_or_undef (parse_in
, "__XOP__");
516 if (isa_flag
& OPTION_MASK_ISA_LWP
)
517 def_or_undef (parse_in
, "__LWP__");
518 if (isa_flag
& OPTION_MASK_ISA_ABM
)
519 def_or_undef (parse_in
, "__ABM__");
520 if (isa_flag
& OPTION_MASK_ISA_BMI
)
521 def_or_undef (parse_in
, "__BMI__");
522 if (isa_flag
& OPTION_MASK_ISA_BMI2
)
523 def_or_undef (parse_in
, "__BMI2__");
524 if (isa_flag
& OPTION_MASK_ISA_LZCNT
)
525 def_or_undef (parse_in
, "__LZCNT__");
526 if (isa_flag
& OPTION_MASK_ISA_TBM
)
527 def_or_undef (parse_in
, "__TBM__");
528 if (isa_flag
& OPTION_MASK_ISA_POPCNT
)
529 def_or_undef (parse_in
, "__POPCNT__");
530 if (isa_flag
& OPTION_MASK_ISA_FSGSBASE
)
531 def_or_undef (parse_in
, "__FSGSBASE__");
532 if (isa_flag
& OPTION_MASK_ISA_RDRND
)
533 def_or_undef (parse_in
, "__RDRND__");
534 if (isa_flag
& OPTION_MASK_ISA_F16C
)
535 def_or_undef (parse_in
, "__F16C__");
536 if (isa_flag
& OPTION_MASK_ISA_RDSEED
)
537 def_or_undef (parse_in
, "__RDSEED__");
538 if (isa_flag
& OPTION_MASK_ISA_PRFCHW
)
539 def_or_undef (parse_in
, "__PRFCHW__");
540 if (isa_flag
& OPTION_MASK_ISA_ADX
)
541 def_or_undef (parse_in
, "__ADX__");
542 if (isa_flag
& OPTION_MASK_ISA_FXSR
)
543 def_or_undef (parse_in
, "__FXSR__");
544 if (isa_flag
& OPTION_MASK_ISA_XSAVE
)
545 def_or_undef (parse_in
, "__XSAVE__");
546 if (isa_flag
& OPTION_MASK_ISA_XSAVEOPT
)
547 def_or_undef (parse_in
, "__XSAVEOPT__");
548 if (isa_flag
& OPTION_MASK_ISA_PREFETCHWT1
)
549 def_or_undef (parse_in
, "__PREFETCHWT1__");
550 if ((fpmath
& FPMATH_SSE
) && (isa_flag
& OPTION_MASK_ISA_SSE
))
551 def_or_undef (parse_in
, "__SSE_MATH__");
552 if ((fpmath
& FPMATH_SSE
) && (isa_flag
& OPTION_MASK_ISA_SSE2
))
553 def_or_undef (parse_in
, "__SSE2_MATH__");
554 if (isa_flag
& OPTION_MASK_ISA_CLFLUSHOPT
)
555 def_or_undef (parse_in
, "__CLFLUSHOPT__");
556 if (isa_flag2
& OPTION_MASK_ISA2_CLZERO
)
557 def_or_undef (parse_in
, "__CLZERO__");
558 if (isa_flag
& OPTION_MASK_ISA_XSAVEC
)
559 def_or_undef (parse_in
, "__XSAVEC__");
560 if (isa_flag
& OPTION_MASK_ISA_XSAVES
)
561 def_or_undef (parse_in
, "__XSAVES__");
562 if (isa_flag
& OPTION_MASK_ISA_CLWB
)
563 def_or_undef (parse_in
, "__CLWB__");
564 if (isa_flag2
& OPTION_MASK_ISA2_MWAITX
)
565 def_or_undef (parse_in
, "__MWAITX__");
566 if (isa_flag
& OPTION_MASK_ISA_PKU
)
567 def_or_undef (parse_in
, "__PKU__");
568 if (isa_flag2
& OPTION_MASK_ISA2_RDPID
)
569 def_or_undef (parse_in
, "__RDPID__");
570 if (isa_flag
& OPTION_MASK_ISA_GFNI
)
571 def_or_undef (parse_in
, "__GFNI__");
572 if ((isa_flag
& OPTION_MASK_ISA_SHSTK
))
573 def_or_undef (parse_in
, "__SHSTK__");
574 if (isa_flag2
& OPTION_MASK_ISA2_VAES
)
575 def_or_undef (parse_in
, "__VAES__");
576 if (isa_flag
& OPTION_MASK_ISA_VPCLMULQDQ
)
577 def_or_undef (parse_in
, "__VPCLMULQDQ__");
578 if (isa_flag
& OPTION_MASK_ISA_MOVDIRI
)
579 def_or_undef (parse_in
, "__MOVDIRI__");
580 if (isa_flag2
& OPTION_MASK_ISA2_MOVDIR64B
)
581 def_or_undef (parse_in
, "__MOVDIR64B__");
582 if (isa_flag2
& OPTION_MASK_ISA2_WAITPKG
)
583 def_or_undef (parse_in
, "__WAITPKG__");
584 if (isa_flag2
& OPTION_MASK_ISA2_CLDEMOTE
)
585 def_or_undef (parse_in
, "__CLDEMOTE__");
586 if (isa_flag2
& OPTION_MASK_ISA2_SERIALIZE
)
587 def_or_undef (parse_in
, "__SERIALIZE__");
588 if (isa_flag2
& OPTION_MASK_ISA2_PTWRITE
)
589 def_or_undef (parse_in
, "__PTWRITE__");
590 if (isa_flag2
& OPTION_MASK_ISA2_AVX512BF16
)
591 def_or_undef (parse_in
, "__AVX512BF16__");
592 if (TARGET_MMX_WITH_SSE
)
593 def_or_undef (parse_in
, "__MMX_WITH_SSE__");
594 if (isa_flag2
& OPTION_MASK_ISA2_ENQCMD
)
595 def_or_undef (parse_in
, "__ENQCMD__");
596 if (isa_flag2
& OPTION_MASK_ISA2_TSXLDTRK
)
597 def_or_undef (parse_in
, "__TSXLDTRK__");
598 if (isa_flag2
& OPTION_MASK_ISA2_AMX_TILE
)
599 def_or_undef (parse_in
, "__AMX_TILE__");
600 if (isa_flag2
& OPTION_MASK_ISA2_AMX_INT8
)
601 def_or_undef (parse_in
, "__AMX_INT8__");
602 if (isa_flag2
& OPTION_MASK_ISA2_AMX_BF16
)
603 def_or_undef (parse_in
, "__AMX_BF16__");
604 if (isa_flag
& OPTION_MASK_ISA_SAHF
)
605 def_or_undef (parse_in
, "__LAHF_SAHF__");
606 if (isa_flag2
& OPTION_MASK_ISA2_MOVBE
)
607 def_or_undef (parse_in
, "__MOVBE__");
608 if (isa_flag2
& OPTION_MASK_ISA2_UINTR
)
609 def_or_undef (parse_in
, "__UINTR__");
610 if (isa_flag2
& OPTION_MASK_ISA2_HRESET
)
611 def_or_undef (parse_in
, "__HRESET__");
612 if (isa_flag2
& OPTION_MASK_ISA2_KL
)
613 def_or_undef (parse_in
, "__KL__");
614 if (isa_flag2
& OPTION_MASK_ISA2_WIDEKL
)
615 def_or_undef (parse_in
, "__WIDEKL__");
616 if (isa_flag2
& OPTION_MASK_ISA2_AVXVNNI
)
617 def_or_undef (parse_in
, "__AVXVNNI__");
620 def_or_undef (parse_in
, "__iamcu");
621 def_or_undef (parse_in
, "__iamcu__");
626 /* Hook to validate the current #pragma GCC target and set the state, and
627 update the macros based on what was changed. If ARGS is NULL, then
628 POP_TARGET is used to reset the options. */
631 ix86_pragma_target_parse (tree args
, tree pop_target
)
634 = build_target_option_node (&global_options
, &global_options_set
);
636 struct cl_target_option
*prev_opt
;
637 struct cl_target_option
*cur_opt
;
638 HOST_WIDE_INT prev_isa
;
639 HOST_WIDE_INT cur_isa
;
640 HOST_WIDE_INT diff_isa
;
641 HOST_WIDE_INT prev_isa2
;
642 HOST_WIDE_INT cur_isa2
;
643 HOST_WIDE_INT diff_isa2
;
644 enum processor_type prev_arch
;
645 enum processor_type prev_tune
;
646 enum processor_type cur_arch
;
647 enum processor_type cur_tune
;
651 cur_tree
= (pop_target
? pop_target
: target_option_default_node
);
652 cl_target_option_restore (&global_options
, &global_options_set
,
653 TREE_TARGET_OPTION (cur_tree
));
657 cur_tree
= ix86_valid_target_attribute_tree (NULL_TREE
, args
,
659 &global_options_set
, 0);
660 if (!cur_tree
|| cur_tree
== error_mark_node
)
662 cl_target_option_restore (&global_options
, &global_options_set
,
663 TREE_TARGET_OPTION (prev_tree
));
668 target_option_current_node
= cur_tree
;
669 ix86_reset_previous_fndecl ();
671 /* Figure out the previous/current isa, arch, tune and the differences. */
672 prev_opt
= TREE_TARGET_OPTION (prev_tree
);
673 cur_opt
= TREE_TARGET_OPTION (cur_tree
);
674 prev_isa
= prev_opt
->x_ix86_isa_flags
;
675 cur_isa
= cur_opt
->x_ix86_isa_flags
;
676 diff_isa
= (prev_isa
^ cur_isa
);
677 prev_isa2
= prev_opt
->x_ix86_isa_flags2
;
678 cur_isa2
= cur_opt
->x_ix86_isa_flags2
;
679 diff_isa2
= (prev_isa2
^ cur_isa2
);
680 prev_arch
= (enum processor_type
) prev_opt
->arch
;
681 prev_tune
= (enum processor_type
) prev_opt
->tune
;
682 cur_arch
= (enum processor_type
) cur_opt
->arch
;
683 cur_tune
= (enum processor_type
) cur_opt
->tune
;
685 /* If the same processor is used for both previous and current options, don't
686 change the macros. */
687 if (cur_arch
== prev_arch
)
688 cur_arch
= prev_arch
= PROCESSOR_max
;
690 if (cur_tune
== prev_tune
)
691 cur_tune
= prev_tune
= PROCESSOR_max
;
693 /* Undef all of the macros for that are no longer current. */
694 ix86_target_macros_internal (prev_isa
& diff_isa
,
695 prev_isa2
& diff_isa2
,
698 (enum fpmath_unit
) prev_opt
->x_ix86_fpmath
,
701 /* For the definitions, ensure all newly defined macros are considered
702 as used for -Wunused-macros. There is no point warning about the
703 compiler predefined macros. */
704 cpp_options
*cpp_opts
= cpp_get_options (parse_in
);
705 unsigned char saved_warn_unused_macros
= cpp_opts
->warn_unused_macros
;
706 cpp_opts
->warn_unused_macros
= 0;
708 /* Define all of the macros for new options that were just turned on. */
709 ix86_target_macros_internal (cur_isa
& diff_isa
,
710 cur_isa2
& diff_isa2
,
713 (enum fpmath_unit
) cur_opt
->x_ix86_fpmath
,
716 cpp_opts
->warn_unused_macros
= saved_warn_unused_macros
;
721 /* Function to tell the preprocessor about the defines for the current target. */
724 ix86_target_macros (void)
726 /* 32/64-bit won't change with target specific options, so do the assert and
727 builtin_define_std calls here. */
730 cpp_assert (parse_in
, "cpu=x86_64");
731 cpp_assert (parse_in
, "machine=x86_64");
732 cpp_define (parse_in
, "__amd64");
733 cpp_define (parse_in
, "__amd64__");
734 cpp_define (parse_in
, "__x86_64");
735 cpp_define (parse_in
, "__x86_64__");
738 cpp_define (parse_in
, "_ILP32");
739 cpp_define (parse_in
, "__ILP32__");
744 cpp_assert (parse_in
, "cpu=i386");
745 cpp_assert (parse_in
, "machine=i386");
746 builtin_define_std ("i386");
747 cpp_define (parse_in
, "_ILP32");
748 cpp_define (parse_in
, "__ILP32__");
752 cpp_define (parse_in
, "_SOFT_FLOAT");
754 if (TARGET_LONG_DOUBLE_64
)
755 cpp_define (parse_in
, "__LONG_DOUBLE_64__");
757 if (TARGET_LONG_DOUBLE_128
)
758 cpp_define (parse_in
, "__LONG_DOUBLE_128__");
760 if (TARGET_128BIT_LONG_DOUBLE
)
761 cpp_define (parse_in
, "__SIZEOF_FLOAT80__=16");
763 cpp_define (parse_in
, "__SIZEOF_FLOAT80__=12");
765 cpp_define (parse_in
, "__SIZEOF_FLOAT128__=16");
767 cpp_define_formatted (parse_in
, "__ATOMIC_HLE_ACQUIRE=%d", IX86_HLE_ACQUIRE
);
768 cpp_define_formatted (parse_in
, "__ATOMIC_HLE_RELEASE=%d", IX86_HLE_RELEASE
);
770 cpp_define (parse_in
, "__GCC_ASM_FLAG_OUTPUTS__");
772 ix86_target_macros_internal (ix86_isa_flags
,
779 cpp_define (parse_in
, "__SEG_FS");
780 cpp_define (parse_in
, "__SEG_GS");
782 if (flag_cf_protection
!= CF_NONE
)
783 cpp_define_formatted (parse_in
, "__CET__=%d",
784 flag_cf_protection
& ~CF_SET
);
788 /* Register target pragmas. We need to add the hook for parsing #pragma GCC
789 option here rather than in i386.c since it will pull in various preprocessor
790 functions, and those are not present in languages like fortran without a
794 ix86_register_pragmas (void)
796 /* Update pragma hook to allow parsing #pragma GCC target. */
797 targetm
.target_option
.pragma_parse
= ix86_pragma_target_parse
;
799 c_register_addr_space ("__seg_fs", ADDR_SPACE_SEG_FS
);
800 c_register_addr_space ("__seg_gs", ADDR_SPACE_SEG_GS
);
802 #ifdef REGISTER_SUBTARGET_PRAGMAS
803 REGISTER_SUBTARGET_PRAGMAS ();