gcc/config/i386/i386.opt

   1 ; Options for the IA-32 and AMD64 ports of the compiler.
   2
   3 ; Copyright (C) 2005-2014 Free Software Foundation, Inc.
   4 ;
   5 ; This file is part of GCC.
   6 ;
   7 ; GCC is free software; you can redistribute it and/or modify it under
   8 ; the terms of the GNU General Public License as published by the Free
   9 ; Software Foundation; either version 3, or (at your option) any later
  10 ; version.
  11 ;
  12 ; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
  13 ; WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14 ; FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  15 ; for more details.
  16 ;
  17 ; You should have received a copy of the GNU General Public License
  18 ; along with GCC; see the file COPYING3.  If not see
  19 ; <http://www.gnu.org/licenses/>.
  20
  21 HeaderInclude
  22 config/i386/i386-opts.h
  23
  24 ; Bit flags that specify the ISA we are compiling for.
  25 Variable
  26 HOST_WIDE_INT ix86_isa_flags = TARGET_64BIT_DEFAULT | TARGET_SUBTARGET_ISA_DEFAULT
  27
  28 ; A mask of ix86_isa_flags that includes bit X if X was set or cleared
  29 ; on the command line.
  30 Variable
  31 HOST_WIDE_INT ix86_isa_flags_explicit
  32
  33 TargetVariable
  34 int recip_mask = RECIP_MASK_DEFAULT
  35
  36 Variable
  37 int recip_mask_explicit
  38
  39 TargetSave
  40 int x_recip_mask_explicit
  41
  42 ;; Definitions to add to the cl_target_option structure
  43 ;; -march= processor
  44 TargetSave
  45 unsigned char arch
  46
  47 ;; -mtune= processor
  48 TargetSave
  49 unsigned char tune
  50
  51 ;; -march= processor-string
  52 TargetSave
  53 const char *x_ix86_arch_string
  54
  55 ;; -mtune= processor-string
  56 TargetSave
  57 const char *x_ix86_tune_string
  58
  59 ;; CPU schedule model
  60 TargetSave
  61 unsigned char schedule
  62
  63 ;; branch cost
  64 TargetSave
  65 unsigned char branch_cost
  66
  67 ;; which flags were passed by the user
  68 TargetSave
  69 HOST_WIDE_INT x_ix86_isa_flags_explicit
  70
  71 ;; which flags were passed by the user
  72 Variable
  73 int ix86_target_flags_explicit
  74
  75 ;; which flags were passed by the user
  76 TargetSave
  77 HOST_WIDE_INT x_ix86_target_flags_explicit
  78
  79 ;; whether -mtune was not specified
  80 TargetSave
  81 unsigned char tune_defaulted
  82
  83 ;; whether -march was specified
  84 TargetSave
  85 unsigned char arch_specified
  86
  87 ;; -mcmodel= model
  88 TargetSave
  89 enum cmodel x_ix86_cmodel
  90
  91 ;; -mabi=
  92 TargetSave
  93 enum calling_abi x_ix86_abi
  94
  95 ;; -masm=
  96 TargetSave
  97 enum asm_dialect x_ix86_asm_dialect
  98
  99 ;; -mbranch-cost=
 100 TargetSave
 101 int x_ix86_branch_cost
 102
 103 ;; -mdump-tune-features=
 104 TargetSave
 105 int x_ix86_dump_tunes
 106
 107 ;; -mstackrealign=
 108 TargetSave
 109 int x_ix86_force_align_arg_pointer
 110
 111 ;; -mforce-drap=
 112 TargetSave
 113 int x_ix86_force_drap
 114
 115 ;; -mincoming-stack-boundary=
 116 TargetSave
 117 int x_ix86_incoming_stack_boundary_arg
 118
 119 ;; -maddress-mode=
 120 TargetSave
 121 enum pmode x_ix86_pmode
 122
 123 ;; -mpreferred-stack-boundary=
 124 TargetSave
 125 int x_ix86_preferred_stack_boundary_arg
 126
 127 ;; -mrecip=
 128 TargetSave
 129 const char *x_ix86_recip_name
 130
 131 ;; -mregparm=
 132 TargetSave
 133 int x_ix86_regparm
 134
 135 ;; -mlarge-data-threshold=
 136 TargetSave
 137 int x_ix86_section_threshold
 138
 139 ;; -msse2avx=
 140 TargetSave
 141 int x_ix86_sse2avx
 142
 143 ;; -mstack-protector-guard=
 144 TargetSave
 145 enum stack_protector_guard x_ix86_stack_protector_guard
 146
 147 ;; -mstringop-strategy=
 148 TargetSave
 149 enum stringop_alg x_ix86_stringop_alg
 150
 151 ;; -mtls-dialect=
 152 TargetSave
 153 enum tls_dialect x_ix86_tls_dialect
 154
 155 ;; -mtune-ctrl=
 156 TargetSave
 157 const char *x_ix86_tune_ctrl_string
 158
 159 ;; -mmemcpy-strategy=
 160 TargetSave
 161 const char *x_ix86_tune_memcpy_strategy
 162
 163 ;; -mmemset-strategy=
 164 TargetSave
 165 const char *x_ix86_tune_memset_strategy
 166
 167 ;; -mno-default=
 168 TargetSave
 169 int x_ix86_tune_no_default
 170
 171 ;; -mveclibabi=
 172 TargetSave
 173 enum ix86_veclibabi x_ix86_veclibabi_type
 174
 175 ;; x86 options
 176 m128bit-long-double
 177 Target RejectNegative Report Mask(128BIT_LONG_DOUBLE) Save
 178 sizeof(long double) is 16
 179
 180 m80387
 181 Target Report Mask(80387) Save
 182 Use hardware fp
 183
 184 m96bit-long-double
 185 Target RejectNegative Report InverseMask(128BIT_LONG_DOUBLE) Save
 186 sizeof(long double) is 12
 187
 188 mlong-double-80
 189 Target Report RejectNegative Negative(mlong-double-64) InverseMask(LONG_DOUBLE_64) Save
 190 Use 80-bit long double
 191
 192 mlong-double-64
 193 Target Report RejectNegative Negative(mlong-double-128) Mask(LONG_DOUBLE_64) InverseMask(LONG_DOUBLE_128) Save
 194 Use 64-bit long double
 195
 196 mlong-double-128
 197 Target Report RejectNegative Negative(mlong-double-80) Mask(LONG_DOUBLE_128) InverseMask(LONG_DOUBLE_64) Save
 198 Use 128-bit long double
 199
 200 maccumulate-outgoing-args
 201 Target Report Mask(ACCUMULATE_OUTGOING_ARGS) Save
 202 Reserve space for outgoing arguments in the function prologue
 203
 204 malign-double
 205 Target Report Mask(ALIGN_DOUBLE) Save
 206 Align some doubles on dword boundary
 207
 208 malign-functions=
 209 Target RejectNegative Joined UInteger
 210 Function starts are aligned to this power of 2
 211
 212 malign-jumps=
 213 Target RejectNegative Joined UInteger
 214 Jump targets are aligned to this power of 2
 215
 216 malign-loops=
 217 Target RejectNegative Joined UInteger
 218 Loop code aligned to this power of 2
 219
 220 malign-stringops
 221 Target RejectNegative Report InverseMask(NO_ALIGN_STRINGOPS, ALIGN_STRINGOPS) Save
 222 Align destination of the string operations
 223
 224 march=
 225 Target RejectNegative Joined Var(ix86_arch_string)
 226 Generate code for given CPU
 227
 228 masm=
 229 Target RejectNegative Joined Enum(asm_dialect) Var(ix86_asm_dialect) Init(ASM_ATT)
 230 Use given assembler dialect
 231
 232 Enum
 233 Name(asm_dialect) Type(enum asm_dialect)
 234 Known assembler dialects (for use with the -masm-dialect= option):
 235
 236 EnumValue
 237 Enum(asm_dialect) String(intel) Value(ASM_INTEL)
 238
 239 EnumValue
 240 Enum(asm_dialect) String(att) Value(ASM_ATT)
 241
 242 mbranch-cost=
 243 Target RejectNegative Joined UInteger Var(ix86_branch_cost)
 244 Branches are this expensive (1-5, arbitrary units)
 245
 246 mlarge-data-threshold=
 247 Target RejectNegative Joined UInteger Var(ix86_section_threshold) Init(DEFAULT_LARGE_SECTION_THRESHOLD)
 248 Data greater than given threshold will go into .ldata section in x86-64 medium model
 249
 250 mcmodel=
 251 Target RejectNegative Joined Enum(cmodel) Var(ix86_cmodel) Init(CM_32)
 252 Use given x86-64 code model
 253
 254 Enum
 255 Name(cmodel) Type(enum cmodel)
 256 Known code models (for use with the -mcmodel= option):
 257
 258 EnumValue
 259 Enum(cmodel) String(small) Value(CM_SMALL)
 260
 261 EnumValue
 262 Enum(cmodel) String(medium) Value(CM_MEDIUM)
 263
 264 EnumValue
 265 Enum(cmodel) String(large) Value(CM_LARGE)
 266
 267 EnumValue
 268 Enum(cmodel) String(32) Value(CM_32)
 269
 270 EnumValue
 271 Enum(cmodel) String(kernel) Value(CM_KERNEL)
 272
 273 maddress-mode=
 274 Target RejectNegative Joined Enum(pmode) Var(ix86_pmode) Init(PMODE_SI)
 275 Use given address mode
 276
 277 Enum
 278 Name(pmode) Type(enum pmode)
 279 Known address mode (for use with the -maddress-mode= option):
 280
 281 EnumValue
 282 Enum(pmode) String(short) Value(PMODE_SI)
 283
 284 EnumValue
 285 Enum(pmode) String(long) Value(PMODE_DI)
 286
 287 mcpu=
 288 Target RejectNegative Joined Undocumented Alias(mtune=) Warn(%<-mcpu=%> is deprecated; use %<-mtune=%> or %<-march=%> instead)
 289
 290 mfancy-math-387
 291 Target RejectNegative Report InverseMask(NO_FANCY_MATH_387, USE_FANCY_MATH_387) Save
 292 Generate sin, cos, sqrt for FPU
 293
 294 mforce-drap
 295 Target Report Var(ix86_force_drap)
 296 Always use Dynamic Realigned Argument Pointer (DRAP) to realign stack
 297
 298 mfp-ret-in-387
 299 Target Report Mask(FLOAT_RETURNS) Save
 300 Return values of functions in FPU registers
 301
 302 mfpmath=
 303 Target RejectNegative Joined Var(ix86_fpmath) Enum(fpmath_unit) Init(FPMATH_387) Save
 304 Generate floating point mathematics using given instruction set
 305
 306 Enum
 307 Name(fpmath_unit) Type(enum fpmath_unit)
 308 Valid arguments to -mfpmath=:
 309
 310 EnumValue
 311 Enum(fpmath_unit) String(387) Value(FPMATH_387)
 312
 313 EnumValue
 314 Enum(fpmath_unit) String(sse) Value(FPMATH_SSE)
 315
 316 EnumValue
 317 Enum(fpmath_unit) String(387,sse) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)})
 318
 319 EnumValue
 320 Enum(fpmath_unit) String(387+sse) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)})
 321
 322 EnumValue
 323 Enum(fpmath_unit) String(sse,387) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)})
 324
 325 EnumValue
 326 Enum(fpmath_unit) String(sse+387) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)})
 327
 328 EnumValue
 329 Enum(fpmath_unit) String(both) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)})
 330
 331 mhard-float
 332 Target RejectNegative Mask(80387) Save
 333 Use hardware fp
 334
 335 mieee-fp
 336 Target Report Mask(IEEE_FP) Save
 337 Use IEEE math for fp comparisons
 338
 339 minline-all-stringops
 340 Target Report Mask(INLINE_ALL_STRINGOPS) Save
 341 Inline all known string operations
 342
 343 minline-stringops-dynamically
 344 Target Report Mask(INLINE_STRINGOPS_DYNAMICALLY) Save
 345 Inline memset/memcpy string operations, but perform inline version only for small blocks
 346
 347 mintel-syntax
 348 Target Undocumented Alias(masm=, intel, att) Warn(%<-mintel-syntax%> and %<-mno-intel-syntax%> are deprecated; use %<-masm=intel%> and %<-masm=att%> instead)
 349 ;; Deprecated
 350
 351 mms-bitfields
 352 Target Report Mask(MS_BITFIELD_LAYOUT) Save
 353 Use native (MS) bitfield layout
 354
 355 mno-align-stringops
 356 Target RejectNegative Report Mask(NO_ALIGN_STRINGOPS) Undocumented Save
 357
 358 mno-fancy-math-387
 359 Target RejectNegative Report Mask(NO_FANCY_MATH_387) Undocumented Save
 360
 361 mno-push-args
 362 Target RejectNegative Report Mask(NO_PUSH_ARGS) Undocumented Save
 363
 364 mno-red-zone
 365 Target RejectNegative Report Mask(NO_RED_ZONE) Undocumented Save
 366
 367 momit-leaf-frame-pointer
 368 Target Report Mask(OMIT_LEAF_FRAME_POINTER) Save
 369 Omit the frame pointer in leaf functions
 370
 371 mpc32
 372 Target RejectNegative Report
 373 Set 80387 floating-point precision to 32-bit
 374
 375 mpc64
 376 Target RejectNegative Report
 377 Set 80387 floating-point precision to 64-bit
 378
 379 mpc80
 380 Target RejectNegative Report
 381 Set 80387 floating-point precision to 80-bit
 382
 383 mpreferred-stack-boundary=
 384 Target RejectNegative Joined UInteger Var(ix86_preferred_stack_boundary_arg)
 385 Attempt to keep stack aligned to this power of 2
 386
 387 mincoming-stack-boundary=
 388 Target RejectNegative Joined UInteger Var(ix86_incoming_stack_boundary_arg)
 389 Assume incoming stack aligned to this power of 2
 390
 391 mpush-args
 392 Target Report InverseMask(NO_PUSH_ARGS, PUSH_ARGS) Save
 393 Use push instructions to save outgoing arguments
 394
 395 mred-zone
 396 Target RejectNegative Report InverseMask(NO_RED_ZONE, RED_ZONE) Save
 397 Use red-zone in the x86-64 code
 398
 399 mregparm=
 400 Target RejectNegative Joined UInteger Var(ix86_regparm)
 401 Number of registers used to pass integer arguments
 402
 403 mrtd
 404 Target Report Mask(RTD) Save
 405 Alternate calling convention
 406
 407 msoft-float
 408 Target InverseMask(80387) Save
 409 Do not use hardware fp
 410
 411 msseregparm
 412 Target RejectNegative Mask(SSEREGPARM) Save
 413 Use SSE register passing conventions for SF and DF mode
 414
 415 mstackrealign
 416 Target Report Var(ix86_force_align_arg_pointer) Init(-1)
 417 Realign stack in prologue
 418
 419 mstack-arg-probe
 420 Target Report Mask(STACK_PROBE) Save
 421 Enable stack probing
 422
 423 mmemcpy-strategy=
 424 Target RejectNegative Joined Var(ix86_tune_memcpy_strategy)
 425 Specify memcpy expansion strategy when expected size is known
 426
 427 mmemset-strategy=
 428 Target RejectNegative Joined Var(ix86_tune_memset_strategy)
 429 Specify memset expansion strategy when expected size is known
 430
 431 mstringop-strategy=
 432 Target RejectNegative Joined Enum(stringop_alg) Var(ix86_stringop_alg) Init(no_stringop)
 433 Chose strategy to generate stringop using
 434
 435 Enum
 436 Name(stringop_alg) Type(enum stringop_alg)
 437 Valid arguments to -mstringop-strategy=:
 438
 439 EnumValue
 440 Enum(stringop_alg) String(rep_byte) Value(rep_prefix_1_byte)
 441
 442 EnumValue
 443 Enum(stringop_alg) String(libcall) Value(libcall)
 444
 445 EnumValue
 446 Enum(stringop_alg) String(rep_4byte) Value(rep_prefix_4_byte)
 447
 448 EnumValue
 449 Enum(stringop_alg) String(rep_8byte) Value(rep_prefix_8_byte)
 450
 451 EnumValue
 452 Enum(stringop_alg) String(byte_loop) Value(loop_1_byte)
 453
 454 EnumValue
 455 Enum(stringop_alg) String(loop) Value(loop)
 456
 457 EnumValue
 458 Enum(stringop_alg) String(unrolled_loop) Value(unrolled_loop)
 459
 460 EnumValue
 461 Enum(stringop_alg) String(vector_loop) Value(vector_loop)
 462
 463 mtls-dialect=
 464 Target RejectNegative Joined Var(ix86_tls_dialect) Enum(tls_dialect) Init(TLS_DIALECT_GNU)
 465 Use given thread-local storage dialect
 466
 467 Enum
 468 Name(tls_dialect) Type(enum tls_dialect)
 469 Known TLS dialects (for use with the -mtls-dialect= option):
 470
 471 EnumValue
 472 Enum(tls_dialect) String(gnu) Value(TLS_DIALECT_GNU)
 473
 474 EnumValue
 475 Enum(tls_dialect) String(gnu2) Value(TLS_DIALECT_GNU2)
 476
 477 mtls-direct-seg-refs
 478 Target Report Mask(TLS_DIRECT_SEG_REFS)
 479 Use direct references against %gs when accessing tls data
 480
 481 mtune=
 482 Target RejectNegative Joined Var(ix86_tune_string)
 483 Schedule code for given CPU
 484
 485 mtune-ctrl=
 486 Target RejectNegative Joined Var(ix86_tune_ctrl_string)
 487 Fine grain control of tune features
 488
 489 mno-default
 490 Target RejectNegative Var(ix86_tune_no_default) Init(0)
 491 Clear all tune features
 492
 493 mdump-tune-features
 494 Target RejectNegative Var(ix86_dump_tunes) Init(0)
 495
 496 mabi=
 497 Target RejectNegative Joined Var(ix86_abi) Enum(calling_abi) Init(SYSV_ABI)
 498 Generate code that conforms to the given ABI
 499
 500 Enum
 501 Name(calling_abi) Type(enum calling_abi)
 502 Known ABIs (for use with the -mabi= option):
 503
 504 EnumValue
 505 Enum(calling_abi) String(sysv) Value(SYSV_ABI)
 506
 507 EnumValue
 508 Enum(calling_abi) String(ms) Value(MS_ABI)
 509
 510 mveclibabi=
 511 Target RejectNegative Joined Var(ix86_veclibabi_type) Enum(ix86_veclibabi) Init(ix86_veclibabi_type_none)
 512 Vector library ABI to use
 513
 514 Enum
 515 Name(ix86_veclibabi) Type(enum ix86_veclibabi)
 516 Known vectorization library ABIs (for use with the -mveclibabi= option):
 517
 518 EnumValue
 519 Enum(ix86_veclibabi) String(svml) Value(ix86_veclibabi_type_svml)
 520
 521 EnumValue
 522 Enum(ix86_veclibabi) String(acml) Value(ix86_veclibabi_type_acml)
 523
 524 mvect8-ret-in-mem
 525 Target Report Mask(VECT8_RETURNS) Save
 526 Return 8-byte vectors in memory
 527
 528 mrecip
 529 Target Report Mask(RECIP) Save
 530 Generate reciprocals instead of divss and sqrtss.
 531
 532 mrecip=
 533 Target Report RejectNegative Joined Var(ix86_recip_name)
 534 Control generation of reciprocal estimates.
 535
 536 mcld
 537 Target Report Mask(CLD) Save
 538 Generate cld instruction in the function prologue.
 539
 540 mvzeroupper
 541 Target Report Mask(VZEROUPPER) Save
 542 Generate vzeroupper instruction before a transfer of control flow out of
 543 the function.
 544
 545 mdispatch-scheduler
 546 Target RejectNegative Var(flag_dispatch_scheduler)
 547 Do dispatch scheduling if processor is bdver1 or bdver2 or bdver3 or bdver4 and Haifa scheduling
 548 is selected.
 549
 550 mprefer-avx128
 551 Target Report Mask(PREFER_AVX128) SAVE
 552 Use 128-bit AVX instructions instead of 256-bit AVX instructions in the auto-vectorizer.
 553
 554 ;; ISA support
 555
 556 m32
 557 Target RejectNegative Negative(m64) Report InverseMask(ISA_64BIT) Var(ix86_isa_flags) Save
 558 Generate 32bit i386 code
 559
 560 m64
 561 Target RejectNegative Negative(mx32) Report Mask(ABI_64) Var(ix86_isa_flags) Save
 562 Generate 64bit x86-64 code
 563
 564 mx32
 565 Target RejectNegative Negative(m16) Report Mask(ABI_X32) Var(ix86_isa_flags) Save
 566 Generate 32bit x86-64 code
 567
 568 m16
 569 Target RejectNegative Negative(m32) Report Mask(CODE16) InverseMask(ISA_64BIT) Var(ix86_isa_flags) Save
 570 Generate 16bit i386 code
 571
 572 mmmx
 573 Target Report Mask(ISA_MMX) Var(ix86_isa_flags) Save
 574 Support MMX built-in functions
 575
 576 m3dnow
 577 Target Report Mask(ISA_3DNOW) Var(ix86_isa_flags) Save
 578 Support 3DNow! built-in functions
 579
 580 m3dnowa
 581 Target Undocumented Mask(ISA_3DNOW_A) Var(ix86_isa_flags) Save
 582 Support Athlon 3Dnow! built-in functions
 583
 584 msse
 585 Target Report Mask(ISA_SSE) Var(ix86_isa_flags) Save
 586 Support MMX and SSE built-in functions and code generation
 587
 588 msse2
 589 Target Report Mask(ISA_SSE2) Var(ix86_isa_flags) Save
 590 Support MMX, SSE and SSE2 built-in functions and code generation
 591
 592 msse3
 593 Target Report Mask(ISA_SSE3) Var(ix86_isa_flags) Save
 594 Support MMX, SSE, SSE2 and SSE3 built-in functions and code generation
 595
 596 mssse3
 597 Target Report Mask(ISA_SSSE3) Var(ix86_isa_flags) Save
 598 Support MMX, SSE, SSE2, SSE3 and SSSE3 built-in functions and code generation
 599
 600 msse4.1
 601 Target Report Mask(ISA_SSE4_1) Var(ix86_isa_flags) Save
 602 Support MMX, SSE, SSE2, SSE3, SSSE3 and SSE4.1 built-in functions and code generation
 603
 604 msse4.2
 605 Target Report Mask(ISA_SSE4_2) Var(ix86_isa_flags) Save
 606 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 built-in functions and code generation
 607
 608 msse4
 609 Target RejectNegative Report Mask(ISA_SSE4_2) Var(ix86_isa_flags) Save
 610 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 built-in functions and code generation
 611
 612 mno-sse4
 613 Target RejectNegative Report InverseMask(ISA_SSE4_1) Var(ix86_isa_flags) Save
 614 Do not support SSE4.1 and SSE4.2 built-in functions and code generation
 615
 616 msse5
 617 Target Undocumented Alias(mavx) Warn(%<-msse5%> was removed)
 618 ;; Deprecated
 619
 620 mavx
 621 Target Report Mask(ISA_AVX) Var(ix86_isa_flags) Save
 622 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2 and AVX built-in functions and code generation
 623
 624 mavx2
 625 Target Report Mask(ISA_AVX2) Var(ix86_isa_flags) Save
 626 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and AVX2 built-in functions and code generation
 627
 628 mavx512f
 629 Target Report Mask(ISA_AVX512F) Var(ix86_isa_flags) Save
 630 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F built-in functions and code generation
 631
 632 mavx512pf
 633 Target Report Mask(ISA_AVX512PF) Var(ix86_isa_flags) Save
 634 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512PF built-in functions and code generation
 635
 636 mavx512er
 637 Target Report Mask(ISA_AVX512ER) Var(ix86_isa_flags) Save
 638 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512ER built-in functions and code generation
 639
 640 mavx512cd
 641 Target Report Mask(ISA_AVX512CD) Var(ix86_isa_flags) Save
 642 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512CD built-in functions and code generation
 643
 644 mavx512dq
 645 Target Report Mask(ISA_AVX512DQ) Var(ix86_isa_flags) Save
 646 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512DQ built-in functions and code generation
 647
 648 mavx512bw
 649 Target Report Mask(ISA_AVX512BW) Var(ix86_isa_flags) Save
 650 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512BW built-in functions and code generation
 651
 652 mavx512vl
 653 Target Report Mask(ISA_AVX512VL) Var(ix86_isa_flags) Save
 654 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512VL built-in functions and code generation
 655
 656 mavx512ifma
 657 Target Report Mask(ISA_AVX512IFMA) Var(ix86_isa_flags) Save
 658 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512IFMA built-in functions and code generation
 659
 660 mavx512vbmi
 661 Target Report Mask(ISA_AVX512VBMI) Var(ix86_isa_flags) Save
 662 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512VBMI built-in functions and code generation
 663
 664 mfma
 665 Target Report Mask(ISA_FMA) Var(ix86_isa_flags) Save
 666 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and FMA built-in functions and code generation
 667
 668 msse4a
 669 Target Report Mask(ISA_SSE4A) Var(ix86_isa_flags) Save
 670 Support MMX, SSE, SSE2, SSE3 and SSE4A built-in functions and code generation
 671
 672 mfma4
 673 Target Report Mask(ISA_FMA4) Var(ix86_isa_flags) Save
 674 Support FMA4 built-in functions and code generation
 675
 676 mxop
 677 Target Report Mask(ISA_XOP) Var(ix86_isa_flags) Save
 678 Support XOP built-in functions and code generation
 679
 680 mlwp
 681 Target Report Mask(ISA_LWP) Var(ix86_isa_flags) Save
 682 Support LWP built-in functions and code generation
 683
 684 mabm
 685 Target Report Mask(ISA_ABM) Var(ix86_isa_flags) Save
 686 Support code generation of Advanced Bit Manipulation (ABM) instructions.
 687
 688 mpopcnt
 689 Target Report Mask(ISA_POPCNT) Var(ix86_isa_flags) Save
 690 Support code generation of popcnt instruction.
 691
 692 mbmi
 693 Target Report Mask(ISA_BMI) Var(ix86_isa_flags) Save
 694 Support BMI built-in functions and code generation
 695
 696 mbmi2
 697 Target Report Mask(ISA_BMI2) Var(ix86_isa_flags) Save
 698 Support BMI2 built-in functions and code generation
 699
 700 mlzcnt
 701 Target Report Mask(ISA_LZCNT) Var(ix86_isa_flags) Save
 702 Support LZCNT built-in function and code generation
 703
 704 mhle
 705 Target Report Mask(ISA_HLE) Var(ix86_isa_flags) Save
 706 Support Hardware Lock Elision prefixes
 707
 708 mrdseed
 709 Target Report Mask(ISA_RDSEED) Var(ix86_isa_flags) Save
 710 Support RDSEED instruction
 711
 712 mprfchw
 713 Target Report Mask(ISA_PRFCHW) Var(ix86_isa_flags) Save
 714 Support PREFETCHW instruction
 715
 716 madx
 717 Target Report Mask(ISA_ADX) Var(ix86_isa_flags) Save
 718 Support flag-preserving add-carry instructions
 719
 720 mclflushopt
 721 Target Report Mask(ISA_CLFLUSHOPT) Var(ix86_isa_flags) Save
 722 Support CLFLUSHOPT instructions
 723
 724 mfxsr
 725 Target Report Mask(ISA_FXSR) Var(ix86_isa_flags) Save
 726 Support FXSAVE and FXRSTOR instructions
 727
 728 mxsave
 729 Target Report Mask(ISA_XSAVE) Var(ix86_isa_flags) Save
 730 Support XSAVE and XRSTOR instructions
 731
 732 mxsaveopt
 733 Target Report Mask(ISA_XSAVEOPT) Var(ix86_isa_flags) Save
 734 Support XSAVEOPT instruction
 735
 736 mxsavec
 737 Target Report Mask(ISA_XSAVEC) Var(ix86_isa_flags) Save
 738 Support XSAVEC instructions
 739
 740 mxsaves
 741 Target Report Mask(ISA_XSAVES) Var(ix86_isa_flags) Save
 742 Support XSAVES and XRSTORS instructions
 743
 744 mtbm
 745 Target Report Mask(ISA_TBM) Var(ix86_isa_flags) Save
 746 Support TBM built-in functions and code generation
 747
 748 mcx16
 749 Target Report Mask(ISA_CX16) Var(ix86_isa_flags) Save
 750 Support code generation of cmpxchg16b instruction.
 751
 752 msahf
 753 Target Report Mask(ISA_SAHF) Var(ix86_isa_flags) Save
 754 Support code generation of sahf instruction in 64bit x86-64 code.
 755
 756 mmovbe
 757 Target Report Mask(ISA_MOVBE) Var(ix86_isa_flags) Save
 758 Support code generation of movbe instruction.
 759
 760 mcrc32
 761 Target Report Mask(ISA_CRC32) Var(ix86_isa_flags) Save
 762 Support code generation of crc32 instruction.
 763
 764 maes
 765 Target Report Mask(ISA_AES) Var(ix86_isa_flags) Save
 766 Support AES built-in functions and code generation
 767
 768 msha
 769 Target Report Mask(ISA_SHA) Var(ix86_isa_flags) Save
 770 Support SHA1 and SHA256 built-in functions and code generation
 771
 772 mpclmul
 773 Target Report Mask(ISA_PCLMUL) Var(ix86_isa_flags) Save
 774 Support PCLMUL built-in functions and code generation
 775
 776 msse2avx
 777 Target Report Var(ix86_sse2avx)
 778 Encode SSE instructions with VEX prefix
 779
 780 mfsgsbase
 781 Target Report Mask(ISA_FSGSBASE) Var(ix86_isa_flags) Save
 782 Support FSGSBASE built-in functions and code generation
 783
 784 mrdrnd
 785 Target Report Mask(ISA_RDRND) Var(ix86_isa_flags) Save
 786 Support RDRND built-in functions and code generation
 787
 788 mf16c
 789 Target Report Mask(ISA_F16C) Var(ix86_isa_flags) Save
 790 Support F16C built-in functions and code generation
 791
 792 mprefetchwt1
 793 Target Report Mask(ISA_PREFETCHWT1) Var(ix86_isa_flags) Save
 794 Support PREFETCHWT1 built-in functions and code generation
 795
 796 mfentry
 797 Target Report Var(flag_fentry) Init(-1)
 798 Emit profiling counter call at function entry before prologue.
 799
 800 mrecord-mcount
 801 Target Report Var(flag_record_mcount) Init(0)
 802 Generate __mcount_loc section with all mcount or __fentry__ calls.
 803
 804 mnop-mcount
 805 Target Report Var(flag_nop_mcount) Init(0)
 806 Generate mcount/__fentry__ calls as nops. To activate they need to be
 807 patched in.
 808
 809 m8bit-idiv
 810 Target Report Mask(USE_8BIT_IDIV) Save
 811 Expand 32bit/64bit integer divide into 8bit unsigned integer divide with run-time check
 812
 813 mavx256-split-unaligned-load
 814 Target Report Mask(AVX256_SPLIT_UNALIGNED_LOAD) Save
 815 Split 32-byte AVX unaligned load
 816
 817 mavx256-split-unaligned-store
 818 Target Report Mask(AVX256_SPLIT_UNALIGNED_STORE) Save
 819 Split 32-byte AVX unaligned store
 820
 821 mrtm
 822 Target Report Mask(ISA_RTM) Var(ix86_isa_flags) Save
 823 Support RTM built-in functions and code generation
 824
 825 mmpx
 826 Target Report Mask(ISA_MPX) Var(ix86_isa_flags) Save
 827 Support MPX code generation
 828
 829 mstack-protector-guard=
 830 Target RejectNegative Joined Enum(stack_protector_guard) Var(ix86_stack_protector_guard) Init(SSP_TLS)
 831 Use given stack-protector guard
 832
 833 Enum
 834 Name(stack_protector_guard) Type(enum stack_protector_guard)
 835 Known stack protector guard (for use with the -mstack-protector-guard= option):
 836
 837 EnumValue
 838 Enum(stack_protector_guard) String(tls) Value(SSP_TLS)
 839
 840 EnumValue
 841 Enum(stack_protector_guard) String(global) Value(SSP_GLOBAL)