1 ; Options for the IA-32 and AMD64 ports of the compiler.
3 ; Copyright (C) 2005-2014 Free Software Foundation, Inc.
5 ; This file is part of GCC.
7 ; GCC is free software; you can redistribute it and/or modify it under
8 ; the terms of the GNU General Public License as published by the Free
9 ; Software Foundation; either version 3, or (at your option) any later
12 ; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 ; WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 ; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 ; You should have received a copy of the GNU General Public License
18 ; along with GCC; see the file COPYING3. If not see
19 ; <http://www.gnu.org/licenses/>.
22 config/i386/i386-opts.h
24 ; Bit flags that specify the ISA we are compiling for.
26 HOST_WIDE_INT ix86_isa_flags = TARGET_64BIT_DEFAULT | TARGET_SUBTARGET_ISA_DEFAULT
28 ; A mask of ix86_isa_flags that includes bit X if X was set or cleared
29 ; on the command line.
31 HOST_WIDE_INT ix86_isa_flags_explicit
34 int recip_mask = RECIP_MASK_DEFAULT
37 int recip_mask_explicit
40 int x_recip_mask_explicit
42 ;; Definitions to add to the cl_target_option structure
51 ;; -march= processor-string
53 const char *x_ix86_arch_string
55 ;; -mtune= processor-string
57 const char *x_ix86_tune_string
61 unsigned char schedule
65 unsigned char branch_cost
67 ;; which flags were passed by the user
69 HOST_WIDE_INT x_ix86_isa_flags_explicit
71 ;; which flags were passed by the user
73 int ix86_target_flags_explicit
75 ;; which flags were passed by the user
77 HOST_WIDE_INT x_ix86_target_flags_explicit
79 ;; whether -mtune was not specified
81 unsigned char tune_defaulted
83 ;; whether -march was specified
85 unsigned char arch_specified
89 enum cmodel x_ix86_cmodel
93 enum calling_abi x_ix86_abi
97 enum asm_dialect x_ix86_asm_dialect
101 int x_ix86_branch_cost
103 ;; -mdump-tune-features=
105 int x_ix86_dump_tunes
109 int x_ix86_force_align_arg_pointer
113 int x_ix86_force_drap
115 ;; -mincoming-stack-boundary=
117 int x_ix86_incoming_stack_boundary_arg
121 enum pmode x_ix86_pmode
123 ;; -mpreferred-stack-boundary=
125 int x_ix86_preferred_stack_boundary_arg
129 const char *x_ix86_recip_name
135 ;; -mlarge-data-threshold=
137 int x_ix86_section_threshold
143 ;; -mstack-protector-guard=
145 enum stack_protector_guard x_ix86_stack_protector_guard
147 ;; -mstringop-strategy=
149 enum stringop_alg x_ix86_stringop_alg
153 enum tls_dialect x_ix86_tls_dialect
157 const char *x_ix86_tune_ctrl_string
159 ;; -mmemcpy-strategy=
161 const char *x_ix86_tune_memcpy_strategy
163 ;; -mmemset-strategy=
165 const char *x_ix86_tune_memset_strategy
169 int x_ix86_tune_no_default
173 enum ix86_veclibabi x_ix86_veclibabi_type
177 Target RejectNegative Report Mask(128BIT_LONG_DOUBLE) Save
178 sizeof(long double) is 16
181 Target Report Mask(80387) Save
185 Target RejectNegative Report InverseMask(128BIT_LONG_DOUBLE) Save
186 sizeof(long double) is 12
189 Target Report RejectNegative Negative(mlong-double-64) InverseMask(LONG_DOUBLE_64) Save
190 Use 80-bit long double
193 Target Report RejectNegative Negative(mlong-double-128) Mask(LONG_DOUBLE_64) InverseMask(LONG_DOUBLE_128) Save
194 Use 64-bit long double
197 Target Report RejectNegative Negative(mlong-double-80) Mask(LONG_DOUBLE_128) InverseMask(LONG_DOUBLE_64) Save
198 Use 128-bit long double
200 maccumulate-outgoing-args
201 Target Report Mask(ACCUMULATE_OUTGOING_ARGS) Save
202 Reserve space for outgoing arguments in the function prologue
205 Target Report Mask(ALIGN_DOUBLE) Save
206 Align some doubles on dword boundary
209 Target RejectNegative Joined UInteger
210 Function starts are aligned to this power of 2
213 Target RejectNegative Joined UInteger
214 Jump targets are aligned to this power of 2
217 Target RejectNegative Joined UInteger
218 Loop code aligned to this power of 2
221 Target RejectNegative Report InverseMask(NO_ALIGN_STRINGOPS, ALIGN_STRINGOPS) Save
222 Align destination of the string operations
225 Target RejectNegative Joined Var(ix86_arch_string)
226 Generate code for given CPU
229 Target RejectNegative Joined Enum(asm_dialect) Var(ix86_asm_dialect) Init(ASM_ATT)
230 Use given assembler dialect
233 Name(asm_dialect) Type(enum asm_dialect)
234 Known assembler dialects (for use with the -masm-dialect= option):
237 Enum(asm_dialect) String(intel) Value(ASM_INTEL)
240 Enum(asm_dialect) String(att) Value(ASM_ATT)
243 Target RejectNegative Joined UInteger Var(ix86_branch_cost)
244 Branches are this expensive (1-5, arbitrary units)
246 mlarge-data-threshold=
247 Target RejectNegative Joined UInteger Var(ix86_section_threshold) Init(DEFAULT_LARGE_SECTION_THRESHOLD)
248 Data greater than given threshold will go into .ldata section in x86-64 medium model
251 Target RejectNegative Joined Enum(cmodel) Var(ix86_cmodel) Init(CM_32)
252 Use given x86-64 code model
255 Name(cmodel) Type(enum cmodel)
256 Known code models (for use with the -mcmodel= option):
259 Enum(cmodel) String(small) Value(CM_SMALL)
262 Enum(cmodel) String(medium) Value(CM_MEDIUM)
265 Enum(cmodel) String(large) Value(CM_LARGE)
268 Enum(cmodel) String(32) Value(CM_32)
271 Enum(cmodel) String(kernel) Value(CM_KERNEL)
274 Target RejectNegative Joined Enum(pmode) Var(ix86_pmode) Init(PMODE_SI)
275 Use given address mode
278 Name(pmode) Type(enum pmode)
279 Known address mode (for use with the -maddress-mode= option):
282 Enum(pmode) String(short) Value(PMODE_SI)
285 Enum(pmode) String(long) Value(PMODE_DI)
288 Target RejectNegative Joined Undocumented Alias(mtune=) Warn(%<-mcpu=%> is deprecated; use %<-mtune=%> or %<-march=%> instead)
291 Target RejectNegative Report InverseMask(NO_FANCY_MATH_387, USE_FANCY_MATH_387) Save
292 Generate sin, cos, sqrt for FPU
295 Target Report Var(ix86_force_drap)
296 Always use Dynamic Realigned Argument Pointer (DRAP) to realign stack
299 Target Report Mask(FLOAT_RETURNS) Save
300 Return values of functions in FPU registers
303 Target RejectNegative Joined Var(ix86_fpmath) Enum(fpmath_unit) Init(FPMATH_387) Save
304 Generate floating point mathematics using given instruction set
307 Name(fpmath_unit) Type(enum fpmath_unit)
308 Valid arguments to -mfpmath=:
311 Enum(fpmath_unit) String(387) Value(FPMATH_387)
314 Enum(fpmath_unit) String(sse) Value(FPMATH_SSE)
317 Enum(fpmath_unit) String(387,sse) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)})
320 Enum(fpmath_unit) String(387+sse) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)})
323 Enum(fpmath_unit) String(sse,387) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)})
326 Enum(fpmath_unit) String(sse+387) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)})
329 Enum(fpmath_unit) String(both) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)})
332 Target RejectNegative Mask(80387) Save
336 Target Report Mask(IEEE_FP) Save
337 Use IEEE math for fp comparisons
339 minline-all-stringops
340 Target Report Mask(INLINE_ALL_STRINGOPS) Save
341 Inline all known string operations
343 minline-stringops-dynamically
344 Target Report Mask(INLINE_STRINGOPS_DYNAMICALLY) Save
345 Inline memset/memcpy string operations, but perform inline version only for small blocks
348 Target Undocumented Alias(masm=, intel, att) Warn(%<-mintel-syntax%> and %<-mno-intel-syntax%> are deprecated; use %<-masm=intel%> and %<-masm=att%> instead)
352 Target Report Mask(MS_BITFIELD_LAYOUT) Save
353 Use native (MS) bitfield layout
356 Target RejectNegative Report Mask(NO_ALIGN_STRINGOPS) Undocumented Save
359 Target RejectNegative Report Mask(NO_FANCY_MATH_387) Undocumented Save
362 Target RejectNegative Report Mask(NO_PUSH_ARGS) Undocumented Save
365 Target RejectNegative Report Mask(NO_RED_ZONE) Undocumented Save
367 momit-leaf-frame-pointer
368 Target Report Mask(OMIT_LEAF_FRAME_POINTER) Save
369 Omit the frame pointer in leaf functions
372 Target RejectNegative Report
373 Set 80387 floating-point precision to 32-bit
376 Target RejectNegative Report
377 Set 80387 floating-point precision to 64-bit
380 Target RejectNegative Report
381 Set 80387 floating-point precision to 80-bit
383 mpreferred-stack-boundary=
384 Target RejectNegative Joined UInteger Var(ix86_preferred_stack_boundary_arg)
385 Attempt to keep stack aligned to this power of 2
387 mincoming-stack-boundary=
388 Target RejectNegative Joined UInteger Var(ix86_incoming_stack_boundary_arg)
389 Assume incoming stack aligned to this power of 2
392 Target Report InverseMask(NO_PUSH_ARGS, PUSH_ARGS) Save
393 Use push instructions to save outgoing arguments
396 Target RejectNegative Report InverseMask(NO_RED_ZONE, RED_ZONE) Save
397 Use red-zone in the x86-64 code
400 Target RejectNegative Joined UInteger Var(ix86_regparm)
401 Number of registers used to pass integer arguments
404 Target Report Mask(RTD) Save
405 Alternate calling convention
408 Target InverseMask(80387) Save
409 Do not use hardware fp
412 Target RejectNegative Mask(SSEREGPARM) Save
413 Use SSE register passing conventions for SF and DF mode
416 Target Report Var(ix86_force_align_arg_pointer) Init(-1)
417 Realign stack in prologue
420 Target Report Mask(STACK_PROBE) Save
424 Target RejectNegative Joined Var(ix86_tune_memcpy_strategy)
425 Specify memcpy expansion strategy when expected size is known
428 Target RejectNegative Joined Var(ix86_tune_memset_strategy)
429 Specify memset expansion strategy when expected size is known
432 Target RejectNegative Joined Enum(stringop_alg) Var(ix86_stringop_alg) Init(no_stringop)
433 Chose strategy to generate stringop using
436 Name(stringop_alg) Type(enum stringop_alg)
437 Valid arguments to -mstringop-strategy=:
440 Enum(stringop_alg) String(rep_byte) Value(rep_prefix_1_byte)
443 Enum(stringop_alg) String(libcall) Value(libcall)
446 Enum(stringop_alg) String(rep_4byte) Value(rep_prefix_4_byte)
449 Enum(stringop_alg) String(rep_8byte) Value(rep_prefix_8_byte)
452 Enum(stringop_alg) String(byte_loop) Value(loop_1_byte)
455 Enum(stringop_alg) String(loop) Value(loop)
458 Enum(stringop_alg) String(unrolled_loop) Value(unrolled_loop)
461 Enum(stringop_alg) String(vector_loop) Value(vector_loop)
464 Target RejectNegative Joined Var(ix86_tls_dialect) Enum(tls_dialect) Init(TLS_DIALECT_GNU)
465 Use given thread-local storage dialect
468 Name(tls_dialect) Type(enum tls_dialect)
469 Known TLS dialects (for use with the -mtls-dialect= option):
472 Enum(tls_dialect) String(gnu) Value(TLS_DIALECT_GNU)
475 Enum(tls_dialect) String(gnu2) Value(TLS_DIALECT_GNU2)
478 Target Report Mask(TLS_DIRECT_SEG_REFS)
479 Use direct references against %gs when accessing tls data
482 Target RejectNegative Joined Var(ix86_tune_string)
483 Schedule code for given CPU
486 Target RejectNegative Joined Var(ix86_tune_ctrl_string)
487 Fine grain control of tune features
490 Target RejectNegative Var(ix86_tune_no_default) Init(0)
491 Clear all tune features
494 Target RejectNegative Var(ix86_dump_tunes) Init(0)
497 Target RejectNegative Joined Var(ix86_abi) Enum(calling_abi) Init(SYSV_ABI)
498 Generate code that conforms to the given ABI
501 Name(calling_abi) Type(enum calling_abi)
502 Known ABIs (for use with the -mabi= option):
505 Enum(calling_abi) String(sysv) Value(SYSV_ABI)
508 Enum(calling_abi) String(ms) Value(MS_ABI)
511 Target RejectNegative Joined Var(ix86_veclibabi_type) Enum(ix86_veclibabi) Init(ix86_veclibabi_type_none)
512 Vector library ABI to use
515 Name(ix86_veclibabi) Type(enum ix86_veclibabi)
516 Known vectorization library ABIs (for use with the -mveclibabi= option):
519 Enum(ix86_veclibabi) String(svml) Value(ix86_veclibabi_type_svml)
522 Enum(ix86_veclibabi) String(acml) Value(ix86_veclibabi_type_acml)
525 Target Report Mask(VECT8_RETURNS) Save
526 Return 8-byte vectors in memory
529 Target Report Mask(RECIP) Save
530 Generate reciprocals instead of divss and sqrtss.
533 Target Report RejectNegative Joined Var(ix86_recip_name)
534 Control generation of reciprocal estimates.
537 Target Report Mask(CLD) Save
538 Generate cld instruction in the function prologue.
541 Target Report Mask(VZEROUPPER) Save
542 Generate vzeroupper instruction before a transfer of control flow out of
546 Target RejectNegative Var(flag_dispatch_scheduler)
547 Do dispatch scheduling if processor is bdver1 or bdver2 or bdver3 or bdver4 and Haifa scheduling
551 Target Report Mask(PREFER_AVX128) SAVE
552 Use 128-bit AVX instructions instead of 256-bit AVX instructions in the auto-vectorizer.
557 Target RejectNegative Negative(m64) Report InverseMask(ISA_64BIT) Var(ix86_isa_flags) Save
558 Generate 32bit i386 code
561 Target RejectNegative Negative(mx32) Report Mask(ABI_64) Var(ix86_isa_flags) Save
562 Generate 64bit x86-64 code
565 Target RejectNegative Negative(m16) Report Mask(ABI_X32) Var(ix86_isa_flags) Save
566 Generate 32bit x86-64 code
569 Target RejectNegative Negative(m32) Report Mask(CODE16) InverseMask(ISA_64BIT) Var(ix86_isa_flags) Save
570 Generate 16bit i386 code
573 Target Report Mask(ISA_MMX) Var(ix86_isa_flags) Save
574 Support MMX built-in functions
577 Target Report Mask(ISA_3DNOW) Var(ix86_isa_flags) Save
578 Support 3DNow! built-in functions
581 Target Undocumented Mask(ISA_3DNOW_A) Var(ix86_isa_flags) Save
582 Support Athlon 3Dnow! built-in functions
585 Target Report Mask(ISA_SSE) Var(ix86_isa_flags) Save
586 Support MMX and SSE built-in functions and code generation
589 Target Report Mask(ISA_SSE2) Var(ix86_isa_flags) Save
590 Support MMX, SSE and SSE2 built-in functions and code generation
593 Target Report Mask(ISA_SSE3) Var(ix86_isa_flags) Save
594 Support MMX, SSE, SSE2 and SSE3 built-in functions and code generation
597 Target Report Mask(ISA_SSSE3) Var(ix86_isa_flags) Save
598 Support MMX, SSE, SSE2, SSE3 and SSSE3 built-in functions and code generation
601 Target Report Mask(ISA_SSE4_1) Var(ix86_isa_flags) Save
602 Support MMX, SSE, SSE2, SSE3, SSSE3 and SSE4.1 built-in functions and code generation
605 Target Report Mask(ISA_SSE4_2) Var(ix86_isa_flags) Save
606 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 built-in functions and code generation
609 Target RejectNegative Report Mask(ISA_SSE4_2) Var(ix86_isa_flags) Save
610 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 built-in functions and code generation
613 Target RejectNegative Report InverseMask(ISA_SSE4_1) Var(ix86_isa_flags) Save
614 Do not support SSE4.1 and SSE4.2 built-in functions and code generation
617 Target Undocumented Alias(mavx) Warn(%<-msse5%> was removed)
621 Target Report Mask(ISA_AVX) Var(ix86_isa_flags) Save
622 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2 and AVX built-in functions and code generation
625 Target Report Mask(ISA_AVX2) Var(ix86_isa_flags) Save
626 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and AVX2 built-in functions and code generation
629 Target Report Mask(ISA_AVX512F) Var(ix86_isa_flags) Save
630 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F built-in functions and code generation
633 Target Report Mask(ISA_AVX512PF) Var(ix86_isa_flags) Save
634 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512PF built-in functions and code generation
637 Target Report Mask(ISA_AVX512ER) Var(ix86_isa_flags) Save
638 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512ER built-in functions and code generation
641 Target Report Mask(ISA_AVX512CD) Var(ix86_isa_flags) Save
642 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512CD built-in functions and code generation
645 Target Report Mask(ISA_AVX512DQ) Var(ix86_isa_flags) Save
646 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512DQ built-in functions and code generation
649 Target Report Mask(ISA_AVX512BW) Var(ix86_isa_flags) Save
650 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512BW built-in functions and code generation
653 Target Report Mask(ISA_AVX512VL) Var(ix86_isa_flags) Save
654 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512VL built-in functions and code generation
657 Target Report Mask(ISA_FMA) Var(ix86_isa_flags) Save
658 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and FMA built-in functions and code generation
661 Target Report Mask(ISA_SSE4A) Var(ix86_isa_flags) Save
662 Support MMX, SSE, SSE2, SSE3 and SSE4A built-in functions and code generation
665 Target Report Mask(ISA_FMA4) Var(ix86_isa_flags) Save
666 Support FMA4 built-in functions and code generation
669 Target Report Mask(ISA_XOP) Var(ix86_isa_flags) Save
670 Support XOP built-in functions and code generation
673 Target Report Mask(ISA_LWP) Var(ix86_isa_flags) Save
674 Support LWP built-in functions and code generation
677 Target Report Mask(ISA_ABM) Var(ix86_isa_flags) Save
678 Support code generation of Advanced Bit Manipulation (ABM) instructions.
681 Target Report Mask(ISA_POPCNT) Var(ix86_isa_flags) Save
682 Support code generation of popcnt instruction.
685 Target Report Mask(ISA_BMI) Var(ix86_isa_flags) Save
686 Support BMI built-in functions and code generation
689 Target Report Mask(ISA_BMI2) Var(ix86_isa_flags) Save
690 Support BMI2 built-in functions and code generation
693 Target Report Mask(ISA_LZCNT) Var(ix86_isa_flags) Save
694 Support LZCNT built-in function and code generation
697 Target Report Mask(ISA_HLE) Var(ix86_isa_flags) Save
698 Support Hardware Lock Elision prefixes
701 Target Report Mask(ISA_RDSEED) Var(ix86_isa_flags) Save
702 Support RDSEED instruction
705 Target Report Mask(ISA_PRFCHW) Var(ix86_isa_flags) Save
706 Support PREFETCHW instruction
709 Target Report Mask(ISA_ADX) Var(ix86_isa_flags) Save
710 Support flag-preserving add-carry instructions
713 Target Report Mask(ISA_CLFLUSHOPT) Var(ix86_isa_flags) Save
714 Support CLFLUSHOPT instructions
717 Target Report Mask(ISA_FXSR) Var(ix86_isa_flags) Save
718 Support FXSAVE and FXRSTOR instructions
721 Target Report Mask(ISA_XSAVE) Var(ix86_isa_flags) Save
722 Support XSAVE and XRSTOR instructions
725 Target Report Mask(ISA_XSAVEOPT) Var(ix86_isa_flags) Save
726 Support XSAVEOPT instruction
729 Target Report Mask(ISA_XSAVEC) Var(ix86_isa_flags) Save
730 Support XSAVEC instructions
733 Target Report Mask(ISA_XSAVES) Var(ix86_isa_flags) Save
734 Support XSAVES and XRSTORS instructions
737 Target Report Mask(ISA_TBM) Var(ix86_isa_flags) Save
738 Support TBM built-in functions and code generation
741 Target Report Mask(ISA_CX16) Var(ix86_isa_flags) Save
742 Support code generation of cmpxchg16b instruction.
745 Target Report Mask(ISA_SAHF) Var(ix86_isa_flags) Save
746 Support code generation of sahf instruction in 64bit x86-64 code.
749 Target Report Mask(ISA_MOVBE) Var(ix86_isa_flags) Save
750 Support code generation of movbe instruction.
753 Target Report Mask(ISA_CRC32) Var(ix86_isa_flags) Save
754 Support code generation of crc32 instruction.
757 Target Report Mask(ISA_AES) Var(ix86_isa_flags) Save
758 Support AES built-in functions and code generation
761 Target Report Mask(ISA_SHA) Var(ix86_isa_flags) Save
762 Support SHA1 and SHA256 built-in functions and code generation
765 Target Report Mask(ISA_PCLMUL) Var(ix86_isa_flags) Save
766 Support PCLMUL built-in functions and code generation
769 Target Report Var(ix86_sse2avx)
770 Encode SSE instructions with VEX prefix
773 Target Report Mask(ISA_FSGSBASE) Var(ix86_isa_flags) Save
774 Support FSGSBASE built-in functions and code generation
777 Target Report Mask(ISA_RDRND) Var(ix86_isa_flags) Save
778 Support RDRND built-in functions and code generation
781 Target Report Mask(ISA_F16C) Var(ix86_isa_flags) Save
782 Support F16C built-in functions and code generation
785 Target Report Mask(ISA_PREFETCHWT1) Var(ix86_isa_flags) Save
786 Support PREFETCHWT1 built-in functions and code generation
789 Target Report Var(flag_fentry) Init(-1)
790 Emit profiling counter call at function entry before prologue.
793 Target Report Mask(USE_8BIT_IDIV) Save
794 Expand 32bit/64bit integer divide into 8bit unsigned integer divide with run-time check
796 mavx256-split-unaligned-load
797 Target Report Mask(AVX256_SPLIT_UNALIGNED_LOAD) Save
798 Split 32-byte AVX unaligned load
800 mavx256-split-unaligned-store
801 Target Report Mask(AVX256_SPLIT_UNALIGNED_STORE) Save
802 Split 32-byte AVX unaligned store
805 Target Report Mask(ISA_RTM) Var(ix86_isa_flags) Save
806 Support RTM built-in functions and code generation
808 mstack-protector-guard=
809 Target RejectNegative Joined Enum(stack_protector_guard) Var(ix86_stack_protector_guard) Init(SSP_TLS)
810 Use given stack-protector guard
813 Name(stack_protector_guard) Type(enum stack_protector_guard)
814 Known stack protector guard (for use with the -mstack-protector-guard= option):
817 Enum(stack_protector_guard) String(tls) Value(SSP_TLS)
820 Enum(stack_protector_guard) String(global) Value(SSP_GLOBAL)