1 ;; Predicate definitions for IA-32 and x86-64.
2 ;; Copyright (C) 2004-2014 Free Software Foundation, Inc.
4 ;; This file is part of GCC.
6 ;; GCC is free software; you can redistribute it and/or modify
7 ;; it under the terms of the GNU General Public License as published by
8 ;; the Free Software Foundation; either version 3, or (at your option)
11 ;; GCC is distributed in the hope that it will be useful,
12 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ;; GNU General Public License for more details.
16 ;; You should have received a copy of the GNU General Public License
17 ;; along with GCC; see the file COPYING3. If not see
18 ;; <http://www.gnu.org/licenses/>.
20 ;; Return true if OP is either a i387 or SSE fp register.
21 (define_predicate "any_fp_register_operand"
22 (and (match_code "reg")
23 (match_test "ANY_FP_REGNO_P (REGNO (op))")))
25 ;; Return true if OP is an i387 fp register.
26 (define_predicate "fp_register_operand"
27 (and (match_code "reg")
28 (match_test "STACK_REGNO_P (REGNO (op))")))
30 ;; Return true if OP is a non-fp register_operand.
31 (define_predicate "register_and_not_any_fp_reg_operand"
32 (and (match_code "reg")
33 (not (match_test "ANY_FP_REGNO_P (REGNO (op))"))))
35 ;; True if the operand is a GENERAL class register.
36 (define_predicate "general_reg_operand"
37 (and (match_code "reg")
38 (match_test "GENERAL_REG_P (op)")))
40 ;; Return true if OP is a register operand other than an i387 fp register.
41 (define_predicate "register_and_not_fp_reg_operand"
42 (and (match_code "reg")
43 (not (match_test "STACK_REGNO_P (REGNO (op))"))))
45 ;; True if the operand is an MMX register.
46 (define_predicate "mmx_reg_operand"
47 (and (match_code "reg")
48 (match_test "MMX_REGNO_P (REGNO (op))")))
50 ;; True if the operand is an SSE register.
51 (define_predicate "sse_reg_operand"
52 (and (match_code "reg")
53 (match_test "SSE_REGNO_P (REGNO (op))")))
55 ;; True if the operand is an AVX-512 new register.
56 (define_predicate "ext_sse_reg_operand"
57 (and (match_code "reg")
58 (match_test "EXT_REX_SSE_REGNO_P (REGNO (op))")))
60 ;; True if the operand is an AVX-512 mask register.
61 (define_predicate "mask_reg_operand"
62 (and (match_code "reg")
63 (match_test "MASK_REGNO_P (REGNO (op))")))
65 ;; True if the operand is a Q_REGS class register.
66 (define_predicate "q_regs_operand"
67 (match_operand 0 "register_operand")
69 if (GET_CODE (op) == SUBREG)
71 return ANY_QI_REG_P (op);
74 ;; Return true if OP is a memory operands that can be used in sibcalls.
75 (define_predicate "sibcall_memory_operand"
76 (and (match_operand 0 "memory_operand")
77 (match_test "CONSTANT_P (XEXP (op, 0))")))
79 ;; Match an SI or HImode register for a zero_extract.
80 (define_special_predicate "ext_register_operand"
81 (match_operand 0 "register_operand")
83 if ((!TARGET_64BIT || GET_MODE (op) != DImode)
84 && GET_MODE (op) != SImode && GET_MODE (op) != HImode)
86 if (GET_CODE (op) == SUBREG)
89 /* Be careful to accept only registers having upper parts. */
91 && (REGNO (op) > LAST_VIRTUAL_REGISTER || REGNO (op) <= BX_REG));
94 ;; Match nonimmediate operands, but exclude memory operands on 64bit targets.
95 (define_predicate "nonimmediate_x64nomem_operand"
96 (if_then_else (match_test "TARGET_64BIT")
97 (match_operand 0 "register_operand")
98 (match_operand 0 "nonimmediate_operand")))
100 ;; Match general operands, but exclude memory operands on 64bit targets.
101 (define_predicate "general_x64nomem_operand"
102 (if_then_else (match_test "TARGET_64BIT")
103 (match_operand 0 "nonmemory_operand")
104 (match_operand 0 "general_operand")))
106 ;; Return true if op is the AX register.
107 (define_predicate "ax_reg_operand"
108 (and (match_code "reg")
109 (match_test "REGNO (op) == AX_REG")))
111 ;; Return true if op is the flags register.
112 (define_predicate "flags_reg_operand"
113 (and (match_code "reg")
114 (match_test "REGNO (op) == FLAGS_REG")))
116 ;; Return true if op is one of QImode registers: %[abcd][hl].
117 (define_predicate "QIreg_operand"
118 (match_test "QI_REG_P (op)"))
120 ;; Return true if op is a QImode register operand other than
122 (define_predicate "ext_QIreg_operand"
123 (and (match_code "reg")
124 (match_test "TARGET_64BIT")
125 (match_test "REGNO (op) > BX_REG")))
127 ;; Return true if VALUE can be stored in a sign extended immediate field.
128 (define_predicate "x86_64_immediate_operand"
129 (match_code "const_int,symbol_ref,label_ref,const")
132 return immediate_operand (op, mode);
134 switch (GET_CODE (op))
137 /* CONST_DOUBLES never match, since HOST_BITS_PER_WIDE_INT is known
138 to be at least 32 and this all acceptable constants are
139 represented as CONST_INT. */
140 if (HOST_BITS_PER_WIDE_INT == 32)
144 HOST_WIDE_INT val = trunc_int_for_mode (INTVAL (op), DImode);
145 return trunc_int_for_mode (val, SImode) == val;
150 /* For certain code models, the symbolic references are known to fit.
151 in CM_SMALL_PIC model we know it fits if it is local to the shared
152 library. Don't count TLS SYMBOL_REFs here, since they should fit
153 only if inside of UNSPEC handled below. */
154 /* TLS symbols are not constant. */
155 if (SYMBOL_REF_TLS_MODEL (op))
157 return (ix86_cmodel == CM_SMALL || ix86_cmodel == CM_KERNEL
158 || (ix86_cmodel == CM_MEDIUM && !SYMBOL_REF_FAR_ADDR_P (op)));
161 /* For certain code models, the code is near as well. */
162 return (ix86_cmodel == CM_SMALL || ix86_cmodel == CM_MEDIUM
163 || ix86_cmodel == CM_KERNEL);
166 /* We also may accept the offsetted memory references in certain
168 if (GET_CODE (XEXP (op, 0)) == UNSPEC)
169 switch (XINT (XEXP (op, 0), 1))
171 case UNSPEC_GOTPCREL:
173 case UNSPEC_GOTNTPOFF:
180 if (GET_CODE (XEXP (op, 0)) == PLUS)
182 rtx op1 = XEXP (XEXP (op, 0), 0);
183 rtx op2 = XEXP (XEXP (op, 0), 1);
184 HOST_WIDE_INT offset;
186 if (ix86_cmodel == CM_LARGE)
188 if (!CONST_INT_P (op2))
190 offset = trunc_int_for_mode (INTVAL (op2), DImode);
191 switch (GET_CODE (op1))
194 /* TLS symbols are not constant. */
195 if (SYMBOL_REF_TLS_MODEL (op1))
197 /* For CM_SMALL assume that latest object is 16MB before
198 end of 31bits boundary. We may also accept pretty
199 large negative constants knowing that all objects are
200 in the positive half of address space. */
201 if ((ix86_cmodel == CM_SMALL
202 || (ix86_cmodel == CM_MEDIUM
203 && !SYMBOL_REF_FAR_ADDR_P (op1)))
204 && offset < 16*1024*1024
205 && trunc_int_for_mode (offset, SImode) == offset)
207 /* For CM_KERNEL we know that all object resist in the
208 negative half of 32bits address space. We may not
209 accept negative offsets, since they may be just off
210 and we may accept pretty large positive ones. */
211 if (ix86_cmodel == CM_KERNEL
213 && trunc_int_for_mode (offset, SImode) == offset)
218 /* These conditions are similar to SYMBOL_REF ones, just the
219 constraints for code models differ. */
220 if ((ix86_cmodel == CM_SMALL || ix86_cmodel == CM_MEDIUM)
221 && offset < 16*1024*1024
222 && trunc_int_for_mode (offset, SImode) == offset)
224 if (ix86_cmodel == CM_KERNEL
226 && trunc_int_for_mode (offset, SImode) == offset)
231 switch (XINT (op1, 1))
235 if (trunc_int_for_mode (offset, SImode) == offset)
253 ;; Return true if VALUE can be stored in the zero extended immediate field.
254 (define_predicate "x86_64_zext_immediate_operand"
255 (match_code "const_double,const_int,symbol_ref,label_ref,const")
257 switch (GET_CODE (op))
260 if (HOST_BITS_PER_WIDE_INT == 32)
261 return (GET_MODE (op) == VOIDmode && !CONST_DOUBLE_HIGH (op));
266 if (HOST_BITS_PER_WIDE_INT == 32)
267 return INTVAL (op) >= 0;
269 return !(INTVAL (op) & ~(HOST_WIDE_INT) 0xffffffff);
272 /* For certain code models, the symbolic references are known to fit. */
273 /* TLS symbols are not constant. */
274 if (SYMBOL_REF_TLS_MODEL (op))
276 return (ix86_cmodel == CM_SMALL
277 || (ix86_cmodel == CM_MEDIUM
278 && !SYMBOL_REF_FAR_ADDR_P (op)));
281 /* For certain code models, the code is near as well. */
282 return ix86_cmodel == CM_SMALL || ix86_cmodel == CM_MEDIUM;
285 /* We also may accept the offsetted memory references in certain
287 if (GET_CODE (XEXP (op, 0)) == PLUS)
289 rtx op1 = XEXP (XEXP (op, 0), 0);
290 rtx op2 = XEXP (XEXP (op, 0), 1);
292 if (ix86_cmodel == CM_LARGE)
294 switch (GET_CODE (op1))
297 /* TLS symbols are not constant. */
298 if (SYMBOL_REF_TLS_MODEL (op1))
300 /* For small code model we may accept pretty large positive
301 offsets, since one bit is available for free. Negative
302 offsets are limited by the size of NULL pointer area
303 specified by the ABI. */
304 if ((ix86_cmodel == CM_SMALL
305 || (ix86_cmodel == CM_MEDIUM
306 && !SYMBOL_REF_FAR_ADDR_P (op1)))
308 && trunc_int_for_mode (INTVAL (op2), DImode) > -0x10000
309 && trunc_int_for_mode (INTVAL (op2), SImode) == INTVAL (op2))
311 /* ??? For the kernel, we may accept adjustment of
312 -0x10000000, since we know that it will just convert
313 negative address space to positive, but perhaps this
314 is not worthwhile. */
318 /* These conditions are similar to SYMBOL_REF ones, just the
319 constraints for code models differ. */
320 if ((ix86_cmodel == CM_SMALL || ix86_cmodel == CM_MEDIUM)
322 && trunc_int_for_mode (INTVAL (op2), DImode) > -0x10000
323 && trunc_int_for_mode (INTVAL (op2), SImode) == INTVAL (op2))
339 ;; Return true if OP is general operand representable on x86_64.
340 (define_predicate "x86_64_general_operand"
341 (if_then_else (match_test "TARGET_64BIT")
342 (ior (match_operand 0 "nonimmediate_operand")
343 (match_operand 0 "x86_64_immediate_operand"))
344 (match_operand 0 "general_operand")))
346 ;; Return true if OP is non-VOIDmode general operand representable
347 ;; on x86_64. This predicate is used in sign-extending conversion
348 ;; operations that require non-VOIDmode immediate operands.
349 (define_predicate "x86_64_sext_operand"
350 (and (match_test "GET_MODE (op) != VOIDmode")
351 (match_operand 0 "x86_64_general_operand")))
353 ;; Return true if OP is non-VOIDmode general operand. This predicate
354 ;; is used in sign-extending conversion operations that require
355 ;; non-VOIDmode immediate operands.
356 (define_predicate "sext_operand"
357 (and (match_test "GET_MODE (op) != VOIDmode")
358 (match_operand 0 "general_operand")))
360 ;; Return true if OP is representable on x86_64 as zero-extended operand.
361 ;; This predicate is used in zero-extending conversion operations that
362 ;; require non-VOIDmode immediate operands.
363 (define_predicate "x86_64_zext_operand"
364 (if_then_else (match_test "TARGET_64BIT")
365 (ior (match_operand 0 "nonimmediate_operand")
366 (and (match_operand 0 "x86_64_zext_immediate_operand")
367 (match_test "GET_MODE (op) != VOIDmode")))
368 (match_operand 0 "nonimmediate_operand")))
370 ;; Return true if OP is general operand representable on x86_64
371 ;; as either sign extended or zero extended constant.
372 (define_predicate "x86_64_szext_general_operand"
373 (if_then_else (match_test "TARGET_64BIT")
374 (ior (match_operand 0 "nonimmediate_operand")
375 (match_operand 0 "x86_64_immediate_operand")
376 (match_operand 0 "x86_64_zext_immediate_operand"))
377 (match_operand 0 "general_operand")))
379 ;; Return true if OP is nonmemory operand representable on x86_64.
380 (define_predicate "x86_64_nonmemory_operand"
381 (if_then_else (match_test "TARGET_64BIT")
382 (ior (match_operand 0 "register_operand")
383 (match_operand 0 "x86_64_immediate_operand"))
384 (match_operand 0 "nonmemory_operand")))
386 ;; Return true if OP is nonmemory operand representable on x86_64.
387 (define_predicate "x86_64_szext_nonmemory_operand"
388 (if_then_else (match_test "TARGET_64BIT")
389 (ior (match_operand 0 "register_operand")
390 (match_operand 0 "x86_64_immediate_operand")
391 (match_operand 0 "x86_64_zext_immediate_operand"))
392 (match_operand 0 "nonmemory_operand")))
394 ;; Return true when operand is PIC expression that can be computed by lea
396 (define_predicate "pic_32bit_operand"
397 (match_code "const,symbol_ref,label_ref")
402 /* Rule out relocations that translate into 64bit constants. */
403 if (TARGET_64BIT && GET_CODE (op) == CONST)
406 if (GET_CODE (op) == PLUS && CONST_INT_P (XEXP (op, 1)))
408 if (GET_CODE (op) == UNSPEC
409 && (XINT (op, 1) == UNSPEC_GOTOFF
410 || XINT (op, 1) == UNSPEC_GOT))
414 return symbolic_operand (op, mode);
417 ;; Return true if OP is nonmemory operand acceptable by movabs patterns.
418 (define_predicate "x86_64_movabs_operand"
419 (and (match_operand 0 "nonmemory_operand")
420 (not (match_operand 0 "pic_32bit_operand"))))
422 ;; Return true if OP is either a symbol reference or a sum of a symbol
423 ;; reference and a constant.
424 (define_predicate "symbolic_operand"
425 (match_code "symbol_ref,label_ref,const")
427 switch (GET_CODE (op))
435 if (GET_CODE (op) == SYMBOL_REF
436 || GET_CODE (op) == LABEL_REF
437 || (GET_CODE (op) == UNSPEC
438 && (XINT (op, 1) == UNSPEC_GOT
439 || XINT (op, 1) == UNSPEC_GOTOFF
440 || XINT (op, 1) == UNSPEC_PCREL
441 || XINT (op, 1) == UNSPEC_GOTPCREL)))
443 if (GET_CODE (op) != PLUS
444 || !CONST_INT_P (XEXP (op, 1)))
448 if (GET_CODE (op) == SYMBOL_REF
449 || GET_CODE (op) == LABEL_REF)
451 /* Only @GOTOFF gets offsets. */
452 if (GET_CODE (op) != UNSPEC
453 || XINT (op, 1) != UNSPEC_GOTOFF)
456 op = XVECEXP (op, 0, 0);
457 if (GET_CODE (op) == SYMBOL_REF
458 || GET_CODE (op) == LABEL_REF)
467 ;; Return true if OP is a symbolic operand that resolves locally.
468 (define_predicate "local_symbolic_operand"
469 (match_code "const,label_ref,symbol_ref")
471 if (GET_CODE (op) == CONST
472 && GET_CODE (XEXP (op, 0)) == PLUS
473 && CONST_INT_P (XEXP (XEXP (op, 0), 1)))
474 op = XEXP (XEXP (op, 0), 0);
476 if (GET_CODE (op) == LABEL_REF)
479 if (GET_CODE (op) != SYMBOL_REF)
482 if (SYMBOL_REF_TLS_MODEL (op))
485 /* Dll-imported symbols are always external. */
486 if (TARGET_DLLIMPORT_DECL_ATTRIBUTES && SYMBOL_REF_DLLIMPORT_P (op))
488 if (SYMBOL_REF_LOCAL_P (op))
491 /* There is, however, a not insubstantial body of code in the rest of
492 the compiler that assumes it can just stick the results of
493 ASM_GENERATE_INTERNAL_LABEL in a symbol_ref and have done. */
494 /* ??? This is a hack. Should update the body of the compiler to
495 always create a DECL an invoke targetm.encode_section_info. */
496 if (strncmp (XSTR (op, 0), internal_label_prefix,
497 internal_label_prefix_len) == 0)
503 ;; Test for a legitimate @GOTOFF operand.
505 ;; VxWorks does not impose a fixed gap between segments; the run-time
506 ;; gap can be different from the object-file gap. We therefore can't
507 ;; use @GOTOFF unless we are absolutely sure that the symbol is in the
508 ;; same segment as the GOT. Unfortunately, the flexibility of linker
509 ;; scripts means that we can't be sure of that in general, so assume
510 ;; that @GOTOFF is never valid on VxWorks.
511 (define_predicate "gotoff_operand"
512 (and (not (match_test "TARGET_VXWORKS_RTP"))
513 (match_operand 0 "local_symbolic_operand")))
515 ;; Test for various thread-local symbols.
516 (define_special_predicate "tls_symbolic_operand"
517 (and (match_code "symbol_ref")
518 (match_test "SYMBOL_REF_TLS_MODEL (op)")))
520 (define_special_predicate "tls_modbase_operand"
521 (and (match_code "symbol_ref")
522 (match_test "op == ix86_tls_module_base ()")))
524 ;; Test for a pc-relative call operand
525 (define_predicate "constant_call_address_operand"
526 (match_code "symbol_ref")
528 if (ix86_cmodel == CM_LARGE || ix86_cmodel == CM_LARGE_PIC)
530 if (TARGET_DLLIMPORT_DECL_ATTRIBUTES && SYMBOL_REF_DLLIMPORT_P (op))
535 ;; P6 processors will jump to the address after the decrement when %esp
536 ;; is used as a call operand, so they will execute return address as a code.
537 ;; See Pentium Pro errata 70, Pentium 2 errata A33 and Pentium 3 errata E17.
539 (define_predicate "call_register_no_elim_operand"
540 (match_operand 0 "register_operand")
542 if (GET_CODE (op) == SUBREG)
543 op = SUBREG_REG (op);
545 if (!TARGET_64BIT && op == stack_pointer_rtx)
548 return register_no_elim_operand (op, mode);
551 ;; True for any non-virtual or eliminable register. Used in places where
552 ;; instantiation of such a register may cause the pattern to not be recognized.
553 (define_predicate "register_no_elim_operand"
554 (match_operand 0 "register_operand")
556 if (GET_CODE (op) == SUBREG)
557 op = SUBREG_REG (op);
558 return !(op == arg_pointer_rtx
559 || op == frame_pointer_rtx
560 || IN_RANGE (REGNO (op),
561 FIRST_PSEUDO_REGISTER, LAST_VIRTUAL_REGISTER));
564 ;; Similarly, but include the stack pointer. This is used to prevent esp
565 ;; from being used as an index reg.
566 (define_predicate "index_register_operand"
567 (match_operand 0 "register_operand")
569 if (GET_CODE (op) == SUBREG)
570 op = SUBREG_REG (op);
571 if (reload_in_progress || reload_completed)
572 return REG_OK_FOR_INDEX_STRICT_P (op);
574 return REG_OK_FOR_INDEX_NONSTRICT_P (op);
577 ;; Return false if this is any eliminable register. Otherwise general_operand.
578 (define_predicate "general_no_elim_operand"
579 (if_then_else (match_code "reg,subreg")
580 (match_operand 0 "register_no_elim_operand")
581 (match_operand 0 "general_operand")))
583 ;; Return false if this is any eliminable register. Otherwise
584 ;; register_operand or a constant.
585 (define_predicate "nonmemory_no_elim_operand"
586 (ior (match_operand 0 "register_no_elim_operand")
587 (match_operand 0 "immediate_operand")))
589 ;; Test for a valid operand for indirect branch.
590 (define_predicate "indirect_branch_operand"
591 (ior (match_operand 0 "register_operand")
592 (and (not (match_test "TARGET_X32"))
593 (match_operand 0 "memory_operand"))))
595 ;; Test for a valid operand for a call instruction.
596 ;; Allow constant call address operands in Pmode only.
597 (define_special_predicate "call_insn_operand"
598 (ior (match_test "constant_call_address_operand
599 (op, mode == VOIDmode ? mode : Pmode)")
600 (match_operand 0 "call_register_no_elim_operand")
601 (and (not (match_test "TARGET_X32"))
602 (match_operand 0 "memory_operand"))))
604 ;; Similarly, but for tail calls, in which we cannot allow memory references.
605 (define_special_predicate "sibcall_insn_operand"
606 (ior (match_test "constant_call_address_operand
607 (op, mode == VOIDmode ? mode : Pmode)")
608 (match_operand 0 "register_no_elim_operand")
609 (and (not (match_test "TARGET_X32"))
610 (match_operand 0 "sibcall_memory_operand"))))
612 ;; Match exactly zero.
613 (define_predicate "const0_operand"
614 (match_code "const_int,const_double,const_vector")
616 if (mode == VOIDmode)
617 mode = GET_MODE (op);
618 return op == CONST0_RTX (mode);
622 (define_predicate "constm1_operand"
623 (match_code "const_int,const_double,const_vector")
625 if (mode == VOIDmode)
626 mode = GET_MODE (op);
627 return op == CONSTM1_RTX (mode);
630 ;; Match one or vector filled with ones.
631 (define_predicate "const1_operand"
632 (match_code "const_int,const_double,const_vector")
634 if (mode == VOIDmode)
635 mode = GET_MODE (op);
636 return op == CONST1_RTX (mode);
639 ;; Match exactly eight.
640 (define_predicate "const8_operand"
641 (and (match_code "const_int")
642 (match_test "INTVAL (op) == 8")))
644 ;; Match exactly 128.
645 (define_predicate "const128_operand"
646 (and (match_code "const_int")
647 (match_test "INTVAL (op) == 128")))
649 ;; Match exactly 0x0FFFFFFFF in anddi as a zero-extension operation
650 (define_predicate "const_32bit_mask"
651 (and (match_code "const_int")
652 (match_test "trunc_int_for_mode (INTVAL (op), DImode)
653 == (HOST_WIDE_INT) 0xffffffff")))
655 ;; Match 2, 4, or 8. Used for leal multiplicands.
656 (define_predicate "const248_operand"
657 (match_code "const_int")
659 HOST_WIDE_INT i = INTVAL (op);
660 return i == 2 || i == 4 || i == 8;
663 ;; Match 2, 3, 6, or 7
664 (define_predicate "const2367_operand"
665 (match_code "const_int")
667 HOST_WIDE_INT i = INTVAL (op);
668 return i == 2 || i == 3 || i == 6 || i == 7;
671 ;; Match 1, 2, 4, or 8
672 (define_predicate "const1248_operand"
673 (match_code "const_int")
675 HOST_WIDE_INT i = INTVAL (op);
676 return i == 1 || i == 2 || i == 4 || i == 8;
679 ;; Match 3, 5, or 9. Used for leal multiplicands.
680 (define_predicate "const359_operand"
681 (match_code "const_int")
683 HOST_WIDE_INT i = INTVAL (op);
684 return i == 3 || i == 5 || i == 9;
687 ;; Match 4 or 8 to 11. Used for embeded rounding.
688 (define_predicate "const_4_or_8_to_11_operand"
689 (match_code "const_int")
691 HOST_WIDE_INT i = INTVAL (op);
692 return i == 4 || (i >= 8 && i <= 11);
695 ;; Match 4 or 8. Used for SAE.
696 (define_predicate "const48_operand"
697 (match_code "const_int")
699 HOST_WIDE_INT i = INTVAL (op);
700 return i == 4 || i == 8;
704 (define_predicate "const_0_to_1_operand"
705 (and (match_code "const_int")
706 (ior (match_test "op == const0_rtx")
707 (match_test "op == const1_rtx"))))
710 (define_predicate "const_0_to_3_operand"
711 (and (match_code "const_int")
712 (match_test "IN_RANGE (INTVAL (op), 0, 3)")))
715 (define_predicate "const_0_to_4_operand"
716 (and (match_code "const_int")
717 (match_test "IN_RANGE (INTVAL (op), 0, 4)")))
720 (define_predicate "const_0_to_5_operand"
721 (and (match_code "const_int")
722 (match_test "IN_RANGE (INTVAL (op), 0, 5)")))
725 (define_predicate "const_0_to_7_operand"
726 (and (match_code "const_int")
727 (match_test "IN_RANGE (INTVAL (op), 0, 7)")))
730 (define_predicate "const_0_to_15_operand"
731 (and (match_code "const_int")
732 (match_test "IN_RANGE (INTVAL (op), 0, 15)")))
735 (define_predicate "const_0_to_31_operand"
736 (and (match_code "const_int")
737 (match_test "IN_RANGE (INTVAL (op), 0, 31)")))
740 (define_predicate "const_0_to_63_operand"
741 (and (match_code "const_int")
742 (match_test "IN_RANGE (INTVAL (op), 0, 63)")))
745 (define_predicate "const_0_to_255_operand"
746 (and (match_code "const_int")
747 (match_test "IN_RANGE (INTVAL (op), 0, 255)")))
749 ;; Match (0 to 255) * 8
750 (define_predicate "const_0_to_255_mul_8_operand"
751 (match_code "const_int")
753 unsigned HOST_WIDE_INT val = INTVAL (op);
754 return val <= 255*8 && val % 8 == 0;
757 ;; Return true if OP is CONST_INT >= 1 and <= 31 (a valid operand
758 ;; for shift & compare patterns, as shifting by 0 does not change flags).
759 (define_predicate "const_1_to_31_operand"
760 (and (match_code "const_int")
761 (match_test "IN_RANGE (INTVAL (op), 1, 31)")))
763 ;; Return true if OP is CONST_INT >= 1 and <= 63 (a valid operand
764 ;; for 64bit shift & compare patterns, as shifting by 0 does not change flags).
765 (define_predicate "const_1_to_63_operand"
766 (and (match_code "const_int")
767 (match_test "IN_RANGE (INTVAL (op), 1, 63)")))
770 (define_predicate "const_2_to_3_operand"
771 (and (match_code "const_int")
772 (match_test "IN_RANGE (INTVAL (op), 2, 3)")))
775 (define_predicate "const_4_to_5_operand"
776 (and (match_code "const_int")
777 (match_test "IN_RANGE (INTVAL (op), 4, 5)")))
780 (define_predicate "const_4_to_7_operand"
781 (and (match_code "const_int")
782 (match_test "IN_RANGE (INTVAL (op), 4, 7)")))
785 (define_predicate "const_6_to_7_operand"
786 (and (match_code "const_int")
787 (match_test "IN_RANGE (INTVAL (op), 6, 7)")))
790 (define_predicate "const_8_to_9_operand"
791 (and (match_code "const_int")
792 (match_test "IN_RANGE (INTVAL (op), 8, 9)")))
795 (define_predicate "const_8_to_11_operand"
796 (and (match_code "const_int")
797 (match_test "IN_RANGE (INTVAL (op), 8, 11)")))
800 (define_predicate "const_8_to_15_operand"
801 (and (match_code "const_int")
802 (match_test "IN_RANGE (INTVAL (op), 8, 15)")))
805 (define_predicate "const_10_to_11_operand"
806 (and (match_code "const_int")
807 (match_test "IN_RANGE (INTVAL (op), 10, 11)")))
810 (define_predicate "const_12_to_13_operand"
811 (and (match_code "const_int")
812 (match_test "IN_RANGE (INTVAL (op), 12, 13)")))
815 (define_predicate "const_12_to_15_operand"
816 (and (match_code "const_int")
817 (match_test "IN_RANGE (INTVAL (op), 12, 15)")))
820 (define_predicate "const_14_to_15_operand"
821 (and (match_code "const_int")
822 (match_test "IN_RANGE (INTVAL (op), 14, 15)")))
825 (define_predicate "const_16_to_19_operand"
826 (and (match_code "const_int")
827 (match_test "IN_RANGE (INTVAL (op), 16, 19)")))
830 (define_predicate "const_16_to_31_operand"
831 (and (match_code "const_int")
832 (match_test "IN_RANGE (INTVAL (op), 16, 31)")))
835 (define_predicate "const_20_to_23_operand"
836 (and (match_code "const_int")
837 (match_test "IN_RANGE (INTVAL (op), 20, 23)")))
840 (define_predicate "const_24_to_27_operand"
841 (and (match_code "const_int")
842 (match_test "IN_RANGE (INTVAL (op), 24, 27)")))
845 (define_predicate "const_28_to_31_operand"
846 (and (match_code "const_int")
847 (match_test "IN_RANGE (INTVAL (op), 28, 31)")))
849 ;; True if this is a constant appropriate for an increment or decrement.
850 (define_predicate "incdec_operand"
851 (match_code "const_int")
853 /* On Pentium4, the inc and dec operations causes extra dependency on flag
854 registers, since carry flag is not set. */
855 if (!TARGET_USE_INCDEC && !optimize_insn_for_size_p ())
857 return op == const1_rtx || op == constm1_rtx;
860 ;; True for registers, or 1 or -1. Used to optimize double-word shifts.
861 (define_predicate "reg_or_pm1_operand"
862 (ior (match_operand 0 "register_operand")
863 (and (match_code "const_int")
864 (ior (match_test "op == const1_rtx")
865 (match_test "op == constm1_rtx")))))
867 ;; True if OP is acceptable as operand of DImode shift expander.
868 (define_predicate "shiftdi_operand"
869 (if_then_else (match_test "TARGET_64BIT")
870 (match_operand 0 "nonimmediate_operand")
871 (match_operand 0 "register_operand")))
873 (define_predicate "ashldi_input_operand"
874 (if_then_else (match_test "TARGET_64BIT")
875 (match_operand 0 "nonimmediate_operand")
876 (match_operand 0 "reg_or_pm1_operand")))
878 ;; Return true if OP is a vector load from the constant pool with just
879 ;; the first element nonzero.
880 (define_predicate "zero_extended_scalar_load_operand"
884 op = maybe_get_pool_constant (op);
886 if (!(op && GET_CODE (op) == CONST_VECTOR))
889 n_elts = CONST_VECTOR_NUNITS (op);
891 for (n_elts--; n_elts > 0; n_elts--)
893 rtx elt = CONST_VECTOR_ELT (op, n_elts);
894 if (elt != CONST0_RTX (GET_MODE_INNER (GET_MODE (op))))
900 /* Return true if operand is a vector constant that is all ones. */
901 (define_predicate "vector_all_ones_operand"
902 (match_code "const_vector")
904 int nunits = GET_MODE_NUNITS (mode);
906 if (GET_CODE (op) == CONST_VECTOR
907 && CONST_VECTOR_NUNITS (op) == nunits)
910 for (i = 0; i < nunits; ++i)
912 rtx x = CONST_VECTOR_ELT (op, i);
913 if (x != constm1_rtx)
922 ; Return true when OP is operand acceptable for standard SSE move.
923 (define_predicate "vector_move_operand"
924 (ior (match_operand 0 "nonimmediate_operand")
925 (match_operand 0 "const0_operand")))
927 ;; Return true when OP is either nonimmediate operand, or any
929 (define_predicate "nonimmediate_or_const_vector_operand"
930 (ior (match_operand 0 "nonimmediate_operand")
931 (match_code "const_vector")))
933 ;; Return true when OP is nonimmediate or standard SSE constant.
934 (define_predicate "nonimmediate_or_sse_const_operand"
935 (match_operand 0 "general_operand")
937 if (nonimmediate_operand (op, mode))
939 if (standard_sse_constant_p (op) > 0)
944 ;; Return true if OP is a register or a zero.
945 (define_predicate "reg_or_0_operand"
946 (ior (match_operand 0 "register_operand")
947 (match_operand 0 "const0_operand")))
949 ;; Return true for RTX codes that force SImode address.
950 (define_predicate "SImode_address_operand"
951 (match_code "subreg,zero_extend,and"))
953 ;; Return true if op if a valid address for LEA, and does not contain
954 ;; a segment override. Defined as a special predicate to allow
955 ;; mode-less const_int operands pass to address_operand.
956 (define_special_predicate "address_no_seg_operand"
957 (match_operand 0 "address_operand")
959 struct ix86_address parts;
962 ok = ix86_decompose_address (op, &parts);
964 return parts.seg == SEG_DEFAULT;
967 ;; Return true if op if a valid base register, displacement or
968 ;; sum of base register and displacement for VSIB addressing.
969 (define_predicate "vsib_address_operand"
970 (match_operand 0 "address_operand")
972 struct ix86_address parts;
976 ok = ix86_decompose_address (op, &parts);
978 if (parts.index || parts.seg != SEG_DEFAULT)
981 /* VSIB addressing doesn't support (%rip). */
985 if (GET_CODE (disp) == CONST)
987 disp = XEXP (disp, 0);
988 if (GET_CODE (disp) == PLUS)
989 disp = XEXP (disp, 0);
990 if (GET_CODE (disp) == UNSPEC)
991 switch (XINT (disp, 1))
993 case UNSPEC_GOTPCREL:
995 case UNSPEC_GOTNTPOFF:
1001 && (GET_CODE (disp) == SYMBOL_REF
1002 || GET_CODE (disp) == LABEL_REF))
1009 (define_predicate "vsib_mem_operator"
1012 ;; Return true if the rtx is known to be at least 32 bits aligned.
1013 (define_predicate "aligned_operand"
1014 (match_operand 0 "general_operand")
1016 struct ix86_address parts;
1019 /* Registers and immediate operands are always "aligned". */
1023 /* All patterns using aligned_operand on memory operands ends up
1024 in promoting memory operand to 64bit and thus causing memory mismatch. */
1025 if (TARGET_MEMORY_MISMATCH_STALL && !optimize_insn_for_size_p ())
1028 /* Don't even try to do any aligned optimizations with volatiles. */
1029 if (MEM_VOLATILE_P (op))
1032 if (MEM_ALIGN (op) >= 32)
1037 /* Pushes and pops are only valid on the stack pointer. */
1038 if (GET_CODE (op) == PRE_DEC
1039 || GET_CODE (op) == POST_INC)
1042 /* Decode the address. */
1043 ok = ix86_decompose_address (op, &parts);
1046 if (parts.base && GET_CODE (parts.base) == SUBREG)
1047 parts.base = SUBREG_REG (parts.base);
1048 if (parts.index && GET_CODE (parts.index) == SUBREG)
1049 parts.index = SUBREG_REG (parts.index);
1051 /* Look for some component that isn't known to be aligned. */
1054 if (REGNO_POINTER_ALIGN (REGNO (parts.index)) * parts.scale < 32)
1059 if (REGNO_POINTER_ALIGN (REGNO (parts.base)) < 32)
1064 if (!CONST_INT_P (parts.disp)
1065 || (INTVAL (parts.disp) & 3))
1069 /* Didn't find one -- this must be an aligned address. */
1073 ;; Return true if OP is memory operand with a displacement.
1074 (define_predicate "memory_displacement_operand"
1075 (match_operand 0 "memory_operand")
1077 struct ix86_address parts;
1080 ok = ix86_decompose_address (XEXP (op, 0), &parts);
1082 return parts.disp != NULL_RTX;
1085 ;; Return true if OP is memory operand with a displacement only.
1086 (define_predicate "memory_displacement_only_operand"
1087 (match_operand 0 "memory_operand")
1089 struct ix86_address parts;
1095 ok = ix86_decompose_address (XEXP (op, 0), &parts);
1098 if (parts.base || parts.index)
1101 return parts.disp != NULL_RTX;
1104 ;; Return true if OP is memory operand that cannot be represented
1105 ;; by the modRM array.
1106 (define_predicate "long_memory_operand"
1107 (and (match_operand 0 "memory_operand")
1108 (match_test "memory_address_length (op, false)")))
1110 ;; Return true if OP is a comparison operator that can be issued by fcmov.
1111 (define_predicate "fcmov_comparison_operator"
1112 (match_operand 0 "comparison_operator")
1114 machine_mode inmode = GET_MODE (XEXP (op, 0));
1115 enum rtx_code code = GET_CODE (op);
1117 if (inmode == CCFPmode || inmode == CCFPUmode)
1119 if (!ix86_trivial_fp_comparison_operator (op, mode))
1121 code = ix86_fp_compare_code_to_integer (code);
1123 /* i387 supports just limited amount of conditional codes. */
1126 case LTU: case GTU: case LEU: case GEU:
1127 if (inmode == CCmode || inmode == CCFPmode || inmode == CCFPUmode
1128 || inmode == CCCmode)
1131 case ORDERED: case UNORDERED:
1139 ;; Return true if OP is a comparison that can be used in the CMPSS/CMPPS insns.
1140 ;; The first set are supported directly; the second set can't be done with
1141 ;; full IEEE support, i.e. NaNs.
1143 (define_predicate "sse_comparison_operator"
1144 (ior (match_code "eq,ne,lt,le,unordered,unge,ungt,ordered")
1145 (and (match_test "TARGET_AVX")
1146 (match_code "ge,gt,uneq,unle,unlt,ltgt"))))
1148 (define_predicate "ix86_comparison_int_operator"
1149 (match_code "ne,eq,ge,gt,le,lt"))
1151 (define_predicate "ix86_comparison_uns_operator"
1152 (match_code "ne,eq,geu,gtu,leu,ltu"))
1154 (define_predicate "bt_comparison_operator"
1155 (match_code "ne,eq"))
1157 ;; Return true if OP is a valid comparison operator in valid mode.
1158 (define_predicate "ix86_comparison_operator"
1159 (match_operand 0 "comparison_operator")
1161 machine_mode inmode = GET_MODE (XEXP (op, 0));
1162 enum rtx_code code = GET_CODE (op);
1164 if (inmode == CCFPmode || inmode == CCFPUmode)
1165 return ix86_trivial_fp_comparison_operator (op, mode);
1172 if (inmode == CCmode || inmode == CCGCmode
1173 || inmode == CCGOCmode || inmode == CCNOmode)
1176 case LTU: case GTU: case LEU: case GEU:
1177 if (inmode == CCmode || inmode == CCCmode)
1180 case ORDERED: case UNORDERED:
1181 if (inmode == CCmode)
1185 if (inmode == CCmode || inmode == CCGCmode || inmode == CCNOmode)
1193 ;; Return true if OP is a valid comparison operator
1194 ;; testing carry flag to be set.
1195 (define_predicate "ix86_carry_flag_operator"
1196 (match_code "ltu,lt,unlt,gtu,gt,ungt,le,unle,ge,unge,ltgt,uneq")
1198 machine_mode inmode = GET_MODE (XEXP (op, 0));
1199 enum rtx_code code = GET_CODE (op);
1201 if (inmode == CCFPmode || inmode == CCFPUmode)
1203 if (!ix86_trivial_fp_comparison_operator (op, mode))
1205 code = ix86_fp_compare_code_to_integer (code);
1207 else if (inmode == CCCmode)
1208 return code == LTU || code == GTU;
1209 else if (inmode != CCmode)
1215 ;; Return true if this comparison only requires testing one flag bit.
1216 (define_predicate "ix86_trivial_fp_comparison_operator"
1217 (match_code "gt,ge,unlt,unle,uneq,ltgt,ordered,unordered"))
1219 ;; Return true if we know how to do this comparison. Others require
1220 ;; testing more than one flag bit, and we let the generic middle-end
1222 (define_predicate "ix86_fp_comparison_operator"
1223 (if_then_else (match_test "ix86_fp_comparison_strategy (GET_CODE (op))
1224 == IX86_FPCMP_ARITH")
1225 (match_operand 0 "comparison_operator")
1226 (match_operand 0 "ix86_trivial_fp_comparison_operator")))
1228 ;; Same as above, but for swapped comparison used in *jcc<fp>_<int>_i387.
1229 (define_predicate "ix86_swapped_fp_comparison_operator"
1230 (match_operand 0 "comparison_operator")
1232 enum rtx_code code = GET_CODE (op);
1235 PUT_CODE (op, swap_condition (code));
1236 ret = ix86_fp_comparison_operator (op, mode);
1237 PUT_CODE (op, code);
1241 ;; Nearly general operand, but accept any const_double, since we wish
1242 ;; to be able to drop them into memory rather than have them get pulled
1244 (define_predicate "cmp_fp_expander_operand"
1245 (ior (match_code "const_double")
1246 (match_operand 0 "general_operand")))
1248 ;; Return true if this is a valid binary floating-point operation.
1249 (define_predicate "binary_fp_operator"
1250 (match_code "plus,minus,mult,div"))
1252 ;; Return true if this is a multiply operation.
1253 (define_predicate "mult_operator"
1254 (match_code "mult"))
1256 ;; Return true if this is a division operation.
1257 (define_predicate "div_operator"
1260 ;; Return true if this is a plus, minus, and, ior or xor operation.
1261 (define_predicate "plusminuslogic_operator"
1262 (match_code "plus,minus,and,ior,xor"))
1264 ;; Return true if this is a float extend operation.
1265 (define_predicate "float_operator"
1266 (match_code "float"))
1268 ;; Return true for ARITHMETIC_P.
1269 (define_predicate "arith_or_logical_operator"
1270 (match_code "plus,mult,and,ior,xor,smin,smax,umin,umax,compare,minus,div,
1271 mod,udiv,umod,ashift,rotate,ashiftrt,lshiftrt,rotatert"))
1273 ;; Return true for COMMUTATIVE_P.
1274 (define_predicate "commutative_operator"
1275 (match_code "plus,mult,and,ior,xor,smin,smax,umin,umax"))
1277 ;; Return true if OP is a binary operator that can be promoted to wider mode.
1278 (define_predicate "promotable_binary_operator"
1279 (ior (match_code "plus,minus,and,ior,xor,ashift")
1280 (and (match_code "mult")
1281 (match_test "TARGET_TUNE_PROMOTE_HIMODE_IMUL"))))
1283 (define_predicate "compare_operator"
1284 (match_code "compare"))
1286 (define_predicate "absneg_operator"
1287 (match_code "abs,neg"))
1289 ;; Return true if OP is misaligned memory operand
1290 (define_predicate "misaligned_operand"
1291 (and (match_code "mem")
1292 (match_test "MEM_ALIGN (op) < GET_MODE_ALIGNMENT (mode)")))
1294 ;; Return true if OP is a emms operation, known to be a PARALLEL.
1295 (define_predicate "emms_operation"
1296 (match_code "parallel")
1300 if (XVECLEN (op, 0) != 17)
1303 for (i = 0; i < 8; i++)
1305 rtx elt = XVECEXP (op, 0, i+1);
1307 if (GET_CODE (elt) != CLOBBER
1308 || GET_CODE (SET_DEST (elt)) != REG
1309 || GET_MODE (SET_DEST (elt)) != XFmode
1310 || REGNO (SET_DEST (elt)) != FIRST_STACK_REG + i)
1313 elt = XVECEXP (op, 0, i+9);
1315 if (GET_CODE (elt) != CLOBBER
1316 || GET_CODE (SET_DEST (elt)) != REG
1317 || GET_MODE (SET_DEST (elt)) != DImode
1318 || REGNO (SET_DEST (elt)) != FIRST_MMX_REG + i)
1324 ;; Return true if OP is a vzeroall operation, known to be a PARALLEL.
1325 (define_predicate "vzeroall_operation"
1326 (match_code "parallel")
1328 unsigned i, nregs = TARGET_64BIT ? 16 : 8;
1330 if ((unsigned) XVECLEN (op, 0) != 1 + nregs)
1333 for (i = 0; i < nregs; i++)
1335 rtx elt = XVECEXP (op, 0, i+1);
1337 if (GET_CODE (elt) != SET
1338 || GET_CODE (SET_DEST (elt)) != REG
1339 || GET_MODE (SET_DEST (elt)) != V8SImode
1340 || REGNO (SET_DEST (elt)) != SSE_REGNO (i)
1341 || SET_SRC (elt) != CONST0_RTX (V8SImode))
1347 ;; return true if OP is a vzeroupper operation.
1348 (define_predicate "vzeroupper_operation"
1349 (and (match_code "unspec_volatile")
1350 (match_test "XINT (op, 1) == UNSPECV_VZEROUPPER")))
1352 ;; Return true if OP is a parallel for a vbroadcast permute.
1354 (define_predicate "avx_vbroadcast_operand"
1355 (and (match_code "parallel")
1356 (match_code "const_int" "a"))
1358 rtx elt = XVECEXP (op, 0, 0);
1359 int i, nelt = XVECLEN (op, 0);
1361 /* Don't bother checking there are the right number of operands,
1362 merely that they're all identical. */
1363 for (i = 1; i < nelt; ++i)
1364 if (XVECEXP (op, 0, i) != elt)
1369 ;; Return true if OP is a parallel for a palignr permute.
1370 (define_predicate "palignr_operand"
1371 (and (match_code "parallel")
1372 (match_code "const_int" "a"))
1374 int elt = INTVAL (XVECEXP (op, 0, 0));
1375 int i, nelt = XVECLEN (op, 0);
1377 /* Check that an order in the permutation is suitable for palignr.
1378 For example, {5 6 7 0 1 2 3 4} is "palignr 5, xmm, xmm". */
1379 for (i = 1; i < nelt; ++i)
1380 if (INTVAL (XVECEXP (op, 0, i)) != ((elt + i) % nelt))
1385 ;; Return true if OP is a proper third operand to vpblendw256.
1386 (define_predicate "avx2_pblendw_operand"
1387 (match_code "const_int")
1389 HOST_WIDE_INT val = INTVAL (op);
1390 HOST_WIDE_INT low = val & 0xff;
1391 return val == ((low << 8) | low);
1394 ;; Return true if OP is nonimmediate_operand or CONST_VECTOR.
1395 (define_predicate "general_vector_operand"
1396 (ior (match_operand 0 "nonimmediate_operand")
1397 (match_code "const_vector")))
1399 ;; Return true if OP is either -1 constant or stored in register.
1400 (define_predicate "register_or_constm1_operand"
1401 (ior (match_operand 0 "register_operand")
1402 (and (match_code "const_int")
1403 (match_test "op == constm1_rtx"))))