gcc/config/ia64/ia64-modes.def

   1 /* Definitions of target machine GNU compiler.  IA-64 version.
   2    Copyright (C) 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
   3    Contributed by James E. Wilson <wilson@cygnus.com> and
   4                   David Mosberger <davidm@hpl.hp.com>.
   5
   6 This file is part of GCC.
   7
   8 GCC is free software; you can redistribute it and/or modify
   9 it under the terms of the GNU General Public License as published by
  10 the Free Software Foundation; either version 2, or (at your option)
  11 any later version.
  12
  13 GCC is distributed in the hope that it will be useful,
  14 but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16 GNU General Public License for more details.
  17
  18 You should have received a copy of the GNU General Public License
  19 along with GCC; see the file COPYING.  If not, write to
  20 the Free Software Foundation, 59 Temple Place - Suite 330,
  21 Boston, MA 02111-1307, USA.  */
  22
  23 /* IA64 requires both XF and TF modes.
  24    XFmode is __float80 is IEEE extended; TFmode is __float128
  25    is IEEE quad.  Both these modes occupy 16 bytes, but XFmode
  26    only has 80 significant bits.  */
  27
  28 FRACTIONAL_FLOAT_MODE (XF, 80, 16, ieee_extended_intel_128_format);
  29 FLOAT_MODE (TF, 16, ieee_quad_format);
  30
  31 /* The above produces:
  32
  33    mode   ILP32 size/align      LP64 size/align
  34    XF     16/16                 16/16
  35    TF     16/16                 16/16
  36
  37    psABI expectations:
  38
  39    mode   ILP32 size/align      LP64 size/align
  40    XF     12/4                  -
  41    TF     -                     -
  42
  43    HPUX expectations:
  44
  45    mode   ILP32 size/align      LP64 size/align
  46    XF     -                     -
  47    TF     16/8                  -
  48
  49    We fix this up here.  */
  50
  51 ADJUST_FLOAT_FORMAT (XF, (TARGET_ILP32 && !TARGET_HPUX)
  52                          ? &ieee_extended_intel_96_format
  53                          : &ieee_extended_intel_128_format);
  54 ADJUST_BYTESIZE  (XF, (TARGET_ILP32 && !TARGET_HPUX) ? 12 : 16);
  55 ADJUST_ALIGNMENT (XF, (TARGET_ILP32 && !TARGET_HPUX) ?  4 : 16);
  56
  57 ADJUST_ALIGNMENT (TF, (TARGET_ILP32 &&  TARGET_HPUX) ?  8 : 16);
  58
  59 /* 256-bit integer mode is needed for STACK_SAVEAREA_MODE.  */
  60 INT_MODE (OI, 32);
  61
  62 /* Add any extra modes needed to represent the condition code.
  63
  64    CCImode is used to mark a single predicate register instead
  65    of a register pair.  This is currently only used in reg_raw_mode
  66    so that flow doesn't do something stupid.  */
  67
  68 CC_MODE (CCI);
  69
  70 /* Vector modes.  */
  71 VECTOR_MODES (INT, 4);          /* V4QI V2HI */
  72 VECTOR_MODES (INT, 8);          /* V8QI V4HI V2SI */
  73 VECTOR_MODE (INT, QI, 16);
  74 VECTOR_MODE (INT, HI, 8);
  75 VECTOR_MODE (INT, SI, 4);
  76 VECTOR_MODE (FLOAT, SF, 2);
  77 VECTOR_MODE (FLOAT, SF, 4);
  78