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git.ipfire.org Git - thirdparty/gcc.git/blob - gcc/config/ia64/sfp-machine.h
1 #define _FP_W_TYPE_SIZE 64
2 #define _FP_W_TYPE unsigned long
3 #define _FP_WS_TYPE signed long
4 #define _FP_I_TYPE long
6 typedef int TItype
__attribute__ ((mode (TI
)));
7 typedef unsigned int UTItype
__attribute__ ((mode (TI
)));
9 #define TI_BITS (__CHAR_BIT__ * (int)sizeof(TItype))
11 /* The type of the result of a floating point comparison. This must
12 match `__libgcc_cmp_return__' in GCC for the target. */
13 typedef int __gcc_CMPtype
__attribute__ ((mode (__libgcc_cmp_return__
)));
14 #define CMPtype __gcc_CMPtype
16 #define _FP_MUL_MEAT_Q(R,X,Y) \
17 _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
19 #define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_2_udiv(Q,R,X,Y)
21 #define _FP_NANFRAC_S _FP_QNANBIT_S
22 #define _FP_NANFRAC_D _FP_QNANBIT_D
23 #define _FP_NANFRAC_E _FP_QNANBIT_E, 0
24 #define _FP_NANFRAC_Q _FP_QNANBIT_Q, 0
25 #define _FP_NANSIGN_S 1
26 #define _FP_NANSIGN_D 1
27 #define _FP_NANSIGN_E 1
28 #define _FP_NANSIGN_Q 1
30 #define _FP_KEEPNANFRACP 1
32 /* Here is something Intel misdesigned: the specs don't define
33 the case where we have two NaNs with same mantissas, but
34 different sign. Different operations pick up different NaNs. */
35 #define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \
37 if (_FP_FRAC_GT_##wc(X, Y) \
38 || (_FP_FRAC_EQ_##wc(X,Y) && (OP == '+' || OP == '*'))) \
41 _FP_FRAC_COPY_##wc(R,X); \
46 _FP_FRAC_COPY_##wc(R,Y); \
51 #define FP_EX_INVALID 0x01
52 #define FP_EX_DENORM 0x02
53 #define FP_EX_DIVZERO 0x04
54 #define FP_EX_OVERFLOW 0x08
55 #define FP_EX_UNDERFLOW 0x10
56 #define FP_EX_INEXACT 0x20
58 #define FP_HANDLE_EXCEPTIONS \
61 if (_fex & FP_EX_INVALID) \
64 __asm__ __volatile__ ("frcpa.s0 %0,p1=f0,f0" \
65 : "=f" (tmp) : : "p1" ); \
67 if (_fex & FP_EX_DIVZERO) \
69 __asm__ __volatile__ ("frcpa.s0 %0,p1=f1,f0" \
70 : "=f" (tmp) : : "p1" ); \
72 if (_fex & FP_EX_OVERFLOW) \
74 dummy = __DBL_MAX__; \
75 __asm__ __volatile__ ("fadd.d.s0 %0=%1,%1" \
76 : "=f" (dummy) : "0" (dummy)); \
78 if (_fex & FP_EX_UNDERFLOW) \
80 dummy = __DBL_MIN__; \
81 __asm__ __volatile__ ("fnma.d.s0 %0=%1,%1,f0" \
82 : "=f" (tmp) : "f" (dummy)); \
84 if (_fex & FP_EX_INEXACT) \
86 dummy = __DBL_MAX__; \
87 __asm__ __volatile__ ("fsub.d.s0 %0=%1,f1" \
88 : "=f" (dummy) : "0" (dummy)); \
92 #define FP_RND_NEAREST 0
93 #define FP_RND_ZERO 0xc00L
94 #define FP_RND_PINF 0x800L
95 #define FP_RND_MINF 0x400L
98 unsigned long int _fpsr __attribute__ ((unused)) = FP_RND_NEAREST
100 #define FP_INIT_ROUNDMODE \
102 __asm__ __volatile__ ("mov.m %0=ar.fpsr" \
106 #define FP_ROUNDMODE (_fpsr & 0xc00L)
108 #define __LITTLE_ENDIAN 1234
109 #define __BIG_ENDIAN 4321
111 #define __BYTE_ORDER __LITTLE_ENDIAN
113 /* Define ALIASNAME as a strong alias for NAME. */
114 #define strong_alias(name, aliasname) _strong_alias(name, aliasname)
115 #define _strong_alias(name, aliasname) \
116 extern __typeof (name) aliasname __attribute__ ((alias (#name)));