1 /* Subroutines used for code generation on the Lattice Mico32 architecture.
2 Contributed by Jon Beniston <jon@beniston.com>
4 Copyright (C) 2009, 2010 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it
9 under the terms of the GNU General Public License as published
10 by the Free Software Foundation; either version 3, or (at your
11 option) any later version.
13 GCC is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
24 #include "coretypes.h"
28 #include "hard-reg-set.h"
29 #include "basic-block.h"
30 #include "insn-config.h"
31 #include "conditions.h"
32 #include "insn-flags.h"
33 #include "insn-attr.h"
34 #include "insn-codes.h"
43 #include "diagnostic-core.h"
48 #include "target-def.h"
49 #include "langhooks.h"
50 #include "tm-constrs.h"
53 struct lm32_frame_info
55 HOST_WIDE_INT total_size
; /* number of bytes of entire frame. */
56 HOST_WIDE_INT callee_size
; /* number of bytes to save callee saves. */
57 HOST_WIDE_INT pretend_size
; /* number of bytes we pretend caller did. */
58 HOST_WIDE_INT args_size
; /* number of bytes for outgoing arguments. */
59 HOST_WIDE_INT locals_size
; /* number of bytes for local variables. */
60 unsigned int reg_save_mask
; /* mask of saved registers. */
63 /* Prototypes for static functions. */
64 static rtx
emit_add (rtx dest
, rtx src0
, rtx src1
);
65 static void expand_save_restore (struct lm32_frame_info
*info
, int op
);
66 static void stack_adjust (HOST_WIDE_INT amount
);
67 static bool lm32_in_small_data_p (const_tree
);
68 static void lm32_setup_incoming_varargs (CUMULATIVE_ARGS
* cum
,
69 enum machine_mode mode
, tree type
,
70 int *pretend_size
, int no_rtl
);
71 static bool lm32_rtx_costs (rtx x
, int code
, int outer_code
, int *total
,
73 static bool lm32_can_eliminate (const int, const int);
75 lm32_legitimate_address_p (enum machine_mode mode
, rtx x
, bool strict
);
76 static HOST_WIDE_INT
lm32_compute_frame_size (int size
);
77 static void lm32_option_override (void);
78 static rtx
lm32_function_arg (CUMULATIVE_ARGS
* cum
,
79 enum machine_mode mode
, const_tree type
,
81 static void lm32_function_arg_advance (CUMULATIVE_ARGS
* cum
,
82 enum machine_mode mode
,
83 const_tree type
, bool named
);
85 /* Implement TARGET_OPTION_OPTIMIZATION_TABLE. */
86 static const struct default_options lm32_option_optimization_table
[] =
88 { OPT_LEVELS_1_PLUS
, OPT_fomit_frame_pointer
, NULL
, 1 },
89 { OPT_LEVELS_NONE
, 0, NULL
, 0 }
92 #undef TARGET_OPTION_OVERRIDE
93 #define TARGET_OPTION_OVERRIDE lm32_option_override
94 #undef TARGET_OPTION_OPTIMIZATION_TABLE
95 #define TARGET_OPTION_OPTIMIZATION_TABLE lm32_option_optimization_table
96 #undef TARGET_ADDRESS_COST
97 #define TARGET_ADDRESS_COST hook_int_rtx_bool_0
98 #undef TARGET_RTX_COSTS
99 #define TARGET_RTX_COSTS lm32_rtx_costs
100 #undef TARGET_IN_SMALL_DATA_P
101 #define TARGET_IN_SMALL_DATA_P lm32_in_small_data_p
102 #undef TARGET_PROMOTE_FUNCTION_MODE
103 #define TARGET_PROMOTE_FUNCTION_MODE default_promote_function_mode_always_promote
104 #undef TARGET_SETUP_INCOMING_VARARGS
105 #define TARGET_SETUP_INCOMING_VARARGS lm32_setup_incoming_varargs
106 #undef TARGET_FUNCTION_ARG
107 #define TARGET_FUNCTION_ARG lm32_function_arg
108 #undef TARGET_FUNCTION_ARG_ADVANCE
109 #define TARGET_FUNCTION_ARG_ADVANCE lm32_function_arg_advance
110 #undef TARGET_PROMOTE_PROTOTYPES
111 #define TARGET_PROMOTE_PROTOTYPES hook_bool_const_tree_true
112 #undef TARGET_MIN_ANCHOR_OFFSET
113 #define TARGET_MIN_ANCHOR_OFFSET -0x8000
114 #undef TARGET_MAX_ANCHOR_OFFSET
115 #define TARGET_MAX_ANCHOR_OFFSET 0x7fff
116 #undef TARGET_CAN_ELIMINATE
117 #define TARGET_CAN_ELIMINATE lm32_can_eliminate
118 #undef TARGET_LEGITIMATE_ADDRESS_P
119 #define TARGET_LEGITIMATE_ADDRESS_P lm32_legitimate_address_p
121 struct gcc_target targetm
= TARGET_INITIALIZER
;
123 /* Current frame information calculated by lm32_compute_frame_size. */
124 static struct lm32_frame_info current_frame_info
;
126 /* Return non-zero if the given return type should be returned in memory. */
129 lm32_return_in_memory (tree type
)
133 if (!AGGREGATE_TYPE_P (type
))
135 /* All simple types are returned in registers. */
139 size
= int_size_in_bytes (type
);
140 if (size
>= 0 && size
<= UNITS_PER_WORD
)
142 /* If it can fit in one register. */
149 /* Generate an emit a word sized add instruction. */
152 emit_add (rtx dest
, rtx src0
, rtx src1
)
155 insn
= emit_insn (gen_addsi3 (dest
, src0
, src1
));
159 /* Generate the code to compare (and possibly branch) two integer values
160 TEST_CODE is the comparison code we are trying to emulate
161 (or implement directly)
162 RESULT is where to store the result of the comparison,
163 or null to emit a branch
164 CMP0 CMP1 are the two comparison operands
165 DESTINATION is the destination of the branch, or null to only compare
169 gen_int_relational (enum rtx_code code
,
175 enum machine_mode mode
;
178 mode
= GET_MODE (cmp0
);
179 if (mode
== VOIDmode
)
180 mode
= GET_MODE (cmp1
);
182 /* Is this a branch or compare. */
183 branch_p
= (destination
!= 0);
185 /* Instruction set doesn't support LE or LT, so swap operands and use
196 code
= swap_condition (code
);
208 rtx insn
, cond
, label
;
210 /* Operands must be in registers. */
211 if (!register_operand (cmp0
, mode
))
212 cmp0
= force_reg (mode
, cmp0
);
213 if (!register_operand (cmp1
, mode
))
214 cmp1
= force_reg (mode
, cmp1
);
216 /* Generate conditional branch instruction. */
217 cond
= gen_rtx_fmt_ee (code
, mode
, cmp0
, cmp1
);
218 label
= gen_rtx_LABEL_REF (VOIDmode
, destination
);
219 insn
= gen_rtx_SET (VOIDmode
, pc_rtx
,
220 gen_rtx_IF_THEN_ELSE (VOIDmode
,
221 cond
, label
, pc_rtx
));
222 emit_jump_insn (insn
);
226 /* We can't have const_ints in cmp0, other than 0. */
227 if ((GET_CODE (cmp0
) == CONST_INT
) && (INTVAL (cmp0
) != 0))
228 cmp0
= force_reg (mode
, cmp0
);
230 /* If the comparison is against an int not in legal range
231 move it into a register. */
232 if (GET_CODE (cmp1
) == CONST_INT
)
242 if (!satisfies_constraint_K (cmp1
))
243 cmp1
= force_reg (mode
, cmp1
);
249 if (!satisfies_constraint_L (cmp1
))
250 cmp1
= force_reg (mode
, cmp1
);
257 /* Generate compare instruction. */
258 emit_move_insn (result
, gen_rtx_fmt_ee (code
, mode
, cmp0
, cmp1
));
262 /* Try performing the comparison in OPERANDS[1], whose arms are OPERANDS[2]
263 and OPERAND[3]. Store the result in OPERANDS[0]. */
266 lm32_expand_scc (rtx operands
[])
268 rtx target
= operands
[0];
269 enum rtx_code code
= GET_CODE (operands
[1]);
270 rtx op0
= operands
[2];
271 rtx op1
= operands
[3];
273 gen_int_relational (code
, target
, op0
, op1
, NULL_RTX
);
276 /* Compare OPERANDS[1] with OPERANDS[2] using comparison code
277 CODE and jump to OPERANDS[3] if the condition holds. */
280 lm32_expand_conditional_branch (rtx operands
[])
282 enum rtx_code code
= GET_CODE (operands
[0]);
283 rtx op0
= operands
[1];
284 rtx op1
= operands
[2];
285 rtx destination
= operands
[3];
287 gen_int_relational (code
, NULL_RTX
, op0
, op1
, destination
);
290 /* Generate and emit RTL to save or restore callee save registers. */
292 expand_save_restore (struct lm32_frame_info
*info
, int op
)
294 unsigned int reg_save_mask
= info
->reg_save_mask
;
296 HOST_WIDE_INT offset
;
299 /* Callee saves are below locals and above outgoing arguments. */
300 offset
= info
->args_size
+ info
->callee_size
;
301 for (regno
= 0; regno
<= 31; regno
++)
303 if ((reg_save_mask
& (1 << regno
)) != 0)
308 offset_rtx
= GEN_INT (offset
);
309 if (satisfies_constraint_K (offset_rtx
))
311 mem
= gen_rtx_MEM (word_mode
,
318 /* r10 is caller saved so it can be used as a temp reg. */
321 r10
= gen_rtx_REG (word_mode
, 10);
322 insn
= emit_move_insn (r10
, offset_rtx
);
324 RTX_FRAME_RELATED_P (insn
) = 1;
325 insn
= emit_add (r10
, r10
, stack_pointer_rtx
);
327 RTX_FRAME_RELATED_P (insn
) = 1;
328 mem
= gen_rtx_MEM (word_mode
, r10
);
332 insn
= emit_move_insn (mem
, gen_rtx_REG (word_mode
, regno
));
334 insn
= emit_move_insn (gen_rtx_REG (word_mode
, regno
), mem
);
336 /* only prologue instructions which set the sp fp or save a
337 register should be marked as frame related. */
339 RTX_FRAME_RELATED_P (insn
) = 1;
340 offset
-= UNITS_PER_WORD
;
346 stack_adjust (HOST_WIDE_INT amount
)
350 if (!IN_RANGE (amount
, -32776, 32768))
352 /* r10 is caller saved so it can be used as a temp reg. */
354 r10
= gen_rtx_REG (word_mode
, 10);
355 insn
= emit_move_insn (r10
, GEN_INT (amount
));
357 RTX_FRAME_RELATED_P (insn
) = 1;
358 insn
= emit_add (stack_pointer_rtx
, stack_pointer_rtx
, r10
);
360 RTX_FRAME_RELATED_P (insn
) = 1;
364 insn
= emit_add (stack_pointer_rtx
,
365 stack_pointer_rtx
, GEN_INT (amount
));
367 RTX_FRAME_RELATED_P (insn
) = 1;
372 /* Create and emit instructions for a functions prologue. */
374 lm32_expand_prologue (void)
378 lm32_compute_frame_size (get_frame_size ());
380 if (current_frame_info
.total_size
> 0)
382 /* Add space on stack new frame. */
383 stack_adjust (-current_frame_info
.total_size
);
385 /* Save callee save registers. */
386 if (current_frame_info
.reg_save_mask
!= 0)
387 expand_save_restore (¤t_frame_info
, 0);
389 /* Setup frame pointer if it's needed. */
390 if (frame_pointer_needed
== 1)
392 /* Load offset - Don't use total_size, as that includes pretend_size,
393 which isn't part of this frame? */
395 emit_move_insn (frame_pointer_rtx
,
396 GEN_INT (current_frame_info
.args_size
+
397 current_frame_info
.callee_size
+
398 current_frame_info
.locals_size
));
399 RTX_FRAME_RELATED_P (insn
) = 1;
402 insn
= emit_add (frame_pointer_rtx
,
403 frame_pointer_rtx
, stack_pointer_rtx
);
404 RTX_FRAME_RELATED_P (insn
) = 1;
407 /* Prevent prologue from being scheduled into function body. */
408 emit_insn (gen_blockage ());
412 /* Create an emit instructions for a functions epilogue. */
414 lm32_expand_epilogue (void)
416 rtx ra_rtx
= gen_rtx_REG (Pmode
, RA_REGNUM
);
418 lm32_compute_frame_size (get_frame_size ());
420 if (current_frame_info
.total_size
> 0)
422 /* Prevent stack code from being reordered. */
423 emit_insn (gen_blockage ());
425 /* Restore callee save registers. */
426 if (current_frame_info
.reg_save_mask
!= 0)
427 expand_save_restore (¤t_frame_info
, 1);
429 /* Deallocate stack. */
430 stack_adjust (current_frame_info
.total_size
);
432 /* Return to calling function. */
433 emit_jump_insn (gen_return_internal (ra_rtx
));
437 /* Return to calling function. */
438 emit_jump_insn (gen_return_internal (ra_rtx
));
442 /* Return the bytes needed to compute the frame pointer from the current
445 lm32_compute_frame_size (int size
)
448 HOST_WIDE_INT total_size
, locals_size
, args_size
, pretend_size
, callee_size
;
449 unsigned int reg_save_mask
;
452 args_size
= crtl
->outgoing_args_size
;
453 pretend_size
= crtl
->args
.pretend_args_size
;
457 /* Build mask that actually determines which regsiters we save
458 and calculate size required to store them in the stack. */
459 for (regno
= 1; regno
< SP_REGNUM
; regno
++)
461 if (df_regs_ever_live_p (regno
) && !call_used_regs
[regno
])
463 reg_save_mask
|= 1 << regno
;
464 callee_size
+= UNITS_PER_WORD
;
467 if (df_regs_ever_live_p (RA_REGNUM
) || !current_function_is_leaf
470 reg_save_mask
|= 1 << RA_REGNUM
;
471 callee_size
+= UNITS_PER_WORD
;
473 if (!(reg_save_mask
& (1 << FP_REGNUM
)) && frame_pointer_needed
)
475 reg_save_mask
|= 1 << FP_REGNUM
;
476 callee_size
+= UNITS_PER_WORD
;
479 /* Compute total frame size. */
480 total_size
= pretend_size
+ args_size
+ locals_size
+ callee_size
;
482 /* Align frame to appropriate boundary. */
483 total_size
= (total_size
+ 3) & ~3;
485 /* Save computed information. */
486 current_frame_info
.total_size
= total_size
;
487 current_frame_info
.callee_size
= callee_size
;
488 current_frame_info
.pretend_size
= pretend_size
;
489 current_frame_info
.locals_size
= locals_size
;
490 current_frame_info
.args_size
= args_size
;
491 current_frame_info
.reg_save_mask
= reg_save_mask
;
497 lm32_print_operand (FILE * file
, rtx op
, int letter
)
501 code
= GET_CODE (op
);
503 if (code
== SIGN_EXTEND
)
504 op
= XEXP (op
, 0), code
= GET_CODE (op
);
505 else if (code
== REG
|| code
== SUBREG
)
512 regnum
= true_regnum (op
);
514 fprintf (file
, "%s", reg_names
[regnum
]);
516 else if (code
== HIGH
)
517 output_addr_const (file
, XEXP (op
, 0));
518 else if (code
== MEM
)
519 output_address (XEXP (op
, 0));
520 else if (letter
== 'z' && GET_CODE (op
) == CONST_INT
&& INTVAL (op
) == 0)
521 fprintf (file
, "%s", reg_names
[0]);
522 else if (GET_CODE (op
) == CONST_DOUBLE
)
524 if ((CONST_DOUBLE_LOW (op
) != 0) || (CONST_DOUBLE_HIGH (op
) != 0))
525 output_operand_lossage ("only 0.0 can be loaded as an immediate");
530 fprintf (file
, "e ");
532 fprintf (file
, "ne ");
534 fprintf (file
, "g ");
535 else if (code
== GTU
)
536 fprintf (file
, "gu ");
538 fprintf (file
, "l ");
539 else if (code
== LTU
)
540 fprintf (file
, "lu ");
542 fprintf (file
, "ge ");
543 else if (code
== GEU
)
544 fprintf (file
, "geu");
546 fprintf (file
, "le ");
547 else if (code
== LEU
)
548 fprintf (file
, "leu");
550 output_addr_const (file
, op
);
553 /* A C compound statement to output to stdio stream STREAM the
554 assembler syntax for an instruction operand that is a memory
555 reference whose address is ADDR. ADDR is an RTL expression.
557 On some machines, the syntax for a symbolic address depends on
558 the section that the address refers to. On these machines,
559 define the macro `ENCODE_SECTION_INFO' to store the information
560 into the `symbol_ref', and then check for it here. */
563 lm32_print_operand_address (FILE * file
, rtx addr
)
565 switch (GET_CODE (addr
))
568 fprintf (file
, "(%s+0)", reg_names
[REGNO (addr
)]);
572 output_address (XEXP (addr
, 0));
577 rtx arg0
= XEXP (addr
, 0);
578 rtx arg1
= XEXP (addr
, 1);
580 if (GET_CODE (arg0
) == REG
&& CONSTANT_P (arg1
))
582 if (GET_CODE (arg1
) == CONST_INT
)
583 fprintf (file
, "(%s+%ld)", reg_names
[REGNO (arg0
)],
587 fprintf (file
, "(%s+", reg_names
[REGNO (arg0
)]);
588 output_addr_const (file
, arg1
);
592 else if (CONSTANT_P (arg0
) && CONSTANT_P (arg1
))
593 output_addr_const (file
, addr
);
595 fatal_insn ("bad operand", addr
);
600 if (SYMBOL_REF_SMALL_P (addr
))
602 fprintf (file
, "gp(");
603 output_addr_const (file
, addr
);
607 fatal_insn ("can't use non gp relative absolute address", addr
);
611 fatal_insn ("invalid addressing mode", addr
);
616 /* Determine where to put an argument to a function.
617 Value is zero to push the argument on the stack,
618 or a hard register in which to store the argument.
620 MODE is the argument's machine mode.
621 TYPE is the data type of the argument (as a tree).
622 This is null for libcalls where that information may
624 CUM is a variable of type CUMULATIVE_ARGS which gives info about
625 the preceding args and about the function being called.
626 NAMED is nonzero if this argument is a named parameter
627 (otherwise it is an extra parameter matching an ellipsis). */
630 lm32_function_arg (CUMULATIVE_ARGS
*cum
, enum machine_mode mode
,
631 const_tree type
, bool named
)
633 if (mode
== VOIDmode
)
634 /* Compute operand 2 of the call insn. */
637 if (targetm
.calls
.must_pass_in_stack (mode
, type
))
640 if (!named
|| (*cum
+ LM32_NUM_REGS2 (mode
, type
) > LM32_NUM_ARG_REGS
))
643 return gen_rtx_REG (mode
, *cum
+ LM32_FIRST_ARG_REG
);
647 lm32_function_arg_advance (CUMULATIVE_ARGS
*cum
, enum machine_mode mode
,
648 const_tree type
, bool named ATTRIBUTE_UNUSED
)
650 *cum
+= LM32_NUM_REGS2 (mode
, type
);
654 lm32_compute_initial_elimination_offset (int from
, int to
)
656 HOST_WIDE_INT offset
= 0;
660 case ARG_POINTER_REGNUM
:
663 case FRAME_POINTER_REGNUM
:
666 case STACK_POINTER_REGNUM
:
668 lm32_compute_frame_size (get_frame_size ()) -
669 current_frame_info
.pretend_size
;
683 lm32_setup_incoming_varargs (CUMULATIVE_ARGS
* cum
, enum machine_mode mode
,
684 tree type
, int *pretend_size
, int no_rtl
)
689 fntype
= TREE_TYPE (current_function_decl
);
691 if (stdarg_p (fntype
))
692 first_anon_arg
= *cum
+ LM32_FIRST_ARG_REG
;
695 /* this is the common case, we have been passed details setup
696 for the last named argument, we want to skip over the
697 registers, if any used in passing this named paramter in
698 order to determine which is the first registers used to pass
699 anonymous arguments. */
703 size
= int_size_in_bytes (type
);
705 size
= GET_MODE_SIZE (mode
);
708 *cum
+ LM32_FIRST_ARG_REG
+
709 ((size
+ UNITS_PER_WORD
- 1) / UNITS_PER_WORD
);
712 if ((first_anon_arg
< (LM32_FIRST_ARG_REG
+ LM32_NUM_ARG_REGS
)) && !no_rtl
)
714 int first_reg_offset
= first_anon_arg
;
715 int size
= LM32_FIRST_ARG_REG
+ LM32_NUM_ARG_REGS
- first_anon_arg
;
718 regblock
= gen_rtx_MEM (BLKmode
,
719 plus_constant (arg_pointer_rtx
,
720 FIRST_PARM_OFFSET (0)));
721 move_block_from_reg (first_reg_offset
, regblock
, size
);
723 *pretend_size
= size
* UNITS_PER_WORD
;
727 /* Override command line options. */
729 lm32_option_override (void)
731 /* We must have sign-extend enabled if barrel-shift isn't. */
732 if (!TARGET_BARREL_SHIFT_ENABLED
&& !TARGET_SIGN_EXTEND_ENABLED
)
733 target_flags
|= MASK_SIGN_EXTEND_ENABLED
;
736 /* Return nonzero if this function is known to have a null epilogue.
737 This allows the optimizer to omit jumps to jumps if no stack
740 lm32_can_use_return (void)
742 if (!reload_completed
)
745 if (df_regs_ever_live_p (RA_REGNUM
) || crtl
->profile
)
748 if (lm32_compute_frame_size (get_frame_size ()) != 0)
754 /* Support function to determine the return address of the function
755 'count' frames back up the stack. */
757 lm32_return_addr_rtx (int count
, rtx frame
)
762 if (!df_regs_ever_live_p (RA_REGNUM
))
763 r
= gen_rtx_REG (Pmode
, RA_REGNUM
);
766 r
= gen_rtx_MEM (Pmode
,
767 gen_rtx_PLUS (Pmode
, frame
,
768 GEN_INT (-2 * UNITS_PER_WORD
)));
769 set_mem_alias_set (r
, get_frame_alias_set ());
772 else if (flag_omit_frame_pointer
)
776 r
= gen_rtx_MEM (Pmode
,
777 gen_rtx_PLUS (Pmode
, frame
,
778 GEN_INT (-2 * UNITS_PER_WORD
)));
779 set_mem_alias_set (r
, get_frame_alias_set ());
784 /* Return true if EXP should be placed in the small data section. */
787 lm32_in_small_data_p (const_tree exp
)
789 /* We want to merge strings, so we never consider them small data. */
790 if (TREE_CODE (exp
) == STRING_CST
)
793 /* Functions are never in the small data area. Duh. */
794 if (TREE_CODE (exp
) == FUNCTION_DECL
)
797 if (TREE_CODE (exp
) == VAR_DECL
&& DECL_SECTION_NAME (exp
))
799 const char *section
= TREE_STRING_POINTER (DECL_SECTION_NAME (exp
));
800 if (strcmp (section
, ".sdata") == 0 || strcmp (section
, ".sbss") == 0)
805 HOST_WIDE_INT size
= int_size_in_bytes (TREE_TYPE (exp
));
807 /* If this is an incomplete type with size 0, then we can't put it
808 in sdata because it might be too big when completed. */
809 if (size
> 0 && size
<= g_switch_value
)
816 /* Emit straight-line code to move LENGTH bytes from SRC to DEST.
817 Assume that the areas do not overlap. */
820 lm32_block_move_inline (rtx dest
, rtx src
, HOST_WIDE_INT length
,
821 HOST_WIDE_INT alignment
)
823 HOST_WIDE_INT offset
, delta
;
824 unsigned HOST_WIDE_INT bits
;
826 enum machine_mode mode
;
829 /* Work out how many bits to move at a time. */
843 mode
= mode_for_size (bits
, MODE_INT
, 0);
844 delta
= bits
/ BITS_PER_UNIT
;
846 /* Allocate a buffer for the temporary registers. */
847 regs
= XALLOCAVEC (rtx
, length
/ delta
);
849 /* Load as many BITS-sized chunks as possible. */
850 for (offset
= 0, i
= 0; offset
+ delta
<= length
; offset
+= delta
, i
++)
852 regs
[i
] = gen_reg_rtx (mode
);
853 emit_move_insn (regs
[i
], adjust_address (src
, mode
, offset
));
856 /* Copy the chunks to the destination. */
857 for (offset
= 0, i
= 0; offset
+ delta
<= length
; offset
+= delta
, i
++)
858 emit_move_insn (adjust_address (dest
, mode
, offset
), regs
[i
]);
860 /* Mop up any left-over bytes. */
863 src
= adjust_address (src
, BLKmode
, offset
);
864 dest
= adjust_address (dest
, BLKmode
, offset
);
865 move_by_pieces (dest
, src
, length
- offset
,
866 MIN (MEM_ALIGN (src
), MEM_ALIGN (dest
)), 0);
870 /* Expand string/block move operations.
872 operands[0] is the pointer to the destination.
873 operands[1] is the pointer to the source.
874 operands[2] is the number of bytes to move.
875 operands[3] is the alignment. */
878 lm32_expand_block_move (rtx
* operands
)
880 if ((GET_CODE (operands
[2]) == CONST_INT
) && (INTVAL (operands
[2]) <= 32))
882 lm32_block_move_inline (operands
[0], operands
[1], INTVAL (operands
[2]),
883 INTVAL (operands
[3]));
889 /* Return TRUE if X references a SYMBOL_REF or LABEL_REF whose symbol
890 isn't protected by a PIC unspec. */
892 nonpic_symbol_mentioned_p (rtx x
)
897 if (GET_CODE (x
) == SYMBOL_REF
|| GET_CODE (x
) == LABEL_REF
898 || GET_CODE (x
) == PC
)
901 /* We don't want to look into the possible MEM location of a
902 CONST_DOUBLE, since we're not going to use it, in general. */
903 if (GET_CODE (x
) == CONST_DOUBLE
)
906 if (GET_CODE (x
) == UNSPEC
)
909 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
910 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
916 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
917 if (nonpic_symbol_mentioned_p (XVECEXP (x
, i
, j
)))
920 else if (fmt
[i
] == 'e' && nonpic_symbol_mentioned_p (XEXP (x
, i
)))
927 /* Compute a (partial) cost for rtx X. Return true if the complete
928 cost has been computed, and false if subexpressions should be
929 scanned. In either case, *TOTAL contains the cost result. */
932 lm32_rtx_costs (rtx x
, int code
, int outer_code
, int *total
, bool speed
)
934 enum machine_mode mode
= GET_MODE (x
);
937 const int arithmetic_latency
= 1;
938 const int shift_latency
= 1;
939 const int compare_latency
= 2;
940 const int multiply_latency
= 3;
941 const int load_latency
= 3;
942 const int libcall_size_cost
= 5;
944 /* Determine if we can handle the given mode size in a single instruction. */
945 small_mode
= (mode
== QImode
) || (mode
== HImode
) || (mode
== SImode
);
958 *total
= COSTS_N_INSNS (LM32_NUM_REGS (mode
));
961 COSTS_N_INSNS (arithmetic_latency
+ (LM32_NUM_REGS (mode
) - 1));
968 *total
= COSTS_N_INSNS (1);
970 *total
= COSTS_N_INSNS (compare_latency
);
974 /* FIXME. Guessing here. */
975 *total
= COSTS_N_INSNS (LM32_NUM_REGS (mode
) * (2 + 3) / 2);
982 if (TARGET_BARREL_SHIFT_ENABLED
&& small_mode
)
985 *total
= COSTS_N_INSNS (1);
987 *total
= COSTS_N_INSNS (shift_latency
);
989 else if (TARGET_BARREL_SHIFT_ENABLED
)
991 /* FIXME: Guessing here. */
992 *total
= COSTS_N_INSNS (LM32_NUM_REGS (mode
) * 4);
994 else if (small_mode
&& GET_CODE (XEXP (x
, 1)) == CONST_INT
)
996 *total
= COSTS_N_INSNS (INTVAL (XEXP (x
, 1)));
1002 *total
= COSTS_N_INSNS (libcall_size_cost
);
1004 *total
= COSTS_N_INSNS (100);
1009 if (TARGET_MULTIPLY_ENABLED
&& small_mode
)
1012 *total
= COSTS_N_INSNS (1);
1014 *total
= COSTS_N_INSNS (multiply_latency
);
1020 *total
= COSTS_N_INSNS (libcall_size_cost
);
1022 *total
= COSTS_N_INSNS (100);
1030 if (TARGET_DIVIDE_ENABLED
&& small_mode
)
1033 *total
= COSTS_N_INSNS (1);
1036 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
)
1039 unsigned HOST_WIDE_INT i
= INTVAL (XEXP (x
, 1));
1046 if (IN_RANGE (i
, 0, 65536))
1047 *total
= COSTS_N_INSNS (1 + 1 + cycles
);
1049 *total
= COSTS_N_INSNS (2 + 1 + cycles
);
1052 else if (GET_CODE (XEXP (x
, 1)) == REG
)
1054 *total
= COSTS_N_INSNS (1 + GET_MODE_SIZE (mode
) / 2);
1059 *total
= COSTS_N_INSNS (1 + GET_MODE_SIZE (mode
) / 2);
1068 *total
= COSTS_N_INSNS (libcall_size_cost
);
1070 *total
= COSTS_N_INSNS (100);
1077 *total
= COSTS_N_INSNS (1);
1079 *total
= COSTS_N_INSNS (arithmetic_latency
);
1083 if (MEM_P (XEXP (x
, 0)))
1084 *total
= COSTS_N_INSNS (0);
1085 else if (small_mode
)
1088 *total
= COSTS_N_INSNS (1);
1090 *total
= COSTS_N_INSNS (arithmetic_latency
);
1093 *total
= COSTS_N_INSNS (LM32_NUM_REGS (mode
) / 2);
1102 *total
= COSTS_N_INSNS (0);
1113 if (satisfies_constraint_L (x
))
1114 *total
= COSTS_N_INSNS (0);
1116 *total
= COSTS_N_INSNS (2);
1123 if (satisfies_constraint_K (x
))
1124 *total
= COSTS_N_INSNS (0);
1126 *total
= COSTS_N_INSNS (2);
1130 if (TARGET_MULTIPLY_ENABLED
)
1132 if (satisfies_constraint_K (x
))
1133 *total
= COSTS_N_INSNS (0);
1135 *total
= COSTS_N_INSNS (2);
1141 if (satisfies_constraint_K (x
))
1142 *total
= COSTS_N_INSNS (1);
1144 *total
= COSTS_N_INSNS (2);
1155 *total
= COSTS_N_INSNS (0);
1162 *total
= COSTS_N_INSNS (0);
1171 *total
= COSTS_N_INSNS (2);
1175 *total
= COSTS_N_INSNS (1);
1180 *total
= COSTS_N_INSNS (1);
1182 *total
= COSTS_N_INSNS (load_latency
);
1190 /* Implemenent TARGET_CAN_ELIMINATE. */
1193 lm32_can_eliminate (const int from ATTRIBUTE_UNUSED
, const int to
)
1195 return (to
== STACK_POINTER_REGNUM
&& frame_pointer_needed
) ? false : true;
1198 /* Implement TARGET_LEGITIMATE_ADDRESS_P. */
1201 lm32_legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED
, rtx x
, bool strict
)
1204 if (strict
&& REG_P (x
) && STRICT_REG_OK_FOR_BASE_P (x
))
1206 if (!strict
&& REG_P (x
) && NONSTRICT_REG_OK_FOR_BASE_P (x
))
1210 if (GET_CODE (x
) == PLUS
1211 && REG_P (XEXP (x
, 0))
1212 && ((strict
&& STRICT_REG_OK_FOR_BASE_P (XEXP (x
, 0)))
1213 || (!strict
&& NONSTRICT_REG_OK_FOR_BASE_P (XEXP (x
, 0))))
1214 && GET_CODE (XEXP (x
, 1)) == CONST_INT
1215 && satisfies_constraint_K (XEXP ((x
), 1)))
1219 if (GET_CODE (x
) == SYMBOL_REF
&& SYMBOL_REF_SMALL_P (x
))
1225 /* Check a move is not memory to memory. */
1228 lm32_move_ok (enum machine_mode mode
, rtx operands
[2]) {
1229 if (memory_operand (operands
[0], mode
))
1230 return register_or_zero_operand (operands
[1], mode
);
1234 /* Implement LEGITIMATE_CONSTANT_P. */
1237 lm32_legitimate_constant_p (rtx x
)
1239 /* 32-bit addresses require multiple instructions. */
1240 if (!flag_pic
&& reloc_operand (x
, GET_MODE (x
)))