1 /* Subroutines used for code generation on the Lattice Mico32 architecture.
2 Contributed by Jon Beniston <jon@beniston.com>
4 Copyright (C) 2009, 2010 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it
9 under the terms of the GNU General Public License as published
10 by the Free Software Foundation; either version 3, or (at your
11 option) any later version.
13 GCC is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
24 #include "coretypes.h"
28 #include "hard-reg-set.h"
29 #include "basic-block.h"
30 #include "insn-config.h"
31 #include "conditions.h"
32 #include "insn-flags.h"
33 #include "insn-attr.h"
34 #include "insn-codes.h"
43 #include "diagnostic-core.h"
49 #include "target-def.h"
50 #include "langhooks.h"
51 #include "tm-constrs.h"
54 struct lm32_frame_info
56 HOST_WIDE_INT total_size
; /* number of bytes of entire frame. */
57 HOST_WIDE_INT callee_size
; /* number of bytes to save callee saves. */
58 HOST_WIDE_INT pretend_size
; /* number of bytes we pretend caller did. */
59 HOST_WIDE_INT args_size
; /* number of bytes for outgoing arguments. */
60 HOST_WIDE_INT locals_size
; /* number of bytes for local variables. */
61 unsigned int reg_save_mask
; /* mask of saved registers. */
64 /* Prototypes for static functions. */
65 static rtx
emit_add (rtx dest
, rtx src0
, rtx src1
);
66 static void expand_save_restore (struct lm32_frame_info
*info
, int op
);
67 static void stack_adjust (HOST_WIDE_INT amount
);
68 static bool lm32_in_small_data_p (const_tree
);
69 static void lm32_setup_incoming_varargs (CUMULATIVE_ARGS
* cum
,
70 enum machine_mode mode
, tree type
,
71 int *pretend_size
, int no_rtl
);
72 static bool lm32_rtx_costs (rtx x
, int code
, int outer_code
, int *total
,
74 static bool lm32_can_eliminate (const int, const int);
76 lm32_legitimate_address_p (enum machine_mode mode
, rtx x
, bool strict
);
77 static HOST_WIDE_INT
lm32_compute_frame_size (int size
);
78 static bool lm32_handle_option (size_t code
, const char *arg
, int value
);
80 #undef TARGET_HANDLE_OPTION
81 #define TARGET_HANDLE_OPTION lm32_handle_option
82 #undef TARGET_ADDRESS_COST
83 #define TARGET_ADDRESS_COST hook_int_rtx_bool_0
84 #undef TARGET_RTX_COSTS
85 #define TARGET_RTX_COSTS lm32_rtx_costs
86 #undef TARGET_IN_SMALL_DATA_P
87 #define TARGET_IN_SMALL_DATA_P lm32_in_small_data_p
88 #undef TARGET_PROMOTE_FUNCTION_MODE
89 #define TARGET_PROMOTE_FUNCTION_MODE default_promote_function_mode_always_promote
90 #undef TARGET_SETUP_INCOMING_VARARGS
91 #define TARGET_SETUP_INCOMING_VARARGS lm32_setup_incoming_varargs
92 #undef TARGET_PROMOTE_PROTOTYPES
93 #define TARGET_PROMOTE_PROTOTYPES hook_bool_const_tree_true
94 #undef TARGET_MIN_ANCHOR_OFFSET
95 #define TARGET_MIN_ANCHOR_OFFSET -0x8000
96 #undef TARGET_MAX_ANCHOR_OFFSET
97 #define TARGET_MAX_ANCHOR_OFFSET 0x7fff
98 #undef TARGET_CAN_ELIMINATE
99 #define TARGET_CAN_ELIMINATE lm32_can_eliminate
100 #undef TARGET_LEGITIMATE_ADDRESS_P
101 #define TARGET_LEGITIMATE_ADDRESS_P lm32_legitimate_address_p
103 struct gcc_target targetm
= TARGET_INITIALIZER
;
105 /* Current frame information calculated by lm32_compute_frame_size. */
106 static struct lm32_frame_info current_frame_info
;
108 /* Return non-zero if the given return type should be returned in memory. */
111 lm32_return_in_memory (tree type
)
115 if (!AGGREGATE_TYPE_P (type
))
117 /* All simple types are returned in registers. */
121 size
= int_size_in_bytes (type
);
122 if (size
>= 0 && size
<= UNITS_PER_WORD
)
124 /* If it can fit in one register. */
131 /* Generate an emit a word sized add instruction. */
134 emit_add (rtx dest
, rtx src0
, rtx src1
)
137 insn
= emit_insn (gen_addsi3 (dest
, src0
, src1
));
141 /* Generate the code to compare (and possibly branch) two integer values
142 TEST_CODE is the comparison code we are trying to emulate
143 (or implement directly)
144 RESULT is where to store the result of the comparison,
145 or null to emit a branch
146 CMP0 CMP1 are the two comparison operands
147 DESTINATION is the destination of the branch, or null to only compare
151 gen_int_relational (enum rtx_code code
,
157 enum machine_mode mode
;
160 mode
= GET_MODE (cmp0
);
161 if (mode
== VOIDmode
)
162 mode
= GET_MODE (cmp1
);
164 /* Is this a branch or compare. */
165 branch_p
= (destination
!= 0);
167 /* Instruction set doesn't support LE or LT, so swap operands and use
175 code
= swap_condition (code
);
188 /* Operands must be in registers. */
189 if (!register_operand (cmp0
, mode
))
190 cmp0
= force_reg (mode
, cmp0
);
191 if (!register_operand (cmp1
, mode
))
192 cmp1
= force_reg (mode
, cmp1
);
194 /* Generate conditional branch instruction. */
195 rtx cond
= gen_rtx_fmt_ee (code
, mode
, cmp0
, cmp1
);
196 rtx label
= gen_rtx_LABEL_REF (VOIDmode
, destination
);
197 insn
= gen_rtx_SET (VOIDmode
, pc_rtx
,
198 gen_rtx_IF_THEN_ELSE (VOIDmode
,
199 cond
, label
, pc_rtx
));
200 emit_jump_insn (insn
);
204 /* We can't have const_ints in cmp0, other than 0. */
205 if ((GET_CODE (cmp0
) == CONST_INT
) && (INTVAL (cmp0
) != 0))
206 cmp0
= force_reg (mode
, cmp0
);
208 /* If the comparison is against an int not in legal range
209 move it into a register. */
210 if (GET_CODE (cmp1
) == CONST_INT
)
220 if (!satisfies_constraint_K (cmp1
))
221 cmp1
= force_reg (mode
, cmp1
);
227 if (!satisfies_constraint_L (cmp1
))
228 cmp1
= force_reg (mode
, cmp1
);
235 /* Generate compare instruction. */
236 emit_move_insn (result
, gen_rtx_fmt_ee (code
, mode
, cmp0
, cmp1
));
240 /* Try performing the comparison in OPERANDS[1], whose arms are OPERANDS[2]
241 and OPERAND[3]. Store the result in OPERANDS[0]. */
244 lm32_expand_scc (rtx operands
[])
246 rtx target
= operands
[0];
247 enum rtx_code code
= GET_CODE (operands
[1]);
248 rtx op0
= operands
[2];
249 rtx op1
= operands
[3];
251 gen_int_relational (code
, target
, op0
, op1
, NULL_RTX
);
254 /* Compare OPERANDS[1] with OPERANDS[2] using comparison code
255 CODE and jump to OPERANDS[3] if the condition holds. */
258 lm32_expand_conditional_branch (rtx operands
[])
260 enum rtx_code code
= GET_CODE (operands
[0]);
261 rtx op0
= operands
[1];
262 rtx op1
= operands
[2];
263 rtx destination
= operands
[3];
265 gen_int_relational (code
, NULL_RTX
, op0
, op1
, destination
);
268 /* Generate and emit RTL to save or restore callee save registers. */
270 expand_save_restore (struct lm32_frame_info
*info
, int op
)
272 unsigned int reg_save_mask
= info
->reg_save_mask
;
274 HOST_WIDE_INT offset
;
277 /* Callee saves are below locals and above outgoing arguments. */
278 offset
= info
->args_size
+ info
->callee_size
;
279 for (regno
= 0; regno
<= 31; regno
++)
281 if ((reg_save_mask
& (1 << regno
)) != 0)
286 offset_rtx
= GEN_INT (offset
);
287 if (satisfies_constraint_K (offset_rtx
))
289 mem
= gen_rtx_MEM (word_mode
,
296 /* r10 is caller saved so it can be used as a temp reg. */
299 r10
= gen_rtx_REG (word_mode
, 10);
300 insn
= emit_move_insn (r10
, offset_rtx
);
302 RTX_FRAME_RELATED_P (insn
) = 1;
303 insn
= emit_add (r10
, r10
, stack_pointer_rtx
);
305 RTX_FRAME_RELATED_P (insn
) = 1;
306 mem
= gen_rtx_MEM (word_mode
, r10
);
310 insn
= emit_move_insn (mem
, gen_rtx_REG (word_mode
, regno
));
312 insn
= emit_move_insn (gen_rtx_REG (word_mode
, regno
), mem
);
314 /* only prologue instructions which set the sp fp or save a
315 register should be marked as frame related. */
317 RTX_FRAME_RELATED_P (insn
) = 1;
318 offset
-= UNITS_PER_WORD
;
324 stack_adjust (HOST_WIDE_INT amount
)
328 if (!IN_RANGE (amount
, -32776, 32768))
330 /* r10 is caller saved so it can be used as a temp reg. */
332 r10
= gen_rtx_REG (word_mode
, 10);
333 insn
= emit_move_insn (r10
, GEN_INT (amount
));
335 RTX_FRAME_RELATED_P (insn
) = 1;
336 insn
= emit_add (stack_pointer_rtx
, stack_pointer_rtx
, r10
);
338 RTX_FRAME_RELATED_P (insn
) = 1;
342 insn
= emit_add (stack_pointer_rtx
,
343 stack_pointer_rtx
, GEN_INT (amount
));
345 RTX_FRAME_RELATED_P (insn
) = 1;
350 /* Create and emit instructions for a functions prologue. */
352 lm32_expand_prologue (void)
356 lm32_compute_frame_size (get_frame_size ());
358 if (current_frame_info
.total_size
> 0)
360 /* Add space on stack new frame. */
361 stack_adjust (-current_frame_info
.total_size
);
363 /* Save callee save registers. */
364 if (current_frame_info
.reg_save_mask
!= 0)
365 expand_save_restore (¤t_frame_info
, 0);
367 /* Setup frame pointer if it's needed. */
368 if (frame_pointer_needed
== 1)
370 /* Load offset - Don't use total_size, as that includes pretend_size,
371 which isn't part of this frame? */
373 emit_move_insn (frame_pointer_rtx
,
374 GEN_INT (current_frame_info
.args_size
+
375 current_frame_info
.callee_size
+
376 current_frame_info
.locals_size
));
377 RTX_FRAME_RELATED_P (insn
) = 1;
380 insn
= emit_add (frame_pointer_rtx
,
381 frame_pointer_rtx
, stack_pointer_rtx
);
382 RTX_FRAME_RELATED_P (insn
) = 1;
385 /* Prevent prologue from being scheduled into function body. */
386 emit_insn (gen_blockage ());
390 /* Create an emit instructions for a functions epilogue. */
392 lm32_expand_epilogue (void)
394 rtx ra_rtx
= gen_rtx_REG (Pmode
, RA_REGNUM
);
396 lm32_compute_frame_size (get_frame_size ());
398 if (current_frame_info
.total_size
> 0)
400 /* Prevent stack code from being reordered. */
401 emit_insn (gen_blockage ());
403 /* Restore callee save registers. */
404 if (current_frame_info
.reg_save_mask
!= 0)
405 expand_save_restore (¤t_frame_info
, 1);
407 /* Deallocate stack. */
408 stack_adjust (current_frame_info
.total_size
);
410 /* Return to calling function. */
411 emit_jump_insn (gen_return_internal (ra_rtx
));
415 /* Return to calling function. */
416 emit_jump_insn (gen_return_internal (ra_rtx
));
420 /* Return the bytes needed to compute the frame pointer from the current
423 lm32_compute_frame_size (int size
)
426 HOST_WIDE_INT total_size
, locals_size
, args_size
, pretend_size
, callee_size
;
427 unsigned int reg_save_mask
;
430 args_size
= crtl
->outgoing_args_size
;
431 pretend_size
= crtl
->args
.pretend_args_size
;
435 /* Build mask that actually determines which regsiters we save
436 and calculate size required to store them in the stack. */
437 for (regno
= 1; regno
< SP_REGNUM
; regno
++)
439 if (df_regs_ever_live_p (regno
) && !call_used_regs
[regno
])
441 reg_save_mask
|= 1 << regno
;
442 callee_size
+= UNITS_PER_WORD
;
445 if (df_regs_ever_live_p (RA_REGNUM
) || !current_function_is_leaf
448 reg_save_mask
|= 1 << RA_REGNUM
;
449 callee_size
+= UNITS_PER_WORD
;
451 if (!(reg_save_mask
& (1 << FP_REGNUM
)) && frame_pointer_needed
)
453 reg_save_mask
|= 1 << FP_REGNUM
;
454 callee_size
+= UNITS_PER_WORD
;
457 /* Compute total frame size. */
458 total_size
= pretend_size
+ args_size
+ locals_size
+ callee_size
;
460 /* Align frame to appropriate boundary. */
461 total_size
= (total_size
+ 3) & ~3;
463 /* Save computed information. */
464 current_frame_info
.total_size
= total_size
;
465 current_frame_info
.callee_size
= callee_size
;
466 current_frame_info
.pretend_size
= pretend_size
;
467 current_frame_info
.locals_size
= locals_size
;
468 current_frame_info
.args_size
= args_size
;
469 current_frame_info
.reg_save_mask
= reg_save_mask
;
475 lm32_print_operand (FILE * file
, rtx op
, int letter
)
479 code
= GET_CODE (op
);
481 if (code
== SIGN_EXTEND
)
482 op
= XEXP (op
, 0), code
= GET_CODE (op
);
483 else if (code
== REG
|| code
== SUBREG
)
490 regnum
= true_regnum (op
);
492 fprintf (file
, "%s", reg_names
[regnum
]);
494 else if (code
== HIGH
)
495 output_addr_const (file
, XEXP (op
, 0));
496 else if (code
== MEM
)
497 output_address (XEXP (op
, 0));
498 else if (letter
== 'z' && GET_CODE (op
) == CONST_INT
&& INTVAL (op
) == 0)
499 fprintf (file
, "%s", reg_names
[0]);
500 else if (GET_CODE (op
) == CONST_DOUBLE
)
502 if ((CONST_DOUBLE_LOW (op
) != 0) || (CONST_DOUBLE_HIGH (op
) != 0))
503 output_operand_lossage ("Only 0.0 can be loaded as an immediate");
508 fprintf (file
, "e ");
510 fprintf (file
, "ne ");
512 fprintf (file
, "g ");
513 else if (code
== GTU
)
514 fprintf (file
, "gu ");
516 fprintf (file
, "l ");
517 else if (code
== LTU
)
518 fprintf (file
, "lu ");
520 fprintf (file
, "ge ");
521 else if (code
== GEU
)
522 fprintf (file
, "geu");
524 fprintf (file
, "le ");
525 else if (code
== LEU
)
526 fprintf (file
, "leu");
528 output_addr_const (file
, op
);
531 /* A C compound statement to output to stdio stream STREAM the
532 assembler syntax for an instruction operand that is a memory
533 reference whose address is ADDR. ADDR is an RTL expression.
535 On some machines, the syntax for a symbolic address depends on
536 the section that the address refers to. On these machines,
537 define the macro `ENCODE_SECTION_INFO' to store the information
538 into the `symbol_ref', and then check for it here. */
541 lm32_print_operand_address (FILE * file
, rtx addr
)
543 switch (GET_CODE (addr
))
546 fprintf (file
, "(%s+0)", reg_names
[REGNO (addr
)]);
550 output_address (XEXP (addr
, 0));
555 rtx arg0
= XEXP (addr
, 0);
556 rtx arg1
= XEXP (addr
, 1);
558 if (GET_CODE (arg0
) == REG
&& CONSTANT_P (arg1
))
560 if (GET_CODE (arg1
) == CONST_INT
)
561 fprintf (file
, "(%s+%ld)", reg_names
[REGNO (arg0
)],
565 fprintf (file
, "(%s+", reg_names
[REGNO (arg0
)]);
566 output_addr_const (file
, arg1
);
570 else if (CONSTANT_P (arg0
) && CONSTANT_P (arg1
))
571 output_addr_const (file
, addr
);
573 fatal_insn ("bad operand", addr
);
578 if (SYMBOL_REF_SMALL_P (addr
))
580 fprintf (file
, "gp(");
581 output_addr_const (file
, addr
);
585 fatal_insn ("can't use non gp relative absolute address", addr
);
589 fatal_insn ("invalid addressing mode", addr
);
594 /* Determine where to put an argument to a function.
595 Value is zero to push the argument on the stack,
596 or a hard register in which to store the argument.
598 MODE is the argument's machine mode.
599 TYPE is the data type of the argument (as a tree).
600 This is null for libcalls where that information may
602 CUM is a variable of type CUMULATIVE_ARGS which gives info about
603 the preceding args and about the function being called.
604 NAMED is nonzero if this argument is a named parameter
605 (otherwise it is an extra parameter matching an ellipsis). */
608 lm32_function_arg (CUMULATIVE_ARGS cum
, enum machine_mode mode
,
609 tree type
, int named
)
611 if (mode
== VOIDmode
)
612 /* Compute operand 2 of the call insn. */
615 if (targetm
.calls
.must_pass_in_stack (mode
, type
))
618 if (!named
|| (cum
+ LM32_NUM_REGS2 (mode
, type
) > LM32_NUM_ARG_REGS
))
621 return gen_rtx_REG (mode
, cum
+ LM32_FIRST_ARG_REG
);
625 lm32_compute_initial_elimination_offset (int from
, int to
)
627 HOST_WIDE_INT offset
= 0;
631 case ARG_POINTER_REGNUM
:
634 case FRAME_POINTER_REGNUM
:
637 case STACK_POINTER_REGNUM
:
639 lm32_compute_frame_size (get_frame_size ()) -
640 current_frame_info
.pretend_size
;
654 lm32_setup_incoming_varargs (CUMULATIVE_ARGS
* cum
, enum machine_mode mode
,
655 tree type
, int *pretend_size
, int no_rtl
)
660 fntype
= TREE_TYPE (current_function_decl
);
662 if (stdarg_p (fntype
))
663 first_anon_arg
= *cum
+ LM32_FIRST_ARG_REG
;
666 /* this is the common case, we have been passed details setup
667 for the last named argument, we want to skip over the
668 registers, if any used in passing this named paramter in
669 order to determine which is the first registers used to pass
670 anonymous arguments. */
674 size
= int_size_in_bytes (type
);
676 size
= GET_MODE_SIZE (mode
);
679 *cum
+ LM32_FIRST_ARG_REG
+
680 ((size
+ UNITS_PER_WORD
- 1) / UNITS_PER_WORD
);
683 if ((first_anon_arg
< (LM32_FIRST_ARG_REG
+ LM32_NUM_ARG_REGS
)) && !no_rtl
)
685 int first_reg_offset
= first_anon_arg
;
686 int size
= LM32_FIRST_ARG_REG
+ LM32_NUM_ARG_REGS
- first_anon_arg
;
689 regblock
= gen_rtx_MEM (BLKmode
,
690 plus_constant (arg_pointer_rtx
,
691 FIRST_PARM_OFFSET (0)));
692 move_block_from_reg (first_reg_offset
, regblock
, size
);
694 *pretend_size
= size
* UNITS_PER_WORD
;
698 /* Implement TARGET_HANDLE_OPTION. */
701 lm32_handle_option (size_t code
, const char *arg ATTRIBUTE_UNUSED
, int value
)
706 g_switch_value
= value
;
715 /* Override command line options. */
717 lm32_override_options (void)
719 /* We must have sign-extend enabled if barrel-shift isn't. */
720 if (!TARGET_BARREL_SHIFT_ENABLED
&& !TARGET_SIGN_EXTEND_ENABLED
)
721 target_flags
|= MASK_SIGN_EXTEND_ENABLED
;
724 /* Return nonzero if this function is known to have a null epilogue.
725 This allows the optimizer to omit jumps to jumps if no stack
728 lm32_can_use_return (void)
730 if (!reload_completed
)
733 if (df_regs_ever_live_p (RA_REGNUM
) || crtl
->profile
)
736 if (lm32_compute_frame_size (get_frame_size ()) != 0)
742 /* Support function to determine the return address of the function
743 'count' frames back up the stack. */
745 lm32_return_addr_rtx (int count
, rtx frame
)
750 if (!df_regs_ever_live_p (RA_REGNUM
))
751 r
= gen_rtx_REG (Pmode
, RA_REGNUM
);
754 r
= gen_rtx_MEM (Pmode
,
755 gen_rtx_PLUS (Pmode
, frame
,
756 GEN_INT (-2 * UNITS_PER_WORD
)));
757 set_mem_alias_set (r
, get_frame_alias_set ());
760 else if (flag_omit_frame_pointer
)
764 r
= gen_rtx_MEM (Pmode
,
765 gen_rtx_PLUS (Pmode
, frame
,
766 GEN_INT (-2 * UNITS_PER_WORD
)));
767 set_mem_alias_set (r
, get_frame_alias_set ());
772 /* Return true if EXP should be placed in the small data section. */
775 lm32_in_small_data_p (const_tree exp
)
777 /* We want to merge strings, so we never consider them small data. */
778 if (TREE_CODE (exp
) == STRING_CST
)
781 /* Functions are never in the small data area. Duh. */
782 if (TREE_CODE (exp
) == FUNCTION_DECL
)
785 if (TREE_CODE (exp
) == VAR_DECL
&& DECL_SECTION_NAME (exp
))
787 const char *section
= TREE_STRING_POINTER (DECL_SECTION_NAME (exp
));
788 if (strcmp (section
, ".sdata") == 0 || strcmp (section
, ".sbss") == 0)
793 HOST_WIDE_INT size
= int_size_in_bytes (TREE_TYPE (exp
));
795 /* If this is an incomplete type with size 0, then we can't put it
796 in sdata because it might be too big when completed. */
797 if (size
> 0 && (unsigned HOST_WIDE_INT
) size
<= g_switch_value
)
804 /* Emit straight-line code to move LENGTH bytes from SRC to DEST.
805 Assume that the areas do not overlap. */
808 lm32_block_move_inline (rtx dest
, rtx src
, HOST_WIDE_INT length
,
809 HOST_WIDE_INT alignment
)
811 HOST_WIDE_INT offset
, delta
;
812 unsigned HOST_WIDE_INT bits
;
814 enum machine_mode mode
;
817 /* Work out how many bits to move at a time. */
831 mode
= mode_for_size (bits
, MODE_INT
, 0);
832 delta
= bits
/ BITS_PER_UNIT
;
834 /* Allocate a buffer for the temporary registers. */
835 regs
= alloca (sizeof (rtx
) * length
/ delta
);
837 /* Load as many BITS-sized chunks as possible. */
838 for (offset
= 0, i
= 0; offset
+ delta
<= length
; offset
+= delta
, i
++)
840 regs
[i
] = gen_reg_rtx (mode
);
841 emit_move_insn (regs
[i
], adjust_address (src
, mode
, offset
));
844 /* Copy the chunks to the destination. */
845 for (offset
= 0, i
= 0; offset
+ delta
<= length
; offset
+= delta
, i
++)
846 emit_move_insn (adjust_address (dest
, mode
, offset
), regs
[i
]);
848 /* Mop up any left-over bytes. */
851 src
= adjust_address (src
, BLKmode
, offset
);
852 dest
= adjust_address (dest
, BLKmode
, offset
);
853 move_by_pieces (dest
, src
, length
- offset
,
854 MIN (MEM_ALIGN (src
), MEM_ALIGN (dest
)), 0);
858 /* Expand string/block move operations.
860 operands[0] is the pointer to the destination.
861 operands[1] is the pointer to the source.
862 operands[2] is the number of bytes to move.
863 operands[3] is the alignment. */
866 lm32_expand_block_move (rtx
* operands
)
868 if ((GET_CODE (operands
[2]) == CONST_INT
) && (INTVAL (operands
[2]) <= 32))
870 lm32_block_move_inline (operands
[0], operands
[1], INTVAL (operands
[2]),
871 INTVAL (operands
[3]));
877 /* Return TRUE if X references a SYMBOL_REF or LABEL_REF whose symbol
878 isn't protected by a PIC unspec. */
880 nonpic_symbol_mentioned_p (rtx x
)
885 if (GET_CODE (x
) == SYMBOL_REF
|| GET_CODE (x
) == LABEL_REF
886 || GET_CODE (x
) == PC
)
889 /* We don't want to look into the possible MEM location of a
890 CONST_DOUBLE, since we're not going to use it, in general. */
891 if (GET_CODE (x
) == CONST_DOUBLE
)
894 if (GET_CODE (x
) == UNSPEC
)
897 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
898 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
904 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
905 if (nonpic_symbol_mentioned_p (XVECEXP (x
, i
, j
)))
908 else if (fmt
[i
] == 'e' && nonpic_symbol_mentioned_p (XEXP (x
, i
)))
915 /* Compute a (partial) cost for rtx X. Return true if the complete
916 cost has been computed, and false if subexpressions should be
917 scanned. In either case, *TOTAL contains the cost result. */
920 lm32_rtx_costs (rtx x
, int code
, int outer_code
, int *total
, bool speed
)
922 enum machine_mode mode
= GET_MODE (x
);
925 const int arithmetic_latency
= 1;
926 const int shift_latency
= 1;
927 const int compare_latency
= 2;
928 const int multiply_latency
= 3;
929 const int load_latency
= 3;
930 const int libcall_size_cost
= 5;
932 /* Determine if we can handle the given mode size in a single instruction. */
933 small_mode
= (mode
== QImode
) || (mode
== HImode
) || (mode
== SImode
);
946 *total
= COSTS_N_INSNS (LM32_NUM_REGS (mode
));
949 COSTS_N_INSNS (arithmetic_latency
+ (LM32_NUM_REGS (mode
) - 1));
956 *total
= COSTS_N_INSNS (1);
958 *total
= COSTS_N_INSNS (compare_latency
);
962 /* FIXME. Guessing here. */
963 *total
= COSTS_N_INSNS (LM32_NUM_REGS (mode
) * (2 + 3) / 2);
970 if (TARGET_BARREL_SHIFT_ENABLED
&& small_mode
)
973 *total
= COSTS_N_INSNS (1);
975 *total
= COSTS_N_INSNS (shift_latency
);
977 else if (TARGET_BARREL_SHIFT_ENABLED
)
979 /* FIXME: Guessing here. */
980 *total
= COSTS_N_INSNS (LM32_NUM_REGS (mode
) * 4);
982 else if (small_mode
&& GET_CODE (XEXP (x
, 1)) == CONST_INT
)
984 *total
= COSTS_N_INSNS (INTVAL (XEXP (x
, 1)));
990 *total
= COSTS_N_INSNS (libcall_size_cost
);
992 *total
= COSTS_N_INSNS (100);
997 if (TARGET_MULTIPLY_ENABLED
&& small_mode
)
1000 *total
= COSTS_N_INSNS (1);
1002 *total
= COSTS_N_INSNS (multiply_latency
);
1008 *total
= COSTS_N_INSNS (libcall_size_cost
);
1010 *total
= COSTS_N_INSNS (100);
1018 if (TARGET_DIVIDE_ENABLED
&& small_mode
)
1021 *total
= COSTS_N_INSNS (1);
1024 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
)
1027 unsigned HOST_WIDE_INT i
= INTVAL (XEXP (x
, 1));
1034 if (IN_RANGE (i
, 0, 65536))
1035 *total
= COSTS_N_INSNS (1 + 1 + cycles
);
1037 *total
= COSTS_N_INSNS (2 + 1 + cycles
);
1040 else if (GET_CODE (XEXP (x
, 1)) == REG
)
1042 *total
= COSTS_N_INSNS (1 + GET_MODE_SIZE (mode
) / 2);
1047 *total
= COSTS_N_INSNS (1 + GET_MODE_SIZE (mode
) / 2);
1056 *total
= COSTS_N_INSNS (libcall_size_cost
);
1058 *total
= COSTS_N_INSNS (100);
1065 *total
= COSTS_N_INSNS (1);
1067 *total
= COSTS_N_INSNS (arithmetic_latency
);
1071 if (MEM_P (XEXP (x
, 0)))
1072 *total
= COSTS_N_INSNS (0);
1073 else if (small_mode
)
1076 *total
= COSTS_N_INSNS (1);
1078 *total
= COSTS_N_INSNS (arithmetic_latency
);
1081 *total
= COSTS_N_INSNS (LM32_NUM_REGS (mode
) / 2);
1090 *total
= COSTS_N_INSNS (0);
1101 if (satisfies_constraint_L (x
))
1102 *total
= COSTS_N_INSNS (0);
1104 *total
= COSTS_N_INSNS (2);
1111 if (satisfies_constraint_K (x
))
1112 *total
= COSTS_N_INSNS (0);
1114 *total
= COSTS_N_INSNS (2);
1118 if (TARGET_MULTIPLY_ENABLED
)
1120 if (satisfies_constraint_K (x
))
1121 *total
= COSTS_N_INSNS (0);
1123 *total
= COSTS_N_INSNS (2);
1129 if (satisfies_constraint_K (x
))
1130 *total
= COSTS_N_INSNS (1);
1132 *total
= COSTS_N_INSNS (2);
1143 *total
= COSTS_N_INSNS (0);
1150 *total
= COSTS_N_INSNS (0);
1159 *total
= COSTS_N_INSNS (2);
1163 *total
= COSTS_N_INSNS (1);
1168 *total
= COSTS_N_INSNS (1);
1170 *total
= COSTS_N_INSNS (load_latency
);
1178 /* Implemenent TARGET_CAN_ELIMINATE. */
1181 lm32_can_eliminate (const int from ATTRIBUTE_UNUSED
, const int to
)
1183 return (to
== STACK_POINTER_REGNUM
&& frame_pointer_needed
) ? false : true;
1186 /* Implement TARGET_LEGITIMATE_ADDRESS_P. */
1189 lm32_legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED
, rtx x
, bool strict
)
1192 if (strict
&& REG_P (x
) && STRICT_REG_OK_FOR_BASE_P (x
))
1194 if (!strict
&& REG_P (x
) && NONSTRICT_REG_OK_FOR_BASE_P (x
))
1198 if (GET_CODE (x
) == PLUS
1199 && REG_P (XEXP (x
, 0))
1200 && ((strict
&& STRICT_REG_OK_FOR_BASE_P (XEXP (x
, 0)))
1201 || (!strict
&& NONSTRICT_REG_OK_FOR_BASE_P (XEXP (x
, 0))))
1202 && GET_CODE (XEXP (x
, 1)) == CONST_INT
1203 && satisfies_constraint_K (XEXP ((x
), 1)))
1207 if (GET_CODE (x
) == SYMBOL_REF
&& SYMBOL_REF_SMALL_P (x
))
1213 /* Check a move is not memory to memory. */
1216 lm32_move_ok (enum machine_mode mode
, rtx operands
[2]) {
1217 if (memory_operand (operands
[0], mode
))
1218 return register_or_zero_operand (operands
[1], mode
);
1222 /* Implement LEGITIMATE_CONSTANT_P. */
1225 lm32_legitimate_constant_p (rtx x
)
1227 /* 32-bit addresses require multiple instructions. */
1228 if (!flag_pic
&& reloc_operand (x
, GET_MODE (x
)))