1 ;; Predicate definitions for LoongArch target.
2 ;; Copyright (C) 2021-2023 Free Software Foundation, Inc.
3 ;; Contributed by Loongson Ltd.
4 ;; Based on MIPS target for GNU compiler.
6 ;; This file is part of GCC.
8 ;; GCC is free software; you can redistribute it and/or modify
9 ;; it under the terms of the GNU General Public License as published by
10 ;; the Free Software Foundation; either version 3, or (at your option)
13 ;; GCC is distributed in the hope that it will be useful,
14 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
15 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 ;; GNU General Public License for more details.
18 ;; You should have received a copy of the GNU General Public License
19 ;; along with GCC; see the file COPYING3. If not see
20 ;; <http://www.gnu.org/licenses/>.
22 (define_predicate "const_uns_arith_operand"
23 (and (match_code "const_int")
24 (match_test "IMM12_OPERAND_UNSIGNED (INTVAL (op))")))
26 (define_predicate "uns_arith_operand"
27 (ior (match_operand 0 "const_uns_arith_operand")
28 (match_operand 0 "register_operand")))
30 (define_predicate "const_lu32i_operand"
31 (and (match_code "const_int")
32 (match_test "LU32I_OPERAND (INTVAL (op))")))
34 (define_predicate "const_lu52i_operand"
35 (and (match_code "const_int")
36 (match_test "LU52I_OPERAND (INTVAL (op))")))
38 (define_predicate "const_arith_operand"
39 (and (match_code "const_int")
40 (match_test "IMM12_OPERAND (INTVAL (op))")))
42 (define_predicate "const_dual_imm12_operand"
43 (and (match_code "const_int")
44 (match_test "DUAL_IMM12_OPERAND (INTVAL (op))")))
46 (define_predicate "const_imm16_operand"
47 (and (match_code "const_int")
48 (match_test "IMM16_OPERAND (INTVAL (op))")))
50 (define_predicate "const_addu16i_operand"
51 (and (match_code "const_int")
52 (match_test "ADDU16I_OPERAND (INTVAL (op))")))
54 (define_predicate "const_addu16i_imm12_di_operand"
55 (and (match_code "const_int")
56 (match_test "loongarch_addu16i_imm12_operand_p (INTVAL (op), DImode)")))
58 (define_predicate "const_addu16i_imm12_si_operand"
59 (and (match_code "const_int")
60 (match_test "loongarch_addu16i_imm12_operand_p (INTVAL (op), SImode)")))
62 (define_predicate "const_dual_addu16i_operand"
63 (and (match_code "const_int")
64 (match_test "DUAL_ADDU16I_OPERAND (INTVAL (op))")))
66 (define_predicate "arith_operand"
67 (ior (match_operand 0 "const_arith_operand")
68 (match_operand 0 "register_operand")))
70 (define_predicate "plus_di_operand"
71 (ior (match_operand 0 "arith_operand")
72 (match_operand 0 "const_dual_imm12_operand")
73 (match_operand 0 "const_addu16i_operand")
74 (match_operand 0 "const_addu16i_imm12_di_operand")
75 (match_operand 0 "const_dual_addu16i_operand")))
77 (define_predicate "plus_si_extend_operand"
78 (ior (match_operand 0 "arith_operand")
79 (match_operand 0 "const_dual_imm12_operand")
80 (match_operand 0 "const_addu16i_imm12_si_operand")))
82 (define_predicate "plus_si_operand"
83 (ior (match_operand 0 "plus_si_extend_operand")
84 (match_operand 0 "const_addu16i_operand")))
86 (define_predicate "const_immalsl_operand"
87 (and (match_code "const_int")
88 (match_test "IN_RANGE (INTVAL (op), 1, 4)")))
90 (define_predicate "const_lsx_branch_operand"
91 (and (match_code "const_int")
92 (match_test "IN_RANGE (INTVAL (op), -1024, 1023)")))
94 (define_predicate "const_uimm3_operand"
95 (and (match_code "const_int")
96 (match_test "IN_RANGE (INTVAL (op), 0, 7)")))
98 (define_predicate "const_8_to_11_operand"
99 (and (match_code "const_int")
100 (match_test "IN_RANGE (INTVAL (op), 8, 11)")))
102 (define_predicate "const_12_to_15_operand"
103 (and (match_code "const_int")
104 (match_test "IN_RANGE (INTVAL (op), 12, 15)")))
106 (define_predicate "const_uimm4_operand"
107 (and (match_code "const_int")
108 (match_test "IN_RANGE (INTVAL (op), 0, 15)")))
110 (define_predicate "const_uimm5_operand"
111 (and (match_code "const_int")
112 (match_test "IN_RANGE (INTVAL (op), 0, 31)")))
114 (define_predicate "const_uimm6_operand"
115 (and (match_code "const_int")
116 (match_test "UIMM6_OPERAND (INTVAL (op))")))
118 (define_predicate "const_uimm7_operand"
119 (and (match_code "const_int")
120 (match_test "IN_RANGE (INTVAL (op), 0, 127)")))
122 (define_predicate "const_uimm8_operand"
123 (and (match_code "const_int")
124 (match_test "IN_RANGE (INTVAL (op), 0, 255)")))
126 (define_predicate "const_uimm14_operand"
127 (and (match_code "const_int")
128 (match_test "IN_RANGE (INTVAL (op), 0, 16383)")))
130 (define_predicate "const_uimm15_operand"
131 (and (match_code "const_int")
132 (match_test "IN_RANGE (INTVAL (op), 0, 32767)")))
134 (define_predicate "const_imm5_operand"
135 (and (match_code "const_int")
136 (match_test "IN_RANGE (INTVAL (op), -16, 15)")))
138 (define_predicate "const_imm10_operand"
139 (and (match_code "const_int")
140 (match_test "IMM10_OPERAND (INTVAL (op))")))
142 (define_predicate "const_imm12_operand"
143 (and (match_code "const_int")
144 (match_test "IMM12_OPERAND (INTVAL (op))")))
146 (define_predicate "const_imm13_operand"
147 (and (match_code "const_int")
148 (match_test "IMM13_OPERAND (INTVAL (op))")))
150 (define_predicate "reg_imm10_operand"
151 (ior (match_operand 0 "const_imm10_operand")
152 (match_operand 0 "register_operand")))
154 (define_predicate "aq8b_operand"
155 (and (match_code "const_int")
156 (match_test "loongarch_signed_immediate_p (INTVAL (op), 8, 0)")))
158 (define_predicate "aq8h_operand"
159 (and (match_code "const_int")
160 (match_test "loongarch_signed_immediate_p (INTVAL (op), 8, 1)")))
162 (define_predicate "aq8w_operand"
163 (and (match_code "const_int")
164 (match_test "loongarch_signed_immediate_p (INTVAL (op), 8, 2)")))
166 (define_predicate "aq8d_operand"
167 (and (match_code "const_int")
168 (match_test "loongarch_signed_immediate_p (INTVAL (op), 8, 3)")))
170 (define_predicate "aq10b_operand"
171 (and (match_code "const_int")
172 (match_test "loongarch_signed_immediate_p (INTVAL (op), 10, 0)")))
174 (define_predicate "aq10h_operand"
175 (and (match_code "const_int")
176 (match_test "loongarch_signed_immediate_p (INTVAL (op), 10, 1)")))
178 (define_predicate "aq10w_operand"
179 (and (match_code "const_int")
180 (match_test "loongarch_signed_immediate_p (INTVAL (op), 10, 2)")))
182 (define_predicate "aq10d_operand"
183 (and (match_code "const_int")
184 (match_test "loongarch_signed_immediate_p (INTVAL (op), 10, 3)")))
186 (define_predicate "aq12b_operand"
187 (and (match_code "const_int")
188 (match_test "loongarch_signed_immediate_p (INTVAL (op), 12, 0)")))
190 (define_predicate "aq12h_operand"
191 (and (match_code "const_int")
192 (match_test "loongarch_signed_immediate_p (INTVAL (op), 11, 1)")))
194 (define_predicate "aq12w_operand"
195 (and (match_code "const_int")
196 (match_test "loongarch_signed_immediate_p (INTVAL (op), 10, 2)")))
198 (define_predicate "aq12d_operand"
199 (and (match_code "const_int")
200 (match_test "loongarch_signed_immediate_p (INTVAL (op), 9, 3)")))
202 (define_predicate "sle_operand"
203 (and (match_code "const_int")
204 (match_test "IMM12_OPERAND (INTVAL (op) + 1)")))
206 (define_predicate "sleu_operand"
207 (and (match_operand 0 "sle_operand")
208 (match_test "INTVAL (op) + 1 != 0")))
210 (define_predicate "const_0_operand"
211 (and (match_code "const_int,const_wide_int,const_double,const_vector")
212 (match_test "op == CONST0_RTX (GET_MODE (op))")))
214 (define_predicate "const_m1_operand"
215 (and (match_code "const_int,const_wide_int,const_double,const_vector")
216 (match_test "op == CONSTM1_RTX (GET_MODE (op))")))
218 (define_predicate "reg_or_m1_operand"
219 (ior (match_operand 0 "const_m1_operand")
220 (match_operand 0 "register_operand")))
222 (define_predicate "reg_or_0_operand"
223 (ior (match_operand 0 "const_0_operand")
224 (match_operand 0 "register_operand")))
226 (define_predicate "const_1_operand"
227 (and (match_code "const_int,const_wide_int,const_double,const_vector")
228 (match_test "op == CONST1_RTX (GET_MODE (op))")))
230 (define_predicate "reg_or_1_operand"
231 (ior (match_operand 0 "const_1_operand")
232 (match_operand 0 "register_operand")))
234 ;; These are used in vec_merge, hence accept bitmask as const_int.
235 (define_predicate "const_exp_2_operand"
236 (and (match_code "const_int")
237 (match_test "IN_RANGE (exact_log2 (INTVAL (op)), 0, 1)")))
239 (define_predicate "const_exp_4_operand"
240 (and (match_code "const_int")
241 (match_test "IN_RANGE (exact_log2 (INTVAL (op)), 0, 3)")))
243 (define_predicate "const_exp_8_operand"
244 (and (match_code "const_int")
245 (match_test "IN_RANGE (exact_log2 (INTVAL (op)), 0, 7)")))
247 (define_predicate "const_exp_16_operand"
248 (and (match_code "const_int")
249 (match_test "IN_RANGE (exact_log2 (INTVAL (op)), 0, 15)")))
251 (define_predicate "const_exp_32_operand"
252 (and (match_code "const_int")
253 (match_test "IN_RANGE (exact_log2 (INTVAL (op)), 0, 31)")))
255 ;; This is used for indexing into vectors, and hence only accepts const_int.
256 (define_predicate "const_0_or_1_operand"
257 (and (match_code "const_int")
258 (match_test "IN_RANGE (INTVAL (op), 0, 1)")))
260 (define_predicate "const_0_to_3_operand"
261 (and (match_code "const_int")
262 (match_test "IN_RANGE (INTVAL (op), 0, 3)")))
264 (define_predicate "const_0_to_7_operand"
265 (and (match_code "const_int")
266 (match_test "IN_RANGE (INTVAL (op), 0, 7)")))
268 (define_predicate "const_2_or_3_operand"
269 (and (match_code "const_int")
270 (match_test "IN_RANGE (INTVAL (op), 2, 3)")))
272 (define_predicate "const_4_to_7_operand"
273 (and (match_code "const_int")
274 (match_test "IN_RANGE (INTVAL (op), 4, 7)")))
276 (define_predicate "const_8_to_15_operand"
277 (and (match_code "const_int")
278 (match_test "IN_RANGE (INTVAL (op), 0, 7)")))
280 (define_predicate "const_16_to_31_operand"
281 (and (match_code "const_int")
282 (match_test "IN_RANGE (INTVAL (op), 0, 7)")))
284 (define_predicate "qi_mask_operand"
285 (and (match_code "const_int")
286 (match_test "UINTVAL (op) == 0xff")))
288 (define_predicate "hi_mask_operand"
289 (and (match_code "const_int")
290 (match_test "UINTVAL (op) == 0xffff")))
292 (define_predicate "lu52i_mask_operand"
293 (and (match_code "const_int")
294 (match_test "UINTVAL (op) == 0xfffffffffffff")))
296 (define_predicate "si_mask_operand"
297 (and (match_code "const_int")
298 (match_test "UINTVAL (op) == 0xffffffff")))
300 (define_predicate "low_bitmask_operand"
301 (and (match_code "const_int")
302 (match_test "low_bitmask_len (mode, INTVAL (op)) > 12")))
304 (define_predicate "d_operand"
305 (and (match_code "reg")
306 (match_test "GP_REG_P (REGNO (op))")))
308 (define_predicate "db4_operand"
309 (and (match_code "const_int")
310 (match_test "loongarch_unsigned_immediate_p (INTVAL (op) + 1, 4, 0)")))
312 (define_predicate "db7_operand"
313 (and (match_code "const_int")
314 (match_test "loongarch_unsigned_immediate_p (INTVAL (op) + 1, 7, 0)")))
316 (define_predicate "db8_operand"
317 (and (match_code "const_int")
318 (match_test "loongarch_unsigned_immediate_p (INTVAL (op) + 1, 8, 0)")))
320 (define_predicate "ib3_operand"
321 (and (match_code "const_int")
322 (match_test "loongarch_unsigned_immediate_p (INTVAL (op) - 1, 3, 0)")))
324 (define_predicate "sb4_operand"
325 (and (match_code "const_int")
326 (match_test "loongarch_signed_immediate_p (INTVAL (op), 4, 0)")))
328 (define_predicate "sb5_operand"
329 (and (match_code "const_int")
330 (match_test "loongarch_signed_immediate_p (INTVAL (op), 5, 0)")))
332 (define_predicate "sb8_operand"
333 (and (match_code "const_int")
334 (match_test "loongarch_signed_immediate_p (INTVAL (op), 8, 0)")))
336 (define_predicate "sd8_operand"
337 (and (match_code "const_int")
338 (match_test "loongarch_signed_immediate_p (INTVAL (op), 8, 3)")))
340 (define_predicate "ub4_operand"
341 (and (match_code "const_int")
342 (match_test "loongarch_unsigned_immediate_p (INTVAL (op), 4, 0)")))
344 (define_predicate "ub8_operand"
345 (and (match_code "const_int")
346 (match_test "loongarch_unsigned_immediate_p (INTVAL (op), 8, 0)")))
348 (define_predicate "uh4_operand"
349 (and (match_code "const_int")
350 (match_test "loongarch_unsigned_immediate_p (INTVAL (op), 4, 1)")))
352 (define_predicate "uw4_operand"
353 (and (match_code "const_int")
354 (match_test "loongarch_unsigned_immediate_p (INTVAL (op), 4, 2)")))
356 (define_predicate "uw5_operand"
357 (and (match_code "const_int")
358 (match_test "loongarch_unsigned_immediate_p (INTVAL (op), 5, 2)")))
360 (define_predicate "uw6_operand"
361 (and (match_code "const_int")
362 (match_test "loongarch_unsigned_immediate_p (INTVAL (op), 6, 2)")))
364 (define_predicate "uw8_operand"
365 (and (match_code "const_int")
366 (match_test "loongarch_unsigned_immediate_p (INTVAL (op), 8, 2)")))
368 (define_predicate "addiur2_operand"
369 (and (match_code "const_int")
370 (ior (match_test "INTVAL (op) == -1")
371 (match_test "INTVAL (op) == 1")
372 (match_test "INTVAL (op) == 4")
373 (match_test "INTVAL (op) == 8")
374 (match_test "INTVAL (op) == 12")
375 (match_test "INTVAL (op) == 16")
376 (match_test "INTVAL (op) == 20")
377 (match_test "INTVAL (op) == 24"))))
379 (define_predicate "addiusp_operand"
380 (and (match_code "const_int")
381 (ior (match_test "(IN_RANGE (INTVAL (op), 2, 257))")
382 (match_test "(IN_RANGE (INTVAL (op), -258, -3))"))))
384 (define_predicate "andi16_operand"
385 (and (match_code "const_int")
386 (ior (match_test "IN_RANGE (INTVAL (op), 1, 4)")
387 (match_test "IN_RANGE (INTVAL (op), 7, 8)")
388 (match_test "IN_RANGE (INTVAL (op), 15, 16)")
389 (match_test "IN_RANGE (INTVAL (op), 31, 32)")
390 (match_test "IN_RANGE (INTVAL (op), 63, 64)")
391 (match_test "INTVAL (op) == 255")
392 (match_test "INTVAL (op) == 32768")
393 (match_test "INTVAL (op) == 65535"))))
395 (define_predicate "movep_src_register"
396 (and (match_code "reg")
397 (ior (match_test ("IN_RANGE (REGNO (op), 2, 3)"))
398 (match_test ("IN_RANGE (REGNO (op), 16, 20)")))))
400 (define_predicate "movep_src_operand"
401 (ior (match_operand 0 "const_0_operand")
402 (match_operand 0 "movep_src_register")))
404 (define_predicate "fcc_reload_operand"
405 (and (match_code "reg,subreg")
406 (match_test "FCC_REG_P (true_regnum (op))")))
408 (define_predicate "muldiv_target_operand"
409 (match_operand 0 "register_operand"))
411 (define_predicate "ins_zero_bitmask_operand"
412 (and (match_code "const_int")
413 (match_test "INTVAL (op) != -1")
414 (match_test "INTVAL (op) & 1")
415 (match_test "low_bitmask_len (mode, \
416 ~UINTVAL (op) | (~UINTVAL(op) - 1)) \
419 (define_predicate "const_call_insn_operand"
420 (match_code "const,symbol_ref,label_ref")
422 /* Split symbol to high and low if return false.
423 If defined TARGET_CMODEL_EXTREME, all symbol would be splited,
424 else if offset is not zero, the symbol would be splited. */
426 enum loongarch_symbol_type symbol_type;
427 loongarch_symbolic_constant_p (op, &symbol_type);
430 split_const (x, &x, &offset);
432 if (offset != const0_rtx)
435 /* When compiling with '-mcmodel=medium -mexplicit-relocs'
436 symbols are splited in loongarch_legitimize_call_address.
438 When compiling with '-mcmodel=medium -mno-explicit-relocs',
439 first obtain the symbolic address or the address of the
440 plt entry, and then perform an indirect jump, so return false. */
445 if (TARGET_CMODEL_EXTREME
446 || (TARGET_CMODEL_MEDIUM && !TARGET_EXPLICIT_RELOCS))
451 case SYMBOL_GOT_DISP:
452 if (TARGET_CMODEL_EXTREME
454 || (flag_plt && TARGET_CMODEL_MEDIUM
455 && !TARGET_EXPLICIT_RELOCS))
465 (define_predicate "call_insn_operand"
466 (ior (match_operand 0 "const_call_insn_operand")
467 (match_operand 0 "register_operand")))
469 (define_predicate "is_const_call_local_symbol"
470 (and (match_operand 0 "const_call_insn_operand")
471 (ior (match_test "loongarch_global_symbol_p (op) == 0")
472 (match_test "loongarch_symbol_binds_local_p (op) != 0"))
473 (match_test "CONSTANT_P (op)")))
475 (define_predicate "is_const_call_no_local_symbol"
476 (and (match_operand 0 "const_call_insn_operand")
477 (ior (match_test "loongarch_global_symbol_p (op) != 0")
478 (match_test "loongarch_symbol_binds_local_p (op) == 0")
479 (match_test "loongarch_weak_symbol_p (op) != 0"))
480 (match_test "CONSTANT_P (op)")))
482 ;; A legitimate CONST_INT operand that takes more than one instruction
484 (define_predicate "splittable_const_int_operand"
485 (match_code "const_int")
487 /* Don't handle multi-word moves this way; we don't want to introduce
488 the individual word-mode moves until after reload. */
489 if (GET_MODE_SIZE (mode) > UNITS_PER_WORD)
492 /* Otherwise check whether the constant can be loaded in a single
494 return !LU12I_INT (op) && !IMM12_INT (op) && !IMM12_INT_UNSIGNED (op)
498 (define_predicate "move_operand"
499 (match_operand 0 "general_operand")
501 enum loongarch_symbol_type symbol_type;
503 /* The thinking here is as follows:
505 (1) The move expanders should split complex load sequences into
506 individual instructions. Those individual instructions can
507 then be optimized by all rtl passes.
509 (2) The target of pre-reload load sequences should not be used
510 to store temporary results. If the target register is only
511 assigned one value, reload can rematerialize that value
512 on demand, rather than spill it to the stack.
514 (3) If we allowed pre-reload passes like combine and cse to recreate
515 complex load sequences, we would want to be able to split the
516 sequences before reload as well, so that the pre-reload scheduler
517 can see the individual instructions. This falls foul of (2);
518 the splitter would be forced to reuse the target register for
519 intermediate results.
521 (4) We want to define complex load splitters for combine. These
522 splitters can request a temporary scratch register, which avoids
523 the problem in (2). They allow things like:
525 (set (reg T1) (high SYM))
526 (set (reg T2) (low (reg T1) SYM))
527 (set (reg X) (plus (reg T2) (const_int OFFSET)))
531 (set (reg T3) (high SYM+OFFSET))
532 (set (reg X) (lo_sum (reg T3) SYM+OFFSET))
534 if T2 is only used this once. */
535 switch (GET_CODE (op))
543 return (loongarch_symbolic_constant_p (op, &symbol_type)
544 && (!loongarch_explicit_relocs_p (symbol_type)
545 || !loongarch_split_symbol_type (symbol_type)));
550 return (loongarch_symbolic_constant_p (op, &symbol_type)
551 && loongarch_explicit_relocs_p (symbol_type)
552 && loongarch_split_symbol_type (symbol_type));
559 (define_predicate "symbolic_operand"
560 (match_code "const,symbol_ref,label_ref")
562 enum loongarch_symbol_type type;
563 return loongarch_symbolic_constant_p (op, &type);
566 (define_predicate "equality_operator"
567 (match_code "eq,ne"))
569 (define_predicate "order_operator"
570 (match_code "lt,ltu,le,leu,ge,geu,gt,gtu"))
572 ;; For NE, cstore uses sltu instructions in which the first operand is $0.
574 (define_predicate "loongarch_cstore_operator"
575 (match_code "ne,eq,gt,gtu,ge,geu,lt,ltu,le,leu"))
577 (define_predicate "small_data_pattern"
578 (and (match_code "set,parallel,unspec,unspec_volatile,prefetch")
579 (match_test "loongarch_small_data_pattern_p (op)")))
581 ;; Return 1 if the operand is in non-volatile memory.
582 (define_predicate "non_volatile_mem_operand"
583 (and (match_operand 0 "memory_operand")
584 (not (match_test "MEM_VOLATILE_P (op)"))))
586 (define_predicate "const_vector_same_val_operand"
587 (match_code "const_vector")
589 return loongarch_const_vector_same_val_p (op, mode);
592 (define_predicate "const_vector_same_simm5_operand"
593 (match_code "const_vector")
595 return loongarch_const_vector_same_int_p (op, mode, -16, 15);
598 (define_predicate "const_vector_same_uimm5_operand"
599 (match_code "const_vector")
601 return loongarch_const_vector_same_int_p (op, mode, 0, 31);
604 (define_predicate "const_vector_same_ximm5_operand"
605 (match_code "const_vector")
607 return loongarch_const_vector_same_int_p (op, mode, -31, 31);
610 (define_predicate "const_vector_same_uimm6_operand"
611 (match_code "const_vector")
613 return loongarch_const_vector_same_int_p (op, mode, 0, 63);
616 (define_predicate "par_const_vector_shf_set_operand"
617 (match_code "parallel")
619 return loongarch_const_vector_shuffle_set_p (op, mode);
622 (define_predicate "reg_or_vector_same_val_operand"
623 (ior (match_operand 0 "register_operand")
624 (match_operand 0 "const_vector_same_val_operand")))
626 (define_predicate "reg_or_vector_same_simm5_operand"
627 (ior (match_operand 0 "register_operand")
628 (match_operand 0 "const_vector_same_simm5_operand")))
630 (define_predicate "reg_or_vector_same_uimm5_operand"
631 (ior (match_operand 0 "register_operand")
632 (match_operand 0 "const_vector_same_uimm5_operand")))
634 (define_predicate "reg_or_vector_same_ximm5_operand"
635 (ior (match_operand 0 "register_operand")
636 (match_operand 0 "const_vector_same_ximm5_operand")))
638 (define_predicate "reg_or_vector_same_uimm6_operand"
639 (ior (match_operand 0 "register_operand")
640 (match_operand 0 "const_vector_same_uimm6_operand")))