gcc/config/m32c/predicates.md

   1 ;; Machine Descriptions for R8C/M16C/M32C
   2 ;; Copyright (C) 2005, 2007, 2008, 2010
   3 ;; Free Software Foundation, Inc.
   4 ;; Contributed by Red Hat.
   5 ;;
   6 ;; This file is part of GCC.
   7 ;;
   8 ;; GCC is free software; you can redistribute it and/or modify it
   9 ;; under the terms of the GNU General Public License as published
  10 ;; by the Free Software Foundation; either version 3, or (at your
  11 ;; option) any later version.
  12 ;;
  13 ;; GCC is distributed in the hope that it will be useful, but WITHOUT
  14 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15 ;; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  16 ;; License for more details.
  17 ;;
  18 ;; You should have received a copy of the GNU General Public License
  19 ;; along with GCC; see the file COPYING3.  If not see
  20 ;; <http://www.gnu.org/licenses/>.
  21
  22 ;; Predicates
  23
  24 ; TRUE for any valid operand.  We do this because general_operand
  25 ; refuses to match volatile memory refs.
  26
  27 (define_predicate "m32c_any_operand"
  28   (ior (match_operand 0 "general_operand")
  29        (match_code "mem,const_int,const_double"))
  30   {
  31     return ! m32c_illegal_subreg_p (op);
  32   }
  33 )
  34
  35 ; Likewise for nonimmediate_operand.
  36
  37 (define_predicate "m32c_nonimmediate_operand"
  38   (ior (match_operand 0 "nonimmediate_operand")
  39        (match_code "mem"))
  40   {
  41     return ! m32c_illegal_subreg_p (op);
  42   }
  43 )
  44
  45 ; TRUE if the operand is a pseudo-register.
  46 (define_predicate "m32c_pseudo"
  47   (ior (and (match_code "reg")
  48             (match_test "REGNO(op) >= FIRST_PSEUDO_REGISTER"))
  49        (and (match_code "subreg")
  50             (and (match_test "GET_CODE (XEXP (op, 0)) == REG")
  51                  (match_test "REGNO(XEXP (op,0)) >= FIRST_PSEUDO_REGISTER")))))
  52
  53
  54 ; Returning true causes many predicates to NOT match.  We allow
  55 ; subregs for type changing, but not for size changing.
  56 (define_predicate "m32c_wide_subreg"
  57   (and (match_code "subreg")
  58        (not (match_operand 0 "m32c_pseudo")))
  59   {
  60     unsigned int sizeo = GET_MODE_SIZE (GET_MODE (op));
  61     unsigned int sizei = GET_MODE_SIZE (GET_MODE (XEXP (op, 0)));
  62     sizeo = (sizeo + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
  63     sizei = (sizei + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
  64     return sizeo != sizei;
  65   })
  66
  67 ; TRUE for r0 through r3, or a pseudo that reload could put in r0
  68 ; through r3 (likewise for the next couple too)
  69 (define_predicate "r0123_operand"
  70   (ior (match_operand 0 "m32c_pseudo" "")
  71        (and (match_code "reg")
  72             (match_test "REGNO(op) <= R3_REGNO"))))
  73
  74 ; TRUE for r0
  75 (define_predicate "m32c_r0_operand"
  76   (ior (match_operand 0 "m32c_pseudo" "")
  77        (and (match_code "reg")
  78             (match_test "REGNO(op) == R0_REGNO"))))
  79
  80 ; TRUE for r1
  81 (define_predicate "m32c_r1_operand"
  82   (ior (match_operand 0 "m32c_pseudo" "")
  83        (and (match_code "reg")
  84             (match_test "REGNO(op) == R1_REGNO"))))
  85
  86 ; TRUE for HL_CLASS (r0 or r1)
  87 (define_predicate "m32c_hl_operand"
  88   (ior (match_operand 0 "m32c_pseudo" "")
  89        (and (match_code "reg")
  90             (match_test "REGNO(op) == R0_REGNO || REGNO(op) == R1_REGNO"))))
  91
  92
  93 ; TRUE for r2
  94 (define_predicate "m32c_r2_operand"
  95   (ior (match_operand 0 "m32c_pseudo" "")
  96        (and (match_code "reg")
  97             (match_test "REGNO(op) == R2_REGNO"))))
  98
  99 ; TRUE for r3
 100 (define_predicate "m32c_r3_operand"
 101   (ior (match_operand 0 "m32c_pseudo" "")
 102        (and (match_code "reg")
 103             (match_test "REGNO(op) == R3_REGNO"))))
 104
 105 ; TRUE for any general operand except r2.
 106 (define_predicate "m32c_notr2_operand"
 107   (and (match_operand 0 "general_operand")
 108        (ior (not (match_code "reg"))
 109             (match_test "REGNO(op) != R2_REGNO"))))
 110
 111 ; TRUE for the stack pointer.
 112 (define_predicate "m32c_sp_operand"
 113   (ior (match_operand 0 "m32c_pseudo" "")
 114        (and (match_code "reg")
 115             (match_test "REGNO(op) == SP_REGNO"))))
 116
 117 ; TRUE for control registers.
 118 (define_predicate "cr_operand"
 119   (match_code "reg")
 120   "return (REGNO (op) >= SB_REGNO
 121            && REGNO (op) <= FLG_REGNO);")
 122
 123 ; TRUE for $a0 or $a1.
 124 (define_predicate "a_operand"
 125   (and (match_code "reg")
 126        (match_test "REGNO (op) == A0_REGNO || REGNO (op) == A1_REGNO")))
 127
 128 ; TRUE for $a0 or $a1 or a pseudo
 129 (define_predicate "ap_operand"
 130   (ior (match_operand 0 "m32c_pseudo" "")
 131        (and (match_code "reg")
 132             (match_test "REGNO (op) == A0_REGNO || REGNO (op) == A1_REGNO"))))
 133
 134 ; TRUE for r0 through r3, or a0 or a1.
 135 (define_predicate "ra_operand"
 136   (and (and (match_operand 0 "register_operand" "")
 137             (not (match_operand 1 "cr_operand" "")))
 138        (not (match_operand 2 "m32c_wide_subreg" ""))))
 139
 140 ; Likewise, plus TRUE for memory references.
 141 (define_predicate "mra_operand"
 142   (and (and (match_operand 0 "m32c_nonimmediate_operand" "")
 143             (not (match_operand 1 "cr_operand" "")))
 144        (not (match_operand 2 "m32c_wide_subreg" ""))))
 145
 146 ; Likewise, plus TRUE for subregs.
 147 (define_predicate "mras_operand"
 148   (and (match_operand 0 "nonimmediate_operand" "")
 149        (not (match_operand 1 "cr_operand" ""))))
 150
 151 ; As above, but no push/pop operations
 152 (define_predicate "mra_nopp_operand"
 153   (match_operand 0 "mra_operand" "")
 154 {
 155   if (GET_CODE (op) == MEM
 156       && (GET_CODE (XEXP (op, 0)) == PRE_DEC
 157           || (GET_CODE (XEXP (op, 0)) == POST_INC)))
 158     return 0;
 159   return 1;
 160 })
 161
 162 ; TRUE for memory, r0..r3, a0..a1, or immediates.
 163 (define_predicate "mrai_operand"
 164   (and (and (match_operand 0 "m32c_any_operand" "")
 165             (not (match_operand 1 "cr_operand" "")))
 166        (not (match_operand 2 "m32c_wide_subreg" ""))))
 167
 168 ; Likewise, plus true for subregs.
 169 (define_predicate "mrasi_operand"
 170   (and (match_operand 0 "general_operand" "")
 171        (not (match_operand 1 "cr_operand" ""))))
 172
 173 ; TRUE for r0..r3 or memory.
 174 (define_predicate "mr_operand"
 175   (and (match_operand 0 "mra_operand" "")
 176        (not (match_operand 1 "a_operand" ""))))
 177
 178 ; TRUE for a0..a1 or memory.
 179 (define_predicate "ma_operand"
 180   (ior (match_operand 0 "a_operand" "")
 181        (match_operand 1 "memory_operand" "")))
 182
 183 ; TRUE for memory operands that are not indexed
 184 (define_predicate "memsym_operand"
 185   (and (match_operand 0 "memory_operand" "")
 186        (match_test "satisfies_constraint_Si (op)")))
 187
 188 ; TRUE for memory operands with small integer addresses
 189 (define_predicate "memimmed_operand"
 190   (and (match_operand 0 "memory_operand" "")
 191        (match_test "satisfies_constraint_Sp (op)")))
 192
 193 ; TRUE for r1h.  This is complicated since r1h isn't a register GCC
 194 ; normally knows about.
 195 (define_predicate "r1h_operand"
 196   (match_code "zero_extract")
 197   {
 198     rtx reg = XEXP (op, 0);
 199     rtx size = XEXP (op, 1);
 200     rtx pos = XEXP (op, 2);
 201     return (GET_CODE (reg) == REG
 202             && REGNO (reg) == R1_REGNO
 203             && GET_CODE (size) == CONST_INT
 204             && INTVAL (size) == 8
 205             && GET_CODE (pos) == CONST_INT
 206             && INTVAL (pos) == 8);
 207   })
 208
 209 ; TRUE if we can shift by this amount.  Constant shift counts have a
 210 ; limited range.
 211 (define_predicate "shiftcount_operand"
 212   (ior (match_operand 0 "mra_operand" "")
 213        (and (match_operand 2 "const_int_operand" "")
 214             (match_test "-8 <= INTVAL (op) && INTVAL (op) && INTVAL (op) <= 8"))))
 215 (define_predicate "longshiftcount_operand"
 216   (ior (match_operand 0 "mra_operand" "")
 217        (and (match_operand 2 "const_int_operand" "")
 218             (match_test "-32 <= INTVAL (op) && INTVAL (op) && INTVAL (op) <= 32"))))
 219
 220 ; TRUE for r0..r3, a0..a1, or sp.
 221 (define_predicate "mra_or_sp_operand"
 222   (and (ior (match_operand 0 "mra_operand")
 223             (match_operand 1 "m32c_sp_operand"))
 224        (not (match_operand 2 "m32c_wide_subreg" ""))))
 225
 226
 227 ; TRUE for r2 or r3.
 228 (define_predicate "m32c_r2r3_operand"
 229   (ior (and (match_code "reg")
 230             (ior (match_test "REGNO(op) == R2_REGNO")
 231                  (match_test "REGNO(op) == R3_REGNO")))
 232        (and (match_code "subreg")
 233             (match_test "GET_CODE (XEXP (op, 0)) == REG && (REGNO (XEXP (op, 0)) == R2_REGNO || REGNO (XEXP (op, 0)) == R3_REGNO)"))))
 234
 235 ; Likewise, plus TRUE for a0..a1.
 236 (define_predicate "m32c_r2r3a_operand"
 237   (ior (match_operand 0 "m32c_r2r3_operand" "")
 238        (match_operand 0 "a_operand" "")))
 239
 240 ; These two are only for movqi - no subreg limit
 241 (define_predicate "mra_qi_operand"
 242   (and (and (match_operand 0 "m32c_nonimmediate_operand" "")
 243             (not (match_operand 1 "cr_operand" "")))
 244        (not (match_operand 1 "m32c_r2r3a_operand" ""))))
 245
 246 (define_predicate "mrai_qi_operand"
 247   (and (and (match_operand 0 "m32c_any_operand" "")
 248             (not (match_operand 1 "cr_operand" "")))
 249        (not (match_operand 1 "m32c_r2r3a_operand" ""))))
 250
 251 (define_predicate "a_qi_operand"
 252   (ior (match_operand 0 "m32c_pseudo" "")
 253        (match_operand 1 "a_operand" "")))
 254
 255 ; TRUE for comparisons we support.
 256 (define_predicate "m32c_cmp_operator"
 257   (match_code "eq,ne,gt,gtu,lt,ltu,ge,geu,le,leu"))
 258
 259 (define_predicate "m32c_eqne_operator"
 260   (match_code "eq,ne"))
 261
 262 ; TRUE for mem0
 263 (define_predicate "m32c_mem0_operand"
 264   (ior (match_operand 0 "m32c_pseudo" "")
 265        (and (match_code "reg")
 266             (match_test "REGNO(op) == MEM0_REGNO"))))
 267
 268 ; TRUE for things the call patterns can return.
 269 (define_predicate "m32c_return_operand"
 270   (ior (match_operand 0 "m32c_r0_operand")
 271        (ior (match_operand 0 "m32c_mem0_operand")
 272             (match_code "parallel"))))
 273
 274 ; TRUE for constants we can multiply pointers by
 275 (define_predicate "m32c_psi_scale"
 276   (and (match_operand 0 "const_int_operand")
 277        (match_test "satisfies_constraint_Ilb (op)")))
 278
 279 ; TRUE for one bit set (bit) or clear (mask) out of N bits.
 280
 281 (define_predicate "m32c_1bit8_operand"
 282   (and (match_operand 0 "const_int_operand")
 283        (match_test "satisfies_constraint_Ilb (op)")))
 284
 285 (define_predicate "m32c_1bit16_operand"
 286   (and (match_operand 0 "const_int_operand")
 287        (match_test "satisfies_constraint_Ilw (op)")))
 288
 289 (define_predicate "m32c_1mask8_operand"
 290   (and (match_operand 0 "const_int_operand")
 291        (match_test "satisfies_constraint_ImB (op)")))
 292
 293 (define_predicate "m32c_1mask16_operand"
 294   (and (match_operand 0 "const_int_operand")
 295        (match_test "satisfies_constraint_Imw (op)")))