1 /* Definitions of target machine for GNU compiler,
2 for m68k (including m68010) NetBSD platforms using the
4 Copyright (C) 2002, 2003 Free Software Foundation, Inc.
5 Contributed by Wasabi Systems. Inc.
7 This file is derived from <m68k/m68kv4.h>, <m68k/m68kelf.h>,
10 This file is part of GNU CC.
12 GNU CC is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2, or (at your option)
17 GNU CC is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
22 You should have received a copy of the GNU General Public License
23 along with GNU CC; see the file COPYING. If not, write to
24 the Free Software Foundation, 59 Temple Place - Suite 330,
25 Boston, MA 02111-1307, USA. */
27 #define TARGET_OS_CPP_BUILTINS() \
30 NETBSD_OS_CPP_BUILTINS_ELF(); \
31 builtin_define ("__m68k__"); \
32 builtin_define ("__SVR4_ABI__"); \
33 builtin_define ("__motorola__"); \
34 builtin_assert ("cpu=m68k"); \
35 builtin_assert ("machine=m68k"); \
39 /* Default target comes from config.gcc */
41 #define TARGET_DEFAULT TARGET_CPU_DEFAULT
44 /* Don't try using XFmode on the 68010. */
45 #undef LONG_DOUBLE_TYPE_SIZE
46 #define LONG_DOUBLE_TYPE_SIZE \
47 ((TARGET_68020 || TARGET_68040 || TARGET_68040_ONLY || \
48 TARGET_68060) ? 96 : 64)
51 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64
53 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 96
57 { "cpp_cpu_default_spec", CPP_CPU_DEFAULT_SPEC }, \
58 { "cpp_cpu_spec", CPP_CPU_SPEC }, \
59 { "cpp_fpu_spec", CPP_FPU_SPEC }, \
60 { "asm_default_spec", ASM_DEFAULT_SPEC }, \
61 { "netbsd_cpp_spec", NETBSD_CPP_SPEC }, \
62 { "netbsd_entry_point", NETBSD_ENTRY_POINT },
65 #define CPP_CPU_SPEC \
66 "%{m68010:-D__mc68010__} \
67 %{m68020:-D__mc68020__} \
68 %{m68030:-D__mc68030__} \
69 %{m68040:-D__mc68040__} \
70 %(cpp_cpu_default_spec)"
74 #if TARGET_DEFAULT & MASK_68020
75 #define TARGET_VERSION fprintf (stderr, " (NetBSD/m68k ELF)");
76 #define CPP_CPU_DEFAULT_SPEC "%{!m680*:-D__mc68020__}"
77 #define ASM_DEFAULT_SPEC "%{!m680*:-m68020}"
79 #define TARGET_VERSION fprintf (stderr, " (NetBSD/68010 ELF)");
80 #define CPP_CPU_DEFAULT_SPEC "%{!m680*:-D__mc68010__}"
81 #define ASM_DEFAULT_SPEC "%{!m680*:-m68010}"
85 #if TARGET_DEFAULT & MASK_68881
86 #define CPP_FPU_SPEC "%{!msoft-float:-D__HAVE_68881__ -D__HAVE_FPU__}"
88 #define CPP_FPU_SPEC "%{m68881:-D__HAVE_68881__ -D__HAVE_FPU__}"
92 /* Provide a CPP_SPEC appropriate for NetBSD m68k targets. Currently we
93 deal with the GCC option '-posix', as well as an indication as to
94 whether or not use of the FPU is allowed. */
98 "%(netbsd_cpp_spec) %(cpp_cpu_spec) %(cpp_fpu_spec)"
101 /* Provide an ASM_SPEC appropriate for NetBSD m68k ELF targets. We pass
102 on some CPU options, as well as PIC code generation options. */
106 "%(asm_default_spec) \
107 %{m68010} %{m68020} %{m68030} %{m68040} %{m68060} \
108 %{fpic:-k} %{fPIC:-k -K}"
110 #define AS_NEEDS_DASH_FOR_PIPED_INPUT
112 /* Provide a LINK_SPEC appropriate for a NetBSD/m68k ELF target. */
115 #define LINK_SPEC NETBSD_LINK_SPEC_ELF
117 #define NETBSD_ENTRY_POINT "_start"
119 /* Output assembler code to FILE to increment profiler label # LABELNO
120 for profiling a function only. */
122 #undef FUNCTION_PROFILER
123 #define FUNCTION_PROFILER(FILE, LABELNO) \
126 asm_fprintf (FILE, "\tlea (%LLP%d,%Rpc),%Ra1\n", (LABELNO)); \
128 fprintf (FILE, "\tbsr.l __mcount@PLTPC\n"); \
130 fprintf (FILE, "\tjbsr __mcount\n"); \
135 /* Make gcc agree with <machine/ansi.h> */
138 #define SIZE_TYPE "unsigned int"
141 #define PTRDIFF_TYPE "int"
145 Here is a bunch of stuff lifted from m68kelf.h. We don't use that
146 file directly, because it has a lot of baggage we don't want. */
148 #define MOTOROLA /* Use Motorola syntax */
149 #define USE_GAS /* But GAS wants jbsr instead of jsr */
152 /* The prefix for register names. Note that REGISTER_NAMES
153 is supposed to include this prefix. Also note that this is NOT an
154 fprintf format string, it is a literal string. */
156 #undef REGISTER_PREFIX
157 #define REGISTER_PREFIX "%"
160 /* The prefix for local (compiler generated) lables.
161 These labels will not appear in the symbol table. */
163 #undef LOCAL_LABEL_PREFIX
164 #define LOCAL_LABEL_PREFIX "."
167 /* The prefix to add to user-visible assembler symbols. */
169 #undef USER_LABEL_PREFIX
170 #define USER_LABEL_PREFIX ""
173 /* The prefix for immediate operands. */
175 #undef IMMEDIATE_PREFIX
176 #define IMMEDIATE_PREFIX "#"
179 #undef ASM_COMMENT_START
180 #define ASM_COMMENT_START "|"
183 /* How to refer to registers in assembler output.
184 This sequence is indexed by compiler's hard-register-number.
185 Motorola format uses different register names than defined in m68k.h.
186 We also take this chance to convert 'a6' to 'fp' */
188 #undef REGISTER_NAMES
190 #define REGISTER_NAMES \
191 {"%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7", \
192 "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp", \
193 "%fp0", "%fp1", "%fp2", "%fp3", "%fp4", "%fp5", "%fp6", "%fp7" }
196 /* Currently, JUMP_TABLES_IN_TEXT_SECTION must be defined in order to
197 keep switch tables in the text section. */
199 #undef JUMP_TABLES_IN_TEXT_SECTION
200 #define JUMP_TABLES_IN_TEXT_SECTION 1
203 /* Use the default action for outputting the case label. */
204 #undef ASM_OUTPUT_CASE_LABEL
205 #define ASM_RETURN_CASE_JUMP \
209 if (ADDRESS_REG_P (operands[0])) \
210 return "jmp %%pc@(2,%0:l)"; \
212 return "ext%.l %0\n\tjmp %%pc@(2,%0:l)"; \
215 return "jmp %%pc@(2,%0:w)"; \
219 /* This is how to output an assembler line that says to advance the
220 location counter to a multiple of 2**LOG bytes. */
222 #undef ASM_OUTPUT_ALIGN
223 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
227 fprintf ((FILE), "%s%u\n", ALIGN_ASM_OP, 1 << (LOG)); \
232 /* If defined, a C expression whose value is a string containing the
233 assembler operation to identify the following data as uninitialized global
236 #define BSS_SECTION_ASM_OP ".section\t.bss"
239 /* Like `ASM_OUTPUT_BSS' except takes the required alignment as a
240 separate, explicit argument. If you define this macro, it is used
241 in place of `ASM_OUTPUT_BSS', and gives you more flexibility in
242 handling the required alignment of the variable. The alignment is
243 specified as the number of bits.
245 Try to use function `asm_output_aligned_bss' defined in file
246 `varasm.c' when defining this macro. */
248 #undef ASM_OUTPUT_ALIGNED_BSS
249 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
250 asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN)
253 #undef ASM_OUTPUT_COMMON
254 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
255 ( fputs (".comm ", (FILE)), \
256 assemble_name ((FILE), (NAME)), \
257 fprintf ((FILE), ",%u\n", (int)(SIZE)))
259 #undef ASM_OUTPUT_LOCAL
260 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
261 ( fputs (".lcomm ", (FILE)), \
262 assemble_name ((FILE), (NAME)), \
263 fprintf ((FILE), ",%u\n", (int)(SIZE)))
267 This is the end of the chunk lifted from m68kelf.h */
271 The following chunk is more or less lifted from m68kv4.h.
272 We'd like to just #include that file, but it has not yet
273 been converted to the new include style.
275 Should there be a m68kv4-abi.h ?? */
278 /* Register in which address to store a structure value is passed to a
279 function. The default in m68k.h is a1. For m68k/SVR4 it is a0. */
281 #undef STRUCT_VALUE_REGNUM
282 #define STRUCT_VALUE_REGNUM 8
285 /* Register in which static-chain is passed to a function. The
286 default isn m68k.h is a0, but that is already the struct value
287 regnum. Make it a1 instead. */
289 #undef STATIC_CHAIN_REGNUM
290 #define STATIC_CHAIN_REGNUM 9
293 /* Now to renumber registers for dbx and gdb.
294 We use the Sun-3 convention, which is:
295 floating point registers have numbers 18 to 25, not
296 16 to 23 as they do in the compiler. */
298 #undef DBX_REGISTER_NUMBER
299 #define DBX_REGISTER_NUMBER(REGNO) ((REGNO) < 16 ? (REGNO) : (REGNO) + 2)
302 /* 1 if N is a possible register number for a function value. For
303 m68k/SVR4 allow d0, a0, or fp0 as return registers, for integral,
304 pointer, or floating types, respectively. Reject fp0 if not using
305 a 68881 coprocessor. */
307 #undef FUNCTION_VALUE_REGNO_P
308 #define FUNCTION_VALUE_REGNO_P(N) \
309 ((N) == 0 || (N) == 8 || (TARGET_68881 && (N) == 16))
312 /* Define this to be true when FUNCTION_VALUE_REGNO_P is true for
313 more than one register. */
315 #undef NEEDS_UNTYPED_CALL
316 #define NEEDS_UNTYPED_CALL 1
319 /* Define how to generate (in the callee) the output value of a
320 function and how to find (in the caller) the value returned by a
321 function. VALTYPE is the data type of the value (as a tree). If
322 the precise function being called is known, FUNC is its
323 FUNCTION_DECL; otherwise, FUNC is 0. For m68k/SVR4 generate the
324 result in d0, a0, or fp0 as appropriate. */
326 #undef FUNCTION_VALUE
327 #define FUNCTION_VALUE(VALTYPE, FUNC) \
328 (TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_68881 \
329 ? gen_rtx_REG (TYPE_MODE (VALTYPE), 16) \
330 : (POINTER_TYPE_P (VALTYPE) \
331 ? gen_rtx_REG (TYPE_MODE (VALTYPE), 8) \
332 : gen_rtx_REG (TYPE_MODE (VALTYPE), 0)))
335 /* For compatibility with the large body of existing code which does
336 not always properly declare external functions returning pointer
337 types, the m68k/SVR4 convention is to copy the value returned for
338 pointer functions from a0 to d0 in the function epilogue, so that
339 callers that have neglected to properly declare the callee can
340 still find the correct return value. */
342 extern int current_function_returns_pointer
;
343 #define FUNCTION_EXTRA_EPILOGUE(FILE, SIZE) \
346 if (current_function_returns_pointer \
347 && ! find_equiv_reg (0, get_last_insn (), 0, 0, 0, 8, Pmode)) \
348 asm_fprintf (FILE, "\tmove.l %Ra0,%Rd0\n"); \
353 /* Define how to find the value returned by a library function
354 assuming the value has mode MODE.
355 For m68k/SVR4 look for integer values in d0, pointer values in d0
356 (returned in both d0 and a0), and floating values in fp0. */
359 #define LIBCALL_VALUE(MODE) \
360 ((((MODE) == SFmode || (MODE) == DFmode || (MODE) == XFmode) \
362 ? gen_rtx_REG (MODE, 16) \
363 : gen_rtx_REG (MODE, 0))
366 /* Boundary (in *bits*) on which stack pointer should be aligned.
367 The m68k/SVR4 convention is to keep the stack pointer longword aligned. */
369 #undef STACK_BOUNDARY
370 #define STACK_BOUNDARY 32
373 /* Alignment of field after `int : 0' in a structure.
374 For m68k/SVR4, this is the next longword boundary. */
376 #undef EMPTY_FIELD_BOUNDARY
377 #define EMPTY_FIELD_BOUNDARY 32
380 /* No data type wants to be aligned rounder than this.
381 For m68k/SVR4, some types (doubles for example) are aligned on 8 byte
384 #undef BIGGEST_ALIGNMENT
385 #define BIGGEST_ALIGNMENT 64
388 /* In m68k svr4, a symbol_ref rtx can be a valid PIC operand if it is
389 an operand of a function call. */
391 #undef LEGITIMATE_PIC_OPERAND_P
392 #define LEGITIMATE_PIC_OPERAND_P(X) \
393 ((! symbolic_operand (X, VOIDmode) \
394 && ! (GET_CODE (X) == CONST_DOUBLE && mem_for_const_double (X) \
395 && GET_CODE (mem_for_const_double (X)) == MEM \
396 && symbolic_operand (XEXP (mem_for_const_double (X), 0), \
398 || (GET_CODE (X) == SYMBOL_REF && SYMBOL_REF_FLAG (X)) \
399 || PCREL_GENERAL_OPERAND_OK)
402 /* For m68k SVR4, structures are returned using the reentrant
405 #undef PCC_STATIC_STRUCT_RETURN
408 /* The svr4 ABI for the m68k says that records and unions are returned
411 #undef DEFAULT_PCC_STRUCT_RETURN
412 #define DEFAULT_PCC_STRUCT_RETURN 1
414 /* Output assembler code for a block containing the constant parts
415 of a trampoline, leaving space for the variable parts. */
417 /* On m68k svr4, the trampoline is different from the generic version
418 in that we use a1 as the static call chain. */
420 #undef TRAMPOLINE_TEMPLATE
421 #define TRAMPOLINE_TEMPLATE(FILE) \
423 assemble_aligned_integer (2, GEN_INT (0x227a)); \
424 assemble_aligned_integer (2, GEN_INT (8)); \
425 assemble_aligned_integer (2, GEN_INT (0x2f3a)); \
426 assemble_aligned_integer (2, GEN_INT (8)); \
427 assemble_aligned_integer (2, GEN_INT (0x4e75)); \
428 assemble_aligned_integer (4, const0_rtx); \
429 assemble_aligned_integer (4, const0_rtx); \
432 /* Redefine since we are using a different trampoline */
433 #undef TRAMPOLINE_SIZE
434 #define TRAMPOLINE_SIZE 18
436 /* Emit RTL insns to initialize the variable parts of a trampoline.
437 FNADDR is an RTX for the address of the function's pure code.
438 CXT is an RTX for the static chain value for the function. */
440 #undef INITIALIZE_TRAMPOLINE
441 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
443 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 10)), CXT); \
444 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 14)), FNADDR); \
449 This is the end of the chunk lifted from m68kv4.h */