1 /* Definitions of target machine for GNU compiler,
2 for m68k (including m68010) NetBSD platforms using the
4 Copyright (C) 2002 Free Software Foundation, Inc.
5 Contributed by Wasabi Systems. Inc.
7 This file is derived from <m68k/m68kv4.h>, <m68k/m68kelf.h>,
10 This file is part of GNU CC.
12 GNU CC is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 1, or (at your option)
17 GNU CC is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
22 You should have received a copy of the GNU General Public License
23 along with GNU CC; see the file COPYING. If not, write to
24 the Free Software Foundation, 59 Temple Place - Suite 330,
25 Boston, MA 02111-1307, USA. */
27 #define TARGET_OS_CPP_BUILTINS() \
30 NETBSD_OS_CPP_BUILTINS_ELF(); \
31 builtin_define ("__m68k__"); \
32 builtin_define ("__SVR4_ABI__"); \
33 builtin_define ("__motorola__"); \
34 builtin_assert ("cpu=m68k"); \
35 builtin_assert ("machine=m68k"); \
39 /* Default target comes from config.gcc */
41 #define TARGET_DEFAULT TARGET_CPU_DEFAULT
44 /* Don't try using XFmode on the 68010. */
45 #undef LONG_DOUBLE_TYPE_SIZE
46 #define LONG_DOUBLE_TYPE_SIZE \
47 ((TARGET_68020 || TARGET_68040 || TARGET_68040_ONLY || \
48 TARGET_68060) ? 96 : 64)
51 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64
53 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 96
57 { "cpp_cpu_default_spec", CPP_CPU_DEFAULT_SPEC }, \
58 { "cpp_cpu_spec", CPP_CPU_SPEC }, \
59 { "cpp_fpu_spec", CPP_FPU_SPEC }, \
60 { "asm_default_spec", ASM_DEFAULT_SPEC }, \
61 { "netbsd_cpp_spec", NETBSD_CPP_SPEC },
64 #define CPP_CPU_SPEC \
65 "%{m68010:-D__mc68010__} \
66 %{m68020:-D__mc68020__} \
67 %{m68030:-D__mc68030__} \
68 %{m68040:-D__mc68040__} \
69 %(cpp_cpu_default_spec)"
73 #if TARGET_DEFAULT & MASK_68020
74 #define TARGET_VERSION fprintf (stderr, " (NetBSD/m68k ELF)");
75 #define CPP_CPU_DEFAULT_SPEC "%{!m680*:-D__mc68020__}"
76 #define ASM_DEFAULT_SPEC "%{!m680*:-m68020}"
78 #define TARGET_VERSION fprintf (stderr, " (NetBSD/68010 ELF)");
79 #define CPP_CPU_DEFAULT_SPEC "%{!m680*:-D__mc68010__}"
80 #define ASM_DEFAULT_SPEC "%{!m680*:-m68010}"
84 #if TARGET_DEFAULT & MASK_68881
85 #define CPP_FPU_SPEC "%{!msoft-float:-D__HAVE_68881__ -D__HAVE_FPU__}"
87 #define CPP_FPU_SPEC "%{m68881:-D__HAVE_68881__ -D__HAVE_FPU__}"
91 /* Provide a CPP_SPEC appropriate for NetBSD m68k targets. Currently we
92 deal with the GCC option '-posix', as well as an indication as to
93 whether or not use of the FPU is allowed. */
97 "%(netbsd_cpp_spec) %(cpp_cpu_spec) %(cpp_fpu_spec)"
100 /* Provide an ASM_SPEC appropriate for NetBSD m68k ELF targets. We pass
101 on some CPU options, as well as PIC code generation options. */
105 " %| %(asm_default_spec) \
106 %{m68010} %{m68020} %{m68030} %{m68040} %{m68060} \
107 %{fpic:-k} %{fPIC:-k -K}"
109 /* Provide a LINK_SPEC appropriate for a NetBSD/m68k ELF target.
110 This is a copy of LINK_SPEC from <netbsd-elf.h> tweaked for
123 %{rdynamic:-export-dynamic} \
124 %{!dynamic-linker:-dynamic-linker /usr/libexec/ld.elf_so}} \
128 /* Output assembler code to FILE to increment profiler label # LABELNO
129 for profiling a function only. */
131 #undef FUNCTION_PROFILER
132 #define FUNCTION_PROFILER(FILE, LABELNO) \
135 asm_fprintf (FILE, "\tlea (%LLP%d,%Rpc),%Ra1\n", (LABELNO)); \
137 fprintf (FILE, "\tbsr.l __mcount@PLTPC\n"); \
139 fprintf (FILE, "\tjbsr __mcount\n"); \
144 /* Make gcc agree with <machine/ansi.h> */
147 #define SIZE_TYPE "unsigned int"
150 #define PTRDIFF_TYPE "int"
154 Here is a bunch of stuff lifted from m68kelf.h. We don't use that
155 file directly, because it has a lot of baggage we don't want. */
157 #define MOTOROLA /* Use Motorola syntax */
158 #define USE_GAS /* But GAS wants jbsr instead of jsr */
161 /* The prefix for register names. Note that REGISTER_NAMES
162 is supposed to include this prefix. Also note that this is NOT an
163 fprintf format string, it is a literal string. */
165 #undef REGISTER_PREFIX
166 #define REGISTER_PREFIX "%"
169 /* The prefix for local (compiler generated) lables.
170 These labels will not appear in the symbol table. */
172 #undef LOCAL_LABEL_PREFIX
173 #define LOCAL_LABEL_PREFIX "."
176 /* The prefix to add to user-visible assembler symbols. */
178 #undef USER_LABEL_PREFIX
179 #define USER_LABEL_PREFIX ""
182 /* The prefix for immediate operands. */
184 #undef IMMEDIATE_PREFIX
185 #define IMMEDIATE_PREFIX "#"
188 #undef ASM_COMMENT_START
189 #define ASM_COMMENT_START "|"
192 /* How to refer to registers in assembler output.
193 This sequence is indexed by compiler's hard-register-number.
194 Motorola format uses different register names than defined in m68k.h.
195 We also take this chance to convert 'a6' to 'fp' */
197 #undef REGISTER_NAMES
199 #ifndef SUPPORT_SUN_FPA
201 #define REGISTER_NAMES \
202 {"%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7", \
203 "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp", \
204 "%fp0", "%fp1", "%fp2", "%fp3", "%fp4", "%fp5", "%fp6", "%fp7" }
206 #else /* SUPPORT_SUN_FPA */
208 #define REGISTER_NAMES \
209 {"%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7", \
210 "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp", \
211 "%fp0", "%fp1", "%fp2", "%fp3", "%fp4", "%fp5", "%fp6", "%fp7", \
212 "%fpa0", "%fpa1", "%fpa2", "%fpa3", "%fpa4", "%fpa5", "%fpa6","%fpa7", \
213 "%fpa8", "%fpa9", "%fpa10","%fpa11","%fpa12","%fpa13","%fpa14","%fpa15", \
214 "%fpa16","%fpa17","%fpa18","%fpa19","%fpa20","%fpa21","%fpa22","%fpa23", \
215 "%fpa24","%fpa25","%fpa26","%fpa27","%fpa28","%fpa29","%fpa30","%fpa31" }
217 #endif /* ! SUPPORT_SUN_FPA */
220 /* Currently, JUMP_TABLES_IN_TEXT_SECTION must be defined in order to
221 keep switch tables in the text section. */
223 #undef JUMP_TABLES_IN_TEXT_SECTION
224 #define JUMP_TABLES_IN_TEXT_SECTION 1
227 /* Use the default action for outputting the case label. */
228 #undef ASM_OUTPUT_CASE_LABEL
229 #define ASM_RETURN_CASE_JUMP \
233 return "ext%.l %0\n\tjmp %%pc@(2,%0:l)"; \
235 return "jmp %%pc@(2,%0:w)"; \
240 /* This is how to output an assembler line that says to advance the
241 location counter to a multiple of 2**LOG bytes. */
243 #undef ASM_OUTPUT_ALIGN
244 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
248 fprintf ((FILE), "%s%u\n", ALIGN_ASM_OP, 1 << (LOG)); \
253 /* If defined, a C expression whose value is a string containing the
254 assembler operation to identify the following data as uninitialized global
257 #define BSS_SECTION_ASM_OP ".section\t.bss"
260 /* Like `ASM_OUTPUT_BSS' except takes the required alignment as a
261 separate, explicit argument. If you define this macro, it is used
262 in place of `ASM_OUTPUT_BSS', and gives you more flexibility in
263 handling the required alignment of the variable. The alignment is
264 specified as the number of bits.
266 Try to use function `asm_output_aligned_bss' defined in file
267 `varasm.c' when defining this macro. */
269 #undef ASM_OUTPUT_ALIGNED_BSS
270 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
271 asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN)
274 #undef ASM_OUTPUT_COMMON
275 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
276 ( fputs (".comm ", (FILE)), \
277 assemble_name ((FILE), (NAME)), \
278 fprintf ((FILE), ",%u\n", (SIZE)))
280 #undef ASM_OUTPUT_LOCAL
281 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
282 ( fputs (".lcomm ", (FILE)), \
283 assemble_name ((FILE), (NAME)), \
284 fprintf ((FILE), ",%u\n", (SIZE)))
287 /* Turn off function cse if we are doing PIC. We always want function
288 call to be done as `bsr foo@PLTPC', so it will force the assembler
289 to create the PLT entry for `foo'. Doing function cse will cause
290 the address of `foo' to be loaded into a register, which is exactly
291 what we want to avoid when we are doing PIC on svr4 m68k. */
293 #undef SUBTARGET_OVERRIDE_OPTIONS
294 #define SUBTARGET_OVERRIDE_OPTIONS \
295 if (flag_pic) flag_no_function_cse = 1;
299 This is the end of the chunk lifted from m68kelf.h */
303 The following chunk is more or less lifted from m68kv4.h.
304 We'd like to just #include that file, but it has not yet
305 been converted to the new include style.
307 Should there be a m68kv4-abi.h ?? */
310 /* Register in which address to store a structure value is passed to a
311 function. The default in m68k.h is a1. For m68k/SVR4 it is a0. */
313 #undef STRUCT_VALUE_REGNUM
314 #define STRUCT_VALUE_REGNUM 8
317 /* Register in which static-chain is passed to a function. The
318 default isn m68k.h is a0, but that is already the struct value
319 regnum. Make it a1 instead. */
321 #undef STATIC_CHAIN_REGNUM
322 #define STATIC_CHAIN_REGNUM 9
325 /* Now to renumber registers for dbx and gdb.
326 We use the Sun-3 convention, which is:
327 floating point registers have numbers 18 to 25, not
328 16 to 23 as they do in the compiler. */
330 #undef DBX_REGISTER_NUMBER
331 #define DBX_REGISTER_NUMBER(REGNO) ((REGNO) < 16 ? (REGNO) : (REGNO) + 2)
334 /* 1 if N is a possible register number for a function value. For
335 m68k/SVR4 allow d0, a0, or fp0 as return registers, for integral,
336 pointer, or floating types, respectively. Reject fp0 if not using
337 a 68881 coprocessor. */
339 #undef FUNCTION_VALUE_REGNO_P
340 #define FUNCTION_VALUE_REGNO_P(N) \
341 ((N) == 0 || (N) == 8 || (TARGET_68881 && (N) == 16))
344 /* Define this to be true when FUNCTION_VALUE_REGNO_P is true for
345 more than one register. */
347 #undef NEEDS_UNTYPED_CALL
348 #define NEEDS_UNTYPED_CALL 1
351 /* Define how to generate (in the callee) the output value of a
352 function and how to find (in the caller) the value returned by a
353 function. VALTYPE is the data type of the value (as a tree). If
354 the precise function being called is known, FUNC is its
355 FUNCTION_DECL; otherwise, FUNC is 0. For m68k/SVR4 generate the
356 result in d0, a0, or fp0 as appropriate. */
358 #undef FUNCTION_VALUE
359 #define FUNCTION_VALUE(VALTYPE, FUNC) \
360 (TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_68881 \
361 ? gen_rtx_REG (TYPE_MODE (VALTYPE), 16) \
362 : (POINTER_TYPE_P (VALTYPE) \
363 ? gen_rtx_REG (TYPE_MODE (VALTYPE), 8) \
364 : gen_rtx_REG (TYPE_MODE (VALTYPE), 0)))
367 /* For compatibility with the large body of existing code which does
368 not always properly declare external functions returning pointer
369 types, the m68k/SVR4 convention is to copy the value returned for
370 pointer functions from a0 to d0 in the function epilogue, so that
371 callers that have neglected to properly declare the callee can
372 still find the correct return value. */
374 extern int current_function_returns_pointer
;
375 #define FUNCTION_EXTRA_EPILOGUE(FILE, SIZE) \
378 if (current_function_returns_pointer \
379 && ! find_equiv_reg (0, get_last_insn (), 0, 0, 0, 8, Pmode)) \
380 asm_fprintf (FILE, "\tmove.l %Ra0,%Rd0\n"); \
385 /* Define how to find the value returned by a library function
386 assuming the value has mode MODE.
387 For m68k/SVR4 look for integer values in d0, pointer values in d0
388 (returned in both d0 and a0), and floating values in fp0. */
391 #define LIBCALL_VALUE(MODE) \
392 ((((MODE) == SFmode || (MODE) == DFmode || (MODE) == XFmode) \
394 ? gen_rtx_REG (MODE, 16) \
395 : gen_rtx_REG (MODE, 0))
398 /* Boundary (in *bits*) on which stack pointer should be aligned.
399 The m68k/SVR4 convention is to keep the stack pointer longword aligned. */
401 #undef STACK_BOUNDARY
402 #define STACK_BOUNDARY 32
405 /* Alignment of field after `int : 0' in a structure.
406 For m68k/SVR4, this is the next longword boundary. */
408 #undef EMPTY_FIELD_BOUNDARY
409 #define EMPTY_FIELD_BOUNDARY 32
412 /* No data type wants to be aligned rounder than this.
413 For m68k/SVR4, some types (doubles for example) are aligned on 8 byte
416 #undef BIGGEST_ALIGNMENT
417 #define BIGGEST_ALIGNMENT 64
420 /* In m68k svr4, a symbol_ref rtx can be a valid PIC operand if it is
421 an operand of a function call. */
423 #undef LEGITIMATE_PIC_OPERAND_P
424 #define LEGITIMATE_PIC_OPERAND_P(X) \
425 ((! symbolic_operand (X, VOIDmode) \
426 && ! (GET_CODE (X) == CONST_DOUBLE && mem_for_const_double (X) \
427 && GET_CODE (mem_for_const_double (X)) == MEM \
428 && symbolic_operand (XEXP (mem_for_const_double (X), 0), \
430 || (GET_CODE (X) == SYMBOL_REF && SYMBOL_REF_FLAG (X)) \
431 || PCREL_GENERAL_OPERAND_OK)
434 /* For m68k SVR4, structures are returned using the reentrant
437 #undef PCC_STATIC_STRUCT_RETURN
440 /* The svr4 ABI for the m68k says that records and unions are returned
443 #undef DEFAULT_PCC_STRUCT_RETURN
444 #define DEFAULT_PCC_STRUCT_RETURN 1
447 /* Output code to add DELTA to the first argument, and then jump to FUNCTION.
448 Used for C++ multiple inheritance. */
450 #define ASM_OUTPUT_MI_THUNK(FILE, THUNK_FNDECL, DELTA, FUNCTION) \
453 if (DELTA > 0 && DELTA <= 8) \
454 asm_fprintf (FILE, "\taddq.l %I%d,4(%Rsp)\n", DELTA); \
455 else if (DELTA < 0 && DELTA >= -8) \
456 asm_fprintf (FILE, "\tsubq.l %I%d,4(%Rsp)\n", -DELTA); \
458 asm_fprintf (FILE, "\tadd.l %I%d,4(%Rsp)\n", DELTA); \
462 fprintf (FILE, "\tbra.l "); \
463 assemble_name (FILE, XSTR (XEXP (DECL_RTL (FUNCTION), 0), 0)); \
464 fprintf (FILE, "@PLTPC\n"); \
468 fprintf (FILE, "\tjmp "); \
469 assemble_name (FILE, XSTR (XEXP (DECL_RTL (FUNCTION), 0), 0)); \
470 fprintf (FILE, "\n"); \
476 /* Output assembler code for a block containing the constant parts
477 of a trampoline, leaving space for the variable parts. */
479 /* On m68k svr4, the trampoline is different from the generic version
480 in that we use a1 as the static call chain. */
482 #undef TRAMPOLINE_TEMPLATE
483 #define TRAMPOLINE_TEMPLATE(FILE) \
485 assemble_aligned_integer (2, GEN_INT (0x227a)); \
486 assemble_aligned_integer (2, GEN_INT (8)); \
487 assemble_aligned_integer (2, GEN_INT (0x2f3a)); \
488 assemble_aligned_integer (2, GEN_INT (8)); \
489 assemble_aligned_integer (2, GEN_INT (0x4e75)); \
490 assemble_aligned_integer (4, const0_rtx); \
491 assemble_aligned_integer (4, const0_rtx); \
494 /* Redefine since we are using a different trampoline */
495 #undef TRAMPOLINE_SIZE
496 #define TRAMPOLINE_SIZE 18
498 /* Emit RTL insns to initialize the variable parts of a trampoline.
499 FNADDR is an RTX for the address of the function's pure code.
500 CXT is an RTX for the static chain value for the function. */
502 #undef INITIALIZE_TRAMPOLINE
503 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
505 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 10)), CXT); \
506 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 14)), FNADDR); \
511 This is the end of the chunk lifted from m68kv4.h */