1 /* Subroutines used for code generation on Xilinx MicroBlaze.
2 Copyright 2009, 2010, 2011 Free Software Foundation, Inc.
4 Contributed by Michael Eager <eager@eagercon.com>.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it
9 under the terms of the GNU General Public License as published
10 by the Free Software Foundation; either version 3, or (at your
11 option) any later version.
13 GCC is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
24 #include "coretypes.h"
28 #include "hard-reg-set.h"
30 #include "insn-config.h"
31 #include "conditions.h"
32 #include "insn-flags.h"
33 #include "insn-attr.h"
34 #include "integrate.h"
45 #include "target-def.h"
50 #include "diagnostic-core.h"
52 #define MICROBLAZE_VERSION_COMPARE(VA,VB) strcasecmp (VA, VB)
54 /* Classifies an address.
61 A natural register or a register + const_int offset address.
62 The register satisfies microblaze_valid_base_register_p and the
63 offset is a const_arith_operand.
67 A natural register offset by the index contained in an index register. The base
68 register satisfies microblaze_valid_base_register_p and the index register
69 satisfies microblaze_valid_index_register_p
73 A signed 16/32-bit constant address.
77 A constant symbolic address or a (register + symbol). */
79 enum microblaze_address_type
95 enum microblaze_symbol_type
101 /* Classification of a MicroBlaze address. */
102 struct microblaze_address_info
104 enum microblaze_address_type type
;
105 rtx regA
; /* Contains valid values on ADDRESS_REG, ADDRESS_REG_INDEX,
107 rtx regB
; /* Contains valid values on ADDRESS_REG_INDEX. */
108 rtx offset
; /* Contains valid values on ADDRESS_CONST_INT and ADDRESS_REG. */
109 rtx symbol
; /* Contains valid values on ADDRESS_SYMBOLIC. */
110 enum microblaze_symbol_type symbol_type
;
113 /* Structure to be filled in by compute_frame_size with register
114 save masks, and offsets for the current function. */
116 struct GTY(()) microblaze_frame_info
{
117 long total_size
; /* # bytes that the entire frame takes up. */
118 long var_size
; /* # bytes that variables take up. */
119 long args_size
; /* # bytes that outgoing arguments take up. */
120 int link_debug_size
; /* # bytes for the link reg and back pointer. */
121 int gp_reg_size
; /* # bytes needed to store gp regs. */
122 long gp_offset
; /* offset from new sp to store gp registers. */
123 long mask
; /* mask of saved gp registers. */
124 int initialized
; /* != 0 if frame size already calculated. */
125 int num_gp
; /* number of gp registers saved. */
126 long insns_len
; /* length of insns. */
127 int alloc_stack
; /* Flag to indicate if the current function
128 must not create stack space. (As an optimization). */
131 /* Global variables for machine-dependent things. */
133 /* Toggle which pipleline interface to use. */
134 static GTY(()) int microblaze_sched_use_dfa
= 0;
136 /* Threshold for data being put into the small data/bss area, instead
137 of the normal data area (references to the small data/bss area take
138 1 instruction, and use the global pointer, references to the normal
139 data area takes 2 instructions). */
140 int microblaze_section_threshold
= -1;
142 /* Prevent scheduling potentially exception causing instructions in
143 delay slots. -mcpu=v3.00.a or v4.00.a turns this on. */
144 int microblaze_no_unsafe_delay
;
146 /* Which CPU pipeline do we use. We haven't really standardized on a CPU
147 version having only a particular type of pipeline. There can still be
148 options on the CPU to scale pipeline features up or down. :(
149 Bad Presentation (??), so we let the MD file rely on the value of
150 this variable instead Making PIPE_5 the default. It should be backward
151 optimal with PIPE_3 MicroBlazes. */
152 enum pipeline_type microblaze_pipe
= MICROBLAZE_PIPE_5
;
154 /* High and low marks for floating point values which we will accept
155 as legitimate constants for TARGET_LEGITIMATE_CONSTANT_P. These are
156 initialized in override_options. */
157 REAL_VALUE_TYPE dfhigh
, dflow
, sfhigh
, sflow
;
159 /* Array giving truth value on whether or not a given hard register
160 can support a given mode. */
161 char microblaze_hard_regno_mode_ok
[(int)MAX_MACHINE_MODE
]
162 [FIRST_PSEUDO_REGISTER
];
164 /* Current frame information calculated by compute_frame_size. */
165 struct microblaze_frame_info current_frame_info
;
167 /* Zero structure to initialize current_frame_info. */
168 struct microblaze_frame_info zero_frame_info
;
170 /* List of all MICROBLAZE punctuation characters used by print_operand. */
171 char microblaze_print_operand_punct
[256];
173 /* Map GCC register number to debugger register number. */
174 int microblaze_dbx_regno
[FIRST_PSEUDO_REGISTER
];
176 /* Map hard register number to register class. */
177 enum reg_class microblaze_regno_to_class
[] =
179 GR_REGS
, GR_REGS
, GR_REGS
, GR_REGS
,
180 GR_REGS
, GR_REGS
, GR_REGS
, GR_REGS
,
181 GR_REGS
, GR_REGS
, GR_REGS
, GR_REGS
,
182 GR_REGS
, GR_REGS
, GR_REGS
, GR_REGS
,
183 GR_REGS
, GR_REGS
, GR_REGS
, GR_REGS
,
184 GR_REGS
, GR_REGS
, GR_REGS
, GR_REGS
,
185 GR_REGS
, GR_REGS
, GR_REGS
, GR_REGS
,
186 GR_REGS
, GR_REGS
, GR_REGS
, GR_REGS
,
187 ST_REGS
, GR_REGS
, GR_REGS
, GR_REGS
190 /* MicroBlaze specific machine attributes.
191 interrupt_handler - Interrupt handler attribute to add interrupt prologue
192 and epilogue and use appropriate interrupt return.
193 save_volatiles - Similiar to interrupt handler, but use normal return. */
194 int interrupt_handler
;
197 const struct attribute_spec microblaze_attribute_table
[] = {
198 /* name min_len, max_len, decl_req, type_req, fn_type, req_handler,
199 affects_type_identity */
200 {"interrupt_handler", 0, 0, true, false, false, NULL
,
202 {"save_volatiles" , 0, 0, true, false, false, NULL
,
204 { NULL
, 0, 0, false, false, false, NULL
,
208 static int microblaze_interrupt_function_p (tree
);
210 section
*sdata2_section
;
212 /* Return truth value if a CONST_DOUBLE is ok to be a legitimate constant. */
214 microblaze_const_double_ok (rtx op
, enum machine_mode mode
)
218 if (GET_CODE (op
) != CONST_DOUBLE
)
221 if (GET_MODE (op
) == VOIDmode
)
224 if (mode
!= SFmode
&& mode
!= DFmode
)
227 if (op
== CONST0_RTX (mode
))
230 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
232 if (REAL_VALUE_ISNAN (d
))
235 if (REAL_VALUE_NEGATIVE (d
))
236 d
= real_value_negate (&d
);
240 if (REAL_VALUES_LESS (d
, dfhigh
) && REAL_VALUES_LESS (dflow
, d
))
245 if (REAL_VALUES_LESS (d
, sfhigh
) && REAL_VALUES_LESS (sflow
, d
))
252 /* Return truth value if a memory operand fits in a single instruction
253 (ie, register + small offset) or (register + register). */
256 simple_memory_operand (rtx op
, enum machine_mode mode ATTRIBUTE_UNUSED
)
258 rtx addr
, plus0
, plus1
;
260 /* Eliminate non-memory operations. */
261 if (GET_CODE (op
) != MEM
)
264 /* dword operations really put out 2 instructions, so eliminate them. */
265 /* ??? This isn't strictly correct. It is OK to accept multiword modes
266 here, since the length attributes are being set correctly, but only
267 if the address is offsettable. */
268 if (GET_MODE_SIZE (GET_MODE (op
)) > UNITS_PER_WORD
)
272 /* Decode the address now. */
274 switch (GET_CODE (addr
))
281 plus0
= XEXP (addr
, 0);
282 plus1
= XEXP (addr
, 1);
284 if (GET_CODE (plus0
) == REG
&& GET_CODE (plus1
) == CONST_INT
285 && SMALL_INT (plus1
))
289 else if (GET_CODE (plus1
) == REG
&& GET_CODE (plus0
) == CONST_INT
)
293 else if (GET_CODE (plus0
) == REG
&& GET_CODE (plus1
) == REG
)
310 /* Return nonzero for a memory address that can be used to load or store
314 double_memory_operand (rtx op
, enum machine_mode mode
)
318 if (GET_CODE (op
) != MEM
|| !memory_operand (op
, mode
))
320 /* During reload, we accept a pseudo register if it has an
321 appropriate memory address. If we don't do this, we will
322 wind up reloading into a register, and then reloading that
323 register from memory, when we could just reload directly from
325 if (reload_in_progress
326 && GET_CODE (op
) == REG
327 && REGNO (op
) >= FIRST_PSEUDO_REGISTER
328 && reg_renumber
[REGNO (op
)] < 0
329 && reg_equiv_mem (REGNO (op
)) != 0
330 && double_memory_operand (reg_equiv_mem (REGNO (op
)), mode
))
335 /* Make sure that 4 added to the address is a valid memory address.
336 This essentially just checks for overflow in an added constant. */
340 if (CONSTANT_ADDRESS_P (addr
))
343 return memory_address_p ((GET_MODE_CLASS (mode
) == MODE_INT
344 ? SImode
: SFmode
), plus_constant (addr
, 4));
347 /* Implement REG_OK_FOR_BASE_P -and- REG_OK_FOR_INDEX_P. */
349 microblaze_regno_ok_for_base_p (int regno
, int strict
)
351 if (regno
>= FIRST_PSEUDO_REGISTER
)
355 regno
= reg_renumber
[regno
];
358 /* These fake registers will be eliminated to either the stack or
359 hard frame pointer, both of which are usually valid base registers.
360 Reload deals with the cases where the eliminated form isn't valid. */
361 if (regno
== ARG_POINTER_REGNUM
|| regno
== FRAME_POINTER_REGNUM
)
364 return GP_REG_P (regno
);
367 /* Return true if X is a valid base register for the given mode.
368 Allow only hard registers if STRICT. */
371 microblaze_valid_base_register_p (rtx x
,
372 enum machine_mode mode ATTRIBUTE_UNUSED
,
375 if (!strict
&& GET_CODE (x
) == SUBREG
)
378 return (GET_CODE (x
) == REG
379 && microblaze_regno_ok_for_base_p (REGNO (x
), strict
));
383 microblaze_classify_unspec (struct microblaze_address_info
*info
, rtx x
)
385 info
->symbol_type
= SYMBOL_TYPE_GENERAL
;
386 info
->symbol
= XVECEXP (x
, 0, 0);
388 if (XINT (x
, 1) == UNSPEC_GOTOFF
)
390 info
->regA
= gen_rtx_REG (SImode
, PIC_OFFSET_TABLE_REGNUM
);
391 info
->type
= ADDRESS_GOTOFF
;
393 else if (XINT (x
, 1) == UNSPEC_PLT
)
395 info
->type
= ADDRESS_PLT
;
405 /* Return true if X is a valid index register for the given mode.
406 Allow only hard registers if STRICT. */
409 microblaze_valid_index_register_p (rtx x
,
410 enum machine_mode mode ATTRIBUTE_UNUSED
,
413 if (!strict
&& GET_CODE (x
) == SUBREG
)
416 return (GET_CODE (x
) == REG
417 /* A base register is good enough to be an index register on MicroBlaze. */
418 && microblaze_regno_ok_for_base_p (REGNO (x
), strict
));
421 /* Get the base register for accessing a value from the memory or
422 Symbol ref. Used for MicroBlaze Small Data Area Pointer Optimization. */
427 int base_reg
= (flag_pic
? MB_ABI_PIC_ADDR_REGNUM
: MB_ABI_BASE_REGNUM
);
430 && GET_CODE (x
) == SYMBOL_REF
431 && SYMBOL_REF_SMALL_P (x
) && (decl
= SYMBOL_REF_DECL (x
)) != NULL
)
433 if (TREE_READONLY (decl
))
434 base_reg
= MB_ABI_GPRO_REGNUM
;
436 base_reg
= MB_ABI_GPRW_REGNUM
;
442 /* Return true if X is a valid address for machine mode MODE. If it is,
443 fill in INFO appropriately. STRICT is true if we should only accept
446 type regA regB offset symbol
448 ADDRESS_INVALID NULL NULL NULL NULL
450 ADDRESS_REG %0 NULL const_0 / NULL
452 ADDRESS_REG_INDEX %0 %1 NULL NULL
454 ADDRESS_SYMBOLIC r0 / NULL NULL symbol
457 ADDRESS_CONST_INT r0 NULL const NULL
459 For modes spanning multiple registers (DFmode in 32-bit GPRs,
460 DImode, TImode), indexed addressing cannot be used because
461 adjacent memory cells are accessed by adding word-sized offsets
462 during assembly output. */
465 microblaze_classify_address (struct microblaze_address_info
*info
, rtx x
,
466 enum machine_mode mode
, int strict
)
471 info
->type
= ADDRESS_INVALID
;
476 info
->symbol_type
= SYMBOL_TYPE_INVALID
;
478 switch (GET_CODE (x
))
483 info
->type
= ADDRESS_REG
;
485 info
->offset
= const0_rtx
;
486 return microblaze_valid_base_register_p (info
->regA
, mode
, strict
);
490 xplus0
= XEXP (x
, 0);
491 xplus1
= XEXP (x
, 1);
493 if (microblaze_valid_base_register_p (xplus0
, mode
, strict
))
495 info
->type
= ADDRESS_REG
;
498 if (GET_CODE (xplus1
) == CONST_INT
)
500 info
->offset
= xplus1
;
503 else if (GET_CODE (xplus1
) == UNSPEC
)
505 return microblaze_classify_unspec (info
, xplus1
);
507 else if ((GET_CODE (xplus1
) == SYMBOL_REF
||
508 GET_CODE (xplus1
) == LABEL_REF
) && flag_pic
== 2)
512 else if (GET_CODE (xplus1
) == SYMBOL_REF
||
513 GET_CODE (xplus1
) == LABEL_REF
||
514 GET_CODE (xplus1
) == CONST
)
516 if (GET_CODE (XEXP (xplus1
, 0)) == UNSPEC
)
517 return microblaze_classify_unspec (info
, XEXP (xplus1
, 0));
518 else if (flag_pic
== 2)
522 info
->type
= ADDRESS_SYMBOLIC
;
523 info
->symbol
= xplus1
;
524 info
->symbol_type
= SYMBOL_TYPE_GENERAL
;
527 else if (GET_CODE (xplus1
) == REG
528 && microblaze_valid_index_register_p (xplus1
, mode
,
530 && (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
))
532 /* Restrict larger than word-width modes from using an index register. */
533 info
->type
= ADDRESS_REG_INDEX
;
542 info
->regA
= gen_rtx_raw_REG (mode
, 0);
543 info
->type
= ADDRESS_CONST_INT
;
551 info
->type
= ADDRESS_SYMBOLIC
;
552 info
->symbol_type
= SYMBOL_TYPE_GENERAL
;
554 info
->regA
= gen_rtx_raw_REG (mode
, get_base_reg (x
));
556 if (GET_CODE (x
) == CONST
)
558 return !(flag_pic
&& pic_address_needs_scratch (x
));
560 else if (flag_pic
== 2)
570 if (reload_in_progress
)
571 df_set_regs_ever_live (PIC_OFFSET_TABLE_REGNUM
, true);
572 return microblaze_classify_unspec (info
, x
);
582 /* This function is used to implement GO_IF_LEGITIMATE_ADDRESS. It
583 returns a nonzero value if X is a legitimate address for a memory
584 operand of the indicated MODE. STRICT is nonzero if this function
585 is called during reload. */
588 microblaze_legitimate_address_p (enum machine_mode mode
, rtx x
, bool strict
)
590 struct microblaze_address_info addr
;
592 return microblaze_classify_address (&addr
, x
, mode
, strict
);
596 /* Try machine-dependent ways of modifying an illegitimate address
597 to be legitimate. If we find one, return the new, valid address.
598 This is used from only one place: `memory_address' in explow.c.
600 OLDX is the address as it was before break_out_memory_refs was
601 called. In some cases it is useful to look at this to decide what
604 It is always safe for this function to do nothing. It exists to
605 recognize opportunities to optimize the output.
607 For the MicroBlaze, transform:
609 memory(X + <large int>)
613 Y = <large int> & ~0x7fff;
615 memory (Z + (<large int> & 0x7fff));
617 This is for CSE to find several similar references, and only use one Z.
619 When PIC, convert addresses of the form memory (symbol+large int) to
620 memory (reg+large int). */
623 microblaze_legitimize_address (rtx x
, rtx oldx ATTRIBUTE_UNUSED
,
624 enum machine_mode mode ATTRIBUTE_UNUSED
)
626 register rtx xinsn
= x
, result
;
628 if (GET_CODE (xinsn
) == CONST
629 && flag_pic
&& pic_address_needs_scratch (xinsn
))
631 rtx ptr_reg
= gen_reg_rtx (Pmode
);
632 rtx constant
= XEXP (XEXP (xinsn
, 0), 1);
634 emit_move_insn (ptr_reg
, XEXP (XEXP (xinsn
, 0), 0));
636 result
= gen_rtx_PLUS (Pmode
, ptr_reg
, constant
);
637 if (SMALL_INT (constant
))
639 /* Otherwise we fall through so the code below will fix the
644 if (GET_CODE (xinsn
) == PLUS
)
646 register rtx xplus0
= XEXP (xinsn
, 0);
647 register rtx xplus1
= XEXP (xinsn
, 1);
648 register enum rtx_code code0
= GET_CODE (xplus0
);
649 register enum rtx_code code1
= GET_CODE (xplus1
);
651 if (code0
!= REG
&& code1
== REG
)
653 xplus0
= XEXP (xinsn
, 1);
654 xplus1
= XEXP (xinsn
, 0);
655 code0
= GET_CODE (xplus0
);
656 code1
= GET_CODE (xplus1
);
659 if (code0
== REG
&& REG_OK_FOR_BASE_P (xplus0
)
660 && code1
== CONST_INT
&& !SMALL_INT (xplus1
))
662 rtx int_reg
= gen_reg_rtx (Pmode
);
663 rtx ptr_reg
= gen_reg_rtx (Pmode
);
665 emit_move_insn (int_reg
, GEN_INT (INTVAL (xplus1
) & ~0x7fff));
667 emit_insn (gen_rtx_SET (VOIDmode
,
669 gen_rtx_PLUS (Pmode
, xplus0
, int_reg
)));
671 result
= gen_rtx_PLUS (Pmode
, ptr_reg
,
672 GEN_INT (INTVAL (xplus1
) & 0x7fff));
676 if (code0
== REG
&& REG_OK_FOR_BASE_P (xplus0
) && flag_pic
== 2)
678 if (reload_in_progress
)
679 df_set_regs_ever_live (PIC_OFFSET_TABLE_REGNUM
, true);
682 xplus1
= XEXP (xplus1
, 0);
683 code1
= GET_CODE (xplus1
);
685 if (code1
== SYMBOL_REF
)
688 gen_rtx_UNSPEC (Pmode
, gen_rtvec (1, xplus1
), UNSPEC_GOTOFF
);
689 result
= gen_rtx_CONST (Pmode
, result
);
690 result
= gen_rtx_PLUS (Pmode
, pic_offset_table_rtx
, result
);
691 result
= gen_const_mem (Pmode
, result
);
692 result
= gen_rtx_PLUS (Pmode
, xplus0
, result
);
698 if (GET_CODE (xinsn
) == SYMBOL_REF
)
700 if (reload_in_progress
)
701 df_set_regs_ever_live (PIC_OFFSET_TABLE_REGNUM
, true);
702 result
= gen_rtx_UNSPEC (Pmode
, gen_rtvec (1, xinsn
), UNSPEC_GOTOFF
);
703 result
= gen_rtx_CONST (Pmode
, result
);
704 result
= gen_rtx_PLUS (Pmode
, pic_offset_table_rtx
, result
);
705 result
= gen_const_mem (Pmode
, result
);
714 #define MAX_MOVE_REGS 8
715 #define MAX_MOVE_BYTES (MAX_MOVE_REGS * UNITS_PER_WORD)
717 /* Emit straight-line code to move LENGTH bytes from SRC to DEST.
718 Assume that the areas do not overlap. */
721 microblaze_block_move_straight (rtx dest
, rtx src
, HOST_WIDE_INT length
)
723 HOST_WIDE_INT offset
, delta
;
724 unsigned HOST_WIDE_INT bits
;
726 enum machine_mode mode
;
729 bits
= BITS_PER_WORD
;
730 mode
= mode_for_size (bits
, MODE_INT
, 0);
731 delta
= bits
/ BITS_PER_UNIT
;
733 /* Allocate a buffer for the temporary registers. */
734 regs
= XALLOCAVEC (rtx
, length
/ delta
);
736 /* Load as many BITS-sized chunks as possible. Use a normal load if
737 the source has enough alignment, otherwise use left/right pairs. */
738 for (offset
= 0, i
= 0; offset
+ delta
<= length
; offset
+= delta
, i
++)
740 regs
[i
] = gen_reg_rtx (mode
);
741 emit_move_insn (regs
[i
], adjust_address (src
, mode
, offset
));
744 /* Copy the chunks to the destination. */
745 for (offset
= 0, i
= 0; offset
+ delta
<= length
; offset
+= delta
, i
++)
746 emit_move_insn (adjust_address (dest
, mode
, offset
), regs
[i
]);
748 /* Mop up any left-over bytes. */
751 src
= adjust_address (src
, BLKmode
, offset
);
752 dest
= adjust_address (dest
, BLKmode
, offset
);
753 move_by_pieces (dest
, src
, length
- offset
,
754 MIN (MEM_ALIGN (src
), MEM_ALIGN (dest
)), 0);
758 /* Helper function for doing a loop-based block operation on memory
759 reference MEM. Each iteration of the loop will operate on LENGTH
762 Create a new base register for use within the loop and point it to
763 the start of MEM. Create a new memory reference that uses this
764 register. Store them in *LOOP_REG and *LOOP_MEM respectively. */
767 microblaze_adjust_block_mem (rtx mem
, HOST_WIDE_INT length
,
768 rtx
* loop_reg
, rtx
* loop_mem
)
770 *loop_reg
= copy_addr_to_reg (XEXP (mem
, 0));
772 /* Although the new mem does not refer to a known location,
773 it does keep up to LENGTH bytes of alignment. */
774 *loop_mem
= change_address (mem
, BLKmode
, *loop_reg
);
775 set_mem_align (*loop_mem
,
776 MIN ((HOST_WIDE_INT
) MEM_ALIGN (mem
),
777 length
* BITS_PER_UNIT
));
781 /* Move LENGTH bytes from SRC to DEST using a loop that moves MAX_MOVE_BYTES
782 per iteration. LENGTH must be at least MAX_MOVE_BYTES. Assume that the
783 memory regions do not overlap. */
786 microblaze_block_move_loop (rtx dest
, rtx src
, HOST_WIDE_INT length
)
788 rtx label
, src_reg
, dest_reg
, final_src
;
789 HOST_WIDE_INT leftover
;
791 leftover
= length
% MAX_MOVE_BYTES
;
794 /* Create registers and memory references for use within the loop. */
795 microblaze_adjust_block_mem (src
, MAX_MOVE_BYTES
, &src_reg
, &src
);
796 microblaze_adjust_block_mem (dest
, MAX_MOVE_BYTES
, &dest_reg
, &dest
);
798 /* Calculate the value that SRC_REG should have after the last iteration
800 final_src
= expand_simple_binop (Pmode
, PLUS
, src_reg
, GEN_INT (length
),
803 /* Emit the start of the loop. */
804 label
= gen_label_rtx ();
807 /* Emit the loop body. */
808 microblaze_block_move_straight (dest
, src
, MAX_MOVE_BYTES
);
810 /* Move on to the next block. */
811 emit_move_insn (src_reg
, plus_constant (src_reg
, MAX_MOVE_BYTES
));
812 emit_move_insn (dest_reg
, plus_constant (dest_reg
, MAX_MOVE_BYTES
));
814 /* Emit the test & branch. */
815 emit_insn (gen_cbranchsi4 (gen_rtx_NE (SImode
, src_reg
, final_src
),
816 src_reg
, final_src
, label
));
818 /* Mop up any left-over bytes. */
820 microblaze_block_move_straight (dest
, src
, leftover
);
823 /* Expand a movmemsi instruction. */
826 microblaze_expand_block_move (rtx dest
, rtx src
, rtx length
, rtx align_rtx
)
829 if (GET_CODE (length
) == CONST_INT
)
831 HOST_WIDE_INT bytes
= INTVAL (length
);
832 int align
= INTVAL (align_rtx
);
834 if (align
> UNITS_PER_WORD
)
836 align
= UNITS_PER_WORD
; /* We can't do any better. */
838 else if (align
< UNITS_PER_WORD
)
840 if (INTVAL (length
) <= MAX_MOVE_BYTES
)
842 move_by_pieces (dest
, src
, bytes
, align
, 0);
849 if (INTVAL (length
) <= 2 * MAX_MOVE_BYTES
)
851 microblaze_block_move_straight (dest
, src
, INTVAL (length
));
856 microblaze_block_move_loop (dest
, src
, INTVAL (length
));
864 microblaze_rtx_costs (rtx x
, int code
, int outer_code ATTRIBUTE_UNUSED
, int *total
,
865 bool speed ATTRIBUTE_UNUSED
)
867 enum machine_mode mode
= GET_MODE (x
);
873 int num_words
= (GET_MODE_SIZE (mode
) > UNITS_PER_WORD
) ? 2 : 1;
874 if (simple_memory_operand (x
, mode
))
875 *total
= COSTS_N_INSNS (2 * num_words
);
877 *total
= COSTS_N_INSNS (2 * (2 * num_words
));
885 *total
= COSTS_N_INSNS (2);
888 *total
= COSTS_N_INSNS (1);
897 *total
= COSTS_N_INSNS (2);
900 *total
= COSTS_N_INSNS (1);
908 if (TARGET_BARREL_SHIFT
)
910 if (MICROBLAZE_VERSION_COMPARE (microblaze_select_cpu
, "v5.00.a")
912 *total
= COSTS_N_INSNS (1);
914 *total
= COSTS_N_INSNS (2);
916 else if (!TARGET_SOFT_MUL
)
917 *total
= COSTS_N_INSNS (1);
918 else if (GET_CODE (XEXP (x
, 1)) == CONST_INT
)
920 /* Add 1 to make shift slightly more expensive than add. */
921 *total
= COSTS_N_INSNS (INTVAL (XEXP (x
, 1))) + 1;
922 /* Reduce shift costs for special circumstances. */
923 if (optimize_size
&& INTVAL (XEXP (x
, 1)) > 5)
925 if (!optimize_size
&& INTVAL (XEXP (x
, 1)) > 17)
929 /* Double the worst cost of shifts when there is no barrel shifter and
930 the shift amount is in a reg. */
931 *total
= COSTS_N_INSNS (32 * 4);
937 if (mode
== SFmode
|| mode
== DFmode
)
939 if (TARGET_HARD_FLOAT
)
940 *total
= COSTS_N_INSNS (6);
943 else if (mode
== DImode
)
945 *total
= COSTS_N_INSNS (4);
950 *total
= COSTS_N_INSNS (1);
959 *total
= COSTS_N_INSNS (4);
967 if (TARGET_HARD_FLOAT
)
968 *total
= COSTS_N_INSNS (6);
970 else if (!TARGET_SOFT_MUL
)
972 if (MICROBLAZE_VERSION_COMPARE (microblaze_select_cpu
, "v5.00.a")
974 *total
= COSTS_N_INSNS (1);
976 *total
= COSTS_N_INSNS (3);
979 *total
= COSTS_N_INSNS (10);
987 if (TARGET_HARD_FLOAT
)
988 *total
= COSTS_N_INSNS (23);
994 *total
= COSTS_N_INSNS (1);
999 *total
= COSTS_N_INSNS (1);
1007 /* Return the number of instructions needed to load or store a value
1008 of mode MODE at X. Return 0 if X isn't valid for MODE. */
1011 microblaze_address_insns (rtx x
, enum machine_mode mode
)
1013 struct microblaze_address_info addr
;
1015 if (microblaze_classify_address (&addr
, x
, mode
, false))
1020 if (SMALL_INT (addr
.offset
))
1024 case ADDRESS_CONST_INT
:
1029 case ADDRESS_REG_INDEX
:
1030 case ADDRESS_SYMBOLIC
:
1032 case ADDRESS_GOTOFF
:
1041 /* Provide the costs of an addressing mode that contains ADDR.
1042 If ADDR is not a valid address, its cost is irrelevant. */
1044 microblaze_address_cost (rtx addr
, bool speed ATTRIBUTE_UNUSED
)
1046 return COSTS_N_INSNS (microblaze_address_insns (addr
, GET_MODE (addr
)));
1049 /* Return nonzero if X is an address which needs a temporary register when
1050 reloaded while generating PIC code. */
1053 pic_address_needs_scratch (rtx x
)
1055 /* An address which is a symbolic plus a non SMALL_INT needs a temp reg. */
1056 if (GET_CODE (x
) == CONST
&& GET_CODE (XEXP (x
, 0)) == PLUS
1057 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
1058 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
1059 && (flag_pic
== 2 || !SMALL_INT (XEXP (XEXP (x
, 0), 1))))
1065 /* Argument support functions. */
1066 /* Initialize CUMULATIVE_ARGS for a function. */
1069 init_cumulative_args (CUMULATIVE_ARGS
* cum
, tree fntype
,
1070 rtx libname ATTRIBUTE_UNUSED
)
1072 static CUMULATIVE_ARGS zero_cum
;
1073 tree param
, next_param
;
1077 /* Determine if this function has variable arguments. This is
1078 indicated by the last argument being 'void_type_mode' if there
1079 are no variable arguments. The standard MicroBlaze calling sequence
1080 passes all arguments in the general purpose registers in this case. */
1082 for (param
= fntype
? TYPE_ARG_TYPES (fntype
) : 0;
1083 param
!= 0; param
= next_param
)
1085 next_param
= TREE_CHAIN (param
);
1086 if (next_param
== 0 && TREE_VALUE (param
) != void_type_node
)
1087 cum
->gp_reg_found
= 1;
1091 /* Advance the argument to the next argument position. */
1094 microblaze_function_arg_advance (CUMULATIVE_ARGS
* cum
, enum machine_mode mode
,
1095 const_tree type
, bool named ATTRIBUTE_UNUSED
)
1104 gcc_assert (GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
1105 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
);
1107 cum
->gp_reg_found
= 1;
1108 cum
->arg_words
+= ((GET_MODE_SIZE (mode
) + UNITS_PER_WORD
- 1)
1113 cum
->gp_reg_found
= 1;
1114 cum
->arg_words
+= ((int_size_in_bytes (type
) + UNITS_PER_WORD
- 1)
1120 if (!cum
->gp_reg_found
&& cum
->arg_number
<= 2)
1121 cum
->fp_code
+= 1 << ((cum
->arg_number
- 1) * 2);
1125 cum
->arg_words
+= 2;
1126 if (!cum
->gp_reg_found
&& cum
->arg_number
<= 2)
1127 cum
->fp_code
+= 2 << ((cum
->arg_number
- 1) * 2);
1131 cum
->gp_reg_found
= 1;
1132 cum
->arg_words
+= 2;
1139 cum
->gp_reg_found
= 1;
1145 /* Return an RTL expression containing the register for the given mode,
1146 or 0 if the argument is to be passed on the stack. */
1149 microblaze_function_arg (CUMULATIVE_ARGS
* cum
, enum machine_mode mode
,
1150 const_tree type ATTRIBUTE_UNUSED
,
1151 bool named ATTRIBUTE_UNUSED
)
1155 int *arg_words
= &cum
->arg_words
;
1157 cum
->last_arg_fp
= 0;
1168 regbase
= GP_ARG_FIRST
;
1171 gcc_assert (GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
1172 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
);
1173 /* Drops through. */
1175 regbase
= GP_ARG_FIRST
;
1179 if (*arg_words
>= MAX_ARGS_IN_REGISTERS
)
1183 gcc_assert (regbase
!= -1);
1185 ret
= gen_rtx_REG (mode
, regbase
+ *arg_words
);
1188 if (mode
== VOIDmode
)
1190 if (cum
->num_adjusts
> 0)
1191 ret
= gen_rtx_PARALLEL ((enum machine_mode
) cum
->fp_code
,
1192 gen_rtvec_v (cum
->num_adjusts
, cum
->adjust
));
1198 /* Return number of bytes of argument to put in registers. */
1200 function_arg_partial_bytes (CUMULATIVE_ARGS
* cum
, enum machine_mode mode
,
1201 tree type
, bool named ATTRIBUTE_UNUSED
)
1203 if ((mode
== BLKmode
1204 || GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
1205 || GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
)
1206 && cum
->arg_words
< MAX_ARGS_IN_REGISTERS
)
1209 if (mode
== BLKmode
)
1210 words
= ((int_size_in_bytes (type
) + UNITS_PER_WORD
- 1)
1213 words
= (GET_MODE_SIZE (mode
) + UNITS_PER_WORD
- 1) / UNITS_PER_WORD
;
1215 if (words
+ cum
->arg_words
<= MAX_ARGS_IN_REGISTERS
)
1216 return 0; /* structure fits in registers */
1218 return (MAX_ARGS_IN_REGISTERS
- cum
->arg_words
) * UNITS_PER_WORD
;
1221 else if (mode
== DImode
&& cum
->arg_words
== MAX_ARGS_IN_REGISTERS
- 1)
1222 return UNITS_PER_WORD
;
1227 /* Convert a version number of the form "vX.YY.Z" to an integer encoding
1228 for easier range comparison. */
1230 microblaze_version_to_int (const char *version
)
1233 const char *tmpl
= "vX.YY.Z";
1242 { /* Looking for major */
1243 if (!(*p
>= '0' && *p
<= '9'))
1245 iver
+= (int) (*p
- '0');
1249 { /* Looking for minor */
1250 if (!(*p
>= '0' && *p
<= '9'))
1252 iver
+= (int) (*p
- '0');
1256 { /* Looking for compat */
1257 if (!(*p
>= 'a' && *p
<= 'z'))
1260 iver
+= (int) (*p
- 'a');
1280 microblaze_option_override (void)
1282 register int i
, start
;
1284 register enum machine_mode mode
;
1287 microblaze_section_threshold
= (global_options_set
.x_g_switch_value
1289 : MICROBLAZE_DEFAULT_GVALUE
);
1291 /* Check the MicroBlaze CPU version for any special action to be done. */
1292 if (microblaze_select_cpu
== NULL
)
1293 microblaze_select_cpu
= MICROBLAZE_DEFAULT_CPU
;
1294 ver
= microblaze_version_to_int (microblaze_select_cpu
);
1297 error ("%qs is an invalid argument to -mcpu=", microblaze_select_cpu
);
1300 ver
= MICROBLAZE_VERSION_COMPARE (microblaze_select_cpu
, "v3.00.a");
1303 /* No hardware exceptions in earlier versions. So no worries. */
1305 microblaze_select_flags
&= ~(MICROBLAZE_MASK_NO_UNSAFE_DELAY
);
1307 microblaze_no_unsafe_delay
= 0;
1308 microblaze_pipe
= MICROBLAZE_PIPE_3
;
1311 || (MICROBLAZE_VERSION_COMPARE (microblaze_select_cpu
, "v4.00.b")
1315 microblaze_select_flags
|= (MICROBLAZE_MASK_NO_UNSAFE_DELAY
);
1317 microblaze_no_unsafe_delay
= 1;
1318 microblaze_pipe
= MICROBLAZE_PIPE_3
;
1322 /* We agree to use 5 pipe-stage model even on area optimized 3
1323 pipe-stage variants. */
1325 microblaze_select_flags
&= ~(MICROBLAZE_MASK_NO_UNSAFE_DELAY
);
1327 microblaze_no_unsafe_delay
= 0;
1328 microblaze_pipe
= MICROBLAZE_PIPE_5
;
1329 if (MICROBLAZE_VERSION_COMPARE (microblaze_select_cpu
, "v5.00.a") == 0
1330 || MICROBLAZE_VERSION_COMPARE (microblaze_select_cpu
,
1332 || MICROBLAZE_VERSION_COMPARE (microblaze_select_cpu
,
1335 /* Pattern compares are to be turned on by default only when
1336 compiling for MB v5.00.'z'. */
1337 target_flags
|= MASK_PATTERN_COMPARE
;
1341 ver
= MICROBLAZE_VERSION_COMPARE (microblaze_select_cpu
, "v6.00.a");
1344 if (TARGET_MULTIPLY_HIGH
)
1346 "-mxl-multiply-high can be used only with -mcpu=v6.00.a or greater");
1349 if (TARGET_MULTIPLY_HIGH
&& TARGET_SOFT_MUL
)
1350 error ("-mxl-multiply-high requires -mno-xl-soft-mul");
1352 /* Always use DFA scheduler. */
1353 microblaze_sched_use_dfa
= 1;
1356 microblaze_abicalls
= MICROBLAZE_ABICALLS_NO
;
1359 /* Initialize the high, low values for legit floating point constants. */
1360 real_maxval (&dfhigh
, 0, DFmode
);
1361 real_maxval (&dflow
, 1, DFmode
);
1362 real_maxval (&sfhigh
, 0, SFmode
);
1363 real_maxval (&sflow
, 1, SFmode
);
1365 microblaze_print_operand_punct
['?'] = 1;
1366 microblaze_print_operand_punct
['#'] = 1;
1367 microblaze_print_operand_punct
['&'] = 1;
1368 microblaze_print_operand_punct
['!'] = 1;
1369 microblaze_print_operand_punct
['*'] = 1;
1370 microblaze_print_operand_punct
['@'] = 1;
1371 microblaze_print_operand_punct
['.'] = 1;
1372 microblaze_print_operand_punct
['('] = 1;
1373 microblaze_print_operand_punct
[')'] = 1;
1374 microblaze_print_operand_punct
['['] = 1;
1375 microblaze_print_operand_punct
[']'] = 1;
1376 microblaze_print_operand_punct
['<'] = 1;
1377 microblaze_print_operand_punct
['>'] = 1;
1378 microblaze_print_operand_punct
['{'] = 1;
1379 microblaze_print_operand_punct
['}'] = 1;
1380 microblaze_print_operand_punct
['^'] = 1;
1381 microblaze_print_operand_punct
['$'] = 1;
1382 microblaze_print_operand_punct
['+'] = 1;
1384 /* Set up array to map GCC register number to debug register number.
1385 Ignore the special purpose register numbers. */
1387 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1388 microblaze_dbx_regno
[i
] = -1;
1390 start
= GP_DBX_FIRST
- GP_REG_FIRST
;
1391 for (i
= GP_REG_FIRST
; i
<= GP_REG_LAST
; i
++)
1392 microblaze_dbx_regno
[i
] = i
+ start
;
1394 /* Set up array giving whether a given register can hold a given mode. */
1396 for (mode
= VOIDmode
;
1397 mode
!= MAX_MACHINE_MODE
; mode
= (enum machine_mode
) ((int) mode
+ 1))
1399 register int size
= GET_MODE_SIZE (mode
);
1401 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
1407 ok
= (ST_REG_P (regno
) || GP_REG_P (regno
));
1409 else if (GP_REG_P (regno
))
1410 ok
= ((regno
& 1) == 0 || size
<= UNITS_PER_WORD
);
1414 microblaze_hard_regno_mode_ok
[(int) mode
][regno
] = ok
;
1419 /* Return true if FUNC is an interrupt function as specified
1420 by the "interrupt_handler" attribute. */
1423 microblaze_interrupt_function_p (tree func
)
1427 if (TREE_CODE (func
) != FUNCTION_DECL
)
1430 a
= lookup_attribute ("interrupt_handler", DECL_ATTRIBUTES (func
));
1431 return a
!= NULL_TREE
;
1434 /* Return true if FUNC is an interrupt function which uses
1435 normal return, indicated by the "save_volatiles" attribute. */
1438 microblaze_save_volatiles (tree func
)
1442 if (TREE_CODE (func
) != FUNCTION_DECL
)
1445 a
= lookup_attribute ("save_volatiles", DECL_ATTRIBUTES (func
));
1446 return a
!= NULL_TREE
;
1449 /* Return whether function is tagged with 'interrupt_handler'
1450 attribute. Return true if function should use return from
1451 interrupt rather than normal function return. */
1453 microblaze_is_interrupt_handler (void)
1455 return interrupt_handler
;
1458 /* Determine of register must be saved/restored in call. */
1460 microblaze_must_save_register (int regno
)
1462 if (pic_offset_table_rtx
&&
1463 (regno
== MB_ABI_PIC_ADDR_REGNUM
) && df_regs_ever_live_p (regno
))
1466 if (df_regs_ever_live_p (regno
) && !call_used_regs
[regno
])
1469 if (frame_pointer_needed
&& (regno
== HARD_FRAME_POINTER_REGNUM
))
1472 if (!current_function_is_leaf
)
1474 if (regno
== MB_ABI_SUB_RETURN_ADDR_REGNUM
)
1476 if ((interrupt_handler
|| save_volatiles
) &&
1477 (regno
>= 3 && regno
<= 12))
1481 if (interrupt_handler
)
1483 if (df_regs_ever_live_p (regno
)
1484 || regno
== MB_ABI_MSR_SAVE_REG
1485 || regno
== MB_ABI_ASM_TEMP_REGNUM
1486 || regno
== MB_ABI_EXCEPTION_RETURN_ADDR_REGNUM
)
1492 if (df_regs_ever_live_p (regno
)
1493 || regno
== MB_ABI_ASM_TEMP_REGNUM
1494 || regno
== MB_ABI_EXCEPTION_RETURN_ADDR_REGNUM
)
1501 /* Return the bytes needed to compute the frame pointer from the current
1504 MicroBlaze stack frames look like:
1508 Before call After call
1509 +-----------------------+ +-----------------------+
1511 mem. | local variables, | | local variables, |
1512 | callee saved and | | callee saved and |
1514 +-----------------------+ +-----------------------+
1515 | arguments for called | | arguments for called |
1516 | subroutines | | subroutines |
1517 | (optional) | | (optional) |
1518 +-----------------------+ +-----------------------+
1519 | Link register | | Link register |
1521 +-----------------------+ +-----------------------+
1523 | local variables, |
1524 | callee saved and |
1526 +-----------------------+
1527 | MSR (optional if, |
1528 | interrupt handler) |
1529 +-----------------------+
1531 | alloca allocations |
1533 +-----------------------+
1535 | arguments for called |
1539 +-----------------------+
1542 memory +-----------------------+
1546 static HOST_WIDE_INT
1547 compute_frame_size (HOST_WIDE_INT size
)
1550 HOST_WIDE_INT total_size
; /* # bytes that the entire frame takes up. */
1551 HOST_WIDE_INT var_size
; /* # bytes that local variables take up. */
1552 HOST_WIDE_INT args_size
; /* # bytes that outgoing arguments take up. */
1553 int link_debug_size
; /* # bytes for link register. */
1554 HOST_WIDE_INT gp_reg_size
; /* # bytes needed to store calle-saved gp regs. */
1555 long mask
; /* mask of saved gp registers. */
1558 microblaze_interrupt_function_p (current_function_decl
);
1559 save_volatiles
= microblaze_save_volatiles (current_function_decl
);
1564 args_size
= crtl
->outgoing_args_size
;
1566 if ((args_size
== 0) && cfun
->calls_alloca
)
1567 args_size
= NUM_OF_ARGS
* UNITS_PER_WORD
;
1569 total_size
= var_size
+ args_size
;
1572 /* force setting GOT. */
1573 df_set_regs_ever_live (MB_ABI_PIC_ADDR_REGNUM
, true);
1575 /* Calculate space needed for gp registers. */
1576 for (regno
= GP_REG_FIRST
; regno
<= GP_REG_LAST
; regno
++)
1578 if (microblaze_must_save_register (regno
))
1581 if (regno
!= MB_ABI_SUB_RETURN_ADDR_REGNUM
)
1582 /* Don't account for link register. It is accounted specially below. */
1583 gp_reg_size
+= GET_MODE_SIZE (SImode
);
1585 mask
|= (1L << (regno
- GP_REG_FIRST
));
1589 total_size
+= gp_reg_size
;
1591 /* Add 4 bytes for MSR. */
1592 if (interrupt_handler
)
1595 /* No space to be allocated for link register in leaf functions with no other
1596 stack requirements. */
1597 if (total_size
== 0 && current_function_is_leaf
)
1598 link_debug_size
= 0;
1600 link_debug_size
= UNITS_PER_WORD
;
1602 total_size
+= link_debug_size
;
1604 /* Save other computed information. */
1605 current_frame_info
.total_size
= total_size
;
1606 current_frame_info
.var_size
= var_size
;
1607 current_frame_info
.args_size
= args_size
;
1608 current_frame_info
.gp_reg_size
= gp_reg_size
;
1609 current_frame_info
.mask
= mask
;
1610 current_frame_info
.initialized
= reload_completed
;
1611 current_frame_info
.num_gp
= gp_reg_size
/ UNITS_PER_WORD
;
1612 current_frame_info
.link_debug_size
= link_debug_size
;
1615 /* Offset from which to callee-save GP regs. */
1616 current_frame_info
.gp_offset
= (total_size
- gp_reg_size
);
1618 current_frame_info
.gp_offset
= 0;
1620 /* Ok, we're done. */
1624 /* Make sure that we're not trying to eliminate to the wrong hard frame
1628 microblaze_can_eliminate (const int from
, const int to
)
1630 return ((from
== RETURN_ADDRESS_POINTER_REGNUM
&& !leaf_function_p())
1631 || (to
== MB_ABI_SUB_RETURN_ADDR_REGNUM
&& leaf_function_p())
1632 || (from
!= RETURN_ADDRESS_POINTER_REGNUM
1633 && (to
== HARD_FRAME_POINTER_REGNUM
1634 || (to
== STACK_POINTER_REGNUM
&& !frame_pointer_needed
))));
1637 /* Implement INITIAL_ELIMINATION_OFFSET. FROM is either the frame
1638 pointer or argument pointer or the return address pointer. TO is either
1639 the stack pointer or hard frame pointer. */
1642 microblaze_initial_elimination_offset (int from
, int to
)
1644 HOST_WIDE_INT offset
;
1648 case FRAME_POINTER_REGNUM
:
1651 case ARG_POINTER_REGNUM
:
1652 if (to
== STACK_POINTER_REGNUM
|| to
== HARD_FRAME_POINTER_REGNUM
)
1653 offset
= compute_frame_size (get_frame_size ());
1657 case RETURN_ADDRESS_POINTER_REGNUM
:
1658 if (current_function_is_leaf
)
1661 offset
= current_frame_info
.gp_offset
+
1662 ((UNITS_PER_WORD
- (POINTER_SIZE
/ BITS_PER_UNIT
)));
1670 /* Print operands using format code.
1672 The MicroBlaze specific codes are:
1674 'X' X is CONST_INT, prints 32 bits in hexadecimal format = "0x%08x",
1675 'x' X is CONST_INT, prints 16 bits in hexadecimal format = "0x%04x",
1676 'F' op is CONST_DOUBLE, print 32 bits in hex,
1677 'd' output integer constant in decimal,
1678 'z' if the operand is 0, use $0 instead of normal operand.
1679 'D' print second register of double-word register operand.
1680 'L' print low-order register of double-word register operand.
1681 'M' print high-order register of double-word register operand.
1682 'C' print part of opcode for a branch condition.
1683 'N' print part of opcode for a branch condition, inverted.
1684 'S' X is CODE_LABEL, print with prefix of "LS" (for embedded switch).
1685 'B' print 'z' for EQ, 'n' for NE
1686 'b' print 'n' for EQ, 'z' for NE
1687 'T' print 'f' for EQ, 't' for NE
1688 't' print 't' for EQ, 'f' for NE
1689 'm' Print 1<<operand.
1690 'i' Print 'i' if MEM operand has immediate value
1691 'o' Print operand address+4
1692 '?' Print 'd' if we use a branch with delay slot instead of normal branch.
1693 'h' Print high word of const_double (int or float) value as hex
1694 'j' Print low word of const_double (int or float) value as hex
1695 's' Print -1 if operand is negative, 0 if positive (sign extend)
1696 '@' Print the name of the temporary register (rMB_ABI_ASM_TEMP_REGNUM).
1697 '#' Print nop if the delay slot of a branch is not filled.
1701 print_operand (FILE * file
, rtx op
, int letter
)
1703 register enum rtx_code code
;
1705 if (PRINT_OPERAND_PUNCT_VALID_P (letter
))
1710 /* Conditionally add a 'd' to indicate filled delay slot. */
1711 if (final_sequence
!= NULL
)
1716 /* Conditionally add a nop in unfilled delay slot. */
1717 if (final_sequence
== NULL
)
1718 fputs ("nop\t\t# Unfilled delay slot\n", file
);
1722 fputs (reg_names
[GP_REG_FIRST
+ MB_ABI_ASM_TEMP_REGNUM
], file
);
1726 output_operand_lossage ("unknown punctuation '%c'", letter
);
1735 output_operand_lossage ("null pointer");
1739 code
= GET_CODE (op
);
1741 if (code
== SIGN_EXTEND
)
1742 op
= XEXP (op
, 0), code
= GET_CODE (op
);
1770 fatal_insn ("PRINT_OPERAND, invalid insn for %%C", op
);
1773 else if (letter
== 'N')
1799 fatal_insn ("PRINT_OPERAND, invalid insn for %%N", op
);
1802 else if (letter
== 'S')
1806 ASM_GENERATE_INTERNAL_LABEL (buffer
, "LS", CODE_LABEL_NUMBER (op
));
1807 assemble_name (file
, buffer
);
1810 /* Print 'i' for memory operands which have immediate values. */
1811 else if (letter
== 'i')
1815 struct microblaze_address_info info
;
1817 if (!microblaze_classify_address
1818 (&info
, XEXP (op
, 0), GET_MODE (op
), 1))
1819 fatal_insn ("insn contains an invalid address !", op
);
1824 case ADDRESS_CONST_INT
:
1825 case ADDRESS_SYMBOLIC
:
1826 case ADDRESS_GOTOFF
:
1829 case ADDRESS_REG_INDEX
:
1831 case ADDRESS_INVALID
:
1833 fatal_insn ("invalid address", op
);
1838 else if (code
== REG
|| code
== SUBREG
)
1840 register int regnum
;
1843 regnum
= REGNO (op
);
1845 regnum
= true_regnum (op
);
1847 if ((letter
== 'M' && !WORDS_BIG_ENDIAN
)
1848 || (letter
== 'L' && WORDS_BIG_ENDIAN
) || letter
== 'D')
1851 fprintf (file
, "%s", reg_names
[regnum
]);
1854 else if (code
== MEM
)
1857 rtx op4
= adjust_address (op
, GET_MODE (op
), 4);
1858 output_address (XEXP (op4
, 0));
1861 output_address (XEXP (op
, 0));
1863 else if (letter
== 'h' || letter
== 'j')
1866 if (code
== CONST_DOUBLE
)
1868 if (GET_MODE (op
) == DFmode
)
1870 REAL_VALUE_TYPE value
;
1871 REAL_VALUE_FROM_CONST_DOUBLE (value
, op
);
1872 REAL_VALUE_TO_TARGET_DOUBLE (value
, val
);
1876 val
[0] = CONST_DOUBLE_HIGH (op
);
1877 val
[1] = CONST_DOUBLE_LOW (op
);
1880 else if (code
== CONST_INT
)
1882 val
[0] = (INTVAL (op
) & 0xffffffff00000000LL
) >> 32;
1883 val
[1] = INTVAL (op
) & 0x00000000ffffffffLL
;
1884 if (val
[0] == 0 && val
[1] < 0)
1888 fprintf (file
, "0x%8.8lx", (letter
== 'h') ? val
[0] : val
[1]);
1890 else if (code
== CONST_DOUBLE
)
1894 unsigned long value_long
;
1895 REAL_VALUE_TYPE value
;
1896 REAL_VALUE_FROM_CONST_DOUBLE (value
, op
);
1897 REAL_VALUE_TO_TARGET_SINGLE (value
, value_long
);
1898 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
, value_long
);
1903 real_to_decimal (s
, CONST_DOUBLE_REAL_VALUE (op
), sizeof (s
), 0, 1);
1908 else if (code
== UNSPEC
)
1910 print_operand_address (file
, op
);
1913 else if (letter
== 'x' && GET_CODE (op
) == CONST_INT
)
1914 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
, 0xffff & INTVAL (op
));
1916 else if (letter
== 'X' && GET_CODE (op
) == CONST_INT
)
1917 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
, INTVAL (op
));
1919 else if (letter
== 'd' && GET_CODE (op
) == CONST_INT
)
1920 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, (INTVAL (op
)));
1922 else if (letter
== 'z' && GET_CODE (op
) == CONST_INT
&& INTVAL (op
) == 0)
1923 fputs (reg_names
[GP_REG_FIRST
], file
);
1925 else if (letter
== 's' && GET_CODE (op
) == CONST_INT
)
1926 if (INTVAL (op
) < 0)
1931 else if (letter
== 'd' || letter
== 'x' || letter
== 'X' || letter
== 's')
1932 output_operand_lossage ("letter %c was found & insn was not CONST_INT", letter
);
1934 else if (letter
== 'B')
1935 fputs (code
== EQ
? "z" : "n", file
);
1936 else if (letter
== 'b')
1937 fputs (code
== EQ
? "n" : "z", file
);
1938 else if (letter
== 'T')
1939 fputs (code
== EQ
? "f" : "t", file
);
1940 else if (letter
== 't')
1941 fputs (code
== EQ
? "t" : "f", file
);
1943 else if (code
== CONST
&& GET_CODE (XEXP (op
, 0)) == REG
)
1945 print_operand (file
, XEXP (op
, 0), letter
);
1947 else if (letter
== 'm')
1948 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, (1L << INTVAL (op
)));
1950 output_addr_const (file
, op
);
1953 /* A C compound statement to output to stdio stream STREAM the
1954 assembler syntax for an instruction operand that is a memory
1955 reference whose address is ADDR. ADDR is an RTL expression.
1957 Possible address classifications and output formats are,
1959 ADDRESS_REG "%0, r0"
1961 ADDRESS_REG with non-zero "%0, <addr_const>"
1964 ADDRESS_REG_INDEX "rA, RB"
1965 (if rA is r0, rA and rB are swapped)
1967 ADDRESS_CONST_INT "r0, <addr_const>"
1969 ADDRESS_SYMBOLIC "rBase, <addr_const>"
1970 (rBase is a base register suitable for the
1975 print_operand_address (FILE * file
, rtx addr
)
1977 struct microblaze_address_info info
;
1978 enum microblaze_address_type type
;
1979 if (!microblaze_classify_address (&info
, addr
, GET_MODE (addr
), 1))
1980 fatal_insn ("insn contains an invalid address !", addr
);
1986 fprintf (file
, "%s,", reg_names
[REGNO (info
.regA
)]);
1987 output_addr_const (file
, info
.offset
);
1989 case ADDRESS_REG_INDEX
:
1990 if (REGNO (info
.regA
) == 0)
1991 /* Make rB == r0 instead of rA == r0. This helps reduce read port
1993 fprintf (file
, "%s,%s", reg_names
[REGNO (info
.regB
)],
1994 reg_names
[REGNO (info
.regA
)]);
1995 else if (REGNO (info
.regB
) != 0)
1996 /* This is a silly swap to help Dhrystone. */
1997 fprintf (file
, "%s,%s", reg_names
[REGNO (info
.regB
)],
1998 reg_names
[REGNO (info
.regA
)]);
2000 case ADDRESS_CONST_INT
:
2001 fprintf (file
, "%s,", reg_names
[REGNO (info
.regA
)]);
2002 output_addr_const (file
, info
.offset
);
2004 case ADDRESS_SYMBOLIC
:
2005 case ADDRESS_GOTOFF
:
2008 fprintf (file
, "%s,", reg_names
[REGNO (info
.regA
)]);
2009 output_addr_const (file
, info
.symbol
);
2010 if (type
== ADDRESS_GOTOFF
)
2012 fputs ("@GOT", file
);
2014 else if (type
== ADDRESS_PLT
)
2016 fputs ("@PLT", file
);
2019 case ADDRESS_INVALID
:
2020 fatal_insn ("invalid address", addr
);
2025 /* Emit either a label, .comm, or .lcomm directive, and mark that the symbol
2026 is used, so that we don't emit an .extern for it in
2027 microblaze_asm_file_end. */
2030 microblaze_declare_object (FILE * stream
, const char *name
,
2031 const char *section
, const char *fmt
, int size
)
2034 fputs (section
, stream
);
2035 assemble_name (stream
, name
);
2036 fprintf (stream
, fmt
, size
);
2039 /* Common code to emit the insns (or to write the instructions to a file)
2040 to save/restore registers.
2042 Other parts of the code assume that MICROBLAZE_TEMP1_REGNUM (aka large_reg)
2043 is not modified within save_restore_insns. */
2045 #define BITSET_P(VALUE,BIT) (((VALUE) & (1L << (BIT))) != 0)
2047 /* Save or restore instructions based on whether this is the prologue or
2048 epilogue. prologue is 1 for the prologue. */
2050 save_restore_insns (int prologue
)
2052 rtx base_reg_rtx
, reg_rtx
, mem_rtx
, /* msr_rtx, */ isr_reg_rtx
=
2054 rtx isr_msr_rtx
= 0, insn
;
2055 long mask
= current_frame_info
.mask
;
2056 HOST_WIDE_INT gp_offset
;
2059 if (frame_pointer_needed
2060 && !BITSET_P (mask
, HARD_FRAME_POINTER_REGNUM
- GP_REG_FIRST
))
2066 /* Save registers starting from high to low. The debuggers prefer at least
2067 the return register be stored at func+4, and also it allows us not to
2068 need a nop in the epilog if at least one register is reloaded in
2069 addition to return address. */
2071 /* Pick which pointer to use as a base register. For small frames, just
2072 use the stack pointer. Otherwise, use a temporary register. Save 2
2073 cycles if the save area is near the end of a large frame, by reusing
2074 the constant created in the prologue/epilogue to adjust the stack
2077 gp_offset
= current_frame_info
.gp_offset
;
2079 gcc_assert (gp_offset
> 0);
2081 base_reg_rtx
= stack_pointer_rtx
;
2083 /* For interrupt_handlers, need to save/restore the MSR. */
2084 if (interrupt_handler
)
2086 isr_mem_rtx
= gen_rtx_MEM (SImode
,
2087 gen_rtx_PLUS (Pmode
, base_reg_rtx
,
2088 GEN_INT (current_frame_info
.
2092 /* Do not optimize in flow analysis. */
2093 MEM_VOLATILE_P (isr_mem_rtx
) = 1;
2094 isr_reg_rtx
= gen_rtx_REG (SImode
, MB_ABI_MSR_SAVE_REG
);
2095 isr_msr_rtx
= gen_rtx_REG (SImode
, ST_REG
);
2098 if (interrupt_handler
&& !prologue
)
2100 emit_move_insn (isr_reg_rtx
, isr_mem_rtx
);
2101 emit_move_insn (isr_msr_rtx
, isr_reg_rtx
);
2102 /* Do not optimize in flow analysis. */
2103 emit_insn (gen_rtx_USE (SImode
, isr_reg_rtx
));
2104 emit_insn (gen_rtx_USE (SImode
, isr_msr_rtx
));
2107 for (regno
= GP_REG_FIRST
; regno
<= GP_REG_LAST
; regno
++)
2109 if (BITSET_P (mask
, regno
- GP_REG_FIRST
))
2111 if (regno
== MB_ABI_SUB_RETURN_ADDR_REGNUM
)
2112 /* Don't handle here. Already handled as the first register. */
2115 reg_rtx
= gen_rtx_REG (SImode
, regno
);
2116 insn
= gen_rtx_PLUS (Pmode
, base_reg_rtx
, GEN_INT (gp_offset
));
2117 mem_rtx
= gen_rtx_MEM (SImode
, insn
);
2118 if (interrupt_handler
|| save_volatiles
)
2119 /* Do not optimize in flow analysis. */
2120 MEM_VOLATILE_P (mem_rtx
) = 1;
2124 insn
= emit_move_insn (mem_rtx
, reg_rtx
);
2125 RTX_FRAME_RELATED_P (insn
) = 1;
2129 insn
= emit_move_insn (reg_rtx
, mem_rtx
);
2132 gp_offset
+= GET_MODE_SIZE (SImode
);
2136 if (interrupt_handler
&& prologue
)
2138 emit_move_insn (isr_reg_rtx
, isr_msr_rtx
);
2139 emit_move_insn (isr_mem_rtx
, isr_reg_rtx
);
2141 /* Do not optimize in flow analysis. */
2142 emit_insn (gen_rtx_USE (SImode
, isr_reg_rtx
));
2143 emit_insn (gen_rtx_USE (SImode
, isr_msr_rtx
));
2146 /* Done saving and restoring */
2150 /* Set up the stack and frame (if desired) for the function. */
2152 microblaze_function_prologue (FILE * file
, HOST_WIDE_INT size ATTRIBUTE_UNUSED
)
2155 long fsiz
= current_frame_info
.total_size
;
2157 /* Get the function name the same way that toplev.c does before calling
2158 assemble_start_function. This is needed so that the name used here
2159 exactly matches the name used in ASM_DECLARE_FUNCTION_NAME. */
2160 fnname
= XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0);
2161 if (!flag_inhibit_size_directive
)
2163 fputs ("\t.ent\t", file
);
2164 if (interrupt_handler
&& strcmp (INTERRUPT_HANDLER_NAME
, fnname
))
2165 fputs ("_interrupt_handler", file
);
2167 assemble_name (file
, fnname
);
2169 if (!interrupt_handler
)
2170 ASM_OUTPUT_TYPE_DIRECTIVE (file
, fnname
, "function");
2173 assemble_name (file
, fnname
);
2174 fputs (":\n", file
);
2176 if (interrupt_handler
&& strcmp (INTERRUPT_HANDLER_NAME
, fnname
))
2177 fputs ("_interrupt_handler:\n", file
);
2179 if (!flag_inhibit_size_directive
)
2181 /* .frame FRAMEREG, FRAMESIZE, RETREG. */
2183 "\t.frame\t%s,%ld,%s\t\t# vars= %ld, regs= %d, args= %d\n",
2184 (reg_names
[(frame_pointer_needed
)
2185 ? HARD_FRAME_POINTER_REGNUM
:
2186 STACK_POINTER_REGNUM
]), fsiz
,
2187 reg_names
[MB_ABI_SUB_RETURN_ADDR_REGNUM
+ GP_REG_FIRST
],
2188 current_frame_info
.var_size
, current_frame_info
.num_gp
,
2189 crtl
->outgoing_args_size
);
2190 fprintf (file
, "\t.mask\t0x%08lx\n", current_frame_info
.mask
);
2194 /* Output extra assembler code at the end of a prologue. */
2196 microblaze_function_end_prologue (FILE * file
)
2198 if (TARGET_STACK_CHECK
)
2200 fprintf (file
, "\t# Stack Check Stub -- Start.\n\t");
2201 fprintf (file
, "ori\tr18,r0,_stack_end\n\t");
2202 fprintf (file
, "cmpu\tr18,r1,r18\n\t");
2203 fprintf (file
, "bgei\tr18,_stack_overflow_exit\n\t");
2204 fprintf (file
, "# Stack Check Stub -- End.\n");
2208 /* Expand the prologue into a bunch of separate insns. */
2211 microblaze_expand_prologue (void)
2215 const char *arg_name
= 0;
2216 tree fndecl
= current_function_decl
;
2217 tree fntype
= TREE_TYPE (fndecl
);
2218 tree fnargs
= DECL_ARGUMENTS (fndecl
);
2223 CUMULATIVE_ARGS args_so_far
;
2224 rtx mem_rtx
, reg_rtx
;
2226 /* If struct value address is treated as the first argument, make it so. */
2227 if (aggregate_value_p (DECL_RESULT (fndecl
), fntype
)
2228 && !cfun
->returns_pcc_struct
)
2230 tree type
= build_pointer_type (fntype
);
2231 tree function_result_decl
= build_decl (BUILTINS_LOCATION
, PARM_DECL
,
2234 DECL_ARG_TYPE (function_result_decl
) = type
;
2235 TREE_CHAIN (function_result_decl
) = fnargs
;
2236 fnargs
= function_result_decl
;
2239 /* Determine the last argument, and get its name. */
2241 INIT_CUMULATIVE_ARGS (args_so_far
, fntype
, NULL_RTX
, 0, 0);
2242 regno
= GP_ARG_FIRST
;
2244 for (cur_arg
= fnargs
; cur_arg
!= 0; cur_arg
= next_arg
)
2246 tree passed_type
= DECL_ARG_TYPE (cur_arg
);
2247 enum machine_mode passed_mode
= TYPE_MODE (passed_type
);
2250 if (TREE_ADDRESSABLE (passed_type
))
2252 passed_type
= build_pointer_type (passed_type
);
2253 passed_mode
= Pmode
;
2256 entry_parm
= targetm
.calls
.function_arg (&args_so_far
, passed_mode
,
2263 /* passed in a register, so will get homed automatically. */
2264 if (GET_MODE (entry_parm
) == BLKmode
)
2265 words
= (int_size_in_bytes (passed_type
) + 3) / 4;
2267 words
= (GET_MODE_SIZE (GET_MODE (entry_parm
)) + 3) / 4;
2269 regno
= REGNO (entry_parm
) + words
- 1;
2273 regno
= GP_ARG_LAST
+ 1;
2277 targetm
.calls
.function_arg_advance (&args_so_far
, passed_mode
,
2280 next_arg
= TREE_CHAIN (cur_arg
);
2283 if (DECL_NAME (cur_arg
))
2284 arg_name
= IDENTIFIER_POINTER (DECL_NAME (cur_arg
));
2290 /* Split parallel insn into a sequence of insns. */
2292 next_arg_reg
= targetm
.calls
.function_arg (&args_so_far
, VOIDmode
,
2293 void_type_node
, true);
2294 if (next_arg_reg
!= 0 && GET_CODE (next_arg_reg
) == PARALLEL
)
2296 rtvec adjust
= XVEC (next_arg_reg
, 0);
2297 int num
= GET_NUM_ELEM (adjust
);
2299 for (i
= 0; i
< num
; i
++)
2301 rtx pattern
= RTVEC_ELT (adjust
, i
);
2302 emit_insn (pattern
);
2306 fsiz
= compute_frame_size (get_frame_size ());
2308 /* If this function is a varargs function, store any registers that
2309 would normally hold arguments ($5 - $10) on the stack. */
2310 if (((TYPE_ARG_TYPES (fntype
) != 0
2311 && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (fntype
)))
2314 && ((arg_name
[0] == '_'
2315 && strcmp (arg_name
, "__builtin_va_alist") == 0)
2316 || (arg_name
[0] == 'v'
2317 && strcmp (arg_name
, "va_alist") == 0)))))
2319 int offset
= (regno
- GP_ARG_FIRST
+ 1) * UNITS_PER_WORD
;
2320 rtx ptr
= stack_pointer_rtx
;
2322 /* If we are doing svr4-abi, sp has already been decremented by fsiz. */
2323 for (; regno
<= GP_ARG_LAST
; regno
++)
2326 ptr
= gen_rtx_PLUS (Pmode
, stack_pointer_rtx
, GEN_INT (offset
));
2327 emit_move_insn (gen_rtx_MEM (SImode
, ptr
),
2328 gen_rtx_REG (SImode
, regno
));
2330 offset
+= GET_MODE_SIZE (SImode
);
2337 rtx fsiz_rtx
= GEN_INT (fsiz
);
2340 insn
= emit_insn (gen_subsi3 (stack_pointer_rtx
, stack_pointer_rtx
,
2343 RTX_FRAME_RELATED_P (insn
) = 1;
2345 /* Handle SUB_RETURN_ADDR_REGNUM specially at first. */
2346 if (!current_function_is_leaf
|| interrupt_handler
)
2348 mem_rtx
= gen_rtx_MEM (SImode
,
2349 gen_rtx_PLUS (Pmode
, stack_pointer_rtx
,
2352 if (interrupt_handler
)
2353 /* Do not optimize in flow analysis. */
2354 MEM_VOLATILE_P (mem_rtx
) = 1;
2356 reg_rtx
= gen_rtx_REG (SImode
, MB_ABI_SUB_RETURN_ADDR_REGNUM
);
2357 insn
= emit_move_insn (mem_rtx
, reg_rtx
);
2358 RTX_FRAME_RELATED_P (insn
) = 1;
2361 /* _save_ registers for prologue. */
2362 save_restore_insns (1);
2364 if (frame_pointer_needed
)
2368 insn
= emit_insn (gen_movsi (hard_frame_pointer_rtx
,
2369 stack_pointer_rtx
));
2372 RTX_FRAME_RELATED_P (insn
) = 1;
2376 if (flag_pic
== 2 && df_regs_ever_live_p (MB_ABI_PIC_ADDR_REGNUM
))
2378 SET_REGNO (pic_offset_table_rtx
, MB_ABI_PIC_ADDR_REGNUM
);
2379 emit_insn (gen_set_got (pic_offset_table_rtx
)); /* setting GOT. */
2382 /* If we are profiling, make sure no instructions are scheduled before
2383 the call to mcount. */
2386 emit_insn (gen_blockage ());
2389 /* Do necessary cleanup after a function to restore stack, frame, and regs. */
2391 #define RA_MASK ((long) 0x80000000) /* 1 << 31 */
2392 #define PIC_OFFSET_TABLE_MASK (1 << (PIC_OFFSET_TABLE_REGNUM - GP_REG_FIRST))
2395 microblaze_function_epilogue (FILE * file ATTRIBUTE_UNUSED
,
2396 HOST_WIDE_INT size ATTRIBUTE_UNUSED
)
2400 /* Get the function name the same way that toplev.c does before calling
2401 assemble_start_function. This is needed so that the name used here
2402 exactly matches the name used in ASM_DECLARE_FUNCTION_NAME. */
2403 fnname
= XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0);
2405 if (!flag_inhibit_size_directive
)
2407 fputs ("\t.end\t", file
);
2408 if (interrupt_handler
)
2409 fputs ("_interrupt_handler", file
);
2411 assemble_name (file
, fnname
);
2415 /* Reset state info for each function. */
2416 current_frame_info
= zero_frame_info
;
2418 /* Restore the output file if optimizing the GP (optimizing the GP causes
2419 the text to be diverted to a tempfile, so that data decls come before
2420 references to the data). */
2423 /* Expand the epilogue into a bunch of separate insns. */
2426 microblaze_expand_epilogue (void)
2428 HOST_WIDE_INT fsiz
= current_frame_info
.total_size
;
2429 rtx fsiz_rtx
= GEN_INT (fsiz
);
2433 /* In case of interrupt handlers use addki instead of addi for changing the
2434 stack pointer value. */
2436 if (microblaze_can_use_return_insn ())
2438 emit_jump_insn (gen_return_internal (gen_rtx_REG (Pmode
,
2440 MB_ABI_SUB_RETURN_ADDR_REGNUM
)));
2446 /* Restore SUB_RETURN_ADDR_REGNUM at first. This is to prevent the
2447 sequence of load-followed by a use (in rtsd) in every prologue. Saves
2448 a load-use stall cycle :) This is also important to handle alloca.
2449 (See comments for if (frame_pointer_needed) below. */
2451 if (!current_function_is_leaf
|| interrupt_handler
)
2454 gen_rtx_MEM (SImode
,
2455 gen_rtx_PLUS (Pmode
, stack_pointer_rtx
, const0_rtx
));
2456 if (interrupt_handler
)
2457 /* Do not optimize in flow analysis. */
2458 MEM_VOLATILE_P (mem_rtx
) = 1;
2459 reg_rtx
= gen_rtx_REG (SImode
, MB_ABI_SUB_RETURN_ADDR_REGNUM
);
2460 emit_move_insn (reg_rtx
, mem_rtx
);
2463 /* It is important that this is done after we restore the return address
2464 register (above). When alloca is used, we want to restore the
2465 sub-routine return address only from the current stack top and not
2466 from the frame pointer (which we restore below). (frame_pointer + 0)
2467 might have been over-written since alloca allocates memory on the
2469 if (frame_pointer_needed
)
2470 emit_insn (gen_movsi (stack_pointer_rtx
, hard_frame_pointer_rtx
));
2472 /* _restore_ registers for epilogue. */
2473 save_restore_insns (0);
2474 emit_insn (gen_blockage ());
2475 emit_insn (gen_addsi3 (stack_pointer_rtx
, stack_pointer_rtx
, fsiz_rtx
));
2478 emit_jump_insn (gen_return_internal (gen_rtx_REG (Pmode
, GP_REG_FIRST
+
2479 MB_ABI_SUB_RETURN_ADDR_REGNUM
)));
2483 /* Return nonzero if this function is known to have a null epilogue.
2484 This allows the optimizer to omit jumps to jumps if no stack
2488 microblaze_can_use_return_insn (void)
2490 if (!reload_completed
)
2493 if (df_regs_ever_live_p (MB_ABI_SUB_RETURN_ADDR_REGNUM
) || profile_flag
)
2496 if (current_frame_info
.initialized
)
2497 return current_frame_info
.total_size
== 0;
2499 return compute_frame_size (get_frame_size ()) == 0;
2502 /* Implement TARGET_SECONDARY_RELOAD. */
2505 microblaze_secondary_reload (bool in_p ATTRIBUTE_UNUSED
, rtx x ATTRIBUTE_UNUSED
,
2506 reg_class_t rclass
, enum machine_mode mode ATTRIBUTE_UNUSED
,
2507 secondary_reload_info
*sri ATTRIBUTE_UNUSED
)
2509 if (rclass
== ST_REGS
)
2516 microblaze_globalize_label (FILE * stream
, const char *name
)
2518 fputs ("\t.globl\t", stream
);
2519 if (interrupt_handler
&& strcmp (name
, INTERRUPT_HANDLER_NAME
))
2521 fputs (INTERRUPT_HANDLER_NAME
, stream
);
2522 fputs ("\n\t.globl\t", stream
);
2524 assemble_name (stream
, name
);
2525 fputs ("\n", stream
);
2528 /* Returns true if decl should be placed into a "small data" section. */
2530 microblaze_elf_in_small_data_p (const_tree decl
)
2534 if (!TARGET_XLGPOPT
)
2537 /* We want to merge strings, so we never consider them small data. */
2538 if (TREE_CODE (decl
) == STRING_CST
)
2541 /* Functions are never in the small data area. */
2542 if (TREE_CODE (decl
) == FUNCTION_DECL
)
2545 if (TREE_CODE (decl
) == VAR_DECL
&& DECL_SECTION_NAME (decl
))
2547 const char *section
= TREE_STRING_POINTER (DECL_SECTION_NAME (decl
));
2548 if (strcmp (section
, ".sdata") == 0
2549 || strcmp (section
, ".sdata2") == 0
2550 || strcmp (section
, ".sbss") == 0
2551 || strcmp (section
, ".sbss2") == 0)
2555 size
= int_size_in_bytes (TREE_TYPE (decl
));
2557 return (size
> 0 && size
<= microblaze_section_threshold
);
2562 microblaze_select_section (tree decl
, int reloc
, unsigned HOST_WIDE_INT align
)
2564 switch (categorize_decl_for_section (decl
, reloc
))
2566 case SECCAT_RODATA_MERGE_STR
:
2567 case SECCAT_RODATA_MERGE_STR_INIT
:
2568 /* MB binutils have various issues with mergeable string sections and
2569 relaxation/relocation. Currently, turning mergeable sections
2570 into regular readonly sections. */
2572 return readonly_data_section
;
2574 return default_elf_select_section (decl
, reloc
, align
);
2579 Encode info about sections into the RTL based on a symbol's declaration.
2580 The default definition of this hook, default_encode_section_info in
2581 `varasm.c', sets a number of commonly-useful bits in SYMBOL_REF_FLAGS. */
2584 microblaze_encode_section_info (tree decl
, rtx rtl
, int first
)
2586 default_encode_section_info (decl
, rtl
, first
);
2590 expand_pic_symbol_ref (enum machine_mode mode ATTRIBUTE_UNUSED
, rtx op
)
2593 result
= gen_rtx_UNSPEC (Pmode
, gen_rtvec (1, op
), UNSPEC_GOTOFF
);
2594 result
= gen_rtx_CONST (Pmode
, result
);
2595 result
= gen_rtx_PLUS (Pmode
, pic_offset_table_rtx
, result
);
2596 result
= gen_const_mem (Pmode
, result
);
2601 microblaze_expand_move (enum machine_mode mode
, rtx operands
[])
2603 /* If operands[1] is a constant address invalid for pic, then we need to
2604 handle it just like LEGITIMIZE_ADDRESS does. */
2607 if (GET_CODE (operands
[0]) == MEM
)
2609 rtx addr
= XEXP (operands
[0], 0);
2610 if (GET_CODE (addr
) == SYMBOL_REF
)
2612 rtx ptr_reg
, result
;
2614 if (reload_in_progress
)
2615 df_set_regs_ever_live (PIC_OFFSET_TABLE_REGNUM
, true);
2617 addr
= expand_pic_symbol_ref (mode
, addr
);
2618 ptr_reg
= gen_reg_rtx (Pmode
);
2619 emit_move_insn (ptr_reg
, addr
);
2620 result
= gen_rtx_MEM (mode
, ptr_reg
);
2621 operands
[0] = result
;
2624 if (GET_CODE (operands
[1]) == SYMBOL_REF
2625 || GET_CODE (operands
[1]) == LABEL_REF
)
2628 if (reload_in_progress
)
2629 df_set_regs_ever_live (PIC_OFFSET_TABLE_REGNUM
, true);
2630 result
= expand_pic_symbol_ref (mode
, operands
[1]);
2631 if (GET_CODE (operands
[0]) != REG
)
2633 rtx ptr_reg
= gen_reg_rtx (Pmode
);
2634 emit_move_insn (ptr_reg
, result
);
2635 emit_move_insn (operands
[0], ptr_reg
);
2639 emit_move_insn (operands
[0], result
);
2643 else if (GET_CODE (operands
[1]) == MEM
&&
2644 GET_CODE (XEXP (operands
[1], 0)) == SYMBOL_REF
)
2648 if (reload_in_progress
)
2649 df_set_regs_ever_live (PIC_OFFSET_TABLE_REGNUM
, true);
2650 result
= expand_pic_symbol_ref (mode
, XEXP (operands
[1], 0));
2652 ptr_reg
= gen_reg_rtx (Pmode
);
2654 emit_move_insn (ptr_reg
, result
);
2655 result
= gen_rtx_MEM (mode
, ptr_reg
);
2656 emit_move_insn (operands
[0], result
);
2659 else if (pic_address_needs_scratch (operands
[1]))
2661 rtx temp
= force_reg (SImode
, XEXP (XEXP (operands
[1], 0), 0));
2662 rtx temp2
= XEXP (XEXP (operands
[1], 0), 1);
2664 if (reload_in_progress
)
2665 df_set_regs_ever_live (PIC_OFFSET_TABLE_REGNUM
, true);
2666 emit_move_insn (operands
[0], gen_rtx_PLUS (SImode
, temp
, temp2
));
2671 if ((reload_in_progress
| reload_completed
) == 0
2672 && !register_operand (operands
[0], SImode
)
2673 && !register_operand (operands
[1], SImode
)
2674 && (GET_CODE (operands
[1]) != CONST_INT
|| INTVAL (operands
[1]) != 0))
2676 rtx temp
= force_reg (SImode
, operands
[1]);
2677 emit_move_insn (operands
[0], temp
);
2683 /* Expand shift operations. */
2685 microblaze_expand_shift (rtx operands
[])
2687 gcc_assert ((GET_CODE (operands
[2]) == CONST_INT
)
2688 || (GET_CODE (operands
[2]) == REG
)
2689 || (GET_CODE (operands
[2]) == SUBREG
));
2691 /* Shift by one -- generate pattern. */
2692 if ((GET_CODE (operands
[2]) == CONST_INT
) && (INTVAL (operands
[2]) == 1))
2695 /* Have barrel shifter and shift > 1: use it. */
2696 if (TARGET_BARREL_SHIFT
)
2699 gcc_assert ((GET_CODE (operands
[0]) == REG
)
2700 || (GET_CODE (operands
[0]) == SUBREG
)
2701 || (GET_CODE (operands
[1]) == REG
)
2702 || (GET_CODE (operands
[1]) == SUBREG
));
2704 /* Shift by zero -- copy regs if necessary. */
2705 if ((GET_CODE (operands
[2]) == CONST_INT
) && (INTVAL (operands
[2]) == 0))
2707 if (REGNO (operands
[0]) != REGNO (operands
[1]))
2708 emit_insn (gen_movsi (operands
[0], operands
[1]));
2715 /* Return an RTX indicating where the return address to the
2716 calling function can be found. */
2718 microblaze_return_addr (int count
, rtx frame ATTRIBUTE_UNUSED
)
2723 return gen_rtx_PLUS (Pmode
,
2724 get_hard_reg_initial_val (Pmode
,
2725 MB_ABI_SUB_RETURN_ADDR_REGNUM
),
2729 /* Put string into .sdata2 if below threashold. */
2731 microblaze_asm_output_ident (FILE *file ATTRIBUTE_UNUSED
, const char *string
)
2733 int size
= strlen (string
) + 1;
2734 if (size
<= microblaze_section_threshold
)
2735 switch_to_section (sdata2_section
);
2737 switch_to_section (readonly_data_section
);
2738 assemble_string (string
, size
);
2742 microblaze_elf_asm_init_sections (void)
2745 = get_unnamed_section (SECTION_WRITE
, output_section_asm_op
,
2746 SDATA2_SECTION_ASM_OP
);
2749 /* Generate assembler code for constant parts of a trampoline. */
2752 microblaze_asm_trampoline_template (FILE *f
)
2754 fprintf (f
, "\t.word\t0x03e00821\t\t# move $1,$31\n");
2755 fprintf (f
, "\t.word\t0x04110001\t\t# bgezal $0,.+8\n");
2756 fprintf (f
, "\t.word\t0x00000000\t\t# nop\n");
2757 fprintf (f
, "\t.word\t0x8fe30014\t\t# lw $3,20($31)\n");
2758 fprintf (f
, "\t.word\t0x8fe20018\t\t# lw $2,24($31)\n");
2759 fprintf (f
, "\t.word\t0x0060c821\t\t# move $25,$3 (abicalls)\n");
2760 fprintf (f
, "\t.word\t0x00600008\t\t# jr $3\n");
2761 fprintf (f
, "\t.word\t0x0020f821\t\t# move $31,$1\n");
2762 /* fprintf (f, "\t.word\t0x00000000\t\t# <function address>\n"); */
2763 /* fprintf (f, "\t.word\t0x00000000\t\t# <static chain value>\n"); */
2766 /* Implement TARGET_TRAMPOLINE_INIT. */
2769 microblaze_trampoline_init (rtx m_tramp
, tree fndecl
, rtx chain_value
)
2771 rtx fnaddr
= XEXP (DECL_RTL (fndecl
), 0);
2774 emit_block_move (m_tramp
, assemble_trampoline_template (),
2775 GEN_INT (8*UNITS_PER_WORD
), BLOCK_OP_NORMAL
);
2777 mem
= adjust_address (m_tramp
, SImode
, 8);
2778 emit_move_insn (mem
, chain_value
);
2779 mem
= adjust_address (m_tramp
, SImode
, 12);
2780 emit_move_insn (mem
, fnaddr
);
2783 /* Emit instruction to perform compare.
2784 cmp is (compare_op op0 op1). */
2786 microblaze_emit_compare (enum machine_mode mode
, rtx cmp
, enum rtx_code
*cmp_code
)
2788 rtx cmp_op0
= XEXP (cmp
, 0);
2789 rtx cmp_op1
= XEXP (cmp
, 1);
2790 rtx comp_reg
= gen_reg_rtx (SImode
);
2791 enum rtx_code code
= *cmp_code
;
2793 gcc_assert ((GET_CODE (cmp_op0
) == REG
) || (GET_CODE (cmp_op0
) == SUBREG
));
2795 /* If comparing against zero, just test source reg. */
2796 if (cmp_op1
== const0_rtx
)
2799 if (code
== EQ
|| code
== NE
)
2801 if (TARGET_PATTERN_COMPARE
&& GET_CODE(cmp_op1
) == REG
)
2804 emit_insn (gen_seq_internal_pat (comp_reg
, cmp_op0
, cmp_op1
));
2807 emit_insn (gen_sne_internal_pat (comp_reg
, cmp_op0
, cmp_op1
));
2812 /* Use xor for equal/not-equal comparison. */
2813 emit_insn (gen_xorsi3 (comp_reg
, cmp_op0
, cmp_op1
));
2815 else if (code
== GT
|| code
== GTU
|| code
== LE
|| code
== LEU
)
2817 /* MicroBlaze compare is not symmetrical. */
2818 /* Swap argument order. */
2819 cmp_op1
= force_reg (mode
, cmp_op1
);
2820 if (code
== GT
|| code
== LE
)
2821 emit_insn (gen_signed_compare (comp_reg
, cmp_op0
, cmp_op1
));
2823 emit_insn (gen_unsigned_compare (comp_reg
, cmp_op0
, cmp_op1
));
2824 /* Translate test condition. */
2825 *cmp_code
= swap_condition (code
);
2827 else /* if (code == GE || code == GEU || code == LT || code == LTU) */
2829 cmp_op1
= force_reg (mode
, cmp_op1
);
2830 if (code
== GE
|| code
== LT
)
2831 emit_insn (gen_signed_compare (comp_reg
, cmp_op1
, cmp_op0
));
2833 emit_insn (gen_unsigned_compare (comp_reg
, cmp_op1
, cmp_op0
));
2839 /* Generate conditional branch -- first, generate test condition,
2840 second, generate correct branch instruction. */
2843 microblaze_expand_conditional_branch (enum machine_mode mode
, rtx operands
[])
2845 enum rtx_code code
= GET_CODE (operands
[0]);
2849 comp
= microblaze_emit_compare (mode
, operands
[0], &code
);
2850 condition
= gen_rtx_fmt_ee (signed_condition (code
), SImode
, comp
, const0_rtx
);
2851 emit_jump_insn (gen_condjump (condition
, operands
[3]));
2855 microblaze_expand_conditional_branch_sf (rtx operands
[])
2858 rtx cmp_op0
= XEXP (operands
[0], 0);
2859 rtx cmp_op1
= XEXP (operands
[0], 1);
2860 rtx comp_reg
= gen_reg_rtx (SImode
);
2862 emit_insn (gen_cstoresf4 (comp_reg
, operands
[0], cmp_op0
, cmp_op1
));
2863 condition
= gen_rtx_NE (SImode
, comp_reg
, const0_rtx
);
2864 emit_jump_insn (gen_condjump (condition
, operands
[3]));
2867 /* Implement TARGET_FRAME_POINTER_REQUIRED. */
2870 microblaze_frame_pointer_required (void)
2872 /* If the function contains dynamic stack allocations, we need to
2873 use the frame pointer to access the static parts of the frame. */
2874 if (cfun
->calls_alloca
)
2880 microblaze_expand_divide (rtx operands
[])
2882 /* Table lookup software divides. Works for all (nr/dr) where (0 <= nr,dr <= 15). */
2884 rtx regt1
= gen_reg_rtx (SImode
);
2885 rtx reg18
= gen_rtx_REG (SImode
, R_TMP
);
2886 rtx regqi
= gen_reg_rtx (QImode
);
2887 rtx div_label
= gen_label_rtx ();
2888 rtx div_end_label
= gen_label_rtx ();
2889 rtx div_table_rtx
= gen_rtx_SYMBOL_REF (QImode
,"_divsi3_table");
2892 rtx jump
, cjump
, insn
;
2894 insn
= emit_insn (gen_iorsi3 (regt1
, operands
[1], operands
[2]));
2895 cjump
= emit_jump_insn_after (gen_cbranchsi4 (
2896 gen_rtx_GTU (SImode
, regt1
, GEN_INT (15)),
2897 regt1
, GEN_INT (15), div_label
), insn
);
2898 LABEL_NUSES (div_label
) = 1;
2899 JUMP_LABEL (cjump
) = div_label
;
2900 emit_insn (gen_rtx_CLOBBER (SImode
, reg18
));
2902 emit_insn (gen_ashlsi3_bshift (regt1
, operands
[1], GEN_INT(4)));
2903 emit_insn (gen_addsi3 (regt1
, regt1
, operands
[2]));
2904 mem_rtx
= gen_rtx_MEM (QImode
,
2905 gen_rtx_PLUS (Pmode
, regt1
, div_table_rtx
));
2907 insn
= emit_insn (gen_movqi (regqi
, mem_rtx
));
2908 insn
= emit_insn (gen_movsi (operands
[0], gen_rtx_SUBREG (SImode
, regqi
, 0)));
2909 jump
= emit_jump_insn_after (gen_jump (div_end_label
), insn
);
2910 JUMP_LABEL (jump
) = div_end_label
;
2911 LABEL_NUSES (div_end_label
) = 1;
2914 emit_label (div_label
);
2915 ret
= emit_library_call_value (gen_rtx_SYMBOL_REF (Pmode
, "__divsi3"),
2916 operands
[0], LCT_NORMAL
,
2917 GET_MODE (operands
[0]), 2, operands
[1],
2918 GET_MODE (operands
[1]), operands
[2],
2919 GET_MODE (operands
[2]));
2920 if (ret
!= operands
[0])
2921 emit_move_insn (operands
[0], ret
);
2923 emit_label (div_end_label
);
2924 emit_insn (gen_blockage ());
2927 /* Implement TARGET_FUNCTION_VALUE. */
2929 microblaze_function_value (const_tree valtype
,
2930 const_tree func ATTRIBUTE_UNUSED
,
2931 bool outgoing ATTRIBUTE_UNUSED
)
2933 return LIBCALL_VALUE (TYPE_MODE (valtype
));
2936 /* Implement TARGET_SCHED_ADJUST_COST. */
2938 microblaze_adjust_cost (rtx insn ATTRIBUTE_UNUSED
, rtx link
,
2939 rtx dep ATTRIBUTE_UNUSED
, int cost
)
2941 if (REG_NOTE_KIND (link
) == REG_DEP_OUTPUT
)
2943 if (REG_NOTE_KIND (link
) != 0)
2948 /* Implement TARGET_LEGITIMATE_CONSTANT_P.
2950 At present, GAS doesn't understand li.[sd], so don't allow it
2951 to be generated at present. */
2953 microblaze_legitimate_constant_p (enum machine_mode mode
, rtx x
)
2955 return GET_CODE (x
) != CONST_DOUBLE
|| microblaze_const_double_ok (x
, mode
);
2958 #undef TARGET_ENCODE_SECTION_INFO
2959 #define TARGET_ENCODE_SECTION_INFO microblaze_encode_section_info
2961 #undef TARGET_ASM_GLOBALIZE_LABEL
2962 #define TARGET_ASM_GLOBALIZE_LABEL microblaze_globalize_label
2964 #undef TARGET_ASM_FUNCTION_PROLOGUE
2965 #define TARGET_ASM_FUNCTION_PROLOGUE microblaze_function_prologue
2967 #undef TARGET_ASM_FUNCTION_EPILOGUE
2968 #define TARGET_ASM_FUNCTION_EPILOGUE microblaze_function_epilogue
2970 #undef TARGET_RTX_COSTS
2971 #define TARGET_RTX_COSTS microblaze_rtx_costs
2973 #undef TARGET_ADDRESS_COST
2974 #define TARGET_ADDRESS_COST microblaze_address_cost
2976 #undef TARGET_ATTRIBUTE_TABLE
2977 #define TARGET_ATTRIBUTE_TABLE microblaze_attribute_table
2979 #undef TARGET_IN_SMALL_DATA_P
2980 #define TARGET_IN_SMALL_DATA_P microblaze_elf_in_small_data_p
2982 #undef TARGET_ASM_SELECT_SECTION
2983 #define TARGET_ASM_SELECT_SECTION microblaze_select_section
2985 #undef TARGET_HAVE_SRODATA_SECTION
2986 #define TARGET_HAVE_SRODATA_SECTION true
2988 #undef TARGET_ASM_FUNCTION_END_PROLOGUE
2989 #define TARGET_ASM_FUNCTION_END_PROLOGUE \
2990 microblaze_function_end_prologue
2992 #undef TARGET_ARG_PARTIAL_BYTES
2993 #define TARGET_ARG_PARTIAL_BYTES function_arg_partial_bytes
2995 #undef TARGET_FUNCTION_ARG
2996 #define TARGET_FUNCTION_ARG microblaze_function_arg
2998 #undef TARGET_FUNCTION_ARG_ADVANCE
2999 #define TARGET_FUNCTION_ARG_ADVANCE microblaze_function_arg_advance
3001 #undef TARGET_CAN_ELIMINATE
3002 #define TARGET_CAN_ELIMINATE microblaze_can_eliminate
3004 #undef TARGET_LEGITIMIZE_ADDRESS
3005 #define TARGET_LEGITIMIZE_ADDRESS microblaze_legitimize_address
3007 #undef TARGET_LEGITIMATE_ADDRESS_P
3008 #define TARGET_LEGITIMATE_ADDRESS_P microblaze_legitimate_address_p
3010 #undef TARGET_FRAME_POINTER_REQUIRED
3011 #define TARGET_FRAME_POINTER_REQUIRED microblaze_frame_pointer_required
3013 #undef TARGET_ASM_TRAMPOLINE_TEMPLATE
3014 #define TARGET_ASM_TRAMPOLINE_TEMPLATE microblaze_asm_trampoline_template
3016 #undef TARGET_TRAMPOLINE_INIT
3017 #define TARGET_TRAMPOLINE_INIT microblaze_trampoline_init
3019 #undef TARGET_PROMOTE_FUNCTION_MODE
3020 #define TARGET_PROMOTE_FUNCTION_MODE default_promote_function_mode_always_promote
3022 #undef TARGET_FUNCTION_VALUE
3023 #define TARGET_FUNCTION_VALUE microblaze_function_value
3025 #undef TARGET_SECONDARY_RELOAD
3026 #define TARGET_SECONDARY_RELOAD microblaze_secondary_reload
3028 #undef TARGET_SCHED_ADJUST_COST
3029 #define TARGET_SCHED_ADJUST_COST microblaze_adjust_cost
3031 #undef TARGET_ASM_INIT_SECTIONS
3032 #define TARGET_ASM_INIT_SECTIONS microblaze_elf_asm_init_sections
3034 #undef TARGET_OPTION_OVERRIDE
3035 #define TARGET_OPTION_OVERRIDE microblaze_option_override
3037 #undef TARGET_LEGITIMATE_CONSTANT_P
3038 #define TARGET_LEGITIMATE_CONSTANT_P microblaze_legitimate_constant_p
3040 struct gcc_target targetm
= TARGET_INITIALIZER
;
3042 #include "gt-microblaze.h"