gcc/config/mips/mips.opt

   1 ; Options for the MIPS port of the compiler
   2 ;
   3 ; Copyright (C) 2005-2013 Free Software Foundation, Inc.
   4 ;
   5 ; This file is part of GCC.
   6 ;
   7 ; GCC is free software; you can redistribute it and/or modify it under
   8 ; the terms of the GNU General Public License as published by the Free
   9 ; Software Foundation; either version 3, or (at your option) any later
  10 ; version.
  11 ;
  12 ; GCC is distributed in the hope that it will be useful, but WITHOUT
  13 ; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  14 ; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  15 ; License for more details.
  16 ;
  17 ; You should have received a copy of the GNU General Public License
  18 ; along with GCC; see the file COPYING3.  If not see
  19 ; <http://www.gnu.org/licenses/>.
  20
  21 HeaderInclude
  22 config/mips/mips-opts.h
  23
  24 EB
  25 Driver
  26
  27 EL
  28 Driver
  29
  30 mabi=
  31 Target RejectNegative Joined Enum(mips_abi) Var(mips_abi) Init(MIPS_ABI_DEFAULT)
  32 -mabi=ABI       Generate code that conforms to the given ABI
  33
  34 Enum
  35 Name(mips_abi) Type(int)
  36 Known MIPS ABIs (for use with the -mabi= option):
  37
  38 EnumValue
  39 Enum(mips_abi) String(32) Value(ABI_32)
  40
  41 EnumValue
  42 Enum(mips_abi) String(o64) Value(ABI_O64)
  43
  44 EnumValue
  45 Enum(mips_abi) String(n32) Value(ABI_N32)
  46
  47 EnumValue
  48 Enum(mips_abi) String(64) Value(ABI_64)
  49
  50 EnumValue
  51 Enum(mips_abi) String(eabi) Value(ABI_EABI)
  52
  53 mabicalls
  54 Target Report Mask(ABICALLS)
  55 Generate code that can be used in SVR4-style dynamic objects
  56
  57 mmad
  58 Target Report Var(TARGET_MAD)
  59 Use PMC-style 'mad' instructions
  60
  61 mimadd
  62 Target Report Mask(IMADD)
  63 Use integer madd/msub instructions
  64
  65 march=
  66 Target RejectNegative Joined Var(mips_arch_option) ToLower Enum(mips_arch_opt_value)
  67 -march=ISA      Generate code for the given ISA
  68
  69 mbranch-cost=
  70 Target RejectNegative Joined UInteger Var(mips_branch_cost)
  71 -mbranch-cost=COST      Set the cost of branches to roughly COST instructions
  72
  73 mbranch-likely
  74 Target Report Mask(BRANCHLIKELY)
  75 Use Branch Likely instructions, overriding the architecture default
  76
  77 mflip-mips16
  78 Target Report Var(TARGET_FLIP_MIPS16)
  79 Switch on/off MIPS16 ASE on alternating functions for compiler testing
  80
  81 mcheck-zero-division
  82 Target Report Mask(CHECK_ZERO_DIV)
  83 Trap on integer divide by zero
  84
  85 mcode-readable=
  86 Target RejectNegative Joined Enum(mips_code_readable_setting) Var(mips_code_readable) Init(CODE_READABLE_YES)
  87 -mcode-readable=SETTING Specify when instructions are allowed to access code
  88
  89 Enum
  90 Name(mips_code_readable_setting) Type(enum mips_code_readable_setting)
  91 Valid arguments to -mcode-readable=:
  92
  93 EnumValue
  94 Enum(mips_code_readable_setting) String(yes) Value(CODE_READABLE_YES)
  95
  96 EnumValue
  97 Enum(mips_code_readable_setting) String(pcrel) Value(CODE_READABLE_PCREL)
  98
  99 EnumValue
 100 Enum(mips_code_readable_setting) String(no) Value(CODE_READABLE_NO)
 101
 102 mdivide-breaks
 103 Target Report RejectNegative Mask(DIVIDE_BREAKS)
 104 Use branch-and-break sequences to check for integer divide by zero
 105
 106 mdivide-traps
 107 Target Report RejectNegative InverseMask(DIVIDE_BREAKS, DIVIDE_TRAPS)
 108 Use trap instructions to check for integer divide by zero
 109
 110 mdmx
 111 Target Report RejectNegative Var(TARGET_MDMX)
 112 Allow the use of MDMX instructions
 113
 114 mdouble-float
 115 Target Report RejectNegative InverseMask(SINGLE_FLOAT, DOUBLE_FLOAT)
 116 Allow hardware floating-point instructions to cover both 32-bit and 64-bit operations
 117
 118 mdsp
 119 Target Report Mask(DSP)
 120 Use MIPS-DSP instructions
 121
 122 mdspr2
 123 Target Report Mask(DSPR2)
 124 Use MIPS-DSP REV 2 instructions
 125
 126 mdebug
 127 Target Var(TARGET_DEBUG_MODE) Undocumented
 128
 129 mdebugd
 130 Target Var(TARGET_DEBUG_D_MODE) Undocumented
 131
 132 meb
 133 Target Report RejectNegative Mask(BIG_ENDIAN)
 134 Use big-endian byte order
 135
 136 mel
 137 Target Report RejectNegative InverseMask(BIG_ENDIAN, LITTLE_ENDIAN)
 138 Use little-endian byte order
 139
 140 membedded-data
 141 Target Report Var(TARGET_EMBEDDED_DATA)
 142 Use ROM instead of RAM
 143
 144 mexplicit-relocs
 145 Target Report Mask(EXPLICIT_RELOCS)
 146 Use NewABI-style %reloc() assembly operators
 147
 148 mextern-sdata
 149 Target Report Var(TARGET_EXTERN_SDATA) Init(1)
 150 Use -G for data that is not defined by the current object
 151
 152 mfix-24k
 153 Target Report Var(TARGET_FIX_24K)
 154 Work around certain 24K errata
 155
 156 mfix-r4000
 157 Target Report Mask(FIX_R4000)
 158 Work around certain R4000 errata
 159
 160 mfix-r4400
 161 Target Report Mask(FIX_R4400)
 162 Work around certain R4400 errata
 163
 164 mfix-r10000
 165 Target Report Mask(FIX_R10000)
 166 Work around certain R10000 errata
 167
 168 mfix-sb1
 169 Target Report Var(TARGET_FIX_SB1)
 170 Work around errata for early SB-1 revision 2 cores
 171
 172 mfix-vr4120
 173 Target Report Var(TARGET_FIX_VR4120)
 174 Work around certain VR4120 errata
 175
 176 mfix-vr4130
 177 Target Report Var(TARGET_FIX_VR4130)
 178 Work around VR4130 mflo/mfhi errata
 179
 180 mfix4300
 181 Target Report Var(TARGET_4300_MUL_FIX)
 182 Work around an early 4300 hardware bug
 183
 184 mfp-exceptions
 185 Target Report Mask(FP_EXCEPTIONS)
 186 FP exceptions are enabled
 187
 188 mfp32
 189 Target Report RejectNegative InverseMask(FLOAT64)
 190 Use 32-bit floating-point registers
 191
 192 mfp64
 193 Target Report RejectNegative Mask(FLOAT64)
 194 Use 64-bit floating-point registers
 195
 196 mflush-func=
 197 Target RejectNegative Joined Var(mips_cache_flush_func) Init(CACHE_FLUSH_FUNC)
 198 -mflush-func=FUNC       Use FUNC to flush the cache before calling stack trampolines
 199
 200 mfused-madd
 201 Target Report Mask(FUSED_MADD)
 202 Generate floating-point multiply-add instructions
 203
 204 mgp32
 205 Target Report RejectNegative InverseMask(64BIT)
 206 Use 32-bit general registers
 207
 208 mgp64
 209 Target Report RejectNegative Mask(64BIT)
 210 Use 64-bit general registers
 211
 212 mgpopt
 213 Target Report Var(TARGET_GPOPT) Init(1)
 214 Use GP-relative addressing to access small data
 215
 216 mplt
 217 Target Report Var(TARGET_PLT)
 218 When generating -mabicalls code, allow executables to use PLTs and copy relocations
 219
 220 mhard-float
 221 Target Report RejectNegative InverseMask(SOFT_FLOAT_ABI, HARD_FLOAT_ABI)
 222 Allow the use of hardware floating-point ABI and instructions
 223
 224 minterlink-compressed
 225 Target Report Var(TARGET_INTERLINK_COMPRESSED) Init(0)
 226 Generate code that is link-compatible with MIPS16 and microMIPS code.
 227
 228 minterlink-mips16
 229 Target Report Var(TARGET_INTERLINK_COMPRESSED) Init(0)
 230 An alias for minterlink-compressed provided for backward-compatibility.
 231
 232 mips
 233 Target RejectNegative Joined ToLower Enum(mips_mips_opt_value) Var(mips_isa_option)
 234 -mipsN  Generate code for ISA level N
 235
 236 mips16
 237 Target Report RejectNegative Mask(MIPS16)
 238 Generate MIPS16 code
 239
 240 mips3d
 241 Target Report RejectNegative Mask(MIPS3D)
 242 Use MIPS-3D instructions
 243
 244 mllsc
 245 Target Report Mask(LLSC)
 246 Use ll, sc and sync instructions
 247
 248 mlocal-sdata
 249 Target Report Var(TARGET_LOCAL_SDATA) Init(1)
 250 Use -G for object-local data
 251
 252 mlong-calls
 253 Target Report Var(TARGET_LONG_CALLS)
 254 Use indirect calls
 255
 256 mlong32
 257 Target Report RejectNegative InverseMask(LONG64, LONG32)
 258 Use a 32-bit long type
 259
 260 mlong64
 261 Target Report RejectNegative Mask(LONG64)
 262 Use a 64-bit long type
 263
 264 mmcount-ra-address
 265 Target Report Var(TARGET_MCOUNT_RA_ADDRESS)
 266 Pass the address of the ra save location to _mcount in $12
 267
 268 mmemcpy
 269 Target Report Mask(MEMCPY)
 270 Don't optimize block moves
 271
 272 mmicromips
 273 Target Report Mask(MICROMIPS)
 274 Use microMIPS instructions
 275
 276 mmt
 277 Target Report Var(TARGET_MT)
 278 Allow the use of MT instructions
 279
 280 mno-float
 281 Target Report RejectNegative Var(TARGET_NO_FLOAT) Condition(TARGET_SUPPORTS_NO_FLOAT)
 282 Prevent the use of all floating-point operations
 283
 284 mmcu
 285 Target Report Var(TARGET_MCU)
 286 Use MCU instructions
 287
 288 mno-flush-func
 289 Target RejectNegative
 290 Do not use a cache-flushing function before calling stack trampolines
 291
 292 mno-mdmx
 293 Target Report RejectNegative Var(TARGET_MDMX, 0)
 294 Do not use MDMX instructions
 295
 296 mno-mips16
 297 Target Report RejectNegative InverseMask(MIPS16)
 298 Generate normal-mode code
 299
 300 mno-mips3d
 301 Target Report RejectNegative InverseMask(MIPS3D)
 302 Do not use MIPS-3D instructions
 303
 304 mpaired-single
 305 Target Report Mask(PAIRED_SINGLE_FLOAT)
 306 Use paired-single floating-point instructions
 307
 308 mr10k-cache-barrier=
 309 Target Joined RejectNegative Enum(mips_r10k_cache_barrier_setting) Var(mips_r10k_cache_barrier) Init(R10K_CACHE_BARRIER_NONE)
 310 -mr10k-cache-barrier=SETTING    Specify when r10k cache barriers should be inserted
 311
 312 Enum
 313 Name(mips_r10k_cache_barrier_setting) Type(enum mips_r10k_cache_barrier_setting)
 314 Valid arguments to -mr10k-cache-barrier=:
 315
 316 EnumValue
 317 Enum(mips_r10k_cache_barrier_setting) String(load-store) Value(R10K_CACHE_BARRIER_LOAD_STORE)
 318
 319 EnumValue
 320 Enum(mips_r10k_cache_barrier_setting) String(store) Value(R10K_CACHE_BARRIER_STORE)
 321
 322 EnumValue
 323 Enum(mips_r10k_cache_barrier_setting) String(none) Value(R10K_CACHE_BARRIER_NONE)
 324
 325 mrelax-pic-calls
 326 Target Report Mask(RELAX_PIC_CALLS)
 327 Try to allow the linker to turn PIC calls into direct calls
 328
 329 mshared
 330 Target Report Var(TARGET_SHARED) Init(1)
 331 When generating -mabicalls code, make the code suitable for use in shared libraries
 332
 333 msingle-float
 334 Target Report RejectNegative Mask(SINGLE_FLOAT)
 335 Restrict the use of hardware floating-point instructions to 32-bit operations
 336
 337 msmartmips
 338 Target Report Mask(SMARTMIPS)
 339 Use SmartMIPS instructions
 340
 341 msoft-float
 342 Target Report RejectNegative Mask(SOFT_FLOAT_ABI)
 343 Prevent the use of all hardware floating-point instructions
 344
 345 msplit-addresses
 346 Target Report Mask(SPLIT_ADDRESSES)
 347 Optimize lui/addiu address loads
 348
 349 msym32
 350 Target Report Var(TARGET_SYM32)
 351 Assume all symbols have 32-bit values
 352
 353 msynci
 354 Target Report Mask(SYNCI)
 355 Use synci instruction to invalidate i-cache
 356
 357 mtune=
 358 Target RejectNegative Joined Var(mips_tune_option) ToLower Enum(mips_arch_opt_value)
 359 -mtune=PROCESSOR        Optimize the output for PROCESSOR
 360
 361 muninit-const-in-rodata
 362 Target Report Var(TARGET_UNINIT_CONST_IN_RODATA)
 363 Put uninitialized constants in ROM (needs -membedded-data)
 364
 365 mvr4130-align
 366 Target Report Mask(VR4130_ALIGN)
 367 Perform VR4130-specific alignment optimizations
 368
 369 mxgot
 370 Target Report Var(TARGET_XGOT)
 371 Lift restrictions on GOT size
 372
 373 noasmopt
 374 Driver