1 ; Options for the MIPS port of the compiler
3 ; Copyright (C) 2005 Free Software Foundation, Inc.
5 ; This file is part of GCC.
7 ; GCC is free software; you can redistribute it and/or modify it under
8 ; the terms of the GNU General Public License as published by the Free
9 ; Software Foundation; either version 2, or (at your option) any later
12 ; GCC is distributed in the hope that it will be useful, but WITHOUT
13 ; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 ; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 ; License for more details.
17 ; You should have received a copy of the GNU General Public License
18 ; along with GCC; see the file COPYING. If not, write to the Free
19 ; Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
23 Target RejectNegative Joined
24 -mabi=ABI Generate code that conforms to the given ABI
27 Target Report Mask(ABICALLS)
28 Generate code that can be used in SVR4-style dynamic objects
31 Target Report Var(TARGET_MAD)
32 Use PMC-style 'mad' instructions
35 Target RejectNegative Joined Var(mips_arch_string)
36 -march=ISA Generate code for the given ISA
39 Target RejectNegative Joined UInteger Var(mips_branch_cost)
40 -mbranch-cost=COST Set the cost of branches to roughly COST instructions
43 Target Report Mask(BRANCHLIKELY)
44 Use Branch Likely instructions, overriding the architecture default
47 Target Report Mask(CHECK_ZERO_DIV)
48 Trap on integer divide by zero
51 Target Report RejectNegative Mask(DIVIDE_BREAKS)
52 Use branch-and-break sequences to check for integer divide by zero
55 Target Report RejectNegative InverseMask(DIVIDE_BREAKS, DIVIDE_TRAPS)
56 Use trap instructions to check for integer divide by zero
59 Target Report RejectNegative Var(TARGET_MDMX)
60 Allow the use of MDMX instructions
63 Target Report RejectNegative InverseMask(SINGLE_FLOAT, DOUBLE_FLOAT)
64 Allow hardware floating-point instructions to cover both 32-bit and 64-bit operations
67 Target Report Mask(DSP)
68 Use MIPS-DSP instructions
71 Target Report Mask(DSPR2)
72 Use MIPS-DSP REV 2 instructions
75 Target Var(TARGET_DEBUG_MODE) Undocumented
78 Target Var(TARGET_DEBUG_D_MODE) Undocumented
81 Target Report RejectNegative Mask(BIG_ENDIAN)
82 Use big-endian byte order
85 Target Report RejectNegative InverseMask(BIG_ENDIAN, LITTLE_ENDIAN)
86 Use little-endian byte order
89 Target Report Var(TARGET_EMBEDDED_DATA)
90 Use ROM instead of RAM
93 Target Report Mask(EXPLICIT_RELOCS)
94 Use NewABI-style %reloc() assembly operators
97 Target Report Mask(FIX_R4000)
98 Work around certain R4000 errata
101 Target Report Mask(FIX_R4400)
102 Work around certain R4400 errata
105 Target Report Var(TARGET_FIX_SB1)
106 Work around errata for early SB-1 revision 2 cores
109 Target Report Var(TARGET_FIX_VR4120)
110 Work around certain VR4120 errata
113 Target Report Var(TARGET_FIX_VR4130)
114 Work around VR4130 mflo/mfhi errata
117 Target Report Var(TARGET_4300_MUL_FIX)
118 Work around an early 4300 hardware bug
121 Target Report Mask(FP_EXCEPTIONS)
122 FP exceptions are enabled
125 Target Report RejectNegative InverseMask(FLOAT64)
126 Use 32-bit floating-point registers
129 Target Report RejectNegative Mask(FLOAT64)
130 Use 64-bit floating-point registers
133 Target RejectNegative Joined Var(mips_cache_flush_func) Init(CACHE_FLUSH_FUNC)
134 -mflush-func=FUNC Use FUNC to flush the cache before calling stack trampolines
137 Target Report Mask(FUSED_MADD)
138 Generate floating-point multiply-add instructions
141 Target Report RejectNegative InverseMask(64BIT)
142 Use 32-bit general registers
145 Target Report RejectNegative Mask(64BIT)
146 Use 64-bit general registers
149 Target Report RejectNegative InverseMask(SOFT_FLOAT, HARD_FLOAT)
150 Allow the use of hardware floating-point instructions
153 Target RejectNegative Joined
154 -mipsN Generate code for ISA level N
157 Target Report RejectNegative Mask(MIPS16)
161 Target Report RejectNegative Mask(MIPS3D)
162 Use MIPS-3D instructions
165 Target Report Var(TARGET_LONG_CALLS)
169 Target Report RejectNegative InverseMask(LONG64, LONG32)
170 Use a 32-bit long type
173 Target Report RejectNegative Mask(LONG64)
174 Use a 64-bit long type
177 Target Report Var(TARGET_MEMCPY)
178 Don't optimize block moves
182 Use the mips-tfile postpass
185 Target Report Var(TARGET_MT)
186 Allow the use of MT instructions
189 Target RejectNegative
190 Do not use a cache-flushing function before calling stack trampolines
193 Target Report RejectNegative InverseVar(MDMX)
194 Do not use MDMX instructions
197 Target Report RejectNegative InverseMask(MIPS16)
198 Generate normal-mode code
201 Target Report RejectNegative InverseMask(MIPS3D)
202 Do not use MIPS-3D instructions
205 Target Report Mask(PAIRED_SINGLE_FLOAT)
206 Use paired-single floating-point instructions
209 Target Report Var(TARGET_SHARED) Init(1)
210 When generating -mabicalls code, make the code suitable for use in shared libraries
213 Target Report RejectNegative Mask(SINGLE_FLOAT)
214 Restrict the use of hardware floating-point instructions to 32-bit operations
217 Target Report RejectNegative Mask(SMARTMIPS)
218 Use SmartMIPS instructions
221 Target Report RejectNegative Mask(SOFT_FLOAT)
222 Prevent the use of all hardware floating-point instructions
225 Target Report Mask(SPLIT_ADDRESSES)
226 Optimize lui/addiu address loads
229 Target Report Var(TARGET_SYM32)
230 Assume all symbols have 32-bit values
233 Target RejectNegative Joined Var(mips_tune_string)
234 -mtune=PROCESSOR Optimize the output for PROCESSOR
236 muninit-const-in-rodata
237 Target Report Var(TARGET_UNINIT_CONST_IN_RODATA)
238 Put uninitialized constants in ROM (needs -membedded-data)
241 Target Report Mask(VR4130_ALIGN)
242 Perform VR4130-specific alignment optimizations
245 Target Report Var(TARGET_XGOT)
246 Lift restrictions on GOT size