1 ; Options for the MIPS port of the compiler
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22 config/mips/mips-opts.h
31 Target RejectNegative Joined Enum(mips_abi) Var(mips_abi) Init(MIPS_ABI_DEFAULT)
32 -mabi=ABI Generate code that conforms to the given ABI
35 Name(mips_abi) Type(int)
36 Known MIPS ABIs (for use with the -mabi= option):
39 Enum(mips_abi) String(32) Value(ABI_32)
42 Enum(mips_abi) String(o64) Value(ABI_O64)
45 Enum(mips_abi) String(n32) Value(ABI_N32)
48 Enum(mips_abi) String(64) Value(ABI_64)
51 Enum(mips_abi) String(eabi) Value(ABI_EABI)
54 Target Report Mask(ABICALLS)
55 Generate code that can be used in SVR4-style dynamic objects
58 Target Report Var(TARGET_MAD)
59 Use PMC-style 'mad' instructions
62 Target Report Mask(IMADD)
63 Use integer madd/msub instructions
66 Target RejectNegative Joined Var(mips_arch_option) ToLower Enum(mips_arch_opt_value)
67 -march=ISA Generate code for the given ISA
70 Target RejectNegative Joined UInteger Var(mips_branch_cost)
71 -mbranch-cost=COST Set the cost of branches to roughly COST instructions
74 Target Report Mask(BRANCHLIKELY)
75 Use Branch Likely instructions, overriding the architecture default
78 Target Report Var(TARGET_FLIP_MIPS16)
79 Switch on/off MIPS16 ASE on alternating functions for compiler testing
82 Target Report Mask(CHECK_ZERO_DIV)
83 Trap on integer divide by zero
86 Target RejectNegative Joined Enum(mips_code_readable_setting) Var(mips_code_readable) Init(CODE_READABLE_YES)
87 -mcode-readable=SETTING Specify when instructions are allowed to access code
90 Name(mips_code_readable_setting) Type(enum mips_code_readable_setting)
91 Valid arguments to -mcode-readable=:
94 Enum(mips_code_readable_setting) String(yes) Value(CODE_READABLE_YES)
97 Enum(mips_code_readable_setting) String(pcrel) Value(CODE_READABLE_PCREL)
100 Enum(mips_code_readable_setting) String(no) Value(CODE_READABLE_NO)
103 Target Report RejectNegative Mask(DIVIDE_BREAKS)
104 Use branch-and-break sequences to check for integer divide by zero
107 Target Report RejectNegative InverseMask(DIVIDE_BREAKS, DIVIDE_TRAPS)
108 Use trap instructions to check for integer divide by zero
111 Target Report RejectNegative Var(TARGET_MDMX)
112 Allow the use of MDMX instructions
115 Target Report RejectNegative InverseMask(SINGLE_FLOAT, DOUBLE_FLOAT)
116 Allow hardware floating-point instructions to cover both 32-bit and 64-bit operations
119 Target Report Var(TARGET_DSP)
120 Use MIPS-DSP instructions
123 Target Report Var(TARGET_DSPR2)
124 Use MIPS-DSP REV 2 instructions
127 Target Var(TARGET_DEBUG_MODE) Undocumented
130 Target Var(TARGET_DEBUG_D_MODE) Undocumented
133 Target Report RejectNegative Mask(BIG_ENDIAN)
134 Use big-endian byte order
137 Target Report RejectNegative InverseMask(BIG_ENDIAN, LITTLE_ENDIAN)
138 Use little-endian byte order
141 Target Report Var(TARGET_EMBEDDED_DATA)
142 Use ROM instead of RAM
145 Target Report Var(TARGET_EVA)
146 Use Enhanced Virtual Addressing instructions
149 Target Report Mask(EXPLICIT_RELOCS)
150 Use NewABI-style %reloc() assembly operators
153 Target Report Var(TARGET_EXTERN_SDATA) Init(1)
154 Use -G for data that is not defined by the current object
157 Target Report Var(TARGET_FIX_24K)
158 Work around certain 24K errata
161 Target Report Mask(FIX_R4000)
162 Work around certain R4000 errata
165 Target Report Mask(FIX_R4400)
166 Work around certain R4400 errata
169 Target Report Var(TARGET_FIX_RM7000)
170 Work around certain RM7000 errata
173 Target Report Mask(FIX_R10000)
174 Work around certain R10000 errata
177 Target Report Var(TARGET_FIX_SB1)
178 Work around errata for early SB-1 revision 2 cores
181 Target Report Var(TARGET_FIX_VR4120)
182 Work around certain VR4120 errata
185 Target Report Var(TARGET_FIX_VR4130)
186 Work around VR4130 mflo/mfhi errata
189 Target Report Var(TARGET_4300_MUL_FIX)
190 Work around an early 4300 hardware bug
193 Target Report Var(TARGET_FP_EXCEPTIONS) Init(1)
194 FP exceptions are enabled
197 Target Report RejectNegative InverseMask(FLOAT64)
198 Use 32-bit floating-point registers
201 Target Report RejectNegative Mask(FLOATXX)
202 Conform to the o32 FPXX ABI
205 Target Report RejectNegative Mask(FLOAT64)
206 Use 64-bit floating-point registers
209 Target RejectNegative Joined Var(mips_cache_flush_func) Init(CACHE_FLUSH_FUNC)
210 -mflush-func=FUNC Use FUNC to flush the cache before calling stack trampolines
213 Target Report Var(TARGET_FUSED_MADD) Init(1)
214 Generate floating-point multiply-add instructions
217 Target RejectNegative Joined Enum(mips_ieee_754_value) Var(mips_abs) Init(MIPS_IEEE_754_DEFAULT)
218 -mabs=MODE Select the IEEE 754 ABS/NEG instruction execution mode
221 Target RejectNegative Joined Enum(mips_ieee_754_value) Var(mips_nan) Init(MIPS_IEEE_754_DEFAULT)
222 -mnan=ENCODING Select the IEEE 754 NaN data encoding
225 Name(mips_ieee_754_value) Type(int)
226 Known MIPS IEEE 754 settings (for use with the -mabs= and -mnan= options):
229 Enum(mips_ieee_754_value) String(2008) Value(MIPS_IEEE_754_2008)
232 Enum(mips_ieee_754_value) String(legacy) Value(MIPS_IEEE_754_LEGACY)
235 Target Report RejectNegative InverseMask(64BIT)
236 Use 32-bit general registers
239 Target Report RejectNegative Mask(64BIT)
240 Use 64-bit general registers
243 Target Report Var(TARGET_GPOPT) Init(1)
244 Use GP-relative addressing to access small data
247 Target Report Var(TARGET_PLT)
248 When generating -mabicalls code, allow executables to use PLTs and copy relocations
251 Target Report RejectNegative InverseMask(SOFT_FLOAT_ABI, HARD_FLOAT_ABI)
252 Allow the use of hardware floating-point ABI and instructions
254 minterlink-compressed
255 Target Report Var(TARGET_INTERLINK_COMPRESSED) Init(0)
256 Generate code that is link-compatible with MIPS16 and microMIPS code.
259 Target Report Var(TARGET_INTERLINK_COMPRESSED) Init(0)
260 An alias for minterlink-compressed provided for backward-compatibility.
263 Target RejectNegative Joined ToLower Enum(mips_mips_opt_value) Var(mips_isa_option)
264 -mipsN Generate code for ISA level N
267 Target Report RejectNegative Mask(MIPS16)
271 Target Report RejectNegative Var(TARGET_MIPS3D)
272 Use MIPS-3D instructions
275 Target Report Mask(LLSC)
276 Use ll, sc and sync instructions
279 Target Report Var(TARGET_LOCAL_SDATA) Init(1)
280 Use -G for object-local data
283 Target Report Var(TARGET_LONG_CALLS)
287 Target Report RejectNegative InverseMask(LONG64, LONG32)
288 Use a 32-bit long type
291 Target Report RejectNegative Mask(LONG64)
292 Use a 64-bit long type
295 Target Report Var(TARGET_MCOUNT_RA_ADDRESS)
296 Pass the address of the ra save location to _mcount in $12
299 Target Report Mask(MEMCPY)
300 Don't optimize block moves
303 Target Report Mask(MICROMIPS)
304 Use microMIPS instructions
307 Target Report Var(TARGET_MT)
308 Allow the use of MT instructions
311 Target Report RejectNegative Var(TARGET_NO_FLOAT) Condition(TARGET_SUPPORTS_NO_FLOAT)
312 Prevent the use of all floating-point operations
315 Target Report Var(TARGET_MCU)
319 Target RejectNegative
320 Do not use a cache-flushing function before calling stack trampolines
323 Target Report RejectNegative Var(TARGET_MDMX, 0)
324 Do not use MDMX instructions
327 Target Report RejectNegative InverseMask(MIPS16)
328 Generate normal-mode code
331 Target Report RejectNegative Var(TARGET_MIPS3D, 0)
332 Do not use MIPS-3D instructions
335 Target Report Mask(PAIRED_SINGLE_FLOAT)
336 Use paired-single floating-point instructions
339 Target Joined RejectNegative Enum(mips_r10k_cache_barrier_setting) Var(mips_r10k_cache_barrier) Init(R10K_CACHE_BARRIER_NONE)
340 -mr10k-cache-barrier=SETTING Specify when r10k cache barriers should be inserted
343 Name(mips_r10k_cache_barrier_setting) Type(enum mips_r10k_cache_barrier_setting)
344 Valid arguments to -mr10k-cache-barrier=:
347 Enum(mips_r10k_cache_barrier_setting) String(load-store) Value(R10K_CACHE_BARRIER_LOAD_STORE)
350 Enum(mips_r10k_cache_barrier_setting) String(store) Value(R10K_CACHE_BARRIER_STORE)
353 Enum(mips_r10k_cache_barrier_setting) String(none) Value(R10K_CACHE_BARRIER_NONE)
356 Target Report Mask(RELAX_PIC_CALLS)
357 Try to allow the linker to turn PIC calls into direct calls
360 Target Report Var(TARGET_SHARED) Init(1)
361 When generating -mabicalls code, make the code suitable for use in shared libraries
364 Target Report RejectNegative Mask(SINGLE_FLOAT)
365 Restrict the use of hardware floating-point instructions to 32-bit operations
368 Target Report Mask(SMARTMIPS)
369 Use SmartMIPS instructions
372 Target Report RejectNegative Mask(SOFT_FLOAT_ABI)
373 Prevent the use of all hardware floating-point instructions
376 Target Report Mask(SPLIT_ADDRESSES)
377 Optimize lui/addiu address loads
380 Target Report Var(TARGET_SYM32)
381 Assume all symbols have 32-bit values
384 Target Report Mask(SYNCI)
385 Use synci instruction to invalidate i-cache
388 Target Report Var(mips_lra_flag) Init(1) Save
389 Use LRA instead of reload
392 Target RejectNegative Joined Var(mips_tune_option) ToLower Enum(mips_arch_opt_value)
393 -mtune=PROCESSOR Optimize the output for PROCESSOR
395 muninit-const-in-rodata
396 Target Report Var(TARGET_UNINIT_CONST_IN_RODATA)
397 Put uninitialized constants in ROM (needs -membedded-data)
400 Target Report Var(TARGET_VIRT)
401 Use Virtualization Application Specific instructions
404 Target Report Var(TARGET_XPA)
405 Use eXtended Physical Address (XPA) instructions
408 Target Report Mask(VR4130_ALIGN)
409 Perform VR4130-specific alignment optimizations
412 Target Report Var(TARGET_XGOT)
413 Lift restrictions on GOT size
416 Target Report Mask(ODD_SPREG)
417 Enable use of odd-numbered single-precision registers
423 Target Report Var(TARGET_LOAD_STORE_PAIRS) Init(1)
424 Enable load/store bonding.