gcc/config/mips/predicates.md

   1 ;; Predicate definitions for MIPS.
   2 ;; Copyright (C) 2004-2013 Free Software Foundation, Inc.
   3 ;;
   4 ;; This file is part of GCC.
   5 ;;
   6 ;; GCC is free software; you can redistribute it and/or modify
   7 ;; it under the terms of the GNU General Public License as published by
   8 ;; the Free Software Foundation; either version 3, or (at your option)
   9 ;; any later version.
  10 ;;
  11 ;; GCC is distributed in the hope that it will be useful,
  12 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14 ;; GNU General Public License for more details.
  15 ;;
  16 ;; You should have received a copy of the GNU General Public License
  17 ;; along with GCC; see the file COPYING3.  If not see
  18 ;; <http://www.gnu.org/licenses/>.
  19
  20 (define_predicate "const_uns_arith_operand"
  21   (and (match_code "const_int")
  22        (match_test "SMALL_OPERAND_UNSIGNED (INTVAL (op))")))
  23
  24 (define_predicate "uns_arith_operand"
  25   (ior (match_operand 0 "const_uns_arith_operand")
  26        (match_operand 0 "register_operand")))
  27
  28 (define_predicate "const_arith_operand"
  29   (and (match_code "const_int")
  30        (match_test "SMALL_OPERAND (INTVAL (op))")))
  31
  32 (define_predicate "arith_operand"
  33   (ior (match_operand 0 "const_arith_operand")
  34        (match_operand 0 "register_operand")))
  35
  36 (define_predicate "const_uimm6_operand"
  37   (and (match_code "const_int")
  38        (match_test "UIMM6_OPERAND (INTVAL (op))")))
  39
  40 (define_predicate "const_imm10_operand"
  41   (and (match_code "const_int")
  42        (match_test "IMM10_OPERAND (INTVAL (op))")))
  43
  44 (define_predicate "reg_imm10_operand"
  45   (ior (match_operand 0 "const_imm10_operand")
  46        (match_operand 0 "register_operand")))
  47
  48 (define_predicate "sle_operand"
  49   (and (match_code "const_int")
  50        (match_test "SMALL_OPERAND (INTVAL (op) + 1)")))
  51
  52 (define_predicate "sleu_operand"
  53   (and (match_operand 0 "sle_operand")
  54        (match_test "INTVAL (op) + 1 != 0")))
  55
  56 (define_predicate "const_0_operand"
  57   (and (match_code "const_int,const_double,const_vector")
  58        (match_test "op == CONST0_RTX (GET_MODE (op))")))
  59
  60 (define_predicate "reg_or_0_operand"
  61   (ior (and (match_operand 0 "const_0_operand")
  62             (not (match_test "TARGET_MIPS16")))
  63        (match_operand 0 "register_operand")))
  64
  65 (define_predicate "const_1_operand"
  66   (and (match_code "const_int,const_double,const_vector")
  67        (match_test "op == CONST1_RTX (GET_MODE (op))")))
  68
  69 (define_predicate "reg_or_1_operand"
  70   (ior (match_operand 0 "const_1_operand")
  71        (match_operand 0 "register_operand")))
  72
  73 ;; This is used for indexing into vectors, and hence only accepts const_int.
  74 (define_predicate "const_0_or_1_operand"
  75   (and (match_code "const_int")
  76        (match_test "IN_RANGE (INTVAL (op), 0, 1)")))
  77
  78 (define_predicate "const_2_or_3_operand"
  79   (and (match_code "const_int")
  80        (match_test "IN_RANGE (INTVAL (op), 2, 3)")))
  81
  82 (define_predicate "const_0_to_3_operand"
  83   (and (match_code "const_int")
  84        (match_test "IN_RANGE (INTVAL (op), 0, 3)")))
  85
  86 (define_predicate "qi_mask_operand"
  87   (and (match_code "const_int")
  88        (match_test "UINTVAL (op) == 0xff")))
  89
  90 (define_predicate "hi_mask_operand"
  91   (and (match_code "const_int")
  92        (match_test "UINTVAL (op) == 0xffff")))
  93
  94 (define_predicate "si_mask_operand"
  95   (and (match_code "const_int")
  96        (match_test "UINTVAL (op) == 0xffffffff")))
  97
  98 (define_predicate "and_load_operand"
  99   (ior (match_operand 0 "qi_mask_operand")
 100        (match_operand 0 "hi_mask_operand")
 101        (match_operand 0 "si_mask_operand")))
 102
 103 (define_predicate "low_bitmask_operand"
 104   (and (match_test "ISA_HAS_EXT_INS")
 105        (match_code "const_int")
 106        (match_test "low_bitmask_len (mode, INTVAL (op)) > 16")))
 107
 108 (define_predicate "and_reg_operand"
 109   (ior (match_operand 0 "register_operand")
 110        (and (not (match_test "TARGET_MIPS16"))
 111             (match_operand 0 "const_uns_arith_operand"))
 112        (match_operand 0 "low_bitmask_operand")
 113        (match_operand 0 "si_mask_operand")))
 114
 115 (define_predicate "and_operand"
 116   (ior (match_operand 0 "and_load_operand")
 117        (match_operand 0 "and_reg_operand")))
 118
 119 (define_predicate "d_operand"
 120   (and (match_code "reg")
 121        (match_test "TARGET_MIPS16
 122                     ? M16_REG_P (REGNO (op))
 123                     : GP_REG_P (REGNO (op))")))
 124
 125 (define_predicate "lwsp_swsp_operand"
 126   (and (match_code "mem")
 127        (match_test "lwsp_swsp_address_p (XEXP (op, 0), mode)")))
 128
 129 (define_predicate "lw16_sw16_operand"
 130   (and (match_code "mem")
 131        (match_test "m16_based_address_p (XEXP (op, 0), mode, uw4_operand)")))
 132
 133 (define_predicate "lhu16_sh16_operand"
 134   (and (match_code "mem")
 135        (match_test "m16_based_address_p (XEXP (op, 0), mode, uh4_operand)")))
 136
 137 (define_predicate "lbu16_operand"
 138   (and (match_code "mem")
 139        (match_test "m16_based_address_p (XEXP (op, 0), mode, db4_operand)")))
 140
 141 (define_predicate "sb16_operand"
 142   (and (match_code "mem")
 143        (match_test "m16_based_address_p (XEXP (op, 0), mode, ub4_operand)")))
 144
 145 (define_predicate "db4_operand"
 146   (and (match_code "const_int")
 147        (match_test "mips_unsigned_immediate_p (INTVAL (op) + 1, 4, 0)")))
 148
 149 (define_predicate "db7_operand"
 150   (and (match_code "const_int")
 151        (match_test "mips_unsigned_immediate_p (INTVAL (op) + 1, 7, 0)")))
 152
 153 (define_predicate "ib3_operand"
 154   (and (match_code "const_int")
 155        (match_test "mips_unsigned_immediate_p (INTVAL (op) - 1, 3, 0)")))
 156
 157 (define_predicate "sb4_operand"
 158   (and (match_code "const_int")
 159        (match_test "mips_signed_immediate_p (INTVAL (op), 4, 0)")))
 160
 161 (define_predicate "ub4_operand"
 162   (and (match_code "const_int")
 163        (match_test "mips_unsigned_immediate_p (INTVAL (op), 4, 0)")))
 164
 165 (define_predicate "uh4_operand"
 166   (and (match_code "const_int")
 167        (match_test "mips_unsigned_immediate_p (INTVAL (op), 4, 1)")))
 168
 169 (define_predicate "uw4_operand"
 170   (and (match_code "const_int")
 171        (match_test "mips_unsigned_immediate_p (INTVAL (op), 4, 2)")))
 172
 173 (define_predicate "uw5_operand"
 174   (and (match_code "const_int")
 175        (match_test "mips_unsigned_immediate_p (INTVAL (op), 5, 2)")))
 176
 177 (define_predicate "uw6_operand"
 178   (and (match_code "const_int")
 179        (match_test "mips_unsigned_immediate_p (INTVAL (op), 6, 2)")))
 180
 181 (define_predicate "addiur2_operand"
 182   (and (match_code "const_int")
 183         (ior (match_test "INTVAL (op) == -1")
 184              (match_test "INTVAL (op) == 1")
 185              (match_test "INTVAL (op) == 4")
 186              (match_test "INTVAL (op) == 8")
 187              (match_test "INTVAL (op) == 12")
 188              (match_test "INTVAL (op) == 16")
 189              (match_test "INTVAL (op) == 20")
 190              (match_test "INTVAL (op) == 24"))))
 191
 192 (define_predicate "addiusp_operand"
 193   (and (match_code "const_int")
 194        (ior (match_test "(IN_RANGE (INTVAL (op), 2, 257))")
 195             (match_test "(IN_RANGE (INTVAL (op), -258, -3))"))))
 196
 197 (define_predicate "andi16_operand"
 198   (and (match_code "const_int")
 199         (ior (match_test "IN_RANGE (INTVAL (op), 1, 4)")
 200              (match_test "IN_RANGE (INTVAL (op), 7, 8)")
 201              (match_test "IN_RANGE (INTVAL (op), 15, 16)")
 202              (match_test "IN_RANGE (INTVAL (op), 31, 32)")
 203              (match_test "IN_RANGE (INTVAL (op), 63, 64)")
 204              (match_test "INTVAL (op) == 255")
 205              (match_test "INTVAL (op) == 32768")
 206              (match_test "INTVAL (op) == 65535"))))
 207
 208 (define_predicate "movep_src_register"
 209   (and (match_code "reg")
 210        (ior (match_test ("IN_RANGE (REGNO (op), 2, 3)"))
 211             (match_test ("IN_RANGE (REGNO (op), 16, 20)")))))
 212
 213 (define_predicate "movep_src_operand"
 214   (ior (match_operand 0 "const_0_operand")
 215        (match_operand 0 "movep_src_register")))
 216
 217 (define_predicate "lo_operand"
 218   (and (match_code "reg")
 219        (match_test "REGNO (op) == LO_REGNUM")))
 220
 221 (define_predicate "hilo_operand"
 222   (and (match_code "reg")
 223        (match_test "MD_REG_P (REGNO (op))")))
 224
 225 (define_predicate "fcc_reload_operand"
 226   (and (match_code "reg,subreg")
 227        (match_test "ST_REG_P (true_regnum (op))")))
 228
 229 (define_predicate "muldiv_target_operand"
 230   (if_then_else (match_test "TARGET_MIPS16")
 231                 (match_operand 0 "hilo_operand")
 232                 (match_operand 0 "register_operand")))
 233
 234 (define_predicate "const_call_insn_operand"
 235   (match_code "const,symbol_ref,label_ref")
 236 {
 237   enum mips_symbol_type symbol_type;
 238
 239   if (!mips_symbolic_constant_p (op, SYMBOL_CONTEXT_CALL, &symbol_type))
 240     return false;
 241
 242   switch (symbol_type)
 243     {
 244     case SYMBOL_ABSOLUTE:
 245       /* We can only use direct calls if we're sure that the target
 246          function does not need $25 to be valid on entry.  */
 247       if (mips_use_pic_fn_addr_reg_p (op))
 248         return false;
 249
 250       /* If -mlong-calls or if this function has an explicit long_call
 251          attribute, we must use register addressing.  The
 252          SYMBOL_FLAG_LONG_CALL bit is set by mips_encode_section_info.  */
 253       return !(GET_CODE (op) == SYMBOL_REF && SYMBOL_REF_LONG_CALL_P (op));
 254
 255     case SYMBOL_GOT_DISP:
 256       /* Without explicit relocs, there is no special syntax for
 257          loading the address of a call destination into a register.
 258          Using "la $25,foo; jal $25" would prevent the lazy binding
 259          of "foo", so keep the address of global symbols with the
 260          jal macro.  */
 261       return !TARGET_EXPLICIT_RELOCS;
 262
 263     default:
 264       return false;
 265     }
 266 })
 267
 268 (define_predicate "call_insn_operand"
 269   (ior (match_operand 0 "const_call_insn_operand")
 270        (match_operand 0 "register_operand")))
 271
 272 ;; A legitimate CONST_INT operand that takes more than one instruction
 273 ;; to load.
 274 (define_predicate "splittable_const_int_operand"
 275   (match_code "const_int")
 276 {
 277   /* When generating mips16 code, TARGET_LEGITIMATE_CONSTANT_P rejects
 278      CONST_INTs that can't be loaded using simple insns.  */
 279   if (TARGET_MIPS16)
 280     return false;
 281
 282   /* Don't handle multi-word moves this way; we don't want to introduce
 283      the individual word-mode moves until after reload.  */
 284   if (GET_MODE_SIZE (mode) > UNITS_PER_WORD)
 285     return false;
 286
 287   /* Otherwise check whether the constant can be loaded in a single
 288      instruction.  */
 289   return !LUI_INT (op) && !SMALL_INT (op) && !SMALL_INT_UNSIGNED (op);
 290 })
 291
 292 (define_predicate "move_operand"
 293   ;; Allow HI and LO to be used as the source of a MIPS16 move.
 294   (ior (match_operand 0 "general_operand")
 295        (match_operand 0 "hilo_operand"))
 296 {
 297   enum mips_symbol_type symbol_type;
 298
 299   /* The thinking here is as follows:
 300
 301      (1) The move expanders should split complex load sequences into
 302          individual instructions.  Those individual instructions can
 303          then be optimized by all rtl passes.
 304
 305      (2) The target of pre-reload load sequences should not be used
 306          to store temporary results.  If the target register is only
 307          assigned one value, reload can rematerialize that value
 308          on demand, rather than spill it to the stack.
 309
 310      (3) If we allowed pre-reload passes like combine and cse to recreate
 311          complex load sequences, we would want to be able to split the
 312          sequences before reload as well, so that the pre-reload scheduler
 313          can see the individual instructions.  This falls foul of (2);
 314          the splitter would be forced to reuse the target register for
 315          intermediate results.
 316
 317      (4) We want to define complex load splitters for combine.  These
 318          splitters can request a temporary scratch register, which avoids
 319          the problem in (2).  They allow things like:
 320
 321               (set (reg T1) (high SYM))
 322               (set (reg T2) (low (reg T1) SYM))
 323               (set (reg X) (plus (reg T2) (const_int OFFSET)))
 324
 325          to be combined into:
 326
 327               (set (reg T3) (high SYM+OFFSET))
 328               (set (reg X) (lo_sum (reg T3) SYM+OFFSET))
 329
 330          if T2 is only used this once.  */
 331   switch (GET_CODE (op))
 332     {
 333     case CONST_INT:
 334       return !splittable_const_int_operand (op, mode);
 335
 336     case CONST:
 337     case SYMBOL_REF:
 338     case LABEL_REF:
 339       if (CONST_GP_P (op))
 340         return true;
 341       return (mips_symbolic_constant_p (op, SYMBOL_CONTEXT_LEA, &symbol_type)
 342               && !mips_split_p[symbol_type]);
 343
 344     case HIGH:
 345       op = XEXP (op, 0);
 346       return (mips_symbolic_constant_p (op, SYMBOL_CONTEXT_LEA, &symbol_type)
 347               && !mips_split_hi_p[symbol_type]);
 348
 349     default:
 350       return true;
 351     }
 352 })
 353
 354 (define_predicate "cprestore_save_slot_operand"
 355   (and (match_code "mem")
 356        (match_test "mips_cprestore_address_p (XEXP (op, 0), false)")))
 357
 358 (define_predicate "cprestore_load_slot_operand"
 359   (and (match_code "mem")
 360        (match_test "mips_cprestore_address_p (XEXP (op, 0), true)")))
 361
 362 (define_predicate "consttable_operand"
 363   (match_test "CONSTANT_P (op)"))
 364
 365 (define_predicate "symbolic_operand"
 366   (match_code "const,symbol_ref,label_ref")
 367 {
 368   enum mips_symbol_type type;
 369   return mips_symbolic_constant_p (op, SYMBOL_CONTEXT_LEA, &type);
 370 })
 371
 372 (define_predicate "absolute_symbolic_operand"
 373   (match_code "const,symbol_ref,label_ref")
 374 {
 375   enum mips_symbol_type type;
 376   return (mips_symbolic_constant_p (op, SYMBOL_CONTEXT_LEA, &type)
 377           && type == SYMBOL_ABSOLUTE);
 378 })
 379
 380 (define_predicate "symbolic_operand_with_high"
 381   (match_code "const,symbol_ref,label_ref")
 382 {
 383   enum mips_symbol_type type;
 384   return (mips_symbolic_constant_p (op, SYMBOL_CONTEXT_LEA, &type)
 385           && mips_hi_relocs[(int) type]);
 386 })
 387
 388 (define_predicate "force_to_mem_operand"
 389   (match_code "const,symbol_ref,label_ref")
 390 {
 391   enum mips_symbol_type symbol_type;
 392   return (mips_symbolic_constant_p (op, SYMBOL_CONTEXT_LEA, &symbol_type)
 393           && mips_use_pcrel_pool_p[(int) symbol_type]);
 394 })
 395
 396 (define_predicate "got_disp_operand"
 397   (match_code "const,symbol_ref,label_ref")
 398 {
 399   enum mips_symbol_type type;
 400   return (mips_symbolic_constant_p (op, SYMBOL_CONTEXT_LEA, &type)
 401           && type == SYMBOL_GOT_DISP);
 402 })
 403
 404 (define_predicate "got_page_ofst_operand"
 405   (match_code "const,symbol_ref,label_ref")
 406 {
 407   enum mips_symbol_type type;
 408   return (mips_symbolic_constant_p (op, SYMBOL_CONTEXT_LEA, &type)
 409           && type == SYMBOL_GOT_PAGE_OFST);
 410 })
 411
 412 (define_predicate "tls_reloc_operand"
 413   (match_code "const,symbol_ref,label_ref")
 414 {
 415   enum mips_symbol_type type;
 416   return (mips_symbolic_constant_p (op, SYMBOL_CONTEXT_LEA, &type)
 417           && (type == SYMBOL_DTPREL || type == SYMBOL_TPREL));
 418 })
 419
 420 (define_predicate "symbol_ref_operand"
 421   (match_code "symbol_ref"))
 422
 423 (define_predicate "stack_operand"
 424   (and (match_code "mem")
 425        (match_test "mips_stack_address_p (XEXP (op, 0), GET_MODE (op))")))
 426
 427 (define_predicate "macc_msac_operand"
 428   (ior (and (match_code "plus") (match_test "ISA_HAS_MACC"))
 429        (and (match_code "minus") (match_test "ISA_HAS_MSAC")))
 430 {
 431   rtx mult = XEXP (op, GET_CODE (op) == PLUS ? 0 : 1);
 432   rtx accum = XEXP (op, GET_CODE (op) == PLUS ? 1 : 0);
 433   return (GET_CODE (mult) == MULT
 434           && REG_P (XEXP (mult, 0))
 435           && REG_P (XEXP (mult, 1))
 436           && REG_P (accum));
 437 })
 438
 439
 440 (define_predicate "equality_operator"
 441   (match_code "eq,ne"))
 442
 443 (define_predicate "extend_operator"
 444   (match_code "zero_extend,sign_extend"))
 445
 446 (define_predicate "trap_comparison_operator"
 447   (match_code "eq,ne,lt,ltu,ge,geu"))
 448
 449 (define_predicate "order_operator"
 450   (match_code "lt,ltu,le,leu,ge,geu,gt,gtu"))
 451
 452 ;; For NE, cstore uses sltu instructions in which the first operand is $0.
 453 ;; This isn't possible in mips16 code.
 454
 455 (define_predicate "mips_cstore_operator"
 456   (ior (match_code "eq,gt,gtu,ge,geu,lt,ltu,le,leu")
 457        (and (match_code "ne") (not (match_test "TARGET_MIPS16")))))
 458
 459 (define_predicate "small_data_pattern"
 460   (and (match_code "set,parallel,unspec,unspec_volatile,prefetch")
 461        (match_test "mips_small_data_pattern_p (op)")))
 462
 463 (define_predicate "mem_noofs_operand"
 464   (and (match_code "mem")
 465        (match_code "reg" "0")))
 466
 467 ;; Return 1 if the operand is in non-volatile memory.
 468 (define_predicate "non_volatile_mem_operand"
 469   (and (match_operand 0 "memory_operand")
 470        (not (match_test "MEM_VOLATILE_P (op)"))))