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1 /* GCC backend definitions for the TI MSP430 Processor
2 Copyright (C) 2012-2020 Free Software Foundation, Inc.
3 Contributed by Red Hat.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published
9 by the Free Software Foundation; either version 3, or (at your
10 option) any later version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
20 \f
21
22 /* Run-time Target Specification */
23
24 /* True if the MSP430x extensions are enabled. */
25 #ifndef IN_LIBGCC2
26 extern bool msp430x;
27 #endif
28
29 #define TARGET_CPU_CPP_BUILTINS() \
30 do \
31 { \
32 builtin_define ("NO_TRAMPOLINES"); \
33 builtin_define ("__MSP430__"); \
34 builtin_define (msp430_mcu_name ()); \
35 if (msp430x) \
36 { \
37 builtin_define ("__MSP430X__"); \
38 builtin_assert ("cpu=MSP430X"); \
39 if (TARGET_LARGE) \
40 builtin_define ("__MSP430X_LARGE__"); \
41 } \
42 else \
43 builtin_assert ("cpu=MSP430"); \
44 } \
45 while (0)
46
47 /* For the "c" language where exceptions are implicitly disabled, use
48 crt*_no_eh.o unless -fexceptions is passed. For other languages, only use
49 crt*_no_eh.o if -fno-exceptions is explicitly passed. */
50 #undef STARTFILE_SPEC
51 #define STARTFILE_SPEC "%{pg:gcrt0.o%s}" \
52 "%{!pg:%{minrt:crt0-minrt.o%s}%{!minrt:crt0.o%s}} " \
53 "%{!minrt:%{,c:%{!fexceptions:crtbegin_no_eh.o%s; :crtbegin.o%s}; " \
54 ":%{fno-exceptions:crtbegin_no_eh.o%s; :crtbegin.o%s}}}"
55
56 /* -lgcc is included because crtend.o needs __mspabi_func_epilog_1. */
57 #undef ENDFILE_SPEC
58 #define ENDFILE_SPEC \
59 "%{!minrt:%{,c:%{!fexceptions:crtend_no_eh.o%s; :crtend.o%s}; " \
60 ":%{fno-exceptions:crtend_no_eh.o%s; :crtend.o%s}}} " \
61 "%{minrt:%:if-exists(crtn-minrt.o%s)}%{!minrt:%:if-exists(crtn.o%s)} -lgcc"
62
63 #define ASM_SPEC "-mP " /* Enable polymorphic instructions. */ \
64 "%{mcpu=*:-mcpu=%*} " /* Pass the CPU type on to the assembler. */ \
65 "%{mrelax=-mQ} " /* Pass the relax option on to the assembler. */ \
66 /* Tell the assembler if we are building for the LARGE pointer model. */ \
67 "%{mlarge:-ml} " \
68 /* Copy data from ROM to RAM if necessary. */ \
69 "%{!msim:-md} %{msim:%{mlarge:-md}} " \
70 "%{msilicon-errata=*:-msilicon-errata=%*} " \
71 "%{msilicon-errata-warn=*:-msilicon-errata-warn=%*} " \
72 /* Create DWARF line number sections for -ffunction-sections. */ \
73 "%{ffunction-sections:-gdwarf-sections} " \
74 "%{mdata-region=*:-mdata-region=%*} "
75
76 /* Enable linker section garbage collection by default, unless we
77 are creating a relocatable binary (gc does not work) or debugging
78 is enabled (the GDB testsuite relies upon unused entities not being
79 deleted). */
80 #define LINK_SPEC "%{mrelax:--relax} %{mlarge:%{!r:%{!g:--gc-sections}}} " \
81 "%{mcode-region=*:--code-region=%:" \
82 "msp430_propagate_region_opt(%* %{muse-lower-region-prefix})} " \
83 "%{mdata-region=*:--data-region=%:" \
84 "msp430_propagate_region_opt(%* %{muse-lower-region-prefix})} " \
85 "%:msp430_get_linker_devices_include_path() " \
86 "%{mtiny-printf:--wrap puts --wrap printf} "
87
88 #define DRIVER_SELF_SPECS \
89 " %{!mlarge:%{mcode-region=*:%{mdata-region=*:%e-mcode-region and " \
90 "-mdata-region require the large memory model (-mlarge)}}}" \
91 " %{!mlarge:%{mcode-region=*:" \
92 "%e-mcode-region requires the large memory model (-mlarge)}}" \
93 " %{!mlarge:%{mdata-region=*:" \
94 "%e-mdata-region requires the large memory model (-mlarge)}}" \
95 " %{mno-warn-devices-csv:%:msp430_set_driver_var(msp430_warn_devices_csv 0)}"\
96 " %{mdevices-csv-loc=*:%:msp430_set_driver_var(msp430_devices_csv_loc %*)}"\
97 " %{I*:%:msp430_check_path_for_devices(%{I*:%*})}" \
98 " %{L*:%:msp430_check_path_for_devices(%{L*:%*})}" \
99 " %{!mcpu=*:%{mmcu=*:%:msp430_select_cpu(%{mmcu=*:%*})}}"
100
101 extern const char * msp430_select_hwmult_lib (int, const char **);
102 extern const char * msp430_select_cpu (int, const char **);
103 extern const char * msp430_set_driver_var (int, const char **);
104 extern const char * msp430_check_path_for_devices (int, const char **);
105 extern const char *msp430_propagate_region_opt (int, const char **);
106 extern const char *msp430_get_linker_devices_include_path (int, const char **);
107
108 /* There must be a trailing comma after the last item, see gcc.c
109 "static_spec_functions". */
110 # define EXTRA_SPEC_FUNCTIONS \
111 { "msp430_hwmult_lib", msp430_select_hwmult_lib }, \
112 { "msp430_select_cpu", msp430_select_cpu }, \
113 { "msp430_set_driver_var", msp430_set_driver_var }, \
114 { "msp430_check_path_for_devices", msp430_check_path_for_devices }, \
115 { "msp430_propagate_region_opt", msp430_propagate_region_opt }, \
116 { "msp430_get_linker_devices_include_path", \
117 msp430_get_linker_devices_include_path },
118
119 /* Specify the libraries to include on the linker command line.
120
121 Selecting the hardware multiply library to use is quite complex.
122 If the user has specified -mhwmult=FOO then the mapping is quite
123 easy (and could be handled here in the SPEC string), unless FOO
124 is set to AUTO. In this case the -mmcu= option must be consulted
125 instead. If the -mhwmult= option is not specified then the -mmcu=
126 option must then be examined. If neither -mhwmult= nor -mmcu= are
127 specified then a default hardware multiply library is used.
128
129 Examining the -mmcu=FOO option is difficult, and it is so this
130 reason that a spec function is used. There are so many possible
131 values of FOO that a table is used to look up the name and map
132 it to a hardware multiply library. This table (in device-msp430.c)
133 must be kept in sync with the same table in msp430.c. */
134 #undef LIB_SPEC
135 #define LIB_SPEC " \
136 --start-group \
137 %{mhwmult=auto:%{mmcu=*:%:msp430_hwmult_lib(mcu %{mmcu=*:%*});\
138 :%:msp430_hwmult_lib(default)}; \
139 mhwmult=*:%:msp430_hwmult_lib(hwmult %{mhwmult=*:%*}); \
140 mmcu=*:%:msp430_hwmult_lib(mcu %{mmcu=*:%*}); \
141 :%:msp430_hwmult_lib(default)} \
142 -lc \
143 -lgcc \
144 -lcrt \
145 %{msim:-lsim} \
146 %{!msim:-lnosys} \
147 --end-group \
148 %{!T*:%{!msim:%{mmcu=*:--script=%*.ld}}} \
149 %{!T*:%{msim:%{mlarge:%Tmsp430xl-sim.ld}%{!mlarge:%Tmsp430-sim.ld}}} \
150 "
151 \f
152 /* Storage Layout */
153
154 #define BITS_BIG_ENDIAN 0
155 #define BYTES_BIG_ENDIAN 0
156 #define WORDS_BIG_ENDIAN 0
157
158
159 #ifdef IN_LIBGCC2
160 /* This is to get correct SI and DI modes in libgcc2.c (32 and 64 bits). */
161 #define UNITS_PER_WORD 4
162 /* We have a problem with libgcc2. It only defines two versions of
163 each function, one for "int" and one for "long long". Ie it assumes
164 that "sizeof (int) == sizeof (long)". For the MSP430 this is not true
165 and we need a third set of functions. We explicitly define
166 LIBGCC2_UNITS_PER_WORD here so that it is clear that we are expecting
167 to get the SI and DI versions from the libgcc2.c sources, and we
168 provide our own set of HI functions, which is why this
169 definition is surrounded by #ifndef..#endif. */
170 #ifndef LIBGCC2_UNITS_PER_WORD
171 #define LIBGCC2_UNITS_PER_WORD 4
172 #endif
173 #else
174 /* Actual width of a word, in units (bytes). */
175 #define UNITS_PER_WORD 2
176 #endif
177
178 #define SHORT_TYPE_SIZE 16
179 #define INT_TYPE_SIZE 16
180 #define LONG_TYPE_SIZE 32
181 #define LONG_LONG_TYPE_SIZE 64
182
183 #define FLOAT_TYPE_SIZE 32
184 #define DOUBLE_TYPE_SIZE 64
185 #define LONG_DOUBLE_TYPE_SIZE 64 /*DOUBLE_TYPE_SIZE*/
186
187 #define DEFAULT_SIGNED_CHAR 0
188
189 #define STRICT_ALIGNMENT 1
190 #define FUNCTION_BOUNDARY 16
191 #define BIGGEST_ALIGNMENT 16
192 #define STACK_BOUNDARY 16
193 #define PARM_BOUNDARY 8
194 #define PCC_BITFIELD_TYPE_MATTERS 1
195
196 #define STACK_GROWS_DOWNWARD 1
197 #define FRAME_GROWS_DOWNWARD 1
198 #define FIRST_PARM_OFFSET(FNDECL) 0
199
200 #define MAX_REGS_PER_ADDRESS 1
201
202 #define Pmode (TARGET_LARGE ? PSImode : HImode)
203 #define POINTER_SIZE (TARGET_LARGE ? 20 : 16)
204 /* This is just for .eh_frame, to match bfd. */
205 #define PTR_SIZE (TARGET_LARGE ? 4 : 2)
206 #define POINTERS_EXTEND_UNSIGNED 1
207
208 /* TARGET_VTABLE_ENTRY_ALIGN defaults to POINTER_SIZE, which is 20 for
209 TARGET_LARGE. Pointer alignment is always 16 for MSP430, so set explicitly
210 here. */
211 #define TARGET_VTABLE_ENTRY_ALIGN 16
212
213 #define ADDR_SPACE_NEAR 1
214 #define ADDR_SPACE_FAR 2
215
216 #define REGISTER_TARGET_PRAGMAS() msp430_register_pragmas()
217
218 #if 1 /* XXX */
219 /* Define this macro if it is advisable to hold scalars in registers
220 in a wider mode than that declared by the program. In such cases,
221 the value is constrained to be within the bounds of the declared
222 type, but kept valid in the wider mode. The signedness of the
223 extension may differ from that of the type. */
224
225 #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \
226 if (GET_MODE_CLASS (MODE) == MODE_INT \
227 && GET_MODE_SIZE (MODE) < 2) \
228 (MODE) = HImode;
229 #endif
230 \f
231 /* Layout of Source Language Data Types */
232
233 #undef SIZE_TYPE
234 #define SIZE_TYPE (TARGET_LARGE \
235 ? "__int20__ unsigned" \
236 : "unsigned int")
237 #undef PTRDIFF_TYPE
238 #define PTRDIFF_TYPE (TARGET_LARGE ? "__int20__" : "int")
239 #undef WCHAR_TYPE
240 #define WCHAR_TYPE "long int"
241 #undef WCHAR_TYPE_SIZE
242 #define WCHAR_TYPE_SIZE BITS_PER_WORD
243 #define FUNCTION_MODE HImode
244 #define CASE_VECTOR_MODE Pmode
245 #define HAS_LONG_COND_BRANCH 0
246 #define HAS_LONG_UNCOND_BRANCH 0
247
248 #define LOAD_EXTEND_OP(M) ZERO_EXTEND
249 #define WORD_REGISTER_OPERATIONS 1
250
251 #define MOVE_MAX 8
252
253 #define INCOMING_RETURN_ADDR_RTX \
254 msp430_incoming_return_addr_rtx ()
255
256 #define RETURN_ADDR_RTX(COUNT, FA) \
257 msp430_return_addr_rtx (COUNT)
258
259 #define SLOW_BYTE_ACCESS 0
260 \f
261
262 /* Register Usage */
263
264 /* gas doesn't recognize PC (R0), SP (R1), and SR (R2) as register
265 names. */
266 #define REGISTER_NAMES \
267 { \
268 "R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7", \
269 "R8", "R9", "R10", "R11", "R12", "R13", "R14", "R15", \
270 "argptr" \
271 }
272
273 /* Allow lowercase "r" to be used in register names instead of upper
274 case "R". */
275 #define ADDITIONAL_REGISTER_NAMES \
276 { \
277 { "r0", 0 }, \
278 { "r1", 1 }, \
279 { "r2", 2 }, \
280 { "r3", 3 }, \
281 { "r4", 4 }, \
282 { "r5", 5 }, \
283 { "r6", 6 }, \
284 { "r7", 7 }, \
285 { "r8", 8 }, \
286 { "r9", 9 }, \
287 { "r10", 10 }, \
288 { "r11", 11 }, \
289 { "r12", 12 }, \
290 { "r13", 13 }, \
291 { "r14", 14 }, \
292 { "r15", 15 } \
293 }
294
295 enum reg_class
296 {
297 NO_REGS,
298 R12_REGS,
299 R13_REGS,
300 GEN_REGS,
301 ALL_REGS,
302 LIM_REG_CLASSES
303 };
304
305 #define REG_CLASS_NAMES \
306 { \
307 "NO_REGS", \
308 "R12_REGS", \
309 "R13_REGS", \
310 "GEN_REGS", \
311 "ALL_REGS" \
312 }
313
314 #define REG_CLASS_CONTENTS \
315 { \
316 0x00000000, \
317 0x00001000, \
318 0x00002000, \
319 0x0000fff3, \
320 0x0001ffff \
321 }
322
323 /* GENERAL_REGS just means that the "g" and "r" constraints can use these
324 registers.
325 Even though R0 (PC) and R1 (SP) are not "general" in that they can be used
326 for any purpose by the register allocator, they are general in that they can
327 be used by any instruction in any addressing mode. */
328 #define GENERAL_REGS GEN_REGS
329 #define BASE_REG_CLASS GEN_REGS
330 #define INDEX_REG_CLASS GEN_REGS
331 #define N_REG_CLASSES (int) LIM_REG_CLASSES
332
333 #define PC_REGNUM 0
334 #define STACK_POINTER_REGNUM 1
335 #define CC_REGNUM 2
336 #define FRAME_POINTER_REGNUM 4 /* not usually used, call preserved */
337 #define ARG_POINTER_REGNUM 16
338 #define STATIC_CHAIN_REGNUM 5 /* FIXME */
339
340 #define FIRST_PSEUDO_REGISTER 17
341
342 #define REGNO_REG_CLASS(REGNO) (REGNO != 2 \
343 && REGNO != 3 \
344 && REGNO < 17 \
345 ? GEN_REGS : NO_REGS)
346
347 #define TRAMPOLINE_SIZE 4 /* FIXME */
348 #define TRAMPOLINE_ALIGNMENT 16 /* FIXME */
349
350 #define ELIMINABLE_REGS \
351 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
352 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM }, \
353 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }}
354
355 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
356 (OFFSET) = msp430_initial_elimination_offset ((FROM), (TO))
357
358
359 #define FUNCTION_ARG_REGNO_P(N) ((N) >= 8 && (N) < ARG_POINTER_REGNUM)
360 #define DEFAULT_PCC_STRUCT_RETURN 0
361
362 /* 1 == register can't be used by gcc, in general
363 0 == register can be used by gcc, in general */
364 #define FIXED_REGISTERS \
365 { \
366 1,0,1,1, 0,0,0,0, \
367 0,0,0,0, 0,0,0,0, \
368 1, \
369 }
370
371 /* 1 == value changes across function calls
372 0 == value is the same after a call */
373 /* R4 through R10 are callee-saved */
374 #define CALL_USED_REGISTERS \
375 { \
376 1,0,1,1, 0,0,0,0, \
377 0,0,0,1, 1,1,1,1, \
378 1, \
379 }
380
381 #define REG_ALLOC_ORDER \
382 { 12, 13, 14, 15, 10, 9, 8, 7, 6, 5, 4, 11, 0, 1, 2, 3, 16 }
383 /* { 11, 15, 14, 13, 12, 10, 9, 8, 7, 6, 5, 4, 0, 1, 2, 3, 16 }*/
384
385 #define REGNO_OK_FOR_BASE_P(regno) 1
386 #define REGNO_OK_FOR_INDEX_P(regno) 1
387
388 \f
389
390 typedef struct
391 {
392 /* These two are the current argument status. */
393 char reg_used[4];
394 #define CA_FIRST_REG 12
395 char can_split;
396 /* These two are temporaries used internally. */
397 char start_reg;
398 char reg_count;
399 char mem_count;
400 char special_p;
401 } CUMULATIVE_ARGS;
402
403 #define INIT_CUMULATIVE_ARGS(CA, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
404 msp430_init_cumulative_args (&CA, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS)
405
406 \f
407 /* FIXME */
408 #define NO_PROFILE_COUNTERS 1
409 #define PROFILE_BEFORE_PROLOGUE 1
410
411 #define FUNCTION_PROFILER(FILE, LABELNO) \
412 fprintf (FILE, "\tcall\t__mcount\n");
413 \f
414 /* Exception Handling */
415
416 /* R12,R13,R14 - EH data
417 R15 - stack adjustment */
418
419 #define EH_RETURN_DATA_REGNO(N) \
420 (((N) < 3) ? ((N) + 12) : INVALID_REGNUM)
421
422 #define EH_RETURN_HANDLER_RTX \
423 gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, gen_rtx_REG (Pmode, SP_REGNO), \
424 gen_rtx_REG (Pmode, 15)))
425
426 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 15)
427
428 #define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) DW_EH_PE_udata4
429
430 \f
431 /* Stack Layout and Calling Conventions */
432
433 \f
434 /* Addressing Modes */
435
436 \f
437
438 #define TEXT_SECTION_ASM_OP ".text"
439 #define DATA_SECTION_ASM_OP ".data"
440 #define BSS_SECTION_ASM_OP "\t.section .bss"
441
442 #define ASM_COMMENT_START " ;"
443 #define ASM_APP_ON ""
444 #define ASM_APP_OFF ""
445 #define LOCAL_LABEL_PREFIX ".L"
446 #undef USER_LABEL_PREFIX
447 #define USER_LABEL_PREFIX ""
448
449 #define GLOBAL_ASM_OP "\t.global\t"
450
451 #define ASM_OUTPUT_LABELREF(FILE, SYM) msp430_output_labelref ((FILE), (SYM))
452
453 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
454 fprintf (FILE, "\t.long .L%d\n", VALUE)
455
456 /* This is how to output an element of a case-vector that is relative.
457 Note: The local label referenced by the "3b" below is emitted by
458 the tablejump insn. */
459
460 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
461 fprintf (FILE, "\t.long .L%d - 1b\n", VALUE)
462
463
464 #define ASM_OUTPUT_ALIGN(STREAM, LOG) \
465 do \
466 { \
467 if ((LOG) == 0) \
468 break; \
469 fprintf (STREAM, "\t.balign %d\n", 1 << (LOG)); \
470 } \
471 while (0)
472
473 #define JUMP_TABLES_IN_TEXT_SECTION 1
474 \f
475 #undef DWARF2_ADDR_SIZE
476 #define DWARF2_ADDR_SIZE 4
477
478 #define INCOMING_FRAME_SP_OFFSET (TARGET_LARGE ? 4 : 2)
479
480 #undef PREFERRED_DEBUGGING_TYPE
481 #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
482
483 #define DWARF2_ASM_LINE_DEBUG_INFO 1
484
485 /* Prevent reload (and others) from choosing HImode stack slots
486 when spilling hard registers when they may contain PSImode values. */
487 #define HARD_REGNO_CALLER_SAVE_MODE(REGNO,NREGS,MODE) \
488 ((TARGET_LARGE && ((NREGS) <= 2)) ? PSImode \
489 : choose_hard_reg_mode ((REGNO), (NREGS), NULL))
490
491 #define ACCUMULATE_OUTGOING_ARGS 1
492
493 #define HAVE_POST_INCREMENT 1
494
495 /* This (unsurprisingly) improves code size in the vast majority of cases, we
496 want to prevent any instructions using a "store post increment" from being
497 generated. These will have to later be reloaded since msp430 does not
498 support post inc for the destination operand. */
499 #define USE_STORE_POST_INCREMENT(MODE) 0
500
501 /* Many other targets set USE_LOAD_POST_INCREMENT to 0. For msp430-elf
502 the benefit of disabling it is not clear. When looking at code size, on
503 average, there is a slight advantage to leaving it enabled. */
504
505 #undef ASM_DECLARE_FUNCTION_NAME
506 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
507 msp430_start_function ((FILE), (NAME), (DECL))
508
509 #define TARGET_HAS_NO_HW_DIVIDE (! TARGET_HWMULT)
510
511 void msp430_register_pre_includes (const char *sysroot ATTRIBUTE_UNUSED,
512 const char *iprefix ATTRIBUTE_UNUSED,
513 int stdinc ATTRIBUTE_UNUSED);
514 #undef TARGET_EXTRA_PRE_INCLUDES
515 #define TARGET_EXTRA_PRE_INCLUDES msp430_register_pre_includes
516
517 #undef USE_SELECT_SECTION_FOR_FUNCTIONS
518 #define USE_SELECT_SECTION_FOR_FUNCTIONS 1
519
520 #define ASM_OUTPUT_ALIGNED_DECL_COMMON(FILE, DECL, NAME, SIZE, ALIGN) \
521 msp430_output_aligned_decl_common ((FILE), (DECL), (NAME), (SIZE), (ALIGN))
522
523 #define SYMBOL_FLAG_LOW_MEM (SYMBOL_FLAG_MACH_DEP << 0)