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1 ;; Code and mode itertator and attribute definitions
2 ;; of Andes NDS32 cpu for GNU compiler
3 ;; Copyright (C) 2012-2023 Free Software Foundation, Inc.
4 ;; Contributed by Andes Technology Corporation.
5 ;;
6 ;; This file is part of GCC.
7 ;;
8 ;; GCC is free software; you can redistribute it and/or modify it
9 ;; under the terms of the GNU General Public License as published
10 ;; by the Free Software Foundation; either version 3, or (at your
11 ;; option) any later version.
12 ;;
13 ;; GCC is distributed in the hope that it will be useful, but WITHOUT
14 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 ;; License for more details.
17 ;;
18 ;; You should have received a copy of the GNU General Public License
19 ;; along with GCC; see the file COPYING3. If not see
20 ;; <http://www.gnu.org/licenses/>.
21
22 ;;----------------------------------------------------------------------------
23 ;; Mode iterators.
24 ;;----------------------------------------------------------------------------
25
26 ;; A list of integer modes that are up to one word long.
27 (define_mode_iterator QIHISI [QI HI SI])
28
29 ;; A list of integer modes for one word and double word.
30 (define_mode_iterator SIDI [SI DI])
31
32 ;; A list of integer modes that are up to one half-word long.
33 (define_mode_iterator QIHI [QI HI])
34
35 ;; A list of the modes that are up to double-word long.
36 (define_mode_iterator DIDF [DI DF])
37
38 ;; A list of the modes that are up to one word long vector.
39 (define_mode_iterator VQIHI [V4QI V2HI])
40
41 ;; A list of the modes that are up to one word long vector
42 ;; and scalar for varies mode.
43 (define_mode_iterator VSHI [V2HI HI])
44 (define_mode_iterator VSQIHI [V4QI V2HI QI HI])
45 (define_mode_iterator VSQIHIDI [V4QI V2HI QI HI DI])
46 (define_mode_iterator VQIHIDI [V4QI V2HI DI])
47
48 ;; A list of the modes that are up to double-word long.
49 (define_mode_iterator ANYF [(SF "TARGET_FPU_SINGLE")
50 (DF "TARGET_FPU_DOUBLE")])
51
52 ;;----------------------------------------------------------------------------
53 ;; Mode attributes.
54 ;;----------------------------------------------------------------------------
55
56 (define_mode_attr size [(QI "b") (HI "h") (SI "w") (SF "s") (DF "d")])
57
58 (define_mode_attr byte [(QI "1") (HI "2") (SI "4") (V4QI "4") (V2HI "4")])
59
60 (define_mode_attr bits [(V4QI "8") (QI "8") (V2HI "16") (HI "16") (DI "64")])
61
62 (define_mode_attr VELT [(V4QI "QI") (V2HI "HI")])
63
64 ;;----------------------------------------------------------------------------
65 ;; Code iterators.
66 ;;----------------------------------------------------------------------------
67
68 ;; shifts
69 (define_code_iterator shift_rotate [ashift ashiftrt lshiftrt rotatert])
70
71 (define_code_iterator shifts [ashift ashiftrt lshiftrt])
72
73 (define_code_iterator shiftrt [ashiftrt lshiftrt])
74
75 (define_code_iterator sat_plus [ss_plus us_plus])
76
77 (define_code_iterator all_plus [plus ss_plus us_plus])
78
79 (define_code_iterator sat_minus [ss_minus us_minus])
80
81 (define_code_iterator all_minus [minus ss_minus us_minus])
82
83 (define_code_iterator plus_minus [plus minus])
84
85 (define_code_iterator extend [sign_extend zero_extend])
86
87 (define_code_iterator sumax [smax umax])
88
89 (define_code_iterator sumin [smin umin])
90
91 (define_code_iterator sumin_max [smax umax smin umin])
92
93 ;;----------------------------------------------------------------------------
94 ;; Code attributes.
95 ;;----------------------------------------------------------------------------
96
97 ;; shifts
98 (define_code_attr shift
99 [(ashift "ashl") (ashiftrt "ashr") (lshiftrt "lshr") (rotatert "rotr")])
100
101 (define_code_attr su
102 [(ashiftrt "") (lshiftrt "u") (sign_extend "s") (zero_extend "u")])
103
104 (define_code_attr zs
105 [(sign_extend "s") (zero_extend "z")])
106
107 (define_code_attr uk
108 [(plus "") (ss_plus "k") (us_plus "uk")
109 (minus "") (ss_minus "k") (us_minus "uk")])
110
111 (define_code_attr opcode
112 [(plus "add") (minus "sub") (smax "smax") (umax "umax") (smin "smin") (umin "umin")])
113
114 (define_code_attr add_rsub
115 [(plus "a") (minus "rs")])
116
117 (define_code_attr add_sub
118 [(plus "a") (minus "s")])
119
120 ;;----------------------------------------------------------------------------