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1 /* Subroutines used for calculate rtx costs of Andes NDS32 cpu for GNU compiler
2 Copyright (C) 2012-2015 Free Software Foundation, Inc.
3 Contributed by Andes Technology Corporation.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published
9 by the Free Software Foundation; either version 3, or (at your
10 option) any later version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
20
21 /* ------------------------------------------------------------------------ */
22
23 #include "config.h"
24 #include "system.h"
25 #include "coretypes.h"
26 #include "tm.h"
27 #include "hash-set.h"
28 #include "machmode.h"
29 #include "vec.h"
30 #include "double-int.h"
31 #include "input.h"
32 #include "alias.h"
33 #include "symtab.h"
34 #include "wide-int.h"
35 #include "inchash.h"
36 #include "tree.h"
37 #include "stor-layout.h"
38 #include "varasm.h"
39 #include "calls.h"
40 #include "rtl.h"
41 #include "regs.h"
42 #include "hard-reg-set.h"
43 #include "insn-config.h" /* Required by recog.h. */
44 #include "conditions.h"
45 #include "output.h"
46 #include "insn-attr.h" /* For DFA state_t. */
47 #include "insn-codes.h" /* For CODE_FOR_xxx. */
48 #include "reload.h" /* For push_reload(). */
49 #include "flags.h"
50 #include "input.h"
51 #include "function.h"
52 #include "expr.h"
53 #include "recog.h"
54 #include "diagnostic-core.h"
55 #include "dominance.h"
56 #include "cfg.h"
57 #include "cfgrtl.h"
58 #include "cfganal.h"
59 #include "lcm.h"
60 #include "cfgbuild.h"
61 #include "cfgcleanup.h"
62 #include "predict.h"
63 #include "basic-block.h"
64 #include "df.h"
65 #include "tm_p.h"
66 #include "tm-constrs.h"
67 #include "optabs.h" /* For GEN_FCN. */
68 #include "target.h"
69 #include "target-def.h"
70 #include "langhooks.h" /* For add_builtin_function(). */
71 #include "ggc.h"
72 #include "builtins.h"
73
74 /* ------------------------------------------------------------------------ */
75
76 bool
77 nds32_rtx_costs_impl (rtx x,
78 int code,
79 int outer_code,
80 int opno ATTRIBUTE_UNUSED,
81 int *total,
82 bool speed)
83 {
84 /* According to 'speed', goto suitable cost model section. */
85 if (speed)
86 goto performance_cost;
87 else
88 goto size_cost;
89
90
91 performance_cost:
92 /* This is section for performance cost model. */
93
94 /* In gcc/rtl.h, the default value of COSTS_N_INSNS(N) is N*4.
95 We treat it as 4-cycle cost for each instruction
96 under performance consideration. */
97 switch (code)
98 {
99 case SET:
100 /* For 'SET' rtx, we need to return false
101 so that it can recursively calculate costs. */
102 return false;
103
104 case USE:
105 /* Used in combine.c as a marker. */
106 *total = 0;
107 break;
108
109 case MULT:
110 *total = COSTS_N_INSNS (1);
111 break;
112
113 case DIV:
114 case UDIV:
115 case MOD:
116 case UMOD:
117 *total = COSTS_N_INSNS (7);
118 break;
119
120 default:
121 *total = COSTS_N_INSNS (1);
122 break;
123 }
124
125 return true;
126
127
128 size_cost:
129 /* This is section for size cost model. */
130
131 /* In gcc/rtl.h, the default value of COSTS_N_INSNS(N) is N*4.
132 We treat it as 4-byte cost for each instruction
133 under code size consideration. */
134 switch (code)
135 {
136 case SET:
137 /* For 'SET' rtx, we need to return false
138 so that it can recursively calculate costs. */
139 return false;
140
141 case USE:
142 /* Used in combine.c as a marker. */
143 *total = 0;
144 break;
145
146 case CONST_INT:
147 /* All instructions involving constant operation
148 need to be considered for cost evaluation. */
149 if (outer_code == SET)
150 {
151 /* (set X imm5s), use movi55, 2-byte cost.
152 (set X imm20s), use movi, 4-byte cost.
153 (set X BIG_INT), use sethi/ori, 8-byte cost. */
154 if (satisfies_constraint_Is05 (x))
155 *total = COSTS_N_INSNS (1) - 2;
156 else if (satisfies_constraint_Is20 (x))
157 *total = COSTS_N_INSNS (1);
158 else
159 *total = COSTS_N_INSNS (2);
160 }
161 else if (outer_code == PLUS || outer_code == MINUS)
162 {
163 /* Possible addi333/subi333 or subi45/addi45, 2-byte cost.
164 General case, cost 1 instruction with 4-byte. */
165 if (satisfies_constraint_Iu05 (x))
166 *total = COSTS_N_INSNS (1) - 2;
167 else
168 *total = COSTS_N_INSNS (1);
169 }
170 else if (outer_code == ASHIFT)
171 {
172 /* Possible slli333, 2-byte cost.
173 General case, cost 1 instruction with 4-byte. */
174 if (satisfies_constraint_Iu03 (x))
175 *total = COSTS_N_INSNS (1) - 2;
176 else
177 *total = COSTS_N_INSNS (1);
178 }
179 else if (outer_code == ASHIFTRT || outer_code == LSHIFTRT)
180 {
181 /* Possible srai45 or srli45, 2-byte cost.
182 General case, cost 1 instruction with 4-byte. */
183 if (satisfies_constraint_Iu05 (x))
184 *total = COSTS_N_INSNS (1) - 2;
185 else
186 *total = COSTS_N_INSNS (1);
187 }
188 else
189 {
190 /* For other cases, simply set it 4-byte cost. */
191 *total = COSTS_N_INSNS (1);
192 }
193 break;
194
195 case CONST_DOUBLE:
196 /* It requires high part and low part processing, set it 8-byte cost. */
197 *total = COSTS_N_INSNS (2);
198 break;
199
200 default:
201 /* For other cases, generally we set it 4-byte cost
202 and stop resurively traversing. */
203 *total = COSTS_N_INSNS (1);
204 break;
205 }
206
207 return true;
208 }
209
210 int
211 nds32_address_cost_impl (rtx address,
212 machine_mode mode ATTRIBUTE_UNUSED,
213 addr_space_t as ATTRIBUTE_UNUSED,
214 bool speed)
215 {
216 rtx plus0, plus1;
217 enum rtx_code code;
218
219 code = GET_CODE (address);
220
221 /* According to 'speed', goto suitable cost model section. */
222 if (speed)
223 goto performance_cost;
224 else
225 goto size_cost;
226
227 performance_cost:
228 /* This is section for performance cost model. */
229
230 /* FALLTHRU, currently we use same cost model as size_cost. */
231
232 size_cost:
233 /* This is section for size cost model. */
234
235 switch (code)
236 {
237 case POST_MODIFY:
238 case POST_INC:
239 case POST_DEC:
240 /* We encourage that rtx contains
241 POST_MODIFY/POST_INC/POST_DEC behavior. */
242 return 0;
243
244 case SYMBOL_REF:
245 /* We can have gp-relative load/store for symbol_ref.
246 Have it 4-byte cost. */
247 return COSTS_N_INSNS (1);
248
249 case CONST:
250 /* It is supposed to be the pattern (const (plus symbol_ref const_int)).
251 Have it 4-byte cost. */
252 return COSTS_N_INSNS (1);
253
254 case REG:
255 /* Simply return 4-byte costs. */
256 return COSTS_N_INSNS (1);
257
258 case PLUS:
259 /* We do not need to check if the address is a legitimate address,
260 because this hook is never called with an invalid address.
261 But we better check the range of
262 const_int value for cost, if it exists. */
263 plus0 = XEXP (address, 0);
264 plus1 = XEXP (address, 1);
265
266 if (REG_P (plus0) && CONST_INT_P (plus1))
267 {
268 /* If it is possible to be lwi333/swi333 form,
269 make it 2-byte cost. */
270 if (satisfies_constraint_Iu05 (plus1))
271 return (COSTS_N_INSNS (1) - 2);
272 else
273 return COSTS_N_INSNS (1);
274 }
275
276 /* For other 'plus' situation, make it cost 4-byte. */
277 return COSTS_N_INSNS (1);
278
279 default:
280 break;
281 }
282
283 return COSTS_N_INSNS (4);
284 }
285
286 /* ------------------------------------------------------------------------ */