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target.def (rtx_costs): Remove "code" param, add "mode".
[thirdparty/gcc.git] / gcc / config / nds32 / nds32-cost.c
1 /* Subroutines used for calculate rtx costs of Andes NDS32 cpu for GNU compiler
2 Copyright (C) 2012-2015 Free Software Foundation, Inc.
3 Contributed by Andes Technology Corporation.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published
9 by the Free Software Foundation; either version 3, or (at your
10 option) any later version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
20
21 /* ------------------------------------------------------------------------ */
22
23 #include "config.h"
24 #include "system.h"
25 #include "coretypes.h"
26 #include "backend.h"
27 #include "tree.h"
28 #include "rtl.h"
29 #include "df.h"
30 #include "alias.h"
31 #include "stor-layout.h"
32 #include "varasm.h"
33 #include "calls.h"
34 #include "regs.h"
35 #include "insn-config.h" /* Required by recog.h. */
36 #include "conditions.h"
37 #include "output.h"
38 #include "insn-attr.h" /* For DFA state_t. */
39 #include "insn-codes.h" /* For CODE_FOR_xxx. */
40 #include "reload.h" /* For push_reload(). */
41 #include "flags.h"
42 #include "insn-config.h"
43 #include "expmed.h"
44 #include "dojump.h"
45 #include "explow.h"
46 #include "emit-rtl.h"
47 #include "stmt.h"
48 #include "expr.h"
49 #include "recog.h"
50 #include "diagnostic-core.h"
51 #include "cfgrtl.h"
52 #include "cfganal.h"
53 #include "lcm.h"
54 #include "cfgbuild.h"
55 #include "cfgcleanup.h"
56 #include "tm_p.h"
57 #include "tm-constrs.h"
58 #include "optabs.h" /* For GEN_FCN. */
59 #include "target.h"
60 #include "langhooks.h" /* For add_builtin_function(). */
61 #include "builtins.h"
62
63 /* ------------------------------------------------------------------------ */
64
65 bool
66 nds32_rtx_costs_impl (rtx x,
67 machine_mode mode ATTRIBUTE_UNUSED,
68 int outer_code,
69 int opno ATTRIBUTE_UNUSED,
70 int *total,
71 bool speed)
72 {
73 int code = GET_CODE (x);
74
75 /* According to 'speed', goto suitable cost model section. */
76 if (speed)
77 goto performance_cost;
78 else
79 goto size_cost;
80
81
82 performance_cost:
83 /* This is section for performance cost model. */
84
85 /* In gcc/rtl.h, the default value of COSTS_N_INSNS(N) is N*4.
86 We treat it as 4-cycle cost for each instruction
87 under performance consideration. */
88 switch (code)
89 {
90 case SET:
91 /* For 'SET' rtx, we need to return false
92 so that it can recursively calculate costs. */
93 return false;
94
95 case USE:
96 /* Used in combine.c as a marker. */
97 *total = 0;
98 break;
99
100 case MULT:
101 *total = COSTS_N_INSNS (1);
102 break;
103
104 case DIV:
105 case UDIV:
106 case MOD:
107 case UMOD:
108 *total = COSTS_N_INSNS (7);
109 break;
110
111 default:
112 *total = COSTS_N_INSNS (1);
113 break;
114 }
115
116 return true;
117
118
119 size_cost:
120 /* This is section for size cost model. */
121
122 /* In gcc/rtl.h, the default value of COSTS_N_INSNS(N) is N*4.
123 We treat it as 4-byte cost for each instruction
124 under code size consideration. */
125 switch (code)
126 {
127 case SET:
128 /* For 'SET' rtx, we need to return false
129 so that it can recursively calculate costs. */
130 return false;
131
132 case USE:
133 /* Used in combine.c as a marker. */
134 *total = 0;
135 break;
136
137 case CONST_INT:
138 /* All instructions involving constant operation
139 need to be considered for cost evaluation. */
140 if (outer_code == SET)
141 {
142 /* (set X imm5s), use movi55, 2-byte cost.
143 (set X imm20s), use movi, 4-byte cost.
144 (set X BIG_INT), use sethi/ori, 8-byte cost. */
145 if (satisfies_constraint_Is05 (x))
146 *total = COSTS_N_INSNS (1) - 2;
147 else if (satisfies_constraint_Is20 (x))
148 *total = COSTS_N_INSNS (1);
149 else
150 *total = COSTS_N_INSNS (2);
151 }
152 else if (outer_code == PLUS || outer_code == MINUS)
153 {
154 /* Possible addi333/subi333 or subi45/addi45, 2-byte cost.
155 General case, cost 1 instruction with 4-byte. */
156 if (satisfies_constraint_Iu05 (x))
157 *total = COSTS_N_INSNS (1) - 2;
158 else
159 *total = COSTS_N_INSNS (1);
160 }
161 else if (outer_code == ASHIFT)
162 {
163 /* Possible slli333, 2-byte cost.
164 General case, cost 1 instruction with 4-byte. */
165 if (satisfies_constraint_Iu03 (x))
166 *total = COSTS_N_INSNS (1) - 2;
167 else
168 *total = COSTS_N_INSNS (1);
169 }
170 else if (outer_code == ASHIFTRT || outer_code == LSHIFTRT)
171 {
172 /* Possible srai45 or srli45, 2-byte cost.
173 General case, cost 1 instruction with 4-byte. */
174 if (satisfies_constraint_Iu05 (x))
175 *total = COSTS_N_INSNS (1) - 2;
176 else
177 *total = COSTS_N_INSNS (1);
178 }
179 else
180 {
181 /* For other cases, simply set it 4-byte cost. */
182 *total = COSTS_N_INSNS (1);
183 }
184 break;
185
186 case CONST_DOUBLE:
187 /* It requires high part and low part processing, set it 8-byte cost. */
188 *total = COSTS_N_INSNS (2);
189 break;
190
191 default:
192 /* For other cases, generally we set it 4-byte cost
193 and stop resurively traversing. */
194 *total = COSTS_N_INSNS (1);
195 break;
196 }
197
198 return true;
199 }
200
201 int
202 nds32_address_cost_impl (rtx address,
203 machine_mode mode ATTRIBUTE_UNUSED,
204 addr_space_t as ATTRIBUTE_UNUSED,
205 bool speed)
206 {
207 rtx plus0, plus1;
208 enum rtx_code code;
209
210 code = GET_CODE (address);
211
212 /* According to 'speed', goto suitable cost model section. */
213 if (speed)
214 goto performance_cost;
215 else
216 goto size_cost;
217
218 performance_cost:
219 /* This is section for performance cost model. */
220
221 /* FALLTHRU, currently we use same cost model as size_cost. */
222
223 size_cost:
224 /* This is section for size cost model. */
225
226 switch (code)
227 {
228 case POST_MODIFY:
229 case POST_INC:
230 case POST_DEC:
231 /* We encourage that rtx contains
232 POST_MODIFY/POST_INC/POST_DEC behavior. */
233 return 0;
234
235 case SYMBOL_REF:
236 /* We can have gp-relative load/store for symbol_ref.
237 Have it 4-byte cost. */
238 return COSTS_N_INSNS (1);
239
240 case CONST:
241 /* It is supposed to be the pattern (const (plus symbol_ref const_int)).
242 Have it 4-byte cost. */
243 return COSTS_N_INSNS (1);
244
245 case REG:
246 /* Simply return 4-byte costs. */
247 return COSTS_N_INSNS (1);
248
249 case PLUS:
250 /* We do not need to check if the address is a legitimate address,
251 because this hook is never called with an invalid address.
252 But we better check the range of
253 const_int value for cost, if it exists. */
254 plus0 = XEXP (address, 0);
255 plus1 = XEXP (address, 1);
256
257 if (REG_P (plus0) && CONST_INT_P (plus1))
258 {
259 /* If it is possible to be lwi333/swi333 form,
260 make it 2-byte cost. */
261 if (satisfies_constraint_Iu05 (plus1))
262 return (COSTS_N_INSNS (1) - 2);
263 else
264 return COSTS_N_INSNS (1);
265 }
266
267 /* For other 'plus' situation, make it cost 4-byte. */
268 return COSTS_N_INSNS (1);
269
270 default:
271 break;
272 }
273
274 return COSTS_N_INSNS (4);
275 }
276
277 /* ------------------------------------------------------------------------ */