]> git.ipfire.org Git - thirdparty/gcc.git/blob - gcc/config/nds32/nds32-memory-manipulation.c
2014-10-16 Andrew MacLeod <amacleod@redhat.com>
[thirdparty/gcc.git] / gcc / config / nds32 / nds32-memory-manipulation.c
1 /* Auxiliary functions for expand movmem, setmem, cmpmem, load_multiple
2 and store_multiple pattern of Andes NDS32 cpu for GNU compiler
3 Copyright (C) 2012-2014 Free Software Foundation, Inc.
4 Contributed by Andes Technology Corporation.
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify it
9 under the terms of the GNU General Public License as published
10 by the Free Software Foundation; either version 3, or (at your
11 option) any later version.
12
13 GCC is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
21
22 /* ------------------------------------------------------------------------ */
23
24 #include "config.h"
25 #include "system.h"
26 #include "coretypes.h"
27 #include "tm.h"
28 #include "tree.h"
29 #include "stor-layout.h"
30 #include "varasm.h"
31 #include "calls.h"
32 #include "rtl.h"
33 #include "regs.h"
34 #include "hard-reg-set.h"
35 #include "insn-config.h" /* Required by recog.h. */
36 #include "conditions.h"
37 #include "output.h"
38 #include "insn-attr.h" /* For DFA state_t. */
39 #include "insn-codes.h" /* For CODE_FOR_xxx. */
40 #include "reload.h" /* For push_reload(). */
41 #include "flags.h"
42 #include "hashtab.h"
43 #include "hash-set.h"
44 #include "vec.h"
45 #include "machmode.h"
46 #include "input.h"
47 #include "function.h"
48 #include "expr.h"
49 #include "recog.h"
50 #include "diagnostic-core.h"
51 #include "df.h"
52 #include "tm_p.h"
53 #include "tm-constrs.h"
54 #include "optabs.h" /* For GEN_FCN. */
55 #include "target.h"
56 #include "target-def.h"
57 #include "langhooks.h" /* For add_builtin_function(). */
58 #include "ggc.h"
59 #include "builtins.h"
60
61 /* ------------------------------------------------------------------------ */
62
63 /* Functions to expand load_multiple and store_multiple.
64 They are auxiliary extern functions to help create rtx template.
65 Check nds32-multiple.md file for the patterns. */
66 rtx
67 nds32_expand_load_multiple (int base_regno, int count,
68 rtx base_addr, rtx basemem)
69 {
70 int par_index;
71 int offset;
72 rtx result;
73 rtx new_addr, mem, reg;
74
75 /* Create the pattern that is presented in nds32-multiple.md. */
76
77 result = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (count));
78
79 for (par_index = 0; par_index < count; par_index++)
80 {
81 offset = par_index * 4;
82 /* 4-byte for loading data to each register. */
83 new_addr = plus_constant (Pmode, base_addr, offset);
84 mem = adjust_automodify_address_nv (basemem, SImode,
85 new_addr, offset);
86 reg = gen_rtx_REG (SImode, base_regno + par_index);
87
88 XVECEXP (result, 0, par_index) = gen_rtx_SET (VOIDmode, reg, mem);
89 }
90
91 return result;
92 }
93
94 rtx
95 nds32_expand_store_multiple (int base_regno, int count,
96 rtx base_addr, rtx basemem)
97 {
98 int par_index;
99 int offset;
100 rtx result;
101 rtx new_addr, mem, reg;
102
103 /* Create the pattern that is presented in nds32-multiple.md. */
104
105 result = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (count));
106
107 for (par_index = 0; par_index < count; par_index++)
108 {
109 offset = par_index * 4;
110 /* 4-byte for storing data to memory. */
111 new_addr = plus_constant (Pmode, base_addr, offset);
112 mem = adjust_automodify_address_nv (basemem, SImode,
113 new_addr, offset);
114 reg = gen_rtx_REG (SImode, base_regno + par_index);
115
116 XVECEXP (result, 0, par_index) = gen_rtx_SET (VOIDmode, mem, reg);
117 }
118
119 return result;
120 }
121
122 /* Function to move block memory content by
123 using load_multiple and store_multiple.
124 This is auxiliary extern function to help create rtx template.
125 Check nds32-multiple.md file for the patterns. */
126 int
127 nds32_expand_movmemqi (rtx dstmem, rtx srcmem, rtx total_bytes, rtx alignment)
128 {
129 HOST_WIDE_INT in_words, out_words;
130 rtx dst_base_reg, src_base_reg;
131 int maximum_bytes;
132
133 /* Because reduced-set regsiters has few registers
134 (r0~r5, r6~10, r15, r28~r31, where 'r15' and 'r28~r31'
135 cannot be used for register allocation),
136 using 8 registers (32 bytes) for moving memory block
137 may easily consume all of them.
138 It makes register allocation/spilling hard to work.
139 So we only allow maximum=4 registers (16 bytes) for
140 moving memory block under reduced-set registers. */
141 if (TARGET_REDUCED_REGS)
142 maximum_bytes = 16;
143 else
144 maximum_bytes = 32;
145
146 /* 1. Total_bytes is integer for sure.
147 2. Alignment is integer for sure.
148 3. Maximum 4 or 8 registers, 4 * 4 = 16 bytes, 8 * 4 = 32 bytes.
149 4. Requires (n * 4) block size.
150 5. Requires 4-byte alignment. */
151 if (GET_CODE (total_bytes) != CONST_INT
152 || GET_CODE (alignment) != CONST_INT
153 || INTVAL (total_bytes) > maximum_bytes
154 || INTVAL (total_bytes) & 3
155 || INTVAL (alignment) & 3)
156 return 0;
157
158 dst_base_reg = copy_to_mode_reg (SImode, XEXP (dstmem, 0));
159 src_base_reg = copy_to_mode_reg (SImode, XEXP (srcmem, 0));
160
161 out_words = in_words = INTVAL (total_bytes) / UNITS_PER_WORD;
162
163 emit_insn (nds32_expand_load_multiple (0, in_words, src_base_reg, srcmem));
164 emit_insn (nds32_expand_store_multiple (0, out_words, dst_base_reg, dstmem));
165
166 /* Successfully create patterns, return 1. */
167 return 1;
168 }
169
170 /* ------------------------------------------------------------------------ */