1 /* Target Code for OpenRISC
2 Copyright (C) 2018-2019 Free Software Foundation, Inc.
3 Contributed by Stafford Horne based on other ports.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published
9 by the Free Software Foundation; either version 3, or (at your
10 option) any later version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
21 #define IN_TARGET_CODE 1
25 #include "coretypes.h"
30 #include "stringpool.h"
36 #include "diagnostic-core.h"
38 #include "stor-layout.h"
48 /* These 4 are needed to allow using satisfies_constraint_J. */
49 #include "insn-config.h"
52 #include "tm-constrs.h"
54 /* This file should be included last. */
55 #include "target-def.h"
57 /* Per-function machine data. */
58 struct GTY(()) machine_function
60 /* Number of bytes saved on the stack for callee saved registers. */
61 HOST_WIDE_INT callee_saved_reg_size
;
63 /* Number of bytes saved on the stack for local variables. */
64 HOST_WIDE_INT local_vars_size
;
66 /* Number of bytes saved on the stack for outgoing/sub-function args. */
67 HOST_WIDE_INT args_size
;
69 /* The sum of sizes: locals vars, called saved regs, stack pointer
70 and an optional frame pointer.
71 Used in expand_prologue () and expand_epilogue (). */
72 HOST_WIDE_INT total_size
;
74 /* Remember where the set_got_placeholder is located. */
75 rtx_insn
*set_got_insn
;
78 /* Zero initialization is OK for all current fields. */
80 static struct machine_function
*
81 or1k_init_machine_status (void)
83 return ggc_cleared_alloc
<machine_function
> ();
87 /* Worker for TARGET_OPTION_OVERRIDE.
88 We currently only use this to setup init_machine_status. */
91 or1k_option_override (void)
93 /* Set the per-function-data initializer. */
94 init_machine_status
= or1k_init_machine_status
;
97 /* Returns true if REGNO must be saved for the current function. */
100 callee_saved_regno_p (int regno
)
102 /* Check call-saved registers. */
103 if (!call_used_regs
[regno
] && df_regs_ever_live_p (regno
))
108 case HARD_FRAME_POINTER_REGNUM
:
109 return frame_pointer_needed
;
112 /* Always save LR if we are saving HFP, producing a walkable
113 stack chain with -fno-omit-frame-pointer. */
114 return (frame_pointer_needed
116 || crtl
->uses_pic_offset_table
117 || df_regs_ever_live_p (regno
));
119 case HW_TO_GCC_REGNO (25):
120 case HW_TO_GCC_REGNO (27):
121 case HW_TO_GCC_REGNO (29):
122 case HW_TO_GCC_REGNO (31):
123 /* See EH_RETURN_DATA_REGNO. */
124 return crtl
->calls_eh_return
;
131 /* Worker for TARGET_COMPUTE_FRAME_LAYOUT.
132 Compute and populate machine specific function attributes which are globally
133 accessible via cfun->machine. These include the sizes needed for
134 stack stored local variables, callee saved registers and space for stack
135 arguments which may be passed to a next function. The values are used for
136 the epilogue, prologue and eliminations.
138 OpenRISC stack grows downwards and contains:
140 ---- previous frame --------
142 current func arg[0] <-- r2 [HFP,AP]
143 ---- current stack frame --- ^ ---\
144 return address r9 | |
145 old frame pointer r2 (+) |-- machine->total_size
146 callee saved regs | | > machine->callee_saved_reg_size
147 local variables | | > machine->local_vars_size <-FP
148 next function args <-- r1 [SP]---/ > machine->args_size
149 ---------------------------- |
154 All of these contents are optional. */
157 or1k_compute_frame_layout (void)
159 HOST_WIDE_INT local_vars_size
, args_size
, save_reg_size
;
161 local_vars_size
= get_frame_size ();
162 local_vars_size
= ROUND_UP (local_vars_size
, UNITS_PER_WORD
);
164 args_size
= crtl
->outgoing_args_size
;
165 args_size
= ROUND_UP (args_size
, UNITS_PER_WORD
);
168 for (int regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
169 if (callee_saved_regno_p (regno
))
170 save_reg_size
+= UNITS_PER_WORD
;
172 cfun
->machine
->local_vars_size
= local_vars_size
;
173 cfun
->machine
->args_size
= args_size
;
174 cfun
->machine
->callee_saved_reg_size
= save_reg_size
;
175 cfun
->machine
->total_size
= save_reg_size
+ local_vars_size
+ args_size
;
178 /* Emit rtl to save register REGNO contents to stack memory at the given OFFSET
179 from the current stack pointer. */
182 or1k_save_reg (int regno
, HOST_WIDE_INT offset
)
184 rtx reg
= gen_rtx_REG (Pmode
, regno
);
185 rtx mem
= gen_frame_mem (SImode
, plus_constant (Pmode
, stack_pointer_rtx
,
187 rtx insn
= emit_move_insn (mem
, reg
);
188 RTX_FRAME_RELATED_P (insn
) = 1;
191 /* Emit rtl to restore register REGNO contents from stack memory at the given
192 OFFSET from the current stack pointer. */
195 or1k_restore_reg (int regno
, HOST_WIDE_INT offset
, rtx cfa_restores
)
197 rtx reg
= gen_rtx_REG (Pmode
, regno
);
198 rtx mem
= gen_frame_mem (SImode
, plus_constant (Pmode
, stack_pointer_rtx
,
200 emit_move_insn (reg
, mem
);
201 return alloc_reg_note (REG_CFA_RESTORE
, reg
, cfa_restores
);
204 /* Expand the "prologue" pattern. */
207 or1k_expand_prologue (void)
209 HOST_WIDE_INT sp_offset
= -cfun
->machine
->total_size
;
210 HOST_WIDE_INT reg_offset
, this_offset
;
213 if (flag_stack_usage_info
)
214 current_function_static_stack_size
= -sp_offset
;
216 /* Early exit for frameless functions. */
220 /* Adjust the stack pointer. For large stack offsets we will
221 do this in multiple parts, before and after saving registers. */
222 reg_offset
= (sp_offset
+ cfun
->machine
->local_vars_size
223 + cfun
->machine
->args_size
);
224 this_offset
= MAX (sp_offset
, -32764);
225 reg_offset
-= this_offset
;
226 sp_offset
-= this_offset
;
228 insn
= emit_insn (gen_frame_addsi3 (stack_pointer_rtx
, stack_pointer_rtx
,
229 GEN_INT (this_offset
)));
230 RTX_FRAME_RELATED_P (insn
) = 1;
232 /* Save callee-saved registers. */
233 for (int regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
234 if (regno
!= HARD_FRAME_POINTER_REGNUM
235 && regno
!= LR_REGNUM
236 && callee_saved_regno_p (regno
))
238 or1k_save_reg (regno
, reg_offset
);
239 reg_offset
+= UNITS_PER_WORD
;
242 /* Save and update frame pointer. */
243 if (callee_saved_regno_p (HARD_FRAME_POINTER_REGNUM
))
245 or1k_save_reg (HARD_FRAME_POINTER_REGNUM
, reg_offset
);
246 if (frame_pointer_needed
)
248 insn
= emit_insn (gen_addsi3 (hard_frame_pointer_rtx
,
250 GEN_INT (-this_offset
)));
251 RTX_FRAME_RELATED_P (insn
) = 1;
253 reg_offset
+= UNITS_PER_WORD
;
256 /* Save the link register. */
257 if (callee_saved_regno_p (LR_REGNUM
))
259 or1k_save_reg (LR_REGNUM
, reg_offset
);
260 reg_offset
+= UNITS_PER_WORD
;
262 gcc_assert (reg_offset
+ this_offset
== 0);
264 /* Allocate the rest of the stack frame, if any. */
267 if (sp_offset
< 2 * -32768)
269 /* For very large offsets, we need a temporary register. */
270 rtx tmp
= gen_rtx_REG (Pmode
, PE_TMP_REGNUM
);
271 emit_move_insn (tmp
, GEN_INT (sp_offset
));
272 insn
= emit_insn (gen_frame_addsi3 (stack_pointer_rtx
,
273 stack_pointer_rtx
, tmp
));
274 if (!frame_pointer_needed
)
276 RTX_FRAME_RELATED_P (insn
) = 1;
277 add_reg_note (insn
, REG_CFA_ADJUST_CFA
,
278 gen_rtx_SET (stack_pointer_rtx
,
279 plus_constant (Pmode
,
286 /* Otherwise, emit one or two sequential subtracts. */
289 this_offset
= MAX (sp_offset
, -32768);
290 sp_offset
-= this_offset
;
292 insn
= emit_insn (gen_frame_addsi3 (stack_pointer_rtx
,
294 GEN_INT (this_offset
)));
295 if (!frame_pointer_needed
)
296 RTX_FRAME_RELATED_P (insn
) = 1;
298 while (sp_offset
!= 0);
303 /* Fix up, or remove, the insn that initialized the pic register. */
304 rtx_insn
*set_got_insn
= cfun
->machine
->set_got_insn
;
305 if (crtl
->uses_pic_offset_table
)
307 rtx reg
= SET_DEST (PATTERN (set_got_insn
));
308 rtx_insn
*insn
= emit_insn_before (gen_set_got (reg
), set_got_insn
);
309 RTX_FRAME_RELATED_P (insn
) = 1;
310 add_reg_note (insn
, REG_CFA_FLUSH_QUEUE
, NULL_RTX
);
312 delete_insn (set_got_insn
);
315 /* Expand the "epilogue" pattern. */
318 or1k_expand_epilogue (void)
320 HOST_WIDE_INT reg_offset
, sp_offset
;
321 rtx insn
, cfa_restores
= NULL
;
323 sp_offset
= cfun
->machine
->total_size
;
327 reg_offset
= cfun
->machine
->local_vars_size
+ cfun
->machine
->args_size
;
329 if (sp_offset
>= 32768 || cfun
->calls_alloca
)
331 /* The saved registers are out of range of the stack pointer.
332 We need to partially deallocate the stack frame now. */
333 if (frame_pointer_needed
)
335 /* Reset the stack pointer to the bottom of the saved regs. */
336 sp_offset
-= reg_offset
;
338 insn
= emit_insn (gen_frame_addsi3 (stack_pointer_rtx
,
339 hard_frame_pointer_rtx
,
340 GEN_INT (-sp_offset
)));
341 RTX_FRAME_RELATED_P (insn
) = 1;
342 add_reg_note (insn
, REG_CFA_DEF_CFA
,
343 plus_constant (Pmode
, stack_pointer_rtx
, sp_offset
));
345 else if (sp_offset
>= 3 * 32768)
347 /* For very large offsets, we need a temporary register. */
348 rtx tmp
= gen_rtx_REG (Pmode
, PE_TMP_REGNUM
);
349 emit_move_insn (tmp
, GEN_INT (reg_offset
));
350 insn
= emit_insn (gen_frame_addsi3 (stack_pointer_rtx
,
351 stack_pointer_rtx
, tmp
));
352 sp_offset
-= reg_offset
;
354 RTX_FRAME_RELATED_P (insn
) = 1;
355 add_reg_note (insn
, REG_CFA_DEF_CFA
,
356 plus_constant (Pmode
, stack_pointer_rtx
, sp_offset
));
360 /* Otherwise, emit one or two sequential additions. */
363 HOST_WIDE_INT this_offset
= MIN (reg_offset
, 32764);
364 reg_offset
-= this_offset
;
365 sp_offset
-= this_offset
;
367 insn
= emit_insn (gen_frame_addsi3 (stack_pointer_rtx
,
369 GEN_INT (this_offset
)));
370 RTX_FRAME_RELATED_P (insn
) = 1;
371 add_reg_note (insn
, REG_CFA_DEF_CFA
,
372 plus_constant (Pmode
, stack_pointer_rtx
,
375 while (sp_offset
>= 32768);
379 /* Restore callee-saved registers. */
380 for (int regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
381 if (regno
!= HARD_FRAME_POINTER_REGNUM
382 && regno
!= LR_REGNUM
383 && callee_saved_regno_p (regno
))
385 cfa_restores
= or1k_restore_reg (regno
, reg_offset
, cfa_restores
);
386 reg_offset
+= UNITS_PER_WORD
;
389 /* Restore frame pointer. */
390 if (callee_saved_regno_p (HARD_FRAME_POINTER_REGNUM
))
392 cfa_restores
= or1k_restore_reg (HARD_FRAME_POINTER_REGNUM
,
393 reg_offset
, cfa_restores
);
394 reg_offset
+= UNITS_PER_WORD
;
397 /* Restore link register. */
398 if (callee_saved_regno_p (LR_REGNUM
))
400 cfa_restores
= or1k_restore_reg (LR_REGNUM
, reg_offset
, cfa_restores
);
401 reg_offset
+= UNITS_PER_WORD
;
403 gcc_assert (reg_offset
== sp_offset
);
405 /* Restore stack pointer. */
406 insn
= emit_insn (gen_frame_addsi3 (stack_pointer_rtx
, stack_pointer_rtx
,
407 GEN_INT (sp_offset
)));
408 RTX_FRAME_RELATED_P (insn
) = 1;
409 REG_NOTES (insn
) = cfa_restores
;
410 add_reg_note (insn
, REG_CFA_DEF_CFA
, stack_pointer_rtx
);
412 /* Move up to the stack frame of an exception handler. */
413 if (crtl
->calls_eh_return
)
414 emit_insn (gen_addsi3 (stack_pointer_rtx
, stack_pointer_rtx
,
415 EH_RETURN_STACKADJ_RTX
));
418 /* Worker for TARGET_INIT_PIC_REG.
419 Initialize the cfun->machine->set_got_insn rtx and insert it at the entry
420 of the current function. The rtx is just a temporary placeholder for
421 the GOT and will be replaced or removed during or1k_expand_prologue. */
424 or1k_init_pic_reg (void)
428 cfun
->machine
->set_got_insn
429 = emit_insn (gen_set_got_tmp (pic_offset_table_rtx
));
431 rtx_insn
*seq
= get_insns ();
434 edge entry_edge
= single_succ_edge (ENTRY_BLOCK_PTR_FOR_FN (cfun
));
435 insert_insn_on_edge (seq
, entry_edge
);
436 commit_one_edge_insertion (entry_edge
);
439 #undef TARGET_INIT_PIC_REG
440 #define TARGET_INIT_PIC_REG or1k_init_pic_reg
441 #undef TARGET_USE_PSEUDO_PIC_REG
442 #define TARGET_USE_PSEUDO_PIC_REG hook_bool_void_true
444 /* Worker for INITIAL_FRAME_ADDRESS_RTX.
445 Returns the RTX representing the address of the initial stack frame. */
448 or1k_initial_frame_addr ()
450 /* Use this to force a stack frame for the current function. */
451 crtl
->accesses_prior_frames
= 1;
452 return arg_pointer_rtx
;
455 /* Worker for DYNAMIC_CHAIN_ADDRESS.
456 Returns the RTX representing the address of where the caller's frame pointer
457 may be stored on the stack. */
460 or1k_dynamic_chain_addr (rtx frame
)
462 return plus_constant (Pmode
, frame
, -2 * UNITS_PER_WORD
);
465 /* Worker for RETURN_ADDR_RTX.
466 Returns the RTX representing the address of where the link register may be
467 stored on the stack. */
470 or1k_return_addr (int, rtx frame
)
472 return gen_frame_mem (Pmode
, plus_constant (Pmode
, frame
, -UNITS_PER_WORD
));
475 /* Worker for TARGET_FRAME_POINTER_REQUIRED.
476 Returns true if the current function must use a frame pointer. */
479 or1k_frame_pointer_required ()
481 /* ??? While IRA checks accesses_prior_frames, reload does not.
482 We do want the frame pointer for this case. */
483 return (crtl
->accesses_prior_frames
|| crtl
->profile
);
486 /* Expand the "eh_return" pattern.
487 Used for defining __builtin_eh_return, this will emit RTX to override the
488 current function's return address stored on the stack. The emitted RTX is
489 inserted before the epilogue so we can't just update the link register.
490 This is used when handling exceptions to jump into the exception handler
491 catch block upon return from _Unwind_RaiseException. */
494 or1k_expand_eh_return (rtx eh_addr
)
498 lraddr
= gen_frame_mem (Pmode
, plus_constant (Pmode
,
501 /* Set address to volatile to ensure the store doesn't get optimized out. */
502 MEM_VOLATILE_P (lraddr
) = true;
503 emit_move_insn (lraddr
, eh_addr
);
506 /* Helper for defining INITIAL_ELIMINATION_OFFSET.
507 We allow the following eliminiations:
511 HARD_FP and AP are the same which is handled below. */
514 or1k_initial_elimination_offset (int from
, int to
)
516 HOST_WIDE_INT offset
;
518 /* Set OFFSET to the offset from the stack pointer. */
521 /* Incoming args are all the way up at the previous frame. */
522 case ARG_POINTER_REGNUM
:
523 offset
= cfun
->machine
->total_size
;
526 /* Local args grow downward from the saved registers. */
527 case FRAME_POINTER_REGNUM
:
528 offset
= cfun
->machine
->args_size
+ cfun
->machine
->local_vars_size
;
535 if (to
== HARD_FRAME_POINTER_REGNUM
)
536 offset
-= cfun
->machine
->total_size
;
541 /* Worker for TARGET_LEGITIMATE_ADDRESS_P.
542 Returns true if X is a legitimate address RTX on OpenRISC. */
545 or1k_legitimate_address_p (machine_mode
, rtx x
, bool strict_p
)
549 switch (GET_CODE (x
))
557 addend
= XEXP (x
, 1);
560 /* Register elimination is going to adjust all of these offsets.
561 We might as well keep them as a unit until then. */
562 if (!strict_p
&& virtual_frame_reg_operand (base
, VOIDmode
))
563 return CONST_INT_P (addend
);
564 if (!satisfies_constraint_I (addend
))
573 switch (GET_CODE (x
))
578 /* Assume legitimize_address properly categorized
579 the symbol. Continue to check the base. */
588 case UNSPEC_GOTTPOFF
:
589 /* Assume legitimize_address properly categorized
590 the symbol. Continue to check the base. */
606 unsigned regno
= REGNO (base
);
607 if (regno
>= FIRST_PSEUDO_REGISTER
)
610 regno
= reg_renumber
[regno
];
617 return REGNO_OK_FOR_BASE_P (regno
);
620 /* Return the TLS type for TLS symbols, 0 otherwise. */
623 or1k_tls_symbolic_operand (rtx op
)
626 split_const (op
, &sym
, &addend
);
627 if (SYMBOL_REF_P (sym
))
628 return SYMBOL_REF_TLS_MODEL (sym
);
629 return TLS_MODEL_NONE
;
632 /* Get a reference to the '__tls_get_addr' symbol. */
634 static GTY(()) rtx gen_tls_tga
;
637 gen_tls_get_addr (void)
640 gen_tls_tga
= init_one_libfunc ("__tls_get_addr");
644 /* Emit a call to '__tls_get_addr'. */
647 or1k_tls_call (rtx dest
, rtx arg
)
649 emit_library_call_value (gen_tls_get_addr (), dest
, LCT_CONST
,
653 /* Helper for or1k_legitimize_address_1. Wrap X in an unspec. */
656 gen_sym_unspec (rtx x
, int kind
)
658 return gen_rtx_UNSPEC (Pmode
, gen_rtvec (1, x
), kind
);
661 /* Worker for TARGET_LEGITIMIZE_ADDRESS_DISPLACEMENT.
662 Split an out-of-range address displacement into hi and lo parts.
663 The hi part will have to be loaded into a register separately,
664 but the low part will be folded into the memory operand. */
667 or1k_legitimize_address_displacement (rtx
*off1
, rtx
*off2
,
668 poly_int64 poly_offset
, machine_mode
)
670 HOST_WIDE_INT orig_offset
= poly_offset
;
671 HOST_WIDE_INT lo
, hi
;
673 /* If the displacement is within range of 2 addi insns, prefer that.
674 Otherwise split as per normal, at which point the register allocator
675 will see that OFF1 is not a valid add3 operand and load it into
676 a register, as desired. */
677 if (orig_offset
>= 0 && orig_offset
< 2 * 32767)
680 lo
= orig_offset
- hi
;
682 else if (orig_offset
< 0 && orig_offset
>= 2 * -32768)
685 lo
= orig_offset
- hi
;
689 lo
= sext_hwi (orig_offset
, 16);
690 hi
= orig_offset
- lo
;
693 *off1
= GEN_INT (hi
);
694 *off2
= GEN_INT (lo
);
698 #undef TARGET_LEGITIMIZE_ADDRESS_DISPLACEMENT
699 #define TARGET_LEGITIMIZE_ADDRESS_DISPLACEMENT \
700 or1k_legitimize_address_displacement
702 /* Helper function to implement both TARGET_LEGITIMIZE_ADDRESS and expand the
703 patterns "movqi", "movqi" and "movsi". Returns an valid OpenRISC RTX that
704 represents the argument X which is an invalid address RTX. The argument
705 SCRATCH may be used as a temporary when building addresses. */
708 or1k_legitimize_address_1 (rtx x
, rtx scratch
)
710 rtx base
, addend
, t1
, t2
;
711 tls_model tls_kind
= TLS_MODEL_NONE
;
712 bool is_local
= true;
714 split_const (x
, &base
, &addend
);
715 switch (GET_CODE (base
))
718 gcc_assert (can_create_pseudo_p ());
719 base
= force_reg (Pmode
, base
);
727 tls_kind
= SYMBOL_REF_TLS_MODEL (base
);
728 is_local
= SYMBOL_REF_LOCAL_P (base
);
735 t1
= can_create_pseudo_p () ? gen_reg_rtx (Pmode
) : scratch
;
738 emit_insn (gen_rtx_SET (t1
, gen_rtx_HIGH (Pmode
, x
)));
739 return gen_rtx_LO_SUM (Pmode
, t1
, x
);
743 crtl
->uses_pic_offset_table
= 1;
744 t2
= gen_sym_unspec (x
, UNSPEC_GOTOFF
);
745 emit_insn (gen_rtx_SET (t1
, gen_rtx_HIGH (Pmode
, t2
)));
746 emit_insn (gen_add3_insn (t1
, t1
, pic_offset_table_rtx
));
747 return gen_rtx_LO_SUM (Pmode
, t1
, copy_rtx (t2
));
751 base
= gen_sym_unspec (base
, UNSPEC_GOT
);
752 crtl
->uses_pic_offset_table
= 1;
753 t2
= gen_rtx_LO_SUM (Pmode
, pic_offset_table_rtx
, base
);
754 t2
= gen_const_mem (Pmode
, t2
);
755 emit_insn (gen_rtx_SET (t1
, t2
));
760 case TLS_MODEL_GLOBAL_DYNAMIC
:
761 case TLS_MODEL_LOCAL_DYNAMIC
:
762 /* TODO: For now, treat LD as GD. */
763 t1
= gen_reg_rtx (Pmode
);
764 base
= gen_sym_unspec (base
, UNSPEC_TLSGD
);
765 emit_insn (gen_rtx_SET (t1
, gen_rtx_HIGH (Pmode
, base
)));
766 emit_insn (gen_rtx_SET (t1
, gen_rtx_LO_SUM (Pmode
, t1
, base
)));
767 crtl
->uses_pic_offset_table
= 1;
768 emit_insn (gen_add3_insn (t1
, t1
, pic_offset_table_rtx
));
769 base
= gen_reg_rtx (Pmode
);
770 or1k_tls_call (base
, t1
);
773 case TLS_MODEL_INITIAL_EXEC
:
774 t1
= gen_reg_rtx (Pmode
);
775 t2
= gen_reg_rtx (Pmode
);
776 base
= gen_sym_unspec (base
, UNSPEC_GOTTPOFF
);
777 emit_insn (gen_rtx_SET (t1
, gen_rtx_HIGH (Pmode
, base
)));
778 crtl
->uses_pic_offset_table
= 1;
779 emit_insn (gen_add3_insn (t1
, t1
, pic_offset_table_rtx
));
780 t1
= gen_rtx_LO_SUM (Pmode
, t1
, base
);
781 emit_move_insn (t2
, gen_const_mem (Pmode
, t1
));
782 t1
= gen_rtx_REG (Pmode
, TLS_REGNUM
);
783 emit_insn (gen_add3_insn (t2
, t2
, t1
));
787 case TLS_MODEL_LOCAL_EXEC
:
788 x
= gen_sym_unspec (x
, UNSPEC_TPOFF
);
789 t1
= gen_reg_rtx (Pmode
);
790 emit_insn (gen_rtx_SET (t1
, gen_rtx_HIGH (Pmode
, x
)));
791 t2
= gen_rtx_REG (Pmode
, TLS_REGNUM
);
792 emit_insn (gen_add3_insn (t1
, t1
, t2
));
793 return gen_rtx_LO_SUM (Pmode
, t1
, x
);
800 /* Accept what we may have already emitted. */
807 /* If we get here, we still have addend outstanding. */
808 gcc_checking_assert (register_operand (base
, Pmode
));
809 if (addend
== const0_rtx
)
811 if (satisfies_constraint_I (addend
)
812 || virtual_frame_reg_operand (base
, VOIDmode
))
813 return gen_rtx_PLUS (Pmode
, base
, addend
);
817 bool ok
= (or1k_legitimize_address_displacement
818 (&hi
, &lo
, INTVAL (addend
), SImode
));
821 t2
= can_create_pseudo_p () ? gen_reg_rtx (Pmode
) : scratch
;
822 if (satisfies_constraint_I (hi
))
823 emit_insn (gen_addsi3 (t2
, base
, hi
));
826 t1
= can_create_pseudo_p () ? gen_reg_rtx (Pmode
) : scratch
;
827 emit_move_insn (t1
, hi
);
828 emit_insn (gen_add3_insn (t2
, base
, t1
));
830 if (lo
== const0_rtx
)
833 return gen_rtx_PLUS (Pmode
, t2
, lo
);
837 /* Worker for TARGET_LEGITIMIZE_ADDRESS.
838 This delegates implementation to or1k_legitimize_address_1. */
841 or1k_legitimize_address (rtx x
, rtx
/* oldx */, machine_mode
)
843 return or1k_legitimize_address_1 (x
, NULL_RTX
);
846 #undef TARGET_LEGITIMIZE_ADDRESS
847 #define TARGET_LEGITIMIZE_ADDRESS or1k_legitimize_address
849 /* Worker for TARGET_DELEGITIMIZE_ADDRESS.
850 In the name of slightly smaller debug output, and to cater to
851 general assembler lossage, recognize PIC+GOTOFF and turn it back
852 into a direct symbol reference. */
855 or1k_delegitimize_address (rtx x
)
857 if (GET_CODE (x
) == UNSPEC
)
859 /* The LO_SUM to which X was attached has been stripped.
860 Since the only legitimate address we could have been computing
861 is that of the symbol, assume that's what we've done. */
862 if (XINT (x
, 1) == UNSPEC_GOTOFF
)
863 return XVECEXP (x
, 0, 0);
867 rtx addr
= XEXP (x
, 0);
868 if (GET_CODE (addr
) == LO_SUM
869 && XEXP (addr
, 0) == pic_offset_table_rtx
)
871 rtx inner
= XEXP (addr
, 1);
872 if (GET_CODE (inner
) == UNSPEC
873 && XINT (inner
, 1) == UNSPEC_GOT
)
874 return XVECEXP (inner
, 0, 0);
877 return delegitimize_mem_from_attrs (x
);
880 #undef TARGET_DELEGITIMIZE_ADDRESS
881 #define TARGET_DELEGITIMIZE_ADDRESS or1k_delegitimize_address
883 /* Worker for TARGET_CANNOT_FORCE_CONST_MEM.
884 Primarily this is required for TLS symbols, but given that our move
885 patterns *ought* to be able to handle any symbol at any time, we
886 should never be spilling symbolic operands to the constant pool, ever. */
889 or1k_cannot_force_const_mem (machine_mode
, rtx x
)
891 rtx_code code
= GET_CODE (x
);
892 return (code
== SYMBOL_REF
898 #undef TARGET_CANNOT_FORCE_CONST_MEM
899 #define TARGET_CANNOT_FORCE_CONST_MEM or1k_cannot_force_const_mem
901 /* Worker for TARGET_LEGITIMATE_CONSTANT_P.
902 Returns true is the RTX X represents a constant that can be used as an
903 immediate operand in OpenRISC. */
906 or1k_legitimate_constant_p (machine_mode
, rtx x
)
908 switch (GET_CODE (x
))
913 /* We construct these, rather than spilling to memory. */
919 /* These may need to be split and not reconstructed. */
920 return or1k_tls_symbolic_operand (x
) == TLS_MODEL_NONE
;
927 #undef TARGET_LEGITIMATE_CONSTANT_P
928 #define TARGET_LEGITIMATE_CONSTANT_P or1k_legitimate_constant_p
930 /* Worker for TARGET_PASS_BY_REFERENCE.
931 Returns true if an argument of TYPE in MODE should be passed by reference
932 as required by the OpenRISC ABI. On OpenRISC structures, unions and
933 arguments larger than 64-bits are passed by reference. */
936 or1k_pass_by_reference (cumulative_args_t
, machine_mode mode
,
937 const_tree type
, bool)
942 if (AGGREGATE_TYPE_P (type
))
944 size
= int_size_in_bytes (type
);
947 size
= GET_MODE_SIZE (mode
);
948 return size
< 0 || size
> 8;
951 /* Worker for TARGET_FUNCTION_VALUE.
952 Returns an RTX representing the location where function return values will
953 be stored. On OpenRISC this is the register r11. 64-bit return value's
954 upper 32-bits are returned in r12, this is automatically done by GCC. */
957 or1k_function_value (const_tree valtype
,
958 const_tree
/* fn_decl_or_type */,
961 return gen_rtx_REG (TYPE_MODE (valtype
), RV_REGNUM
);
964 /* Worker for TARGET_LIBCALL_VALUE.
965 Returns an RTX representing the location where function return values to
966 external libraries will be stored. On OpenRISC this the same as local
970 or1k_libcall_value (machine_mode mode
,
973 return gen_rtx_REG (mode
, RV_REGNUM
);
977 /* Worker for TARGET_FUNCTION_VALUE_REGNO_P.
978 Returns true if REGNO is a valid register for storing a function return
982 or1k_function_value_regno_p (const unsigned int regno
)
984 return (regno
== RV_REGNUM
);
987 /* Worker for TARGET_STRICT_ARGUMENT_NAMING.
988 Return true always as on OpenRISC the last argument in a variatic function
992 or1k_strict_argument_naming (cumulative_args_t
/* ca */)
997 #undef TARGET_STRICT_ARGUMENT_NAMING
998 #define TARGET_STRICT_ARGUMENT_NAMING or1k_strict_argument_naming
1000 /* Worker for TARGET_FUNCTION_ARG.
1001 Return the next register to be used to hold a function argument or NULL_RTX
1002 if there's no more space. Arugment CUM_V represents the current argument
1003 offset, zero for the first function argument. OpenRISC function arguments
1004 maybe be passed in registers r3 to r8. */
1007 or1k_function_arg (cumulative_args_t cum_v
, machine_mode mode
,
1008 const_tree
/* type */, bool named
)
1010 /* VOIDmode is passed as a special flag for "last argument". */
1011 if (mode
== VOIDmode
)
1014 CUMULATIVE_ARGS
*cum
= get_cumulative_args (cum_v
);
1015 int nreg
= CEIL (GET_MODE_SIZE (mode
), UNITS_PER_WORD
);
1017 /* Note that all large arguments are passed by reference. */
1018 gcc_assert (nreg
<= 2);
1019 if (named
&& *cum
+ nreg
<= 6)
1020 return gen_rtx_REG (mode
, *cum
+ 3);
1025 /* Worker for TARGET_FUNCTION_ARG_ADVANCE.
1026 Update the cumulative args descriptor CUM_V to advance past the next function
1027 argument. Note, this is not called for arguments passed on the stack. */
1030 or1k_function_arg_advance (cumulative_args_t cum_v
, machine_mode mode
,
1031 const_tree
/* type */, bool named
)
1033 CUMULATIVE_ARGS
*cum
= get_cumulative_args (cum_v
);
1034 int nreg
= CEIL (GET_MODE_SIZE (mode
), UNITS_PER_WORD
);
1036 /* Note that all large arguments are passed by reference. */
1037 gcc_assert (nreg
<= 2);
1042 /* worker function for TARGET_RETURN_IN_MEMORY.
1043 Returns true if the argument of TYPE should be returned in memory. On
1044 OpenRISC this is any value larger than 64-bits. */
1047 or1k_return_in_memory (const_tree type
, const_tree
/* fntype */)
1049 const HOST_WIDE_INT size
= int_size_in_bytes (type
);
1050 return (size
== -1 || size
> (2 * UNITS_PER_WORD
));
1053 /* Print reloc (x + add). */
1056 output_addr_reloc (FILE *stream
, rtx x
, HOST_WIDE_INT add
, const char *reloc
)
1060 fputs (reloc
, stream
);
1061 fputc ('(', stream
);
1063 output_addr_const (stream
, x
);
1067 fputc ('+', stream
);
1068 fprintf (stream
, HOST_WIDE_INT_PRINT_DEC
, add
);
1071 fputc (')', stream
);
1093 print_reloc (FILE *stream
, rtx x
, HOST_WIDE_INT add
, reloc_kind kind
)
1095 /* All data relocations. A NULL in this table indicates a form that
1096 we expect to never generate, while "" indicates a form that requires
1097 no special markup. */
1098 static const char * const relocs
[RKIND_MAX
][RTYPE_MAX
] = {
1099 { "lo", "got", "gotofflo", "tpofflo", "gottpofflo", "tlsgdlo" },
1100 { "ha", NULL
, "gotoffha", "tpoffha", "gottpoffha", "tlsgdhi" },
1102 reloc_type type
= RTYPE_DIRECT
;
1104 if (GET_CODE (x
) == UNSPEC
)
1106 switch (XINT (x
, 1))
1112 type
= RTYPE_GOTOFF
;
1117 case UNSPEC_GOTTPOFF
:
1118 type
= RTYPE_GOTTPOFF
;
1124 output_operand_lossage ("invalid relocation");
1127 x
= XVECEXP (x
, 0, 0);
1130 const char *reloc
= relocs
[kind
][type
];
1132 output_operand_lossage ("invalid relocation");
1134 output_addr_reloc (stream
, x
, add
, reloc
);
1137 /* Worker for TARGET_PRINT_OPERAND_ADDRESS.
1138 Prints the argument ADDR, an address RTX, to the file FILE. The output is
1139 formed as expected by the OpenRISC assembler. Examples:
1143 (plus:SI (reg:SI 3) (const_int 4)) 0x4(r3)
1144 (lo_sum:SI (reg:SI 3) (symbol_ref:SI ("x")))) lo(x)(r3) */
1147 or1k_print_operand_address (FILE *file
, machine_mode
, rtx addr
)
1151 switch (GET_CODE (addr
))
1158 offset
= XEXP (addr
, 1);
1159 addr
= XEXP (addr
, 0);
1160 gcc_assert (CONST_INT_P (offset
));
1161 if (GET_CODE (addr
) == LO_SUM
)
1163 print_reloc (file
, XEXP (addr
, 1), INTVAL (offset
), RKIND_LO
);
1164 addr
= XEXP (addr
, 0);
1167 output_addr_const (file
, offset
);
1171 offset
= XEXP (addr
, 1);
1172 addr
= XEXP (addr
, 0);
1173 print_reloc (file
, offset
, 0, RKIND_LO
);
1177 output_addr_const (file
, addr
);
1181 fprintf (file
, "(%s)", reg_names
[REGNO (addr
)]);
1184 /* Worker for TARGET_PRINT_OPERAND.
1185 Print operand X, an RTX, to the file FILE. The output is formed as expected
1186 by the OpenRISC assember. CODE is the letter following a '%' in an
1187 instrunction template used to control the RTX output. Example(s):
1189 CODE RTX OUTPUT COMMENT
1190 0 (reg:SI 3) r3 output an operand
1191 r (reg:SI 3) r3 output a register or const zero
1192 H (reg:SI 3) r4 output the high pair register
1193 h (symbol_ref:SI ("x")) ha(x) output a signed high relocation
1194 L (symbol_ref:SI ("x")) lo(x) output a low relocation
1196 Note, '#' is a special code used to fill the branch delay slot with an l.nop
1197 instruction. The l.nop (no-op) instruction is only outputted when the delay
1198 slot has not been filled. */
1201 or1k_print_operand (FILE *file
, rtx x
, int code
)
1208 /* Conditionally add a nop in unfilled delay slot. */
1209 if (final_sequence
== NULL
)
1210 fputs ("\n\t l.nop\n", file
);
1215 fprintf (file
, "%s", reg_names
[REGNO (operand
)]);
1216 else if (x
== CONST0_RTX (GET_MODE (x
)))
1217 fprintf (file
, "r0");
1219 output_operand_lossage ("invalid %%r value");
1224 fprintf (file
, "%s", reg_names
[REGNO (operand
) + 1]);
1226 output_operand_lossage ("invalid %%H value");
1230 print_reloc (file
, x
, 0, RKIND_HI
);
1233 print_reloc (file
, x
, 0, RKIND_LO
);
1236 if (!flag_pic
|| SYMBOL_REF_LOCAL_P (x
))
1237 output_addr_const (file
, x
);
1239 output_addr_reloc (file
, x
, 0, "plt");
1243 /* Print an operand as without a modifier letter. */
1244 switch (GET_CODE (operand
))
1247 if (REGNO (operand
) > 31)
1248 internal_error ("internal error: bad register: %d",
1250 fprintf (file
, "%s", reg_names
[REGNO (operand
)]);
1254 output_address (GET_MODE (XEXP (operand
, 0)), XEXP (operand
, 0));
1259 output_asm_label (operand
);
1263 /* No need to handle all strange variants, let output_addr_const
1265 if (CONSTANT_P (operand
))
1266 output_addr_const (file
, operand
);
1268 internal_error ("unexpected operand: %d", GET_CODE (operand
));
1274 output_operand_lossage ("unknown operand letter: '%c'", code
);
1279 /* Worker for TARGET_TRAMPOLINE_INIT.
1280 This is called to initialize a trampoline. The argument M_TRAMP is an RTX
1281 for the memory block to be initialized with trampoline code. The argument
1282 FNDECL contains the definition of the nested function to be called, we use
1283 this to get the function's address. The argument CHAIN is an RTX for the
1284 static chain value to be passed to the nested function. */
1287 or1k_trampoline_init (rtx m_tramp
, tree fndecl
, rtx chain
)
1289 const unsigned movhi_r13
= (0x06u
<< 26) | (13 << 21);
1290 const unsigned movhi_r11
= (0x06u
<< 26) | (11 << 21);
1291 const unsigned ori_r13_r13
= (0x2a << 26) | (13 << 21) | (13 << 16);
1292 const unsigned ori_r11_r11
= (0x2a << 26) | (11 << 21) | (11 << 16);
1293 const unsigned jr_r13
= (0x11 << 26) | (13 << 11);
1294 rtx tramp
[5], fnaddr
, f_hi
, f_lo
, c_hi
, c_lo
;
1296 fnaddr
= force_operand (XEXP (DECL_RTL (fndecl
), 0), NULL
);
1297 f_hi
= expand_binop (SImode
, lshr_optab
, fnaddr
, GEN_INT (16),
1298 NULL
, true, OPTAB_DIRECT
);
1299 f_lo
= expand_binop (SImode
, and_optab
, fnaddr
, GEN_INT (0xffff),
1300 NULL
, true, OPTAB_DIRECT
);
1302 chain
= force_operand (chain
, NULL
);
1303 c_hi
= expand_binop (SImode
, lshr_optab
, chain
, GEN_INT (16),
1304 NULL
, true, OPTAB_DIRECT
);
1305 c_lo
= expand_binop (SImode
, and_optab
, chain
, GEN_INT (0xffff),
1306 NULL
, true, OPTAB_DIRECT
);
1308 /* We want to generate
1310 l.movhi r13,hi(nested_func)
1311 l.movhi r11,hi(static_chain)
1312 l.ori r13,r13,lo(nested_func)
1314 l.ori r11,r11,lo(static_chain)
1316 tramp
[0] = expand_binop (SImode
, ior_optab
, f_hi
,
1317 gen_int_mode (movhi_r13
, SImode
),
1318 f_hi
, true, OPTAB_DIRECT
);
1319 tramp
[1] = expand_binop (SImode
, ior_optab
, c_hi
,
1320 gen_int_mode (movhi_r11
, SImode
),
1321 c_hi
, true, OPTAB_DIRECT
);
1322 tramp
[2] = expand_binop (SImode
, ior_optab
, f_lo
,
1323 gen_int_mode (ori_r13_r13
, SImode
),
1324 f_lo
, true, OPTAB_DIRECT
);
1325 tramp
[4] = expand_binop (SImode
, ior_optab
, c_lo
,
1326 gen_int_mode (ori_r11_r11
, SImode
),
1327 c_lo
, true, OPTAB_DIRECT
);
1328 tramp
[3] = gen_int_mode (jr_r13
, SImode
);
1330 for (int i
= 0; i
< 5; ++i
)
1332 rtx mem
= adjust_address (m_tramp
, SImode
, i
* 4);
1333 emit_move_insn (mem
, tramp
[i
]);
1336 /* Flushing the trampoline from the instruction cache needs
1340 /* Worker for TARGET_HARD_REGNO_MODE_OK.
1341 Returns true if the hard register REGNO is ok for storing values of mode
1345 or1k_hard_regno_mode_ok (unsigned int regno
, machine_mode mode
)
1347 /* For OpenRISC, GENERAL_REGS can hold anything, while
1348 FLAG_REGS are really single bits within SP[SR]. */
1349 if (REGNO_REG_CLASS (regno
) == FLAG_REGS
)
1350 return mode
== BImode
;
1354 #undef TARGET_HARD_REGNO_MODE_OK
1355 #define TARGET_HARD_REGNO_MODE_OK or1k_hard_regno_mode_ok
1357 /* Worker for TARGET_CAN_CHANGE_MODE_CLASS.
1358 Returns true if its ok to change a register in class RCLASS from mode FROM to
1359 mode TO. In general OpenRISC registers, other than special flags, handle all
1360 supported classes. */
1363 or1k_can_change_mode_class (machine_mode from
, machine_mode to
,
1366 if (rclass
== FLAG_REGS
)
1371 #undef TARGET_CAN_CHANGE_MODE_CLASS
1372 #define TARGET_CAN_CHANGE_MODE_CLASS or1k_can_change_mode_class
1374 /* Expand the patterns "movqi", "movqi" and "movsi". The argument OP0 is the
1375 destination and OP1 is the source. This expands to set OP0 to OP1. OpenRISC
1376 cannot do memory to memory assignments so for those cases we force one
1377 argument to a register. Constants that can't fit into a 16-bit immediate are
1378 split. Symbols are legitimized using split relocations. */
1381 or1k_expand_move (machine_mode mode
, rtx op0
, rtx op1
)
1385 if (!const0_operand (op1
, mode
))
1386 op1
= force_reg (mode
, op1
);
1388 else if (mode
== QImode
|| mode
== HImode
)
1390 /* ??? Maybe promote MEMs and CONST_INT to SImode,
1391 and then squish back with gen_lowpart. */
1395 switch (GET_CODE (op1
))
1398 if (!input_operand (op1
, mode
))
1400 HOST_WIDE_INT i
= INTVAL (op1
);
1401 HOST_WIDE_INT lo
= i
& 0xffff;
1402 HOST_WIDE_INT hi
= i
^ lo
;
1403 rtx subtarget
= op0
;
1405 if (!cse_not_expected
&& can_create_pseudo_p ())
1406 subtarget
= gen_reg_rtx (SImode
);
1407 emit_insn (gen_rtx_SET (subtarget
, GEN_INT (hi
)));
1408 emit_insn (gen_iorsi3 (op0
, subtarget
, GEN_INT (lo
)));
1416 op1
= or1k_legitimize_address_1 (op1
, op0
);
1423 emit_insn (gen_rtx_SET (op0
, op1
));
1426 /* Used to expand patterns "movsicc", "movqicc", "movhicc", "cstoresi4" and
1428 Expands a comparison where OPERANDS is an array of RTX describing the
1429 comparison. The first argument OPERANDS[0] is the operator and OPERANDS[1]
1430 and OPERANDS[2] are the operands. Split out the compare into SR[F] and
1431 return a new operation in OPERANDS[0]. The inputs OPERANDS[1] and
1432 OPERANDS[2] are not directly used, only overridden. */
1435 or1k_expand_compare (rtx
*operands
)
1437 rtx sr_f
= gen_rtx_REG (BImode
, SR_F_REGNUM
);
1439 /* The RTL may receive an immediate in argument 1 of the compare, this is not
1440 supported unless we have l.sf*i instructions, force them into registers. */
1442 XEXP (operands
[0], 1) = force_reg (SImode
, XEXP (operands
[0], 1));
1444 /* Emit the given comparison into the Flag bit. */
1445 PUT_MODE (operands
[0], BImode
);
1446 emit_insn (gen_rtx_SET (sr_f
, operands
[0]));
1448 /* Adjust the operands for use in the caller. */
1449 operands
[0] = gen_rtx_NE (VOIDmode
, sr_f
, const0_rtx
);
1451 operands
[2] = const0_rtx
;
1454 /* Expand the patterns "call", "sibcall", "call_value" and "sibcall_value".
1455 Expands a function call where argument RETVAL is an optional RTX providing
1456 return value storage, the argument FNADDR is and RTX describing the function
1457 to call, the argument CALLARG1 is the number or registers used as operands
1458 and the argument SIBCALL should be true if this is a nested function call.
1459 If FNADDR is a non local symbol and FLAG_PIC is enabled this will generate
1463 or1k_expand_call (rtx retval
, rtx fnaddr
, rtx callarg1
, bool sibcall
)
1465 rtx call
, use
= NULL
;
1467 /* Calls via the PLT require the PIC register. */
1469 && GET_CODE (XEXP (fnaddr
, 0)) == SYMBOL_REF
1470 && !SYMBOL_REF_LOCAL_P (XEXP (fnaddr
, 0)))
1472 crtl
->uses_pic_offset_table
= 1;
1473 rtx hard_pic
= gen_rtx_REG (Pmode
, REAL_PIC_OFFSET_TABLE_REGNUM
);
1474 emit_move_insn (hard_pic
, pic_offset_table_rtx
);
1475 use_reg (&use
, hard_pic
);
1478 if (!call_insn_operand (XEXP (fnaddr
, 0), Pmode
))
1480 fnaddr
= copy_to_mode_reg (Pmode
, XEXP (fnaddr
, 0));
1481 fnaddr
= gen_rtx_MEM (SImode
, fnaddr
);
1484 call
= gen_rtx_CALL (VOIDmode
, fnaddr
, callarg1
);
1486 call
= gen_rtx_SET (retval
, call
);
1488 /* Normal calls clobber LR. This is required in order to
1489 prevent e.g. a prologue store of LR being placed into
1490 the delay slot of the call, after it has been updated. */
1493 rtx clob
= gen_rtx_CLOBBER (VOIDmode
, gen_rtx_REG (Pmode
, LR_REGNUM
));
1494 call
= gen_rtx_PARALLEL (VOIDmode
, gen_rtvec (2, call
, clob
));
1496 call
= emit_call_insn (call
);
1498 CALL_INSN_FUNCTION_USAGE (call
) = use
;
1501 /* Worker for TARGET_FUNCTION_OK_FOR_SIBCALL.
1502 Returns true if the function declared by DECL is ok for calling as a nested
1506 or1k_function_ok_for_sibcall (tree decl
, tree
/* exp */)
1508 /* We can sibcall to any function if not PIC. */
1512 /* We can sibcall any indirect function. */
1516 /* If the call may go through the PLT, we need r16 live. */
1517 return targetm
.binds_local_p (decl
);
1520 #undef TARGET_FUNCTION_OK_FOR_SIBCALL
1521 #define TARGET_FUNCTION_OK_FOR_SIBCALL or1k_function_ok_for_sibcall
1523 /* Worker for TARGET_RTX_COSTS. */
1526 or1k_rtx_costs (rtx x
, machine_mode mode
, int outer_code
, int /* opno */,
1527 int *total
, bool /* speed */)
1529 switch (GET_CODE (x
))
1532 if (x
== const0_rtx
)
1534 else if ((outer_code
== PLUS
|| outer_code
== XOR
|| outer_code
== MULT
)
1535 && satisfies_constraint_I (x
))
1537 else if ((outer_code
== AND
|| outer_code
== IOR
)
1538 && satisfies_constraint_K (x
))
1540 else if (satisfies_constraint_I (x
)
1541 || satisfies_constraint_K (x
)
1542 || satisfies_constraint_M (x
))
1545 *total
= COSTS_N_INSNS (2);
1549 *total
= (x
== CONST0_RTX (mode
) ? 0 : COSTS_N_INSNS (2));
1553 /* This is effectively an 'M' constraint. */
1558 /* This is effectively an 'I' constraint. */
1559 *total
= (outer_code
== MEM
? 0 : 2);
1565 if (outer_code
== LO_SUM
|| outer_code
== HIGH
)
1569 /* ??? Extra cost for GOT or TLS symbols. */
1570 *total
= COSTS_N_INSNS (1 + (outer_code
!= MEM
));
1575 if (outer_code
== MEM
)
1585 #undef TARGET_RTX_COSTS
1586 #define TARGET_RTX_COSTS or1k_rtx_costs
1589 /* A subroutine of the atomic operation splitters. Jump to LABEL if
1590 COND is true. Mark the jump as unlikely to be taken. */
1593 emit_unlikely_jump (rtx_code code
, rtx label
)
1597 x
= gen_rtx_REG (BImode
, SR_F_REGNUM
);
1598 x
= gen_rtx_fmt_ee (code
, VOIDmode
, x
, const0_rtx
);
1599 x
= gen_rtx_IF_THEN_ELSE (VOIDmode
, x
, label
, pc_rtx
);
1600 emit_jump_insn (gen_rtx_SET (pc_rtx
, x
));
1602 // Disable this for now -- producing verify_cfg failures on probabilities.
1603 // int very_unlikely = REG_BR_PROB_BASE / 100 - 1;
1604 // add_int_reg_note (insn, REG_BR_PROB, very_unlikely);
1607 /* A subroutine of the atomic operation splitters.
1608 Emit a raw comparison for A CODE B. */
1611 emit_compare (rtx_code code
, rtx a
, rtx b
)
1613 emit_insn (gen_rtx_SET (gen_rtx_REG (BImode
, SR_F_REGNUM
),
1614 gen_rtx_fmt_ee (code
, BImode
, a
, b
)));
1617 /* A subroutine of the atomic operation splitters.
1618 Emit a load-locked instruction in MODE. */
1621 emit_load_locked (machine_mode mode
, rtx reg
, rtx mem
)
1623 gcc_assert (mode
== SImode
);
1624 emit_insn (gen_load_locked_si (reg
, mem
));
1627 /* A subroutine of the atomic operation splitters.
1628 Emit a store-conditional instruction in MODE. */
1631 emit_store_conditional (machine_mode mode
, rtx mem
, rtx val
)
1633 gcc_assert (mode
== SImode
);
1634 emit_insn (gen_store_conditional_si (mem
, val
));
1637 /* A subroutine of the various atomic expanders. For sub-word operations,
1638 we must adjust things to operate on SImode. Given the original MEM,
1639 return a new aligned memory. Also build and return the quantities by
1640 which to shift and mask. */
1643 or1k_adjust_atomic_subword (rtx orig_mem
, rtx
*pshift
, rtx
*pmask
)
1645 rtx addr
, align
, shift
, mask
, mem
;
1646 machine_mode mode
= GET_MODE (orig_mem
);
1648 addr
= XEXP (orig_mem
, 0);
1649 addr
= force_reg (Pmode
, addr
);
1651 /* Aligned memory containing subword. Generate a new memory. We
1652 do not want any of the existing MEM_ATTR data, as we're now
1653 accessing memory outside the original object. */
1654 align
= expand_binop (Pmode
, and_optab
, addr
, GEN_INT (-4),
1655 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
1656 mem
= gen_rtx_MEM (SImode
, align
);
1657 MEM_VOLATILE_P (mem
) = MEM_VOLATILE_P (orig_mem
);
1658 if (MEM_ALIAS_SET (orig_mem
) == ALIAS_SET_MEMORY_BARRIER
)
1659 set_mem_alias_set (mem
, ALIAS_SET_MEMORY_BARRIER
);
1661 /* Shift amount for subword relative to aligned word. */
1662 rtx mode_mask
= GEN_INT (mode
== QImode
? 3 : 2);
1663 shift
= expand_binop (SImode
, and_optab
, gen_lowpart (SImode
, addr
),
1664 mode_mask
, NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
1665 if (BYTES_BIG_ENDIAN
)
1666 shift
= expand_binop (SImode
, xor_optab
, shift
, mode_mask
,
1667 shift
, 1, OPTAB_LIB_WIDEN
);
1668 shift
= expand_binop (SImode
, ashl_optab
, shift
, GEN_INT (3),
1669 shift
, 1, OPTAB_LIB_WIDEN
);
1672 /* Mask for insertion. */
1673 mask
= expand_binop (SImode
, ashl_optab
, GEN_INT (GET_MODE_MASK (mode
)),
1674 shift
, NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
1680 /* A subroutine of the various atomic expanders. For sub-word operations,
1681 complete the operation by shifting result to the lsb of the SImode
1682 temporary and then extracting the result in MODE with a SUBREG. */
1685 or1k_finish_atomic_subword (machine_mode mode
, rtx o
, rtx n
, rtx shift
)
1687 n
= expand_binop (SImode
, lshr_optab
, n
, shift
,
1688 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
1689 emit_move_insn (o
, gen_lowpart (mode
, n
));
1692 /* Expand an atomic compare and swap operation.
1693 Emits the RTX to perform a compare and swap operation. This function takes
1694 8 RTX arguments in the OPERANDS array. The compare and swap operation
1695 loads a value from memory (OPERANDS[2]) and compares it with an expected
1696 value (OPERANDS[3]), if the values are equal it stores a new value
1697 (OPERANDS[4]) to memory. The argument OPERANDS[0] represents a boolean
1698 result which will be set to true if the operation succeeds. A return value
1699 (OPERANDS[1]) will be set to what was loaded from memory. The argument
1700 OPERAND[5] is used to indicate if the compare and swap is to be treated as
1701 weak. OpenRISC does not use OPERANDS[5] or OPERANDS[6] which provide memory
1703 For OpenRISC this emits RTX which will translate to assembly using the
1704 'l.lwa' (load word atomic) and 'l.swa' (store word atomic) instructions. */
1707 or1k_expand_atomic_compare_and_swap (rtx operands
[])
1709 rtx boolval
, retval
, mem
, oldval
, newval
;
1714 boolval
= operands
[0];
1715 retval
= operands
[1];
1717 oldval
= operands
[3];
1718 newval
= operands
[4];
1719 is_weak
= (INTVAL (operands
[5]) != 0);
1720 mode
= GET_MODE (mem
);
1722 if (reg_overlap_mentioned_p (retval
, oldval
))
1723 oldval
= copy_to_reg (oldval
);
1726 /* If strong, create a label to try again. */
1729 label1
= gen_rtx_LABEL_REF (VOIDmode
, gen_label_rtx ());
1730 emit_label (XEXP (label1
, 0));
1732 label2
= gen_rtx_LABEL_REF (VOIDmode
, gen_label_rtx ());
1734 emit_load_locked (mode
, retval
, mem
);
1735 emit_compare (EQ
, retval
, oldval
);
1736 emit_unlikely_jump (EQ
, label2
);
1737 emit_store_conditional (mode
, mem
, newval
);
1739 /* If strong, jump back to try again on fails. */
1741 emit_unlikely_jump (EQ
, label1
);
1742 emit_label (XEXP (label2
, 0));
1744 /* In all cases, SR_F contains 1 on success, and 0 on failure. */
1745 emit_insn (gen_sne_sr_f (boolval
));
1749 or1k_expand_atomic_compare_and_swap_qihi (rtx operands
[])
1751 rtx boolval
, orig_retval
, retval
, scratch
, mem
, oldval
, newval
;
1752 rtx label1
, label2
, mask
, shift
;
1756 boolval
= operands
[0];
1757 orig_retval
= operands
[1];
1759 oldval
= operands
[3];
1760 newval
= operands
[4];
1761 is_weak
= (INTVAL (operands
[5]) != 0);
1762 mode
= GET_MODE (mem
);
1764 mem
= or1k_adjust_atomic_subword (mem
, &shift
, &mask
);
1766 /* Shift and mask OLDVAL and NEWVAL into position with the word. */
1767 if (oldval
!= const0_rtx
)
1769 oldval
= convert_modes (SImode
, mode
, oldval
, 1);
1770 oldval
= expand_binop (SImode
, ashl_optab
, oldval
, shift
,
1771 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
1773 if (newval
!= const0_rtx
)
1775 newval
= convert_modes (SImode
, mode
, newval
, 1);
1776 newval
= expand_binop (SImode
, ashl_optab
, newval
, shift
,
1777 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
1783 label1
= gen_rtx_LABEL_REF (VOIDmode
, gen_label_rtx ());
1784 emit_label (XEXP (label1
, 0));
1786 label2
= gen_rtx_LABEL_REF (VOIDmode
, gen_label_rtx ());
1788 scratch
= gen_reg_rtx (SImode
);
1789 emit_load_locked (SImode
, scratch
, mem
);
1791 retval
= expand_binop (SImode
, and_optab
, scratch
, mask
,
1792 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
1793 scratch
= expand_binop (SImode
, xor_optab
, scratch
, retval
,
1794 scratch
, 1, OPTAB_LIB_WIDEN
);
1796 emit_compare (EQ
, retval
, oldval
);
1797 emit_unlikely_jump (EQ
, label2
);
1799 if (newval
!= const0_rtx
)
1800 scratch
= expand_binop (SImode
, ior_optab
, scratch
, newval
,
1801 scratch
, 1, OPTAB_LIB_WIDEN
);
1803 emit_store_conditional (SImode
, mem
, scratch
);
1806 emit_unlikely_jump (EQ
, label1
);
1807 emit_label (XEXP (label2
, 0));
1809 or1k_finish_atomic_subword (mode
, orig_retval
, retval
, shift
);
1811 /* In all cases, SR_F contains 1 on success, and 0 on failure. */
1812 emit_insn (gen_sne_sr_f (boolval
));
1815 /* Expand an atomic exchange operation.
1816 Emits the RTX to perform an exchange operation. This function takes 4 RTX
1817 arguments in the OPERANDS array. The exchange operation atomically loads a
1818 value from memory (OPERANDS[1]) to a return value (OPERANDS[0]) and stores a
1819 new value (OPERANDS[2]) back to the memory location.
1820 Another argument (OPERANDS[3]) is used to indicate the memory model and
1821 is not used by OpenRISC.
1822 For OpenRISC this emits RTX which will translate to assembly using the
1823 'l.lwa' (load word atomic) and 'l.swa' (store word atomic) instructions. */
1826 or1k_expand_atomic_exchange (rtx operands
[])
1828 rtx retval
, mem
, val
, label
;
1831 retval
= operands
[0];
1834 mode
= GET_MODE (mem
);
1836 if (reg_overlap_mentioned_p (retval
, val
))
1837 val
= copy_to_reg (val
);
1839 label
= gen_rtx_LABEL_REF (VOIDmode
, gen_label_rtx ());
1840 emit_label (XEXP (label
, 0));
1842 emit_load_locked (mode
, retval
, mem
);
1843 emit_store_conditional (mode
, mem
, val
);
1844 emit_unlikely_jump (EQ
, label
);
1848 or1k_expand_atomic_exchange_qihi (rtx operands
[])
1850 rtx orig_retval
, retval
, mem
, val
, scratch
;
1851 rtx label
, mask
, shift
;
1854 orig_retval
= operands
[0];
1857 mode
= GET_MODE (mem
);
1859 mem
= or1k_adjust_atomic_subword (mem
, &shift
, &mask
);
1861 /* Shift and mask VAL into position with the word. */
1862 if (val
!= const0_rtx
)
1864 val
= convert_modes (SImode
, mode
, val
, 1);
1865 val
= expand_binop (SImode
, ashl_optab
, val
, shift
,
1866 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
1869 label
= gen_rtx_LABEL_REF (VOIDmode
, gen_label_rtx ());
1870 emit_label (XEXP (label
, 0));
1872 scratch
= gen_reg_rtx (SImode
);
1873 emit_load_locked (SImode
, scratch
, mem
);
1875 retval
= expand_binop (SImode
, and_optab
, scratch
, mask
,
1876 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
1877 scratch
= expand_binop (SImode
, xor_optab
, scratch
, retval
,
1878 scratch
, 1, OPTAB_LIB_WIDEN
);
1879 if (val
!= const0_rtx
)
1880 scratch
= expand_binop (SImode
, ior_optab
, scratch
, val
,
1881 scratch
, 1, OPTAB_LIB_WIDEN
);
1883 emit_store_conditional (SImode
, mem
, scratch
);
1884 emit_unlikely_jump (EQ
, label
);
1886 or1k_finish_atomic_subword (mode
, orig_retval
, retval
, shift
);
1889 /* Expand an atomic fetch-and-operate pattern. CODE is the binary operation
1890 to perform (with MULT as a stand-in for NAND). MEM is the memory on which
1891 to operate. VAL is the second operand of the binary operator. BEFORE and
1892 AFTER are optional locations to return the value of MEM either before of
1893 after the operation. */
1896 or1k_expand_atomic_op (rtx_code code
, rtx mem
, rtx val
,
1897 rtx orig_before
, rtx orig_after
)
1899 machine_mode mode
= GET_MODE (mem
);
1900 rtx before
= orig_before
, after
= orig_after
;
1903 label
= gen_rtx_LABEL_REF (VOIDmode
, gen_label_rtx ());
1904 emit_label (XEXP (label
, 0));
1906 if (before
== NULL_RTX
)
1907 before
= gen_reg_rtx (mode
);
1909 emit_load_locked (mode
, before
, mem
);
1913 after
= expand_binop (mode
, and_optab
, before
, val
,
1914 after
, 1, OPTAB_LIB_WIDEN
);
1915 after
= expand_unop (mode
, one_cmpl_optab
, after
, after
, 1);
1918 after
= expand_simple_binop (mode
, code
, before
, val
,
1919 after
, 1, OPTAB_LIB_WIDEN
);
1921 emit_store_conditional (mode
, mem
, after
);
1922 emit_unlikely_jump (EQ
, label
);
1925 emit_move_insn (orig_before
, before
);
1927 emit_move_insn (orig_after
, after
);
1931 or1k_expand_atomic_op_qihi (rtx_code code
, rtx mem
, rtx val
,
1932 rtx orig_before
, rtx orig_after
)
1934 machine_mode mode
= GET_MODE (mem
);
1935 rtx label
, mask
, shift
, x
;
1936 rtx before
, after
, scratch
;
1938 mem
= or1k_adjust_atomic_subword (mem
, &shift
, &mask
);
1940 /* Shift and mask VAL into position with the word. */
1941 val
= convert_modes (SImode
, mode
, val
, 1);
1942 val
= expand_binop (SImode
, ashl_optab
, val
, shift
,
1943 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
1949 /* We've already zero-extended VAL. That is sufficient to
1950 make certain that it does not affect other bits. */
1954 case MULT
: /* NAND */
1955 /* If we make certain that all of the other bits in VAL are
1956 set, that will be sufficient to not affect other bits. */
1957 x
= expand_unop (SImode
, one_cmpl_optab
, mask
, NULL_RTX
, 1);
1958 val
= expand_binop (SImode
, ior_optab
, val
, x
,
1959 val
, 1, OPTAB_LIB_WIDEN
);
1964 /* These will all affect bits outside the field and need
1965 adjustment via MASK within the loop. */
1972 label
= gen_rtx_LABEL_REF (VOIDmode
, gen_label_rtx ());
1973 emit_label (XEXP (label
, 0));
1975 before
= scratch
= gen_reg_rtx (SImode
);
1976 emit_load_locked (SImode
, before
, mem
);
1983 after
= expand_simple_binop (SImode
, code
, before
, val
,
1984 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
1990 before
= expand_binop (SImode
, and_optab
, scratch
, mask
,
1991 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
1992 scratch
= expand_binop (SImode
, xor_optab
, scratch
, before
,
1993 scratch
, 1, OPTAB_LIB_WIDEN
);
1994 after
= expand_simple_binop (SImode
, code
, before
, val
,
1995 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
1996 after
= expand_binop (SImode
, and_optab
, after
, mask
,
1997 after
, 1, OPTAB_LIB_WIDEN
);
1998 scratch
= expand_binop (SImode
, ior_optab
, scratch
, after
,
1999 scratch
, 1, OPTAB_LIB_WIDEN
);
2002 case MULT
: /* NAND */
2003 after
= expand_binop (SImode
, and_optab
, before
, val
,
2004 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
2005 after
= expand_binop (SImode
, xor_optab
, after
, mask
,
2006 after
, 1, OPTAB_LIB_WIDEN
);
2014 emit_store_conditional (SImode
, mem
, scratch
);
2015 emit_unlikely_jump (EQ
, label
);
2018 or1k_finish_atomic_subword (mode
, orig_before
, before
, shift
);
2020 or1k_finish_atomic_subword (mode
, orig_after
, after
, shift
);
2023 /* Worker for TARGET_ASM_OUTPUT_MI_THUNK.
2024 Output the assembler code for a thunk function. THUNK_DECL is the
2025 declaration for the thunk function itself, FUNCTION is the decl for
2026 the target function. DELTA is an immediate constant offset to be
2027 added to THIS. If VCALL_OFFSET is nonzero, the word at address
2028 (*THIS + VCALL_OFFSET) should be additionally added to THIS. */
2031 or1k_output_mi_thunk (FILE *file
, tree
/* thunk_fndecl */,
2032 HOST_WIDE_INT delta
, HOST_WIDE_INT vcall_offset
,
2035 rtx this_rtx
, funexp
;
2038 reload_completed
= 1;
2039 epilogue_completed
= 1;
2041 emit_note (NOTE_INSN_PROLOGUE_END
);
2043 /* Find the "this" pointer. Normally in r3, but if the function
2044 returns a structure, the structure return pointer is in r3 and
2045 the "this" pointer is in r4 instead. */
2046 if (aggregate_value_p (TREE_TYPE (TREE_TYPE (function
)), function
))
2047 this_rtx
= gen_rtx_REG (Pmode
, 4);
2049 this_rtx
= gen_rtx_REG (Pmode
, 3);
2051 /* Add DELTA. When possible use a plain add, otherwise load it
2052 into a register first. */
2055 rtx delta_rtx
= GEN_INT (delta
);
2057 if (!satisfies_constraint_I (delta_rtx
))
2059 rtx scratch
= gen_rtx_REG (Pmode
, PE_TMP_REGNUM
);
2060 emit_move_insn (scratch
, delta_rtx
);
2061 delta_rtx
= scratch
;
2064 /* THIS_RTX += DELTA. */
2065 emit_insn (gen_add2_insn (this_rtx
, delta_rtx
));
2068 /* Add the word at address (*THIS_RTX + VCALL_OFFSET). */
2071 rtx scratch
= gen_rtx_REG (Pmode
, PE_TMP_REGNUM
);
2072 HOST_WIDE_INT lo
= sext_hwi (vcall_offset
, 16);
2073 HOST_WIDE_INT hi
= vcall_offset
- lo
;
2076 /* SCRATCH = *THIS_RTX. */
2077 tmp
= gen_rtx_MEM (Pmode
, this_rtx
);
2078 emit_move_insn (scratch
, tmp
);
2082 rtx scratch2
= gen_rtx_REG (Pmode
, RV_REGNUM
);
2083 emit_move_insn (scratch2
, GEN_INT (hi
));
2084 emit_insn (gen_add2_insn (scratch
, scratch2
));
2087 /* SCRATCH = *(*THIS_RTX + VCALL_OFFSET). */
2088 tmp
= plus_constant (Pmode
, scratch
, lo
);
2089 tmp
= gen_rtx_MEM (Pmode
, tmp
);
2090 emit_move_insn (scratch
, tmp
);
2092 /* THIS_RTX += *(*THIS_RTX + VCALL_OFFSET). */
2093 emit_insn (gen_add2_insn (this_rtx
, scratch
));
2096 /* Generate a tail call to the target function. */
2097 if (!TREE_USED (function
))
2099 assemble_external (function
);
2100 TREE_USED (function
) = 1;
2102 funexp
= XEXP (DECL_RTL (function
), 0);
2104 /* The symbol will be a local alias and therefore always binds local. */
2105 gcc_assert (SYMBOL_REF_LOCAL_P (funexp
));
2107 funexp
= gen_rtx_MEM (FUNCTION_MODE
, funexp
);
2108 insn
= emit_call_insn (gen_sibcall (funexp
, const0_rtx
));
2109 SIBLING_CALL_P (insn
) = 1;
2112 /* Run just enough of rest_of_compilation to get the insns emitted.
2113 There's not really enough bulk here to make other passes such as
2114 instruction scheduling worth while. Note that use_thunk calls
2115 assemble_start_function and assemble_end_function. */
2116 insn
= get_insns ();
2117 shorten_branches (insn
);
2118 final_start_function (insn
, file
, 1);
2119 final (insn
, file
, 1);
2120 final_end_function ();
2122 reload_completed
= 0;
2123 epilogue_completed
= 0;
2126 #undef TARGET_ASM_OUTPUT_MI_THUNK
2127 #define TARGET_ASM_OUTPUT_MI_THUNK or1k_output_mi_thunk
2128 #undef TARGET_ASM_CAN_OUTPUT_MI_THUNK
2129 #define TARGET_ASM_CAN_OUTPUT_MI_THUNK \
2130 hook_bool_const_tree_hwi_hwi_const_tree_true
2132 #undef TARGET_OPTION_OVERRIDE
2133 #define TARGET_OPTION_OVERRIDE or1k_option_override
2135 #undef TARGET_COMPUTE_FRAME_LAYOUT
2136 #define TARGET_COMPUTE_FRAME_LAYOUT or1k_compute_frame_layout
2138 #undef TARGET_LEGITIMATE_ADDRESS_P
2139 #define TARGET_LEGITIMATE_ADDRESS_P or1k_legitimate_address_p
2141 #undef TARGET_HAVE_TLS
2142 #define TARGET_HAVE_TLS true
2144 #undef TARGET_HAVE_SPECULATION_SAFE_VALUE
2145 #define TARGET_HAVE_SPECULATION_SAFE_VALUE speculation_safe_value_not_needed
2147 /* Calling Conventions. */
2148 #undef TARGET_FUNCTION_VALUE
2149 #define TARGET_FUNCTION_VALUE or1k_function_value
2150 #undef TARGET_LIBCALL_VALUE
2151 #define TARGET_LIBCALL_VALUE or1k_libcall_value
2152 #undef TARGET_FUNCTION_VALUE_REGNO_P
2153 #define TARGET_FUNCTION_VALUE_REGNO_P or1k_function_value_regno_p
2154 #undef TARGET_FUNCTION_ARG
2155 #define TARGET_FUNCTION_ARG or1k_function_arg
2156 #undef TARGET_FUNCTION_ARG_ADVANCE
2157 #define TARGET_FUNCTION_ARG_ADVANCE or1k_function_arg_advance
2158 #undef TARGET_RETURN_IN_MEMORY
2159 #define TARGET_RETURN_IN_MEMORY or1k_return_in_memory
2160 #undef TARGET_PASS_BY_REFERENCE
2161 #define TARGET_PASS_BY_REFERENCE or1k_pass_by_reference
2162 #undef TARGET_TRAMPOLINE_INIT
2163 #define TARGET_TRAMPOLINE_INIT or1k_trampoline_init
2164 #undef TARGET_FRAME_POINTER_REQUIRED
2165 #define TARGET_FRAME_POINTER_REQUIRED or1k_frame_pointer_required
2166 #undef TARGET_CUSTOM_FUNCTION_DESCRIPTORS
2167 #define TARGET_CUSTOM_FUNCTION_DESCRIPTORS 1
2169 /* Assembly generation. */
2170 #undef TARGET_PRINT_OPERAND
2171 #define TARGET_PRINT_OPERAND or1k_print_operand
2172 #undef TARGET_PRINT_OPERAND_ADDRESS
2173 #define TARGET_PRINT_OPERAND_ADDRESS or1k_print_operand_address
2175 /* Section anchor support. */
2176 #undef TARGET_MIN_ANCHOR_OFFSET
2177 #define TARGET_MIN_ANCHOR_OFFSET -32768
2178 #undef TARGET_MAX_ANCHOR_OFFSET
2179 #define TARGET_MAX_ANCHOR_OFFSET 32767
2181 struct gcc_target targetm
= TARGET_INITIALIZER
;
2183 #include "gt-or1k.h"