gcc/config/or1k/or1k.opt

   1 ; OpenRISC command line options
   2
   3 ; Copyright (C) 2010-2022 Free Software Foundation, Inc.
   4 ;
   5 ; This file is part of GCC.
   6 ;
   7 ; GCC is free software; you can redistribute it and/or modify it under
   8 ; the terms of the GNU General Public License as published by the Free
   9 ; Software Foundation; either version 3, or (at your option) any later
  10 ; version.
  11 ;
  12 ; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
  13 ; WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14 ; FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  15 ; for more details.
  16 ;
  17 ; You should have received a copy of the GNU General Public License
  18 ; along with GCC; see the file COPYING3.  If not see
  19 ; <http://www.gnu.org/licenses/>.
  20
  21 ; See the GCC internals manual (options.texi) for a description of
  22 ; this file's format.
  23
  24 HeaderInclude
  25 config/or1k/or1k-opts.h
  26
  27 mhard-div
  28 Target RejectNegative InverseMask(SOFT_DIV)
  29 Enable generation of hardware divide (l.div, l.divu) instructions.  This is the
  30 default; use -msoft-div to override.
  31
  32 msoft-div
  33 Target RejectNegative Mask(SOFT_DIV)
  34 Enable generation of binaries which use functions from libgcc to perform divide
  35 operations.  The default is -mhard-div.
  36
  37 mhard-mul
  38 Target RejectNegative InverseMask(SOFT_MUL).
  39 Enable generation of hardware multiply instructions (l.mul, l.muli) instructions.
  40 This is the default; use -msoft-mul to override.
  41
  42 msoft-mul
  43 Target RejectNegative Mask(SOFT_MUL).
  44 Enable generation of binaries which use functions from libgcc to perform
  45 multiply operations. The default is -mhard-mul.
  46
  47 msoft-float
  48 Target RejectNegative InverseMask(HARD_FLOAT)
  49 Enable generation of binaries which use functions from libgcc to perform
  50 floating point operations.  This is the default; use -mhard-float to override.
  51
  52 mhard-float
  53 Target RejectNegative Mask(HARD_FLOAT)
  54 Enable generation of hardware floating point instructions. The default is
  55 -msoft-float.
  56
  57 mdouble-float
  58 Target Mask(DOUBLE_FLOAT)
  59 When -mhard-float is selected, enables generation of double-precision floating
  60 point instructions.  By default functions from libgcc are used to perform
  61 double-precision floating point operations.
  62
  63 munordered-float
  64 Target RejectNegative Mask(FP_UNORDERED)
  65 When -mhard-float is selected, enables generation of unordered floating point
  66 compare and set flag (lf.sfun*) instructions.  By default functions from libgcc
  67 are used to perform unordered floating point compare and set flag operations.
  68
  69 mcmodel=
  70 Target RejectNegative Joined Enum(or1k_cmodel_type) Var(or1k_code_model) Init(CMODEL_SMALL)
  71 Specify the code model used for accessing memory addresses.  Specifying large
  72 enables generating binaries with large global offset tables.  By default the
  73 value is small.
  74
  75 Enum
  76 Name(or1k_cmodel_type) Type(enum or1k_cmodel_type)
  77 Known code model types (for use with the -mcmodel= option):
  78
  79 EnumValue
  80 Enum(or1k_cmodel_type) String(small) Value(CMODEL_SMALL)
  81
  82 EnumValue
  83 Enum(or1k_cmodel_type) String(large) Value(CMODEL_LARGE)
  84
  85 mcmov
  86 Target RejectNegative Mask(CMOV)
  87 Enable generation of conditional move (l.cmov) instructions.  By default the
  88 equivalent will be generated using set and branch.
  89
  90 mror
  91 Target RejectNegative Mask(ROR)
  92 Enable generation of rotate right (l.ror) instructions.  By default functions
  93 from libgcc are used to perform rotate right operations.
  94
  95 mrori
  96 Target RejectNegative Mask(RORI)
  97 Enable generation of rotate right with immediate (l.rori) instructions.  By
  98 default functions from libgcc are used to perform rotate right with immediate
  99 operations.
 100
 101 msext
 102 Target RejectNegative Mask(SEXT)
 103 Enable generation of sign extension (l.ext*) instructions.  By default memory
 104 loads are used to perform sign extension.
 105
 106 msfimm
 107 Target RejectNegative Mask(SFIMM)
 108 Enable generation of compare and set flag with immediate (l.sf*i) instructions.
 109 By default extra instructions will be generated to store the immediate to a
 110 register first.
 111
 112 mshftimm
 113 Target RejectNegative Mask(SHFTIMM)
 114 Enable generation of shift with immediate (l.srai, l.srli, l.slli) instructions.
 115 By default extra instructions will be generated to store the immediate to a
 116 register first.