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1 ;; Predicate definitions for HP PA-RISC.
2 ;; Copyright (C) 2005-2013 Free Software Foundation, Inc.
3 ;;
4 ;; This file is part of GCC.
5 ;;
6 ;; GCC is free software; you can redistribute it and/or modify
7 ;; it under the terms of the GNU General Public License as published by
8 ;; the Free Software Foundation; either version 3, or (at your option)
9 ;; any later version.
10 ;;
11 ;; GCC is distributed in the hope that it will be useful,
12 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ;; GNU General Public License for more details.
15 ;;
16 ;; You should have received a copy of the GNU General Public License
17 ;; along with GCC; see the file COPYING3. If not see
18 ;; <http://www.gnu.org/licenses/>.
19
20 ;; Return truth value of whether OP is an integer which fits the range
21 ;; constraining 5-bit signed immediate operands in three-address insns.
22
23 (define_predicate "int5_operand"
24 (and (match_code "const_int")
25 (match_test "INT_5_BITS (op)")))
26
27 ;; Return truth value of whether OP is an integer which fits the range
28 ;; constraining 5-bit unsigned immediate operands in three-address insns.
29
30 (define_predicate "uint5_operand"
31 (and (match_code "const_int")
32 (match_test "INT_U5_BITS (op)")))
33
34 ;; Return truth value of whether OP is an integer which fits the range
35 ;; constraining 6-bit unsigned immediate operands in three-address insns.
36
37 (define_predicate "uint6_operand"
38 (and (match_code "const_int")
39 (match_test "INT_U6_BITS (op)")))
40
41 ;; Return truth value of whether OP is an integer which fits the range
42 ;; constraining 11-bit signed immediate operands in three-address insns.
43
44 (define_predicate "int11_operand"
45 (and (match_code "const_int")
46 (match_test "INT_11_BITS (op)")))
47
48 ;; Return truth value of whether OP is an integer which fits the range
49 ;; constraining 14-bit signed immediate operands in three-address insns.
50
51 (define_predicate "int14_operand"
52 (and (match_code "const_int")
53 (match_test "INT_14_BITS (op)")))
54
55 ;; True iff OP is a const_int or const_double that will fit in 32 bits.
56
57 (define_predicate "uint32_operand"
58 (if_then_else (match_test "HOST_BITS_PER_WIDE_INT > 32")
59 (and (match_code "const_int")
60 (match_test "INTVAL (op) >= 0
61 && INTVAL (op) < (HOST_WIDE_INT) 1 << 32"))
62 (and (match_code "const_int,const_double")
63 (match_test "CONST_INT_P (op) || CONST_DOUBLE_HIGH (op) == 0"))))
64
65 ;; True iff depi can be used to compute (reg | OP).
66
67 (define_predicate "cint_ior_operand"
68 (and (match_code "const_int")
69 (match_test "pa_ior_mask_p (INTVAL (op))")))
70
71 ;; True iff OP is CONST_INT that can be moved in one instruction
72 ;; into a general register.
73
74 (define_predicate "cint_move_operand"
75 (and (match_code "const_int")
76 (match_test "pa_cint_ok_for_move (INTVAL (op))")))
77
78 ;; True iff OP is a CONST0_RTX for MODE.
79
80 (define_predicate "const_0_operand"
81 (and (match_code "const_int,const_double")
82 (match_test "op == CONST0_RTX (mode)")))
83
84 ;; A constant integer suitable for use in a PRE_MODIFY memory reference.
85
86 (define_predicate "pre_cint_operand"
87 (and (match_code "const_int")
88 (match_test "INTVAL (op) >= -0x2000 && INTVAL (op) < 0x10")))
89
90 ;; A constant integer suitable for use in a POST_MODIFY memory reference.
91
92 (define_predicate "post_cint_operand"
93 (and (match_code "const_int")
94 (match_test "INTVAL (op) < 0x2000 && INTVAL (op) >= -0x10")))
95
96 ;; True iff depi or extru can be used to compute (reg & OP).
97
98 (define_predicate "and_operand"
99 (ior (match_operand 0 "register_operand")
100 (and (match_code "const_int")
101 (match_test "pa_and_mask_p (INTVAL (op))"))))
102
103 ;; Return truth value of whether OP can be used as an operand in a
104 ;; three operand arithmetic insn that accepts registers of mode MODE
105 ;; or 5-bit signed integers.
106
107 (define_predicate "arith5_operand"
108 (ior (match_operand 0 "register_operand")
109 (match_operand 0 "int5_operand")))
110
111 ;; Return truth value of whether OP can be used as an operand in a
112 ;; three operand arithmetic insn that accepts registers of mode MODE
113 ;; or 11-bit signed integers.
114
115 (define_predicate "arith11_operand"
116 (ior (match_operand 0 "register_operand")
117 (match_operand 0 "int11_operand")))
118
119 ;; Return truth value of whether OP can be used as an operand in a
120 ;; three operand arithmetic insn that accepts registers of mode MODE
121 ;; or 14-bit signed integers.
122
123 (define_predicate "arith14_operand"
124 (ior (match_operand 0 "register_operand")
125 (match_operand 0 "int14_operand")))
126
127 ;; Return truth value of whether OP can be used as an operand in a
128 ;; three operand arithmetic insn that accepts registers of mode MODE
129 ;; or 32-bit signed integers.
130
131 (define_predicate "arith32_operand"
132 (ior (match_operand 0 "register_operand")
133 (match_code "const_int")))
134
135 ;; Return truth value of whether OP can be used as a shift operand in
136 ;; a shift insn that accepts registers of mode MODE or 5-bit shift amounts.
137
138 (define_predicate "shift5_operand"
139 (ior (match_operand 0 "register_operand")
140 (match_operand 0 "uint5_operand")))
141
142 ;; Return truth value of whether OP can be used as a shift operand in
143 ;; a shift insn that accepts registers of mode MODE or 6-bit shift amounts.
144
145 (define_predicate "shift6_operand"
146 (ior (match_operand 0 "register_operand")
147 (match_operand 0 "uint6_operand")))
148
149 ;; True iff OP can be used as an operand in an adddi3 insn.
150
151 (define_predicate "adddi3_operand"
152 (if_then_else (match_test "TARGET_64BIT")
153 (match_operand 0 "arith14_operand")
154 (match_operand 0 "arith11_operand")))
155
156 ;; True iff OP is valid as a base or index register in a REG+REG address.
157
158 (define_predicate "borx_reg_operand"
159 (match_code "reg")
160 {
161 /* We must reject virtual registers as the only expressions that
162 can be instantiated are REG and REG+CONST. */
163 if (op == virtual_incoming_args_rtx
164 || op == virtual_stack_vars_rtx
165 || op == virtual_stack_dynamic_rtx
166 || op == virtual_outgoing_args_rtx
167 || op == virtual_cfa_rtx)
168 return false;
169
170 /* While it's always safe to index off the frame pointer, it's not
171 profitable to do so when the frame pointer is being eliminated. */
172 if (!reload_completed
173 && flag_omit_frame_pointer
174 && !cfun->calls_alloca
175 && op == frame_pointer_rtx)
176 return false;
177
178 return register_operand (op, mode);
179 })
180
181 ;; Return nonzero if OP is suitable for use in a call to a named
182 ;; function.
183 ;;
184 ;; For 2.5 try to eliminate either call_operand_address or
185 ;; function_label_operand, they perform very similar functions.
186
187 (define_predicate "call_operand_address"
188 (match_code "label_ref,symbol_ref,const_int,const_double,const,high")
189 {
190 return (GET_MODE (op) == word_mode
191 && CONSTANT_P (op) && ! TARGET_PORTABLE_RUNTIME);
192 })
193
194 ;; True iff OP can be used as the divisor in a div millicode call.
195
196 (define_predicate "div_operand"
197 (match_code "reg,const_int")
198 {
199 return (mode == SImode
200 && ((REG_P (op) && REGNO (op) == 25)
201 || (CONST_INT_P (op)
202 && INTVAL (op) > 0 && INTVAL (op) < 16
203 && pa_magic_milli[INTVAL (op)])));
204 })
205
206 ;; True iff OP is a reloading floating point register
207
208 (define_predicate "fp_reg_operand"
209 (and (match_code "reg")
210 (match_test "reg_renumber && FP_REG_P (op)")))
211
212 ;; True iff OP is a function label operand.
213
214 (define_special_predicate "function_label_operand"
215 (and (match_code "symbol_ref")
216 (match_test "FUNCTION_NAME_P (XSTR (op, 0))")))
217
218 ;; True iff OP is an indexed memory operand.
219
220 (define_predicate "indexed_memory_operand"
221 (match_code "subreg,mem")
222 {
223 if (GET_MODE (op) != mode)
224 return false;
225
226 /* Before reload, a (SUBREG (MEM...)) forces reloading into a register. */
227 if (reload_completed && GET_CODE (op) == SUBREG)
228 op = SUBREG_REG (op);
229
230 if (! MEM_P (op))
231 return false;
232
233 op = XEXP (op, 0);
234 return IS_INDEX_ADDR_P (op) && memory_address_p (mode, op);
235 })
236
237 ;; True iff OP is a register plus base memory operand.
238
239 (define_predicate "reg_plus_base_memory_operand"
240 (match_code "subreg,mem")
241 {
242 if (GET_MODE (op) != mode)
243 return false;
244
245 /* Before reload, a (SUBREG (MEM...)) forces reloading into a register. */
246 if (reload_completed && GET_CODE (op) == SUBREG)
247 op = SUBREG_REG (op);
248
249 if (! MEM_P (op))
250 return false;
251
252 op = XEXP (op, 0);
253 if (GET_CODE (op) != PLUS)
254 return false;
255
256 if (REG_P (XEXP (op, 0)) && REG_OK_FOR_BASE_P (XEXP (op, 0)))
257 return GET_CODE (XEXP (op, 1)) == CONST_INT;
258
259 return false;
260 })
261
262 ;; True iff OP is a base14 operand.
263
264 (define_predicate "base14_operand"
265 (match_code "const_int")
266 {
267 if (!INT_14_BITS (op))
268 return false;
269
270 /* Although this may not be necessary, we require that the
271 base value is correctly aligned for its mode as this is
272 assumed in the instruction encoding. */
273 switch (mode)
274 {
275 case BLKmode:
276 case QImode:
277 case HImode:
278 return true;
279
280 default:
281 return (INTVAL (op) % GET_MODE_SIZE (mode)) == 0;
282 }
283
284 return false;
285 })
286
287 ;; True iff the operand OP can be used as the destination operand of
288 ;; an integer store. This also implies the operand could be used as
289 ;; the source operand of an integer load. LO_SUM DLT and indexed
290 ;; memory operands are not allowed. We accept reloading pseudos and
291 ;; other memory operands.
292
293 (define_predicate "integer_store_memory_operand"
294 (match_code "reg,mem")
295 {
296 if (reload_in_progress
297 && REG_P (op)
298 && REGNO (op) >= FIRST_PSEUDO_REGISTER
299 && reg_renumber [REGNO (op)] < 0)
300 return true;
301
302 if (reg_plus_base_memory_operand (op, mode))
303 {
304 /* Extract CONST_INT operand. */
305 if (GET_CODE (op) == SUBREG)
306 op = SUBREG_REG (op);
307 op = XEXP (op, 0);
308 op = REG_P (XEXP (op, 0)) ? XEXP (op, 1) : XEXP (op, 0);
309 return base14_operand (op, mode) || INT_5_BITS (op);
310 }
311
312 if (!MEM_P (op))
313 return false;
314
315 return ((reload_in_progress || memory_address_p (mode, XEXP (op, 0)))
316 && !IS_LO_SUM_DLT_ADDR_P (XEXP (op, 0))
317 && !IS_INDEX_ADDR_P (XEXP (op, 0)));
318 })
319
320 ;; True iff the operand OP can be used as the destination operand of
321 ;; a floating point store. This also implies the operand could be used as
322 ;; the source operand of a floating point load. LO_SUM DLT and indexed
323 ;; memory operands are not allowed. Symbolic operands are accepted if
324 ;; INT14_OK_STRICT is true. We accept reloading pseudos and other memory
325 ;; operands.
326
327 (define_predicate "floating_point_store_memory_operand"
328 (match_code "reg,mem")
329 {
330 if (reload_in_progress
331 && REG_P (op)
332 && REGNO (op) >= FIRST_PSEUDO_REGISTER
333 && reg_renumber [REGNO (op)] < 0)
334 return true;
335
336 if (reg_plus_base_memory_operand (op, mode))
337 {
338 /* Extract CONST_INT operand. */
339 if (GET_CODE (op) == SUBREG)
340 op = SUBREG_REG (op);
341 op = XEXP (op, 0);
342 op = REG_P (XEXP (op, 0)) ? XEXP (op, 1) : XEXP (op, 0);
343 return ((TARGET_PA_20
344 && !TARGET_ELF32
345 && base14_operand (op, mode))
346 || INT_5_BITS (op));
347 }
348
349 if (!MEM_P (op))
350 return false;
351
352 return ((reload_in_progress || memory_address_p (mode, XEXP (op, 0)))
353 && (INT14_OK_STRICT || !symbolic_memory_operand (op, VOIDmode))
354 && !IS_LO_SUM_DLT_ADDR_P (XEXP (op, 0))
355 && !IS_INDEX_ADDR_P (XEXP (op, 0)));
356 })
357
358 ;; Return true iff OP is an integer register.
359
360 (define_predicate "ireg_operand"
361 (and (match_code "reg")
362 (match_test "REGNO (op) > 0 && REGNO (op) < 32")))
363
364 ;; Return truth value of whether OP is an integer which fits the range
365 ;; constraining immediate operands in three-address insns, or is an
366 ;; integer register.
367
368 (define_predicate "ireg_or_int5_operand"
369 (ior (match_operand 0 "ireg_operand")
370 (match_operand 0 "int5_operand")))
371
372 ;; True iff OP is a CONST_INT of the forms 0...0xxxx, 0...01...1xxxx,
373 ;; or 1...1xxxx. Such values can be the left hand side x in (x << r),
374 ;; using the zvdepi instruction.
375
376 (define_predicate "lhs_lshift_cint_operand"
377 (match_code "const_int")
378 {
379 unsigned HOST_WIDE_INT x;
380 x = INTVAL (op) >> 4;
381 return (x & (x + 1)) == 0;
382 })
383
384 ;; True iff OP can be used in a zvdep instruction.
385
386 (define_predicate "lhs_lshift_operand"
387 (ior (match_operand 0 "register_operand")
388 (match_operand 0 "lhs_lshift_cint_operand")))
389
390 ;; Accept anything that can be used as a destination operand for a
391 ;; move instruction. We don't accept indexed memory operands since
392 ;; they are supported only for floating point stores.
393
394 (define_predicate "move_dest_operand"
395 (match_code "subreg,reg,mem")
396 {
397 if (register_operand (op, mode))
398 return true;
399
400 if (GET_MODE (op) != mode)
401 return false;
402
403 if (GET_CODE (op) == SUBREG)
404 op = SUBREG_REG (op);
405
406 if (! MEM_P (op))
407 return false;
408
409 op = XEXP (op, 0);
410
411 return (memory_address_p (mode, op)
412 && !IS_INDEX_ADDR_P (op)
413 && !IS_LO_SUM_DLT_ADDR_P (op));
414 })
415
416 ;; Accept anything that can be used as a source operand for a move
417 ;; instruction.
418
419 (define_predicate "move_src_operand"
420 (match_code "subreg,reg,const_int,const_double,mem")
421 {
422 if (register_operand (op, mode))
423 return true;
424
425 if (op == CONST0_RTX (mode))
426 return true;
427
428 if (CONST_INT_P (op))
429 return pa_cint_ok_for_move (INTVAL (op));
430
431 if (GET_MODE (op) != mode)
432 return false;
433
434 if (GET_CODE (op) == SUBREG)
435 op = SUBREG_REG (op);
436
437 if (! MEM_P (op))
438 return false;
439
440 /* Until problems with management of the REG_POINTER flag are resolved,
441 we need to delay creating move insns with unscaled indexed addresses
442 until CSE is not expected. */
443 if (!TARGET_NO_SPACE_REGS
444 && !cse_not_expected
445 && GET_CODE (XEXP (op, 0)) == PLUS
446 && REG_P (XEXP (XEXP (op, 0), 0))
447 && REG_P (XEXP (XEXP (op, 0), 1)))
448 return false;
449
450 return memory_address_p (mode, XEXP (op, 0));
451 })
452
453 ;; True iff OP is not a symbolic memory operand.
454
455 (define_predicate "nonsymb_mem_operand"
456 (match_code "subreg,mem")
457 {
458 if (GET_CODE (op) == SUBREG)
459 op = SUBREG_REG (op);
460
461 if (! MEM_P (op))
462 return false;
463
464 /* Until problems with management of the REG_POINTER flag are resolved,
465 we need to delay creating move insns with unscaled indexed addresses
466 until CSE is not expected. */
467 if (!TARGET_NO_SPACE_REGS
468 && !cse_not_expected
469 && GET_CODE (XEXP (op, 0)) == PLUS
470 && REG_P (XEXP (XEXP (op, 0), 0))
471 && REG_P (XEXP (XEXP (op, 0), 1)))
472 return false;
473
474 return (!symbolic_memory_operand (op, mode)
475 && memory_address_p (mode, XEXP (op, 0)));
476 })
477
478 ;; True iff OP is anything other than a hard register.
479
480 (define_predicate "non_hard_reg_operand"
481 (match_test "! (REG_P (op) && REGNO (op) < FIRST_PSEUDO_REGISTER)"))
482
483 ;; True iff OP is a reference to a label whose address can be loaded
484 ;; while generating PIC code.
485
486 (define_predicate "pic_label_operand"
487 (match_code "label_ref,const")
488 {
489 if (!flag_pic)
490 return false;
491
492 switch (GET_CODE (op))
493 {
494 case LABEL_REF:
495 return true;
496 case CONST:
497 op = XEXP (op, 0);
498 return (GET_CODE (XEXP (op, 0)) == LABEL_REF
499 && CONST_INT_P (XEXP (op, 1)));
500 default:
501 gcc_unreachable ();
502 }
503 return false;
504 })
505
506 ;; True iff the operand OP lives in text space. OP is a symbolic operand.
507 ;; If so, SYMBOL_REF_FLAG, which is set by pa_encode_section_info, is true.
508
509 (define_special_predicate "read_only_operand"
510 (match_test "true")
511 {
512 if (GET_CODE (op) == CONST)
513 op = XEXP (XEXP (op, 0), 0);
514 if (GET_CODE (op) == SYMBOL_REF)
515 {
516 if (flag_pic)
517 return SYMBOL_REF_FLAG (op) && !CONSTANT_POOL_ADDRESS_P (op);
518 else
519 return SYMBOL_REF_FLAG (op) || CONSTANT_POOL_ADDRESS_P (op);
520 }
521 return true;
522 })
523
524 ;; True iff the operand is a register operand, or a non-symbolic
525 ;; memory operand after reload. A SUBREG is not accepted since it
526 ;; will need a reload.
527 ;;
528 ;; This predicate is used for branch patterns that internally handle
529 ;; register reloading. We need to accept non-symbolic memory operands
530 ;; after reload to ensure that the pattern is still valid if reload
531 ;; didn't find a hard register for the operand.
532
533 (define_predicate "reg_before_reload_operand"
534 (match_code "reg,mem")
535 {
536 if (register_operand (op, mode))
537 return true;
538
539 if (reload_completed
540 && memory_operand (op, mode)
541 && !symbolic_memory_operand (op, mode))
542 return true;
543
544 return false;
545 })
546
547 ;; True iff OP is a register or const_0 operand for MODE.
548
549 (define_predicate "reg_or_0_operand"
550 (ior (match_operand 0 "register_operand")
551 (match_operand 0 "const_0_operand")))
552
553 ;; True iff OP is either a register, zero, or a non-symbolic memory operand.
554
555 (define_predicate "reg_or_0_or_nonsymb_mem_operand"
556 (ior (match_operand 0 "reg_or_0_operand")
557 (match_operand 0 "nonsymb_mem_operand")))
558
559 ;; Accept REG and any CONST_INT that can be moved in one instruction
560 ;; into a general register.
561
562 (define_predicate "reg_or_cint_move_operand"
563 (ior (match_operand 0 "register_operand")
564 (match_operand 0 "cint_move_operand")))
565
566 ;; True iff OP can be used to compute (reg | OP).
567
568 (define_predicate "reg_or_cint_ior_operand"
569 (ior (match_operand 0 "register_operand")
570 (match_operand 0 "cint_ior_operand")))
571
572 ;; Return 1 if OP is a CONST_INT with the value 2, 4, or 8. These are
573 ;; the valid constants for shadd instructions.
574
575 (define_predicate "shadd_operand"
576 (and (match_code "const_int")
577 (match_test "pa_shadd_constant_p (INTVAL (op))")))
578
579 ;; Return truth value of statement that OP is a symbolic memory operand.
580
581 (define_predicate "symbolic_memory_operand"
582 (match_code "subreg,mem")
583 {
584 if (GET_CODE (op) == SUBREG)
585 op = SUBREG_REG (op);
586 if (!MEM_P (op))
587 return false;
588 op = XEXP (op, 0);
589 if (GET_CODE (op) == LO_SUM)
590 op = XEXP (op, 1);
591 return pa_symbolic_expression_p (op);
592 })
593
594 ;; True iff OP is a symbolic operand.
595 ;; Note: an inline copy of this code is present in pa_secondary_reload.
596
597 (define_predicate "symbolic_operand"
598 (match_code "symbol_ref,label_ref,const")
599 {
600 switch (GET_CODE (op))
601 {
602 case SYMBOL_REF:
603 return !SYMBOL_REF_TLS_MODEL (op);
604 case LABEL_REF:
605 return true;
606 case CONST:
607 op = XEXP (op, 0);
608 return (GET_CODE (op) == PLUS
609 && ((GET_CODE (XEXP (op, 0)) == SYMBOL_REF
610 && !SYMBOL_REF_TLS_MODEL (XEXP (op, 0)))
611 || GET_CODE (XEXP (op, 0)) == LABEL_REF)
612 && GET_CODE (XEXP (op, 1)) == CONST_INT);
613 default:
614 break;
615 }
616 return false;
617 })
618
619 ;; Return true if OP is a symbolic operand for the TLS Global Dynamic model.
620
621 (define_predicate "tgd_symbolic_operand"
622 (and (match_code "symbol_ref")
623 (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_GLOBAL_DYNAMIC")))
624
625 ;; Return true if OP is a symbolic operand for the TLS Local Dynamic model.
626
627 (define_predicate "tld_symbolic_operand"
628 (and (match_code "symbol_ref")
629 (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_LOCAL_DYNAMIC")))
630
631 ;; Return true if OP is a symbolic operand for the TLS Initial Exec model.
632
633 (define_predicate "tie_symbolic_operand"
634 (and (match_code "symbol_ref")
635 (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_INITIAL_EXEC")))
636
637 ;; Return true if OP is a symbolic operand for the TLS Local Exec model.
638
639 (define_predicate "tle_symbolic_operand"
640 (and (match_code "symbol_ref")
641 (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_LOCAL_EXEC")))
642
643 ;; True iff this is a comparison operator. This allows the use of
644 ;; MATCH_OPERATOR to recognize all the branch insns.
645
646 (define_predicate "cmpib_comparison_operator"
647 (match_code "eq,ne,lt,le,leu,gt,gtu,ge"))
648
649 ;; True iff OP is an operator suitable for use in a movb instruction.
650
651 (define_predicate "movb_comparison_operator"
652 (match_code "eq,ne,lt,ge"))
653
654 ;; True iff OP is a PLUS, XOR or IOR operator.
655
656 (define_predicate "plus_xor_ior_operator"
657 (match_code "plus,xor,ior"))