gcc/config/riscv/riscv-vector-builtins.def

   1 /* Builtins macros for RISC-V 'V' Extension for GNU compiler.
   2    Copyright (C) 2022-2023 Free Software Foundation, Inc.
   3    Contributed by Ju-Zhe Zhong (juzhe.zhong@rivai.ai), RiVAI Technologies Ltd.
   4
   5 This file is part of GCC.
   6
   7 GCC is free software; you can redistribute it and/or modify
   8 it under the terms of the GNU General Public License as published by
   9 the Free Software Foundation; either version 3, or (at your option)
  10 any later version.
  11
  12 GCC is distributed in the hope that it will be useful,
  13 but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 GNU General Public License for more details.
  16
  17 You should have received a copy of the GNU General Public License
  18 along with GCC; see the file COPYING3.  If not see
  19 <http://www.gnu.org/licenses/>.  */
  20
  21 /* Use "DEF_RVV_TYPE" macro to define RVV datatype builtins.
  22    1.The 'NAME' argument is the name exposed to users.
  23      For example, "vint32m1_t".
  24    2.The 'NCHARS' argument is the length of ABI-name.
  25      For example, length of "__rvv_int32m1_t" is 15.
  26    3.The 'ABI_NAME' argument is the ABI-name. For example, "__rvv_int32m1_t".
  27    4.The 'SCALAR_TYPE' argument is associated scalar type which is used in
  28      "build_vector_type_for_mode". For "vint32m1_t", we use "intSI_type_node" in
  29      RV64. Otherwise, we use "long_integer_type_node".
  30    5.The 'VECTOR_MODE' is the machine modes of corresponding RVV type used
  31      in "build_vector_type_for_mode" when TARGET_MIN_VLEN > 32.
  32      For example: VECTOR_MODE = VNx2SI for "vint32m1_t".
  33    6.The 'VECTOR_MODE_MIN_VLEN_32' is the machine modes of corresponding RVV
  34      type used in "build_vector_type_for_mode" when TARGET_MIN_VLEN = 32. For
  35      example: VECTOR_MODE_MIN_VLEN_32 = VNx1SI for "vint32m1_t".
  36    7.The 'VECTOR_SUFFIX' define mode suffix for vector type.
  37      For example: type_suffixes[VECTOR_TYPE_vin32m1_t].vector = i32m1.
  38    8.The 'SCALAR_SUFFIX' define mode suffix for scalar type.
  39      For example: type_suffixes[VECTOR_TYPE_vin32m1_t].scalar = i32.
  40    9.The 'VSETVL_SUFFIX' define mode suffix for vsetvli instruction.
  41      For example: type_suffixes[VECTOR_TYPE_vin32m1_t].vsetvl = e32m1.
  42 */
  43
  44 #ifndef DEF_RVV_TYPE
  45 #define DEF_RVV_TYPE(NAME, NCHARS, ABI_NAME, SCALAR_TYPE,                      \
  46                      VECTOR_MODE_MIN_VLEN_128, VECTOR_MODE_MIN_VLEN_64,        \
  47                      VECTOR_MODE_MIN_VLEN_32, VECTOR_SUFFIX, SCALAR_SUFFIX,    \
  48                      VSETVL_SUFFIX)
  49 #endif
  50
  51 #ifndef DEF_RVV_TUPLE_TYPE
  52 #define DEF_RVV_TUPLE_TYPE(NAME, NCHARS, ABI_NAME, SUBPART_TYPE, SCALAR_TYPE,  \
  53                            NF, VECTOR_SUFFIX)
  54 #endif
  55
  56 /* Use "DEF_RVV_OP_TYPE" macro to define RVV operand types.
  57    The 'NAME' will be concatenated into intrinsic function name.  */
  58 #ifndef DEF_RVV_OP_TYPE
  59 #define DEF_RVV_OP_TYPE(NAME)
  60 #endif
  61
  62 /* Use "DEF_RVV_PRED_TYPE" macro to define RVV predication types.
  63    The 'NAME' will be concatenated into intrinsic function name.  */
  64 #ifndef DEF_RVV_PRED_TYPE
  65 #define DEF_RVV_PRED_TYPE(NAME)
  66 #endif
  67
  68 /* Use "DEF_RVV_BASE_TYPE" macro to define RVV base types.
  69    The 'NAME' will be concatenated into intrinsic function name.  */
  70 #ifndef DEF_RVV_BASE_TYPE
  71 #define DEF_RVV_BASE_TYPE(NAME, TYPE)
  72 #endif
  73
  74 /* Use "DEF_RVV_TYPE_INDEX" macro to define RVV function types.  */
  75 #ifndef DEF_RVV_TYPE_INDEX
  76 #define DEF_RVV_TYPE_INDEX(                                                    \
  77   VECTOR, MASK, SIGNED, UNSIGNED, EEW8_INDEX, EEW16_INDEX, EEW32_INDEX,        \
  78   EEW64_INDEX, SHIFT, DOUBLE_TRUNC, QUAD_TRUNC, OCT_TRUNC,                     \
  79   DOUBLE_TRUNC_SCALAR, DOUBLE_TRUNC_SIGNED, DOUBLE_TRUNC_UNSIGNED,             \
  80   DOUBLE_TRUNC_UNSIGNED_SCALAR, DOUBLE_TRUNC_FLOAT, FLOAT, LMUL1, WLMUL1,      \
  81   EEW8_INTERPRET, EEW16_INTERPRET, EEW32_INTERPRET, EEW64_INTERPRET,           \
  82   BOOL1_INTERPRET, BOOL2_INTERPRET, BOOL4_INTERPRET, BOOL8_INTERPRET,          \
  83   BOOL16_INTERPRET, BOOL32_INTERPRET, BOOL64_INTERPRET,                        \
  84   SIGNED_EEW8_LMUL1_INTERPRET, SIGNED_EEW16_LMUL1_INTERPRET,                   \
  85   SIGNED_EEW32_LMUL1_INTERPRET, SIGNED_EEW64_LMUL1_INTERPRET,                  \
  86   UNSIGNED_EEW8_LMUL1_INTERPRET, UNSIGNED_EEW16_LMUL1_INTERPRET,               \
  87   UNSIGNED_EEW32_LMUL1_INTERPRET, UNSIGNED_EEW64_LMUL1_INTERPRET,              \
  88   X2_VLMUL_EXT, X4_VLMUL_EXT, X8_VLMUL_EXT, X16_VLMUL_EXT, X32_VLMUL_EXT,      \
  89   X64_VLMUL_EXT, TUPLE_SUBPART)
  90 #endif
  91
  92 /* Define RVV_VXRM rounding mode enum for fixed-point intrinsics.  */
  93 #ifndef DEF_RVV_VXRM_ENUM
  94 #define DEF_RVV_VXRM_ENUM(NAME, VALUE)
  95 #endif
  96
  97 /* Define RVV_FRM rounding mode enum for floating-point intrinsics.  */
  98 #ifndef DEF_RVV_FRM_ENUM
  99 #define DEF_RVV_FRM_ENUM(NAME, VALUE)
 100 #endif
 101
 102 /* SEW/LMUL = 64:
 103    Only enable when TARGET_MIN_VLEN > 32.
 104    Machine mode = VNx1BImode when TARGET_MIN_VLEN < 128.
 105    Machine mode = VNx2BImode when TARGET_MIN_VLEN >= 128.  */
 106 DEF_RVV_TYPE (vbool64_t, 14, __rvv_bool64_t, boolean, VNx2BI, VNx1BI, VOID, _b64, , )
 107 /* SEW/LMUL = 32:
 108    Machine mode = VNx2BImode when TARGET_MIN_VLEN > 32.
 109    Machine mode = VNx1BImode when TARGET_MIN_VLEN = 32.  */
 110 DEF_RVV_TYPE (vbool32_t, 14, __rvv_bool32_t, boolean, VNx4BI, VNx2BI, VNx1BI, _b32, , )
 111 /* SEW/LMUL = 16:
 112    Machine mode = VNx8BImode when TARGET_MIN_VLEN >= 128.
 113    Machine mode = VNx2BImode when TARGET_MIN_VLEN = 32.
 114    Machine mode = VNx4BImode when TARGET_MIN_VLEN > 32.  */
 115 DEF_RVV_TYPE (vbool16_t, 14, __rvv_bool16_t, boolean, VNx8BI, VNx4BI, VNx2BI, _b16, , )
 116 /* SEW/LMUL = 8:
 117    Machine mode = VNx16BImode when TARGET_MIN_VLEN >= 128.
 118    Machine mode = VNx8BImode when TARGET_MIN_VLEN > 32.
 119    Machine mode = VNx4BImode when TARGET_MIN_VLEN = 32.  */
 120 DEF_RVV_TYPE (vbool8_t, 13, __rvv_bool8_t, boolean, VNx16BI, VNx8BI, VNx4BI, _b8, , )
 121 /* SEW/LMUL = 4:
 122    Machine mode = VNx32BImode when TARGET_MIN_VLEN >= 128.
 123    Machine mode = VNx16BImode when TARGET_MIN_VLEN > 32.
 124    Machine mode = VNx8BImode when TARGET_MIN_VLEN = 32.  */
 125 DEF_RVV_TYPE (vbool4_t, 13, __rvv_bool4_t, boolean, VNx32BI, VNx16BI, VNx8BI, _b4, , )
 126 /* SEW/LMUL = 2:
 127    Machine mode = VNx64BImode when TARGET_MIN_VLEN >= 128.
 128    Machine mode = VNx32BImode when TARGET_MIN_VLEN > 32.
 129    Machine mode = VNx16BImode when TARGET_MIN_VLEN = 32.  */
 130 DEF_RVV_TYPE (vbool2_t, 13, __rvv_bool2_t, boolean, VNx64BI, VNx32BI, VNx16BI, _b2, , )
 131 /* SEW/LMUL = 1:
 132    Machine mode = VNx128BImode when TARGET_MIN_VLEN >= 128.
 133    Machine mode = VNx64BImode when TARGET_MIN_VLEN > 32.
 134    Machine mode = VNx32BImode when TARGET_MIN_VLEN = 32.  */
 135 DEF_RVV_TYPE (vbool1_t, 13, __rvv_bool1_t, boolean, VNx128BI, VNx64BI, VNx32BI, _b1, , )
 136
 137 /* LMUL = 1/8:
 138    Only enble when TARGET_MIN_VLEN > 32.
 139    Machine mode = VNx1QImode when TARGET_MIN_VLEN < 128.
 140    Machine mode = VNx2QImode when TARGET_MIN_VLEN >= 128.  */
 141 DEF_RVV_TYPE (vint8mf8_t, 15, __rvv_int8mf8_t, int8, VNx2QI, VNx1QI, VOID, _i8mf8, _i8,
 142               _e8mf8)
 143 DEF_RVV_TYPE (vuint8mf8_t, 16, __rvv_uint8mf8_t, uint8, VNx2QI, VNx1QI, VOID, _u8mf8,
 144               _u8, _e8mf8)
 145 /* Define tuple types for SEW = 8, LMUL = MF8.  */
 146 DEF_RVV_TUPLE_TYPE (vint8mf8x2_t, 17, __rvv_int8mf8x2_t, vint8mf8_t, int8, 2, _i8mf8x2)
 147 DEF_RVV_TUPLE_TYPE (vuint8mf8x2_t, 18, __rvv_uint8mf8x2_t, vuint8mf8_t, uint8, 2, _u8mf8x2)
 148 DEF_RVV_TUPLE_TYPE (vint8mf8x3_t, 17, __rvv_int8mf8x3_t, vint8mf8_t, int8, 3, _i8mf8x3)
 149 DEF_RVV_TUPLE_TYPE (vuint8mf8x3_t, 18, __rvv_uint8mf8x3_t, vuint8mf8_t, uint8, 3, _u8mf8x3)
 150 DEF_RVV_TUPLE_TYPE (vint8mf8x4_t, 17, __rvv_int8mf8x4_t, vint8mf8_t, int8, 4, _i8mf8x4)
 151 DEF_RVV_TUPLE_TYPE (vuint8mf8x4_t, 18, __rvv_uint8mf8x4_t, vuint8mf8_t, uint8, 4, _u8mf8x4)
 152 DEF_RVV_TUPLE_TYPE (vint8mf8x5_t, 17, __rvv_int8mf8x5_t, vint8mf8_t, int8, 5, _i8mf8x5)
 153 DEF_RVV_TUPLE_TYPE (vuint8mf8x5_t, 18, __rvv_uint8mf8x5_t, vuint8mf8_t, uint8, 5, _u8mf8x5)
 154 DEF_RVV_TUPLE_TYPE (vint8mf8x6_t, 17, __rvv_int8mf8x6_t, vint8mf8_t, int8, 6, _i8mf8x6)
 155 DEF_RVV_TUPLE_TYPE (vuint8mf8x6_t, 18, __rvv_uint8mf8x6_t, vuint8mf8_t, uint8, 6, _u8mf8x6)
 156 DEF_RVV_TUPLE_TYPE (vint8mf8x7_t, 17, __rvv_int8mf8x7_t, vint8mf8_t, int8, 7, _i8mf8x7)
 157 DEF_RVV_TUPLE_TYPE (vuint8mf8x7_t, 18, __rvv_uint8mf8x7_t, vuint8mf8_t, uint8, 7, _u8mf8x7)
 158 DEF_RVV_TUPLE_TYPE (vint8mf8x8_t, 17, __rvv_int8mf8x8_t, vint8mf8_t, int8, 8, _i8mf8x8)
 159 DEF_RVV_TUPLE_TYPE (vuint8mf8x8_t, 18, __rvv_uint8mf8x8_t, vuint8mf8_t, uint8, 8, _u8mf8x8)
 160 /* LMUL = 1/4:
 161    Machine mode = VNx4QImode when TARGET_MIN_VLEN >= 128.
 162    Machine mode = VNx2QImode when TARGET_MIN_VLEN > 32.
 163    Machine mode = VNx1QImode when TARGET_MIN_VLEN = 32.  */
 164 DEF_RVV_TYPE (vint8mf4_t, 15, __rvv_int8mf4_t, int8, VNx4QI, VNx2QI, VNx1QI, _i8mf4,
 165               _i8, _e8mf4)
 166 DEF_RVV_TYPE (vuint8mf4_t, 16, __rvv_uint8mf4_t, uint8, VNx4QI, VNx2QI, VNx1QI, _u8mf4,
 167               _u8, _e8mf4)
 168 /* Define tuple types for SEW = 8, LMUL = MF4.  */
 169 DEF_RVV_TUPLE_TYPE (vint8mf4x2_t, 17, __rvv_int8mf4x2_t, vint8mf4_t, int8, 2, _i8mf4x2)
 170 DEF_RVV_TUPLE_TYPE (vuint8mf4x2_t, 18, __rvv_uint8mf4x2_t, vuint8mf4_t, uint8, 2, _u8mf4x2)
 171 DEF_RVV_TUPLE_TYPE (vint8mf4x3_t, 17, __rvv_int8mf4x3_t, vint8mf4_t, int8, 3, _i8mf4x3)
 172 DEF_RVV_TUPLE_TYPE (vuint8mf4x3_t, 18, __rvv_uint8mf4x3_t, vuint8mf4_t, uint8, 3, _u8mf4x3)
 173 DEF_RVV_TUPLE_TYPE (vint8mf4x4_t, 17, __rvv_int8mf4x4_t, vint8mf4_t, int8, 4, _i8mf4x4)
 174 DEF_RVV_TUPLE_TYPE (vuint8mf4x4_t, 18, __rvv_uint8mf4x4_t, vuint8mf4_t, uint8, 4, _u8mf4x4)
 175 DEF_RVV_TUPLE_TYPE (vint8mf4x5_t, 17, __rvv_int8mf4x5_t, vint8mf4_t, int8, 5, _i8mf4x5)
 176 DEF_RVV_TUPLE_TYPE (vuint8mf4x5_t, 18, __rvv_uint8mf4x5_t, vuint8mf4_t, uint8, 5, _u8mf4x5)
 177 DEF_RVV_TUPLE_TYPE (vint8mf4x6_t, 17, __rvv_int8mf4x6_t, vint8mf4_t, int8, 6, _i8mf4x6)
 178 DEF_RVV_TUPLE_TYPE (vuint8mf4x6_t, 18, __rvv_uint8mf4x6_t, vuint8mf4_t, uint8, 6, _u8mf4x6)
 179 DEF_RVV_TUPLE_TYPE (vint8mf4x7_t, 17, __rvv_int8mf4x7_t, vint8mf4_t, int8, 7, _i8mf4x7)
 180 DEF_RVV_TUPLE_TYPE (vuint8mf4x7_t, 18, __rvv_uint8mf4x7_t, vuint8mf4_t, uint8, 7, _u8mf4x7)
 181 DEF_RVV_TUPLE_TYPE (vint8mf4x8_t, 17, __rvv_int8mf4x8_t, vint8mf4_t, int8, 8, _i8mf4x8)
 182 DEF_RVV_TUPLE_TYPE (vuint8mf4x8_t, 18, __rvv_uint8mf4x8_t, vuint8mf4_t, uint8, 8, _u8mf4x8)
 183 /* LMUL = 1/2:
 184    Machine mode = VNx8QImode when TARGET_MIN_VLEN >= 128.
 185    Machine mode = VNx4QImode when TARGET_MIN_VLEN > 32.
 186    Machine mode = VNx2QImode when TARGET_MIN_VLEN = 32.  */
 187 DEF_RVV_TYPE (vint8mf2_t, 15, __rvv_int8mf2_t, int8, VNx8QI, VNx4QI, VNx2QI, _i8mf2,
 188               _i8, _e8mf2)
 189 DEF_RVV_TYPE (vuint8mf2_t, 16, __rvv_uint8mf2_t, uint8, VNx8QI, VNx4QI, VNx2QI, _u8mf2,
 190               _u8, _e8mf2)
 191 /* Define tuple types for SEW = 8, LMUL = MF2.  */
 192 DEF_RVV_TUPLE_TYPE (vint8mf2x2_t, 17, __rvv_int8mf2x2_t, vint8mf2_t, int8, 2, _i8mf2x2)
 193 DEF_RVV_TUPLE_TYPE (vuint8mf2x2_t, 18, __rvv_uint8mf2x2_t, vuint8mf2_t, uint8, 2, _u8mf2x2)
 194 DEF_RVV_TUPLE_TYPE (vint8mf2x3_t, 17, __rvv_int8mf2x3_t, vint8mf2_t, int8, 3, _i8mf2x3)
 195 DEF_RVV_TUPLE_TYPE (vuint8mf2x3_t, 18, __rvv_uint8mf2x3_t, vuint8mf2_t, uint8, 3, _u8mf2x3)
 196 DEF_RVV_TUPLE_TYPE (vint8mf2x4_t, 17, __rvv_int8mf2x4_t, vint8mf2_t, int8, 4, _i8mf2x4)
 197 DEF_RVV_TUPLE_TYPE (vuint8mf2x4_t, 18, __rvv_uint8mf2x4_t, vuint8mf2_t, uint8, 4, _u8mf2x4)
 198 DEF_RVV_TUPLE_TYPE (vint8mf2x5_t, 17, __rvv_int8mf2x5_t, vint8mf2_t, int8, 5, _i8mf2x5)
 199 DEF_RVV_TUPLE_TYPE (vuint8mf2x5_t, 18, __rvv_uint8mf2x5_t, vuint8mf2_t, uint8, 5, _u8mf2x5)
 200 DEF_RVV_TUPLE_TYPE (vint8mf2x6_t, 17, __rvv_int8mf2x6_t, vint8mf2_t, int8, 6, _i8mf2x6)
 201 DEF_RVV_TUPLE_TYPE (vuint8mf2x6_t, 18, __rvv_uint8mf2x6_t, vuint8mf2_t, uint8, 6, _u8mf2x6)
 202 DEF_RVV_TUPLE_TYPE (vint8mf2x7_t, 17, __rvv_int8mf2x7_t, vint8mf2_t, int8, 7, _i8mf2x7)
 203 DEF_RVV_TUPLE_TYPE (vuint8mf2x7_t, 18, __rvv_uint8mf2x7_t, vuint8mf2_t, uint8, 7, _u8mf2x7)
 204 DEF_RVV_TUPLE_TYPE (vint8mf2x8_t, 17, __rvv_int8mf2x8_t, vint8mf2_t, int8, 8, _i8mf2x8)
 205 DEF_RVV_TUPLE_TYPE (vuint8mf2x8_t, 18, __rvv_uint8mf2x8_t, vuint8mf2_t, uint8, 8, _u8mf2x8)
 206 /* LMUL = 1:
 207    Machine mode = VNx16QImode when TARGET_MIN_VLEN >= 128.
 208    Machine mode = VNx8QImode when TARGET_MIN_VLEN > 32.
 209    Machine mode = VNx4QImode when TARGET_MIN_VLEN = 32.  */
 210 DEF_RVV_TYPE (vint8m1_t, 14, __rvv_int8m1_t, int8, VNx16QI, VNx8QI, VNx4QI, _i8m1, _i8,
 211               _e8m1)
 212 DEF_RVV_TYPE (vuint8m1_t, 15, __rvv_uint8m1_t, uint8, VNx16QI, VNx8QI, VNx4QI, _u8m1,
 213               _u8, _e8m1)
 214 /* Define tuple types for SEW = 8, LMUL = M1.  */
 215 DEF_RVV_TUPLE_TYPE (vint8m1x2_t, 16, __rvv_int8m1x2_t, vint8m1_t, int8, 2, _i8m1x2)
 216 DEF_RVV_TUPLE_TYPE (vuint8m1x2_t, 17, __rvv_uint8m1x2_t, vuint8m1_t, uint8, 2, _u8m1x2)
 217 DEF_RVV_TUPLE_TYPE (vint8m1x3_t, 16, __rvv_int8m1x3_t, vint8m1_t, int8, 3, _i8m1x3)
 218 DEF_RVV_TUPLE_TYPE (vuint8m1x3_t, 17, __rvv_uint8m1x3_t, vuint8m1_t, uint8, 3, _u8m1x3)
 219 DEF_RVV_TUPLE_TYPE (vint8m1x4_t, 16, __rvv_int8m1x4_t, vint8m1_t, int8, 4, _i8m1x4)
 220 DEF_RVV_TUPLE_TYPE (vuint8m1x4_t, 17, __rvv_uint8m1x4_t, vuint8m1_t, uint8, 4, _u8m1x4)
 221 DEF_RVV_TUPLE_TYPE (vint8m1x5_t, 16, __rvv_int8m1x5_t, vint8m1_t, int8, 5, _i8m1x5)
 222 DEF_RVV_TUPLE_TYPE (vuint8m1x5_t, 17, __rvv_uint8m1x5_t, vuint8m1_t, uint8, 5, _u8m1x5)
 223 DEF_RVV_TUPLE_TYPE (vint8m1x6_t, 16, __rvv_int8m1x6_t, vint8m1_t, int8, 6, _i8m1x6)
 224 DEF_RVV_TUPLE_TYPE (vuint8m1x6_t, 17, __rvv_uint8m1x6_t, vuint8m1_t, uint8, 6, _u8m1x6)
 225 DEF_RVV_TUPLE_TYPE (vint8m1x7_t, 16, __rvv_int8m1x7_t, vint8m1_t, int8, 7, _i8m1x7)
 226 DEF_RVV_TUPLE_TYPE (vuint8m1x7_t, 17, __rvv_uint8m1x7_t, vuint8m1_t, uint8, 7, _u8m1x7)
 227 DEF_RVV_TUPLE_TYPE (vint8m1x8_t, 16, __rvv_int8m1x8_t, vint8m1_t, int8, 8, _i8m1x8)
 228 DEF_RVV_TUPLE_TYPE (vuint8m1x8_t, 17, __rvv_uint8m1x8_t, vuint8m1_t, uint8, 8, _u8m1x8)
 229 /* LMUL = 2:
 230    Machine mode = VNx32QImode when TARGET_MIN_VLEN >= 128.
 231    Machine mode = VNx16QImode when TARGET_MIN_VLEN > 32.
 232    Machine mode = VNx8QImode when TARGET_MIN_VLEN = 32.  */
 233 DEF_RVV_TYPE (vint8m2_t, 14, __rvv_int8m2_t, int8, VNx32QI, VNx16QI, VNx8QI, _i8m2, _i8,
 234               _e8m2)
 235 DEF_RVV_TYPE (vuint8m2_t, 15, __rvv_uint8m2_t, uint8, VNx32QI, VNx16QI, VNx8QI, _u8m2,
 236               _u8, _e8m2)
 237 /* Define tuple types for SEW = 8, LMUL = M2.  */
 238 DEF_RVV_TUPLE_TYPE (vint8m2x2_t, 16, __rvv_int8m2x2_t, vint8m2_t, int8, 2, _i8m2x2)
 239 DEF_RVV_TUPLE_TYPE (vuint8m2x2_t, 17, __rvv_uint8m2x2_t, vuint8m2_t, uint8, 2, _u8m2x2)
 240 DEF_RVV_TUPLE_TYPE (vint8m2x3_t, 16, __rvv_int8m2x3_t, vint8m2_t, int8, 3, _i8m2x3)
 241 DEF_RVV_TUPLE_TYPE (vuint8m2x3_t, 17, __rvv_uint8m2x3_t, vuint8m2_t, uint8, 3, _u8m2x3)
 242 DEF_RVV_TUPLE_TYPE (vint8m2x4_t, 16, __rvv_int8m2x4_t, vint8m2_t, int8, 4, _i8m2x4)
 243 DEF_RVV_TUPLE_TYPE (vuint8m2x4_t, 17, __rvv_uint8m2x4_t, vuint8m2_t, uint8, 4, _u8m2x4)
 244 /* LMUL = 4:
 245    Machine mode = VNx64QImode when TARGET_MIN_VLEN >= 128.
 246    Machine mode = VNx32QImode when TARGET_MIN_VLEN > 32.
 247    Machine mode = VNx16QImode when TARGET_MIN_VLEN = 32.  */
 248 DEF_RVV_TYPE (vint8m4_t, 14, __rvv_int8m4_t, int8, VNx64QI, VNx32QI, VNx16QI, _i8m4, _i8,
 249               _e8m4)
 250 DEF_RVV_TYPE (vuint8m4_t, 15, __rvv_uint8m4_t, uint8, VNx64QI, VNx32QI, VNx16QI, _u8m4,
 251               _u8, _e8m4)
 252 /* Define tuple types for SEW = 8, LMUL = M4.  */
 253 DEF_RVV_TUPLE_TYPE (vint8m4x2_t, 16, __rvv_int8m4x2_t, vint8m4_t, int8, 2, _i8m4x2)
 254 DEF_RVV_TUPLE_TYPE (vuint8m4x2_t, 17, __rvv_uint8m4x2_t, vuint8m4_t, uint8, 2, _u8m4x2)
 255 /* LMUL = 8:
 256    Machine mode = VNx128QImode when TARGET_MIN_VLEN >= 128.
 257    Machine mode = VNx64QImode when TARGET_MIN_VLEN > 32.
 258    Machine mode = VNx32QImode when TARGET_MIN_VLEN = 32.  */
 259 DEF_RVV_TYPE (vint8m8_t, 14, __rvv_int8m8_t, int8, VNx128QI, VNx64QI, VNx32QI, _i8m8, _i8,
 260               _e8m8)
 261 DEF_RVV_TYPE (vuint8m8_t, 15, __rvv_uint8m8_t, uint8, VNx128QI, VNx64QI, VNx32QI, _u8m8,
 262               _u8, _e8m8)
 263
 264 /* LMUL = 1/4:
 265    Only enble when TARGET_MIN_VLEN > 32.
 266    Machine mode = VNx1HImode when TARGET_MIN_VLEN < 128.
 267    Machine mode = VNx2HImode when TARGET_MIN_VLEN >= 128.  */
 268 DEF_RVV_TYPE (vint16mf4_t, 16, __rvv_int16mf4_t, int16, VNx2HI, VNx1HI, VOID, _i16mf4,
 269               _i16, _e16mf4)
 270 DEF_RVV_TYPE (vuint16mf4_t, 17, __rvv_uint16mf4_t, uint16, VNx2HI, VNx1HI, VOID,
 271               _u16mf4, _u16, _e16mf4)
 272 /* Define tuple types for SEW = 16, LMUL = MF4.  */
 273 DEF_RVV_TUPLE_TYPE (vint16mf4x2_t, 18, __rvv_int16mf4x2_t, vint16mf4_t, int16, 2, _i16mf4x2)
 274 DEF_RVV_TUPLE_TYPE (vuint16mf4x2_t, 19, __rvv_uint16mf4x2_t, vuint16mf4_t, uint16, 2, _u16mf4x2)
 275 DEF_RVV_TUPLE_TYPE (vint16mf4x3_t, 18, __rvv_int16mf4x3_t, vint16mf4_t, int16, 3, _i16mf4x3)
 276 DEF_RVV_TUPLE_TYPE (vuint16mf4x3_t, 19, __rvv_uint16mf4x3_t, vuint16mf4_t, uint16, 3, _u16mf4x3)
 277 DEF_RVV_TUPLE_TYPE (vint16mf4x4_t, 18, __rvv_int16mf4x4_t, vint16mf4_t, int16, 4, _i16mf4x4)
 278 DEF_RVV_TUPLE_TYPE (vuint16mf4x4_t, 19, __rvv_uint16mf4x4_t, vuint16mf4_t, uint16, 4, _u16mf4x4)
 279 DEF_RVV_TUPLE_TYPE (vint16mf4x5_t, 18, __rvv_int16mf4x5_t, vint16mf4_t, int16, 5, _i16mf4x5)
 280 DEF_RVV_TUPLE_TYPE (vuint16mf4x5_t, 19, __rvv_uint16mf4x5_t, vuint16mf4_t, uint16, 5, _u16mf4x5)
 281 DEF_RVV_TUPLE_TYPE (vint16mf4x6_t, 18, __rvv_int16mf4x6_t, vint16mf4_t, int16, 6, _i16mf4x6)
 282 DEF_RVV_TUPLE_TYPE (vuint16mf4x6_t, 19, __rvv_uint16mf4x6_t, vuint16mf4_t, uint16, 6, _u16mf4x6)
 283 DEF_RVV_TUPLE_TYPE (vint16mf4x7_t, 18, __rvv_int16mf4x7_t, vint16mf4_t, int16, 7, _i16mf4x7)
 284 DEF_RVV_TUPLE_TYPE (vuint16mf4x7_t, 19, __rvv_uint16mf4x7_t, vuint16mf4_t, uint16, 7, _u16mf4x7)
 285 DEF_RVV_TUPLE_TYPE (vint16mf4x8_t, 18, __rvv_int16mf4x8_t, vint16mf4_t, int16, 8, _i16mf4x8)
 286 DEF_RVV_TUPLE_TYPE (vuint16mf4x8_t, 19, __rvv_uint16mf4x8_t, vuint16mf4_t, uint16, 8, _u16mf4x8)
 287 /* LMUL = 1/2:
 288    Machine mode = VNx4HImode when TARGET_MIN_VLEN >= 128.
 289    Machine mode = VNx2HImode when TARGET_MIN_VLEN > 32.
 290    Machine mode = VNx1HImode when TARGET_MIN_VLEN = 32.  */
 291 DEF_RVV_TYPE (vint16mf2_t, 16, __rvv_int16mf2_t, int16, VNx4HI, VNx2HI, VNx1HI, _i16mf2,
 292               _i16, _e16mf2)
 293 DEF_RVV_TYPE (vuint16mf2_t, 17, __rvv_uint16mf2_t, uint16, VNx4HI, VNx2HI, VNx1HI,
 294               _u16mf2, _u16, _e16mf2)
 295 /* Define tuple types for SEW = 16, LMUL = MF2.  */
 296 DEF_RVV_TUPLE_TYPE (vint16mf2x2_t, 18, __rvv_int16mf2x2_t, vint16mf2_t, int16, 2, _i16mf2x2)
 297 DEF_RVV_TUPLE_TYPE (vuint16mf2x2_t, 19, __rvv_uint16mf2x2_t, vuint16mf2_t, uint16, 2, _u16mf2x2)
 298 DEF_RVV_TUPLE_TYPE (vint16mf2x3_t, 18, __rvv_int16mf2x3_t, vint16mf2_t, int16, 3, _i16mf2x3)
 299 DEF_RVV_TUPLE_TYPE (vuint16mf2x3_t, 19, __rvv_uint16mf2x3_t, vuint16mf2_t, uint16, 3, _u16mf2x3)
 300 DEF_RVV_TUPLE_TYPE (vint16mf2x4_t, 18, __rvv_int16mf2x4_t, vint16mf2_t, int16, 4, _i16mf2x4)
 301 DEF_RVV_TUPLE_TYPE (vuint16mf2x4_t, 19, __rvv_uint16mf2x4_t, vuint16mf2_t, uint16, 4, _u16mf2x4)
 302 DEF_RVV_TUPLE_TYPE (vint16mf2x5_t, 18, __rvv_int16mf2x5_t, vint16mf2_t, int16, 5, _i16mf2x5)
 303 DEF_RVV_TUPLE_TYPE (vuint16mf2x5_t, 19, __rvv_uint16mf2x5_t, vuint16mf2_t, uint16, 5, _u16mf2x5)
 304 DEF_RVV_TUPLE_TYPE (vint16mf2x6_t, 18, __rvv_int16mf2x6_t, vint16mf2_t, int16, 6, _i16mf2x6)
 305 DEF_RVV_TUPLE_TYPE (vuint16mf2x6_t, 19, __rvv_uint16mf2x6_t, vuint16mf2_t, uint16, 6, _u16mf2x6)
 306 DEF_RVV_TUPLE_TYPE (vint16mf2x7_t, 18, __rvv_int16mf2x7_t, vint16mf2_t, int16, 7, _i16mf2x7)
 307 DEF_RVV_TUPLE_TYPE (vuint16mf2x7_t, 19, __rvv_uint16mf2x7_t, vuint16mf2_t, uint16, 7, _u16mf2x7)
 308 DEF_RVV_TUPLE_TYPE (vint16mf2x8_t, 18, __rvv_int16mf2x8_t, vint16mf2_t, int16, 8, _i16mf2x8)
 309 DEF_RVV_TUPLE_TYPE (vuint16mf2x8_t, 19, __rvv_uint16mf2x8_t, vuint16mf2_t, uint16, 8, _u16mf2x8)
 310 /* LMUL = 1:
 311    Machine mode = VNx8HImode when TARGET_MIN_VLEN >= 128.
 312    Machine mode = VNx4HImode when TARGET_MIN_VLEN > 32.
 313    Machine mode = VNx2HImode when TARGET_MIN_VLEN = 32.  */
 314 DEF_RVV_TYPE (vint16m1_t, 15, __rvv_int16m1_t, int16, VNx8HI, VNx4HI, VNx2HI, _i16m1,
 315               _i16, _e16m1)
 316 DEF_RVV_TYPE (vuint16m1_t, 16, __rvv_uint16m1_t, uint16, VNx8HI, VNx4HI, VNx2HI, _u16m1,
 317               _u16, _e16m1)
 318 /* Define tuple types for SEW = 16, LMUL = M1.  */
 319 DEF_RVV_TUPLE_TYPE (vint16m1x2_t, 17, __rvv_int16m1x2_t, vint16m1_t, int16, 2, _i16m1x2)
 320 DEF_RVV_TUPLE_TYPE (vuint16m1x2_t, 18, __rvv_uint16m1x2_t, vuint16m1_t, uint16, 2, _u16m1x2)
 321 DEF_RVV_TUPLE_TYPE (vint16m1x3_t, 17, __rvv_int16m1x3_t, vint16m1_t, int16, 3, _i16m1x3)
 322 DEF_RVV_TUPLE_TYPE (vuint16m1x3_t, 18, __rvv_uint16m1x3_t, vuint16m1_t, uint16, 3, _u16m1x3)
 323 DEF_RVV_TUPLE_TYPE (vint16m1x4_t, 17, __rvv_int16m1x4_t, vint16m1_t, int16, 4, _i16m1x4)
 324 DEF_RVV_TUPLE_TYPE (vuint16m1x4_t, 18, __rvv_uint16m1x4_t, vuint16m1_t, uint16, 4, _u16m1x4)
 325 DEF_RVV_TUPLE_TYPE (vint16m1x5_t, 17, __rvv_int16m1x5_t, vint16m1_t, int16, 5, _i16m1x5)
 326 DEF_RVV_TUPLE_TYPE (vuint16m1x5_t, 18, __rvv_uint16m1x5_t, vuint16m1_t, uint16, 5, _u16m1x5)
 327 DEF_RVV_TUPLE_TYPE (vint16m1x6_t, 17, __rvv_int16m1x6_t, vint16m1_t, int16, 6, _i16m1x6)
 328 DEF_RVV_TUPLE_TYPE (vuint16m1x6_t, 18, __rvv_uint16m1x6_t, vuint16m1_t, uint16, 6, _u16m1x6)
 329 DEF_RVV_TUPLE_TYPE (vint16m1x7_t, 17, __rvv_int16m1x7_t, vint16m1_t, int16, 7, _i16m1x7)
 330 DEF_RVV_TUPLE_TYPE (vuint16m1x7_t, 18, __rvv_uint16m1x7_t, vuint16m1_t, uint16, 7, _u16m1x7)
 331 DEF_RVV_TUPLE_TYPE (vint16m1x8_t, 17, __rvv_int16m1x8_t, vint16m1_t, int16, 8, _i16m1x8)
 332 DEF_RVV_TUPLE_TYPE (vuint16m1x8_t, 18, __rvv_uint16m1x8_t, vuint16m1_t, uint16, 8, _u16m1x8)
 333 /* LMUL = 2:
 334    Machine mode = VNx16HImode when TARGET_MIN_VLEN >= 128.
 335    Machine mode = VNx8HImode when TARGET_MIN_VLEN > 32.
 336    Machine mode = VNx4HImode when TARGET_MIN_VLEN = 32.  */
 337 DEF_RVV_TYPE (vint16m2_t, 15, __rvv_int16m2_t, int16, VNx16HI, VNx8HI, VNx4HI, _i16m2,
 338               _i16, _e16m2)
 339 DEF_RVV_TYPE (vuint16m2_t, 16, __rvv_uint16m2_t, uint16, VNx16HI, VNx8HI, VNx4HI, _u16m2,
 340               _u16, _e16m2)
 341 /* Define tuple types for SEW = 16, LMUL = M2.  */
 342 DEF_RVV_TUPLE_TYPE (vint16m2x2_t, 17, __rvv_int16m2x2_t, vint16m2_t, int16, 2, _i16m2x2)
 343 DEF_RVV_TUPLE_TYPE (vuint16m2x2_t, 18, __rvv_uint16m2x2_t, vuint16m2_t, uint16, 2, _u16m2x2)
 344 DEF_RVV_TUPLE_TYPE (vint16m2x3_t, 17, __rvv_int16m2x3_t, vint16m2_t, int16, 3, _i16m2x3)
 345 DEF_RVV_TUPLE_TYPE (vuint16m2x3_t, 18, __rvv_uint16m2x3_t, vuint16m2_t, uint16, 3, _u16m2x3)
 346 DEF_RVV_TUPLE_TYPE (vint16m2x4_t, 17, __rvv_int16m2x4_t, vint16m2_t, int16, 4, _i16m2x4)
 347 DEF_RVV_TUPLE_TYPE (vuint16m2x4_t, 18, __rvv_uint16m2x4_t, vuint16m2_t, uint16, 4, _u16m2x4)
 348 /* LMUL = 4:
 349    Machine mode = VNx32HImode when TARGET_MIN_VLEN >= 128.
 350    Machine mode = VNx16HImode when TARGET_MIN_VLEN > 32.
 351    Machine mode = VNx8HImode when TARGET_MIN_VLEN = 32.  */
 352 DEF_RVV_TYPE (vint16m4_t, 15, __rvv_int16m4_t, int16, VNx32HI, VNx16HI, VNx8HI, _i16m4,
 353               _i16, _e16m4)
 354 DEF_RVV_TYPE (vuint16m4_t, 16, __rvv_uint16m4_t, uint16, VNx32HI, VNx16HI, VNx8HI,
 355               _u16m4, _u16, _e16m4)
 356 /* Define tuple types for SEW = 16, LMUL = M4.  */
 357 DEF_RVV_TUPLE_TYPE (vint16m4x2_t, 17, __rvv_int16m4x2_t, vint16m4_t, int16, 2, _i16m4x2)
 358 DEF_RVV_TUPLE_TYPE (vuint16m4x2_t, 18, __rvv_uint16m4x2_t, vuint16m4_t, uint16, 2, _u16m4x2)
 359 /* LMUL = 8:
 360    Machine mode = VNx64HImode when TARGET_MIN_VLEN >= 128.
 361    Machine mode = VNx32HImode when TARGET_MIN_VLEN > 32.
 362    Machine mode = VNx16HImode when TARGET_MIN_VLEN = 32.  */
 363 DEF_RVV_TYPE (vint16m8_t, 15, __rvv_int16m8_t, int16, VNx64HI, VNx32HI, VNx16HI, _i16m8,
 364               _i16, _e16m8)
 365 DEF_RVV_TYPE (vuint16m8_t, 16, __rvv_uint16m8_t, uint16, VNx64HI, VNx32HI, VNx16HI,
 366               _u16m8, _u16, _e16m8)
 367
 368 /* LMUL = 1/2:
 369    Only enble when TARGET_MIN_VLEN > 32.
 370    Machine mode = VNx1SImode when TARGET_MIN_VLEN < 128.
 371    Machine mode = VNx2SImode when TARGET_MIN_VLEN >= 128.  */
 372 DEF_RVV_TYPE (vint32mf2_t, 16, __rvv_int32mf2_t, int32, VNx2SI, VNx1SI, VOID, _i32mf2,
 373               _i32, _e32mf2)
 374 DEF_RVV_TYPE (vuint32mf2_t, 17, __rvv_uint32mf2_t, uint32, VNx2SI, VNx1SI, VOID,
 375               _u32mf2, _u32, _e32mf2)
 376 /* Define tuple types for SEW = 32, LMUL = MF2.  */
 377 DEF_RVV_TUPLE_TYPE (vint32mf2x2_t, 18, __rvv_int32mf2x2_t, vint32mf2_t, int32, 2, _i32mf2x2)
 378 DEF_RVV_TUPLE_TYPE (vuint32mf2x2_t, 19, __rvv_uint32mf2x2_t, vuint32mf2_t, uint32, 2, _u32mf2x2)
 379 DEF_RVV_TUPLE_TYPE (vint32mf2x3_t, 18, __rvv_int32mf2x3_t, vint32mf2_t, int32, 3, _i32mf2x3)
 380 DEF_RVV_TUPLE_TYPE (vuint32mf2x3_t, 19, __rvv_uint32mf2x3_t, vuint32mf2_t, uint32, 3, _u32mf2x3)
 381 DEF_RVV_TUPLE_TYPE (vint32mf2x4_t, 18, __rvv_int32mf2x4_t, vint32mf2_t, int32, 4, _i32mf2x4)
 382 DEF_RVV_TUPLE_TYPE (vuint32mf2x4_t, 19, __rvv_uint32mf2x4_t, vuint32mf2_t, uint32, 4, _u32mf2x4)
 383 DEF_RVV_TUPLE_TYPE (vint32mf2x5_t, 18, __rvv_int32mf2x5_t, vint32mf2_t, int32, 5, _i32mf2x5)
 384 DEF_RVV_TUPLE_TYPE (vuint32mf2x5_t, 19, __rvv_uint32mf2x5_t, vuint32mf2_t, uint32, 5, _u32mf2x5)
 385 DEF_RVV_TUPLE_TYPE (vint32mf2x6_t, 18, __rvv_int32mf2x6_t, vint32mf2_t, int32, 6, _i32mf2x6)
 386 DEF_RVV_TUPLE_TYPE (vuint32mf2x6_t, 19, __rvv_uint32mf2x6_t, vuint32mf2_t, uint32, 6, _u32mf2x6)
 387 DEF_RVV_TUPLE_TYPE (vint32mf2x7_t, 18, __rvv_int32mf2x7_t, vint32mf2_t, int32, 7, _i32mf2x7)
 388 DEF_RVV_TUPLE_TYPE (vuint32mf2x7_t, 19, __rvv_uint32mf2x7_t, vuint32mf2_t, uint32, 7, _u32mf2x7)
 389 DEF_RVV_TUPLE_TYPE (vint32mf2x8_t, 18, __rvv_int32mf2x8_t, vint32mf2_t, int32, 8, _i32mf2x8)
 390 DEF_RVV_TUPLE_TYPE (vuint32mf2x8_t, 19, __rvv_uint32mf2x8_t, vuint32mf2_t, uint32, 8, _u32mf2x8)
 391 /* LMUL = 1:
 392    Machine mode = VNx4SImode when TARGET_MIN_VLEN >= 128.
 393    Machine mode = VNx2SImode when TARGET_MIN_VLEN > 32.
 394    Machine mode = VNx1SImode when TARGET_MIN_VLEN = 32.  */
 395 DEF_RVV_TYPE (vint32m1_t, 15, __rvv_int32m1_t, int32, VNx4SI, VNx2SI, VNx1SI, _i32m1,
 396               _i32, _e32m1)
 397 DEF_RVV_TYPE (vuint32m1_t, 16, __rvv_uint32m1_t, uint32, VNx4SI, VNx2SI, VNx1SI, _u32m1,
 398               _u32, _e32m1)
 399 /* Define tuple types for SEW = 32, LMUL = M1.  */
 400 DEF_RVV_TUPLE_TYPE (vint32m1x2_t, 17, __rvv_int32m1x2_t, vint32m1_t, int32, 2, _i32m1x2)
 401 DEF_RVV_TUPLE_TYPE (vuint32m1x2_t, 18, __rvv_uint32m1x2_t, vuint32m1_t, uint32, 2, _u32m1x2)
 402 DEF_RVV_TUPLE_TYPE (vint32m1x3_t, 17, __rvv_int32m1x3_t, vint32m1_t, int32, 3, _i32m1x3)
 403 DEF_RVV_TUPLE_TYPE (vuint32m1x3_t, 18, __rvv_uint32m1x3_t, vuint32m1_t, uint32, 3, _u32m1x3)
 404 DEF_RVV_TUPLE_TYPE (vint32m1x4_t, 17, __rvv_int32m1x4_t, vint32m1_t, int32, 4, _i32m1x4)
 405 DEF_RVV_TUPLE_TYPE (vuint32m1x4_t, 18, __rvv_uint32m1x4_t, vuint32m1_t, uint32, 4, _u32m1x4)
 406 DEF_RVV_TUPLE_TYPE (vint32m1x5_t, 17, __rvv_int32m1x5_t, vint32m1_t, int32, 5, _i32m1x5)
 407 DEF_RVV_TUPLE_TYPE (vuint32m1x5_t, 18, __rvv_uint32m1x5_t, vuint32m1_t, uint32, 5, _u32m1x5)
 408 DEF_RVV_TUPLE_TYPE (vint32m1x6_t, 17, __rvv_int32m1x6_t, vint32m1_t, int32, 6, _i32m1x6)
 409 DEF_RVV_TUPLE_TYPE (vuint32m1x6_t, 18, __rvv_uint32m1x6_t, vuint32m1_t, uint32, 6, _u32m1x6)
 410 DEF_RVV_TUPLE_TYPE (vint32m1x7_t, 17, __rvv_int32m1x7_t, vint32m1_t, int32, 7, _i32m1x7)
 411 DEF_RVV_TUPLE_TYPE (vuint32m1x7_t, 18, __rvv_uint32m1x7_t, vuint32m1_t, uint32, 7, _u32m1x7)
 412 DEF_RVV_TUPLE_TYPE (vint32m1x8_t, 17, __rvv_int32m1x8_t, vint32m1_t, int32, 8, _i32m1x8)
 413 DEF_RVV_TUPLE_TYPE (vuint32m1x8_t, 18, __rvv_uint32m1x8_t, vuint32m1_t, uint32, 8, _u32m1x8)
 414 /* LMUL = 2:
 415    Machine mode = VNx8SImode when TARGET_MIN_VLEN >= 128.
 416    Machine mode = VNx4SImode when TARGET_MIN_VLEN > 32.
 417    Machine mode = VNx2SImode when TARGET_MIN_VLEN = 32.  */
 418 DEF_RVV_TYPE (vint32m2_t, 15, __rvv_int32m2_t, int32, VNx8SI, VNx4SI, VNx2SI, _i32m2,
 419               _i32, _e32m2)
 420 DEF_RVV_TYPE (vuint32m2_t, 16, __rvv_uint32m2_t, uint32, VNx8SI, VNx4SI, VNx2SI, _u32m2,
 421               _u32, _e32m2)
 422 /* Define tuple types for SEW = 32, LMUL = M2.  */
 423 DEF_RVV_TUPLE_TYPE (vint32m2x2_t, 17, __rvv_int32m2x2_t, vint32m2_t, int32, 2, _i32m2x2)
 424 DEF_RVV_TUPLE_TYPE (vuint32m2x2_t, 18, __rvv_uint32m2x2_t, vuint32m2_t, uint32, 2, _u32m2x2)
 425 DEF_RVV_TUPLE_TYPE (vint32m2x3_t, 17, __rvv_int32m2x3_t, vint32m2_t, int32, 3, _i32m2x3)
 426 DEF_RVV_TUPLE_TYPE (vuint32m2x3_t, 18, __rvv_uint32m2x3_t, vuint32m2_t, uint32, 3, _u32m2x3)
 427 DEF_RVV_TUPLE_TYPE (vint32m2x4_t, 17, __rvv_int32m2x4_t, vint32m2_t, int32, 4, _i32m2x4)
 428 DEF_RVV_TUPLE_TYPE (vuint32m2x4_t, 18, __rvv_uint32m2x4_t, vuint32m2_t, uint32, 4, _u32m2x4)
 429 /* LMUL = 4:
 430    Machine mode = VNx16SImode when TARGET_MIN_VLEN >= 128.
 431    Machine mode = VNx8SImode when TARGET_MIN_VLEN > 32.
 432    Machine mode = VNx4SImode when TARGET_MIN_VLEN = 32.  */
 433 DEF_RVV_TYPE (vint32m4_t, 15, __rvv_int32m4_t, int32, VNx16SI, VNx8SI, VNx4SI, _i32m4,
 434               _i32, _e32m4)
 435 DEF_RVV_TYPE (vuint32m4_t, 16, __rvv_uint32m4_t, uint32, VNx16SI, VNx8SI, VNx4SI, _u32m4,
 436               _u32, _e32m4)
 437 /* Define tuple types for SEW = 32, LMUL = M4.  */
 438 DEF_RVV_TUPLE_TYPE (vint32m4x2_t, 17, __rvv_int32m4x2_t, vint32m4_t, int32, 2, _i32m4x2)
 439 DEF_RVV_TUPLE_TYPE (vuint32m4x2_t, 18, __rvv_uint32m4x2_t, vuint32m4_t, uint32, 2, _u32m4x2)
 440 /* LMUL = 8:
 441    Machine mode = VNx32SImode when TARGET_MIN_VLEN >= 128.
 442    Machine mode = VNx16SImode when TARGET_MIN_VLEN > 32.
 443    Machine mode = VNx8SImode when TARGET_MIN_VLEN = 32.  */
 444 DEF_RVV_TYPE (vint32m8_t, 15, __rvv_int32m8_t, int32, VNx32SI, VNx16SI, VNx8SI, _i32m8,
 445               _i32, _e32m8)
 446 DEF_RVV_TYPE (vuint32m8_t, 16, __rvv_uint32m8_t, uint32, VNx32SI, VNx16SI, VNx8SI,
 447               _u32m8, _u32, _e32m8)
 448
 449 /* SEW = 64:
 450    Disable when !TARGET_VECTOR_ELEN_64.  */
 451 DEF_RVV_TYPE (vint64m1_t, 15, __rvv_int64m1_t, int64, VNx2DI, VNx1DI, VOID, _i64m1,
 452               _i64, _e64m1)
 453 DEF_RVV_TYPE (vuint64m1_t, 16, __rvv_uint64m1_t, uint64, VNx2DI, VNx1DI, VOID, _u64m1,
 454               _u64, _e64m1)
 455 /* Define tuple types for SEW = 64, LMUL = M1.  */
 456 DEF_RVV_TUPLE_TYPE (vint64m1x2_t, 17, __rvv_int64m1x2_t, vint64m1_t, int64, 2, _i64m1x2)
 457 DEF_RVV_TUPLE_TYPE (vuint64m1x2_t, 18, __rvv_uint64m1x2_t, vuint64m1_t, uint64, 2, _u64m1x2)
 458 DEF_RVV_TUPLE_TYPE (vint64m1x3_t, 17, __rvv_int64m1x3_t, vint64m1_t, int64, 3, _i64m1x3)
 459 DEF_RVV_TUPLE_TYPE (vuint64m1x3_t, 18, __rvv_uint64m1x3_t, vuint64m1_t, uint64, 3, _u64m1x3)
 460 DEF_RVV_TUPLE_TYPE (vint64m1x4_t, 17, __rvv_int64m1x4_t, vint64m1_t, int64, 4, _i64m1x4)
 461 DEF_RVV_TUPLE_TYPE (vuint64m1x4_t, 18, __rvv_uint64m1x4_t, vuint64m1_t, uint64, 4, _u64m1x4)
 462 DEF_RVV_TUPLE_TYPE (vint64m1x5_t, 17, __rvv_int64m1x5_t, vint64m1_t, int64, 5, _i64m1x5)
 463 DEF_RVV_TUPLE_TYPE (vuint64m1x5_t, 18, __rvv_uint64m1x5_t, vuint64m1_t, uint64, 5, _u64m1x5)
 464 DEF_RVV_TUPLE_TYPE (vint64m1x6_t, 17, __rvv_int64m1x6_t, vint64m1_t, int64, 6, _i64m1x6)
 465 DEF_RVV_TUPLE_TYPE (vuint64m1x6_t, 18, __rvv_uint64m1x6_t, vuint64m1_t, uint64, 6, _u64m1x6)
 466 DEF_RVV_TUPLE_TYPE (vint64m1x7_t, 17, __rvv_int64m1x7_t, vint64m1_t, int64, 7, _i64m1x7)
 467 DEF_RVV_TUPLE_TYPE (vuint64m1x7_t, 18, __rvv_uint64m1x7_t, vuint64m1_t, uint64, 7, _u64m1x7)
 468 DEF_RVV_TUPLE_TYPE (vint64m1x8_t, 17, __rvv_int64m1x8_t, vint64m1_t, int64, 8, _i64m1x8)
 469 DEF_RVV_TUPLE_TYPE (vuint64m1x8_t, 18, __rvv_uint64m1x8_t, vuint64m1_t, uint64, 8, _u64m1x8)
 470 DEF_RVV_TYPE (vint64m2_t, 15, __rvv_int64m2_t, int64, VNx4DI, VNx2DI, VOID, _i64m2,
 471               _i64, _e64m2)
 472 DEF_RVV_TYPE (vuint64m2_t, 16, __rvv_uint64m2_t, uint64, VNx4DI, VNx2DI, VOID, _u64m2,
 473               _u64, _e64m2)
 474 /* Define tuple types for SEW = 64, LMUL = M2.  */
 475 DEF_RVV_TUPLE_TYPE (vint64m2x2_t, 17, __rvv_int64m2x2_t, vint64m2_t, int64, 2, _i64m2x2)
 476 DEF_RVV_TUPLE_TYPE (vuint64m2x2_t, 18, __rvv_uint64m2x2_t, vuint64m2_t, uint64, 2, _u64m2x2)
 477 DEF_RVV_TUPLE_TYPE (vint64m2x3_t, 17, __rvv_int64m2x3_t, vint64m2_t, int64, 3, _i64m2x3)
 478 DEF_RVV_TUPLE_TYPE (vuint64m2x3_t, 18, __rvv_uint64m2x3_t, vuint64m2_t, uint64, 3, _u64m2x3)
 479 DEF_RVV_TUPLE_TYPE (vint64m2x4_t, 17, __rvv_int64m2x4_t, vint64m2_t, int64, 4, _i64m2x4)
 480 DEF_RVV_TUPLE_TYPE (vuint64m2x4_t, 18, __rvv_uint64m2x4_t, vuint64m2_t, uint64, 4, _u64m2x4)
 481 DEF_RVV_TYPE (vint64m4_t, 15, __rvv_int64m4_t, int64, VNx8DI, VNx4DI, VOID, _i64m4,
 482               _i64, _e64m4)
 483 DEF_RVV_TYPE (vuint64m4_t, 16, __rvv_uint64m4_t, uint64, VNx8DI, VNx4DI, VOID, _u64m4,
 484               _u64, _e64m4)
 485 /* Define tuple types for SEW = 64, LMUL = M4.  */
 486 DEF_RVV_TUPLE_TYPE (vint64m4x2_t, 17, __rvv_int64m4x2_t, vint64m4_t, int64, 2, _i64m4x2)
 487 DEF_RVV_TUPLE_TYPE (vuint64m4x2_t, 18, __rvv_uint64m4x2_t, vuint64m4_t, uint64, 2, _u64m4x2)
 488 DEF_RVV_TYPE (vint64m8_t, 15, __rvv_int64m8_t, int64, VNx16DI, VNx8DI, VOID, _i64m8,
 489               _i64, _e64m8)
 490 DEF_RVV_TYPE (vuint64m8_t, 16, __rvv_uint64m8_t, uint64, VNx16DI, VNx8DI, VOID, _u64m8,
 491               _u64, _e64m8)
 492
 493 /* Enabled if TARGET_VECTOR_ELEN_FP_16 && 9TARGET_ZVFH or TARGET_ZVFHMIN).  */
 494 /* LMUL = 1/4.  */
 495 DEF_RVV_TYPE (vfloat16mf4_t, 18, __rvv_float16mf4_t, float16, VNx2HF, VNx1HF, VOID,
 496               _f16mf4, _f16, _e16mf4)
 497 /* LMUL = 1/2.  */
 498 DEF_RVV_TYPE (vfloat16mf2_t, 18, __rvv_float16mf2_t, float16, VNx4HF, VNx2HF, VNx1HF,
 499               _f16mf2, _f16, _e16mf2)
 500 /* LMUL = 1.  */
 501 DEF_RVV_TYPE (vfloat16m1_t, 17, __rvv_float16m1_t, float16, VNx8HF, VNx4HF, VNx2HF,
 502               _f16m1, _f16, _e16m1)
 503 /* LMUL = 2.  */
 504 DEF_RVV_TYPE (vfloat16m2_t, 17, __rvv_float16m2_t, float16, VNx16HF, VNx8HF, VNx4HF,
 505               _f16m2, _f16, _e16m2)
 506 /* LMUL = 4.  */
 507 DEF_RVV_TYPE (vfloat16m4_t, 17, __rvv_float16m4_t, float16, VNx32HF, VNx16HF, VNx8HF,
 508               _f16m4, _f16, _e16m4)
 509 /* LMUL = 8.  */
 510 DEF_RVV_TYPE (vfloat16m8_t, 16, __rvv_float16m8_t, float16, VNx64HF, VNx32HF, VNx16HF,
 511               _f16m8, _f16, _e16m8)
 512
 513 /* Disable all when !TARGET_VECTOR_ELEN_FP_32.  */
 514 /* LMUL = 1/2:
 515    Only enble when TARGET_MIN_VLEN > 32.
 516    Machine mode = VNx1SFmode when TARGET_MIN_VLEN < 128.
 517    Machine mode = VNx2SFmode when TARGET_MIN_VLEN >= 128.  */
 518 DEF_RVV_TYPE (vfloat32mf2_t, 18, __rvv_float32mf2_t, float, VNx2SF, VNx1SF, VOID,
 519               _f32mf2, _f32, _e32mf2)
 520 /* Define tuple types for SEW = 32, LMUL = MF2.  */
 521 DEF_RVV_TUPLE_TYPE (vfloat32mf2x2_t, 20, __rvv_float32mf2x2_t, vfloat32mf2_t, float, 2, _f32mf2x2)
 522 DEF_RVV_TUPLE_TYPE (vfloat32mf2x3_t, 20, __rvv_float32mf2x3_t, vfloat32mf2_t, float, 3, _f32mf2x3)
 523 DEF_RVV_TUPLE_TYPE (vfloat32mf2x4_t, 20, __rvv_float32mf2x4_t, vfloat32mf2_t, float, 4, _f32mf2x4)
 524 DEF_RVV_TUPLE_TYPE (vfloat32mf2x5_t, 20, __rvv_float32mf2x5_t, vfloat32mf2_t, float, 5, _f32mf2x5)
 525 DEF_RVV_TUPLE_TYPE (vfloat32mf2x6_t, 20, __rvv_float32mf2x6_t, vfloat32mf2_t, float, 6, _f32mf2x6)
 526 DEF_RVV_TUPLE_TYPE (vfloat32mf2x7_t, 20, __rvv_float32mf2x7_t, vfloat32mf2_t, float, 7, _f32mf2x7)
 527 DEF_RVV_TUPLE_TYPE (vfloat32mf2x8_t, 20, __rvv_float32mf2x8_t, vfloat32mf2_t, float, 8, _f32mf2x8)
 528 /* LMUL = 1:
 529    Machine mode = VNx4SFmode when TARGET_MIN_VLEN >= 128.
 530    Machine mode = VNx2SFmode when TARGET_MIN_VLEN > 32.
 531    Machine mode = VNx1SFmode when TARGET_MIN_VLEN = 32.  */
 532 DEF_RVV_TYPE (vfloat32m1_t, 17, __rvv_float32m1_t, float, VNx4SF, VNx2SF, VNx1SF,
 533               _f32m1, _f32, _e32m1)
 534 /* Define tuple types for SEW = 32, LMUL = M1.  */
 535 DEF_RVV_TUPLE_TYPE (vfloat32m1x2_t, 19, __rvv_float32m1x2_t, vfloat32m1_t, float, 2, _f32m1x2)
 536 DEF_RVV_TUPLE_TYPE (vfloat32m1x3_t, 19, __rvv_float32m1x3_t, vfloat32m1_t, float, 3, _f32m1x3)
 537 DEF_RVV_TUPLE_TYPE (vfloat32m1x4_t, 19, __rvv_float32m1x4_t, vfloat32m1_t, float, 4, _f32m1x4)
 538 DEF_RVV_TUPLE_TYPE (vfloat32m1x5_t, 19, __rvv_float32m1x5_t, vfloat32m1_t, float, 5, _f32m1x5)
 539 DEF_RVV_TUPLE_TYPE (vfloat32m1x6_t, 19, __rvv_float32m1x6_t, vfloat32m1_t, float, 6, _f32m1x6)
 540 DEF_RVV_TUPLE_TYPE (vfloat32m1x7_t, 19, __rvv_float32m1x7_t, vfloat32m1_t, float, 7, _f32m1x7)
 541 DEF_RVV_TUPLE_TYPE (vfloat32m1x8_t, 19, __rvv_float32m1x8_t, vfloat32m1_t, float, 8, _f32m1x8)
 542 /* LMUL = 2:
 543    Machine mode = VNx8SFmode when TARGET_MIN_VLEN >= 128.
 544    Machine mode = VNx4SFmode when TARGET_MIN_VLEN > 32.
 545    Machine mode = VNx2SFmode when TARGET_MIN_VLEN = 32.  */
 546 DEF_RVV_TYPE (vfloat32m2_t, 17, __rvv_float32m2_t, float, VNx8SF, VNx4SF, VNx2SF,
 547               _f32m2, _f32, _e32m2)
 548 /* Define tuple types for SEW = 32, LMUL = M2.  */
 549 DEF_RVV_TUPLE_TYPE (vfloat32m2x2_t, 19, __rvv_float32m2x2_t, vfloat32m2_t, float, 2, _f32m2x2)
 550 DEF_RVV_TUPLE_TYPE (vfloat32m2x3_t, 19, __rvv_float32m2x3_t, vfloat32m2_t, float, 3, _f32m2x3)
 551 DEF_RVV_TUPLE_TYPE (vfloat32m2x4_t, 19, __rvv_float32m2x4_t, vfloat32m2_t, float, 4, _f32m2x4)
 552 /* LMUL = 4:
 553    Machine mode = VNx16SFmode when TARGET_MIN_VLEN >= 128.
 554    Machine mode = VNx8SFmode when TARGET_MIN_VLEN > 32.
 555    Machine mode = VNx4SFmode when TARGET_MIN_VLEN = 32.  */
 556 DEF_RVV_TYPE (vfloat32m4_t, 17, __rvv_float32m4_t, float, VNx16SF, VNx8SF, VNx4SF,
 557               _f32m4, _f32, _e32m4)
 558 /* Define tuple types for SEW = 32, LMUL = M4.  */
 559 DEF_RVV_TUPLE_TYPE (vfloat32m4x2_t, 19, __rvv_float32m4x2_t, vfloat32m4_t, float, 2, _f32m4x2)
 560 /* LMUL = 8:
 561    Machine mode = VNx32SFmode when TARGET_MIN_VLEN >= 128.
 562    Machine mode = VNx16SFmode when TARGET_MIN_VLEN > 32.
 563    Machine mode = VNx8SFmode when TARGET_MIN_VLEN = 32.  */
 564 DEF_RVV_TYPE (vfloat32m8_t, 17, __rvv_float32m8_t, float, VNx32SF, VNx16SF, VNx8SF,
 565               _f32m8, _f32, _e32m8)
 566
 567 /* SEW = 64:
 568    Disable when !TARGET_VECTOR_ELEN_FP_64.  */
 569 DEF_RVV_TYPE (vfloat64m1_t, 17, __rvv_float64m1_t, double, VNx2DF, VNx1DF, VOID, _f64m1,
 570               _f64, _e64m1)
 571 /* Define tuple types for SEW = 64, LMUL = M1.  */
 572 DEF_RVV_TUPLE_TYPE (vfloat64m1x2_t, 19, __rvv_float64m1x2_t, vfloat64m1_t, double, 2, _f64m1x2)
 573 DEF_RVV_TUPLE_TYPE (vfloat64m1x3_t, 19, __rvv_float64m1x3_t, vfloat64m1_t, double, 3, _f64m1x3)
 574 DEF_RVV_TUPLE_TYPE (vfloat64m1x4_t, 19, __rvv_float64m1x4_t, vfloat64m1_t, double, 4, _f64m1x4)
 575 DEF_RVV_TUPLE_TYPE (vfloat64m1x5_t, 19, __rvv_float64m1x5_t, vfloat64m1_t, double, 5, _f64m1x5)
 576 DEF_RVV_TUPLE_TYPE (vfloat64m1x6_t, 19, __rvv_float64m1x6_t, vfloat64m1_t, double, 6, _f64m1x6)
 577 DEF_RVV_TUPLE_TYPE (vfloat64m1x7_t, 19, __rvv_float64m1x7_t, vfloat64m1_t, double, 7, _f64m1x7)
 578 DEF_RVV_TUPLE_TYPE (vfloat64m1x8_t, 19, __rvv_float64m1x8_t, vfloat64m1_t, double, 8, _f64m1x8)
 579 DEF_RVV_TYPE (vfloat64m2_t, 17, __rvv_float64m2_t, double, VNx4DF, VNx2DF, VOID, _f64m2,
 580               _f64, _e64m2)
 581 /* Define tuple types for SEW = 64, LMUL = M2.  */
 582 DEF_RVV_TUPLE_TYPE (vfloat64m2x2_t, 19, __rvv_float64m2x2_t, vfloat64m2_t, double, 2, _f64m2x2)
 583 DEF_RVV_TUPLE_TYPE (vfloat64m2x3_t, 19, __rvv_float64m2x3_t, vfloat64m2_t, double, 3, _f64m2x3)
 584 DEF_RVV_TUPLE_TYPE (vfloat64m2x4_t, 19, __rvv_float64m2x4_t, vfloat64m2_t, double, 4, _f64m2x4)
 585 DEF_RVV_TYPE (vfloat64m4_t, 17, __rvv_float64m4_t, double, VNx8DF, VNx4DF, VOID, _f64m4,
 586               _f64, _e64m4)
 587 /* Define tuple types for SEW = 64, LMUL = M4.  */
 588 DEF_RVV_TUPLE_TYPE (vfloat64m4x2_t, 19, __rvv_float64m4x2_t, vfloat64m4_t, double, 2, _f64m4x2)
 589 DEF_RVV_TYPE (vfloat64m8_t, 17, __rvv_float64m8_t, double, VNx16DF, VNx8DF, VOID, _f64m8,
 590               _f64, _e64m8)
 591
 592 DEF_RVV_OP_TYPE (vv)
 593 DEF_RVV_OP_TYPE (vx)
 594 DEF_RVV_OP_TYPE (v)
 595 DEF_RVV_OP_TYPE (wv)
 596 DEF_RVV_OP_TYPE (wx)
 597 DEF_RVV_OP_TYPE (x_v)
 598 DEF_RVV_OP_TYPE (vf2)
 599 DEF_RVV_OP_TYPE (vf4)
 600 DEF_RVV_OP_TYPE (vf8)
 601 DEF_RVV_OP_TYPE (vvm)
 602 DEF_RVV_OP_TYPE (vxm)
 603 DEF_RVV_OP_TYPE (x_w)
 604 DEF_RVV_OP_TYPE (x)
 605 DEF_RVV_OP_TYPE (vs)
 606 DEF_RVV_OP_TYPE (mm)
 607 DEF_RVV_OP_TYPE (m)
 608 DEF_RVV_OP_TYPE (vf)
 609 DEF_RVV_OP_TYPE (vm)
 610 DEF_RVV_OP_TYPE (wf)
 611 DEF_RVV_OP_TYPE (vfm)
 612 DEF_RVV_OP_TYPE (f)
 613 DEF_RVV_OP_TYPE (f_v)
 614 DEF_RVV_OP_TYPE (xu_v)
 615 DEF_RVV_OP_TYPE (f_w)
 616 DEF_RVV_OP_TYPE (xu_w)
 617 DEF_RVV_OP_TYPE (s)
 618
 619 DEF_RVV_PRED_TYPE (ta)
 620 DEF_RVV_PRED_TYPE (tu)
 621 DEF_RVV_PRED_TYPE (ma)
 622 DEF_RVV_PRED_TYPE (mu)
 623 DEF_RVV_PRED_TYPE (tama)
 624 DEF_RVV_PRED_TYPE (tamu)
 625 DEF_RVV_PRED_TYPE (tuma)
 626 DEF_RVV_PRED_TYPE (tumu)
 627 DEF_RVV_PRED_TYPE (m)
 628 DEF_RVV_PRED_TYPE (tam)
 629 DEF_RVV_PRED_TYPE (tum)
 630
 631 DEF_RVV_BASE_TYPE (vector, builtin_types[type_idx].vector)
 632 DEF_RVV_BASE_TYPE (scalar, builtin_types[type_idx].scalar)
 633 DEF_RVV_BASE_TYPE (mask, get_vector_type (type_idx))
 634 DEF_RVV_BASE_TYPE (signed_vector, get_vector_type (type_idx))
 635 DEF_RVV_BASE_TYPE (unsigned_vector, get_vector_type (type_idx))
 636 /* According to riscv-vector-builtins-types.def, the unsigned
 637    type is always the signed type + 1 (They have same SEW and LMUL).
 638    For example 'vuint8mf8_t' enum = 'vint8mf8_t' enum + 1.
 639    Note: We dont't allow type_idx to be unsigned type.  */
 640 DEF_RVV_BASE_TYPE (unsigned_scalar, builtin_types[type_idx + 1].scalar)
 641 DEF_RVV_BASE_TYPE (vector_ptr, builtin_types[type_idx].vector_ptr)
 642 /* According to the latest rvv-intrinsic-doc, it defines vsm.v intrinsic:
 643    __riscv_vsm (uint8_t *base, vbool1_t value, size_t vl).  */
 644 DEF_RVV_BASE_TYPE (scalar_ptr, get_scalar_ptr_type (type_idx))
 645 /* According to the latest rvv-intrinsic-doc, it defines vlm.v intrinsic:
 646    __riscv_vlm_v_b1 (const uint8_t *base, size_t vl).  */
 647 DEF_RVV_BASE_TYPE (scalar_const_ptr, get_scalar_const_ptr_type (type_idx))
 648 DEF_RVV_BASE_TYPE (void, void_type_node)
 649 DEF_RVV_BASE_TYPE (size, size_type_node)
 650 DEF_RVV_BASE_TYPE (ptrdiff, ptrdiff_type_node)
 651 DEF_RVV_BASE_TYPE (unsigned_long, long_unsigned_type_node)
 652 DEF_RVV_BASE_TYPE (long, long_integer_type_node)
 653 DEF_RVV_BASE_TYPE (eew8_index, get_vector_type (type_idx))
 654 DEF_RVV_BASE_TYPE (eew16_index, get_vector_type (type_idx))
 655 DEF_RVV_BASE_TYPE (eew32_index, get_vector_type (type_idx))
 656 DEF_RVV_BASE_TYPE (eew64_index, get_vector_type (type_idx))
 657 DEF_RVV_BASE_TYPE (shift_vector, get_vector_type (type_idx))
 658 DEF_RVV_BASE_TYPE (double_trunc_vector, get_vector_type (type_idx))
 659 DEF_RVV_BASE_TYPE (quad_trunc_vector, get_vector_type (type_idx))
 660 DEF_RVV_BASE_TYPE (oct_trunc_vector, get_vector_type (type_idx))
 661 DEF_RVV_BASE_TYPE (double_trunc_scalar, get_scalar_type (type_idx))
 662 DEF_RVV_BASE_TYPE (double_trunc_signed_vector, get_vector_type (type_idx))
 663 DEF_RVV_BASE_TYPE (double_trunc_unsigned_vector, get_vector_type (type_idx))
 664 DEF_RVV_BASE_TYPE (double_trunc_unsigned_scalar, get_scalar_type (type_idx))
 665 DEF_RVV_BASE_TYPE (double_trunc_float_vector, get_vector_type (type_idx))
 666 DEF_RVV_BASE_TYPE (float_vector, get_vector_type (type_idx))
 667 DEF_RVV_BASE_TYPE (lmul1_vector, get_vector_type (type_idx))
 668 DEF_RVV_BASE_TYPE (widen_lmul1_vector, get_vector_type (type_idx))
 669 DEF_RVV_BASE_TYPE (eew8_interpret, get_vector_type (type_idx))
 670 DEF_RVV_BASE_TYPE (eew16_interpret, get_vector_type (type_idx))
 671 DEF_RVV_BASE_TYPE (eew32_interpret, get_vector_type (type_idx))
 672 DEF_RVV_BASE_TYPE (eew64_interpret, get_vector_type (type_idx))
 673 DEF_RVV_BASE_TYPE (bool1_interpret, get_vector_type (type_idx))
 674 DEF_RVV_BASE_TYPE (bool2_interpret, get_vector_type (type_idx))
 675 DEF_RVV_BASE_TYPE (bool4_interpret, get_vector_type (type_idx))
 676 DEF_RVV_BASE_TYPE (bool8_interpret, get_vector_type (type_idx))
 677 DEF_RVV_BASE_TYPE (bool16_interpret, get_vector_type (type_idx))
 678 DEF_RVV_BASE_TYPE (bool32_interpret, get_vector_type (type_idx))
 679 DEF_RVV_BASE_TYPE (bool64_interpret, get_vector_type (type_idx))
 680 DEF_RVV_BASE_TYPE (signed_eew8_lmul1_interpret, get_vector_type (type_idx))
 681 DEF_RVV_BASE_TYPE (signed_eew16_lmul1_interpret, get_vector_type (type_idx))
 682 DEF_RVV_BASE_TYPE (signed_eew32_lmul1_interpret, get_vector_type (type_idx))
 683 DEF_RVV_BASE_TYPE (signed_eew64_lmul1_interpret, get_vector_type (type_idx))
 684 DEF_RVV_BASE_TYPE (unsigned_eew8_lmul1_interpret, get_vector_type (type_idx))
 685 DEF_RVV_BASE_TYPE (unsigned_eew16_lmul1_interpret, get_vector_type (type_idx))
 686 DEF_RVV_BASE_TYPE (unsigned_eew32_lmul1_interpret, get_vector_type (type_idx))
 687 DEF_RVV_BASE_TYPE (unsigned_eew64_lmul1_interpret, get_vector_type (type_idx))
 688 DEF_RVV_BASE_TYPE (vlmul_ext_x2, get_vector_type (type_idx))
 689 DEF_RVV_BASE_TYPE (vlmul_ext_x4, get_vector_type (type_idx))
 690 DEF_RVV_BASE_TYPE (vlmul_ext_x8, get_vector_type (type_idx))
 691 DEF_RVV_BASE_TYPE (vlmul_ext_x16, get_vector_type (type_idx))
 692 DEF_RVV_BASE_TYPE (vlmul_ext_x32, get_vector_type (type_idx))
 693 DEF_RVV_BASE_TYPE (vlmul_ext_x64, get_vector_type (type_idx))
 694 DEF_RVV_BASE_TYPE (size_ptr, build_pointer_type (size_type_node))
 695 DEF_RVV_BASE_TYPE (tuple_subpart, get_tuple_subpart_type (type_idx))
 696
 697 DEF_RVV_VXRM_ENUM (RNU, VXRM_RNU)
 698 DEF_RVV_VXRM_ENUM (RNE, VXRM_RNE)
 699 DEF_RVV_VXRM_ENUM (RDN, VXRM_RDN)
 700 DEF_RVV_VXRM_ENUM (ROD, VXRM_ROD)
 701
 702 DEF_RVV_FRM_ENUM (RNE, FRM_RNE)
 703 DEF_RVV_FRM_ENUM (RTZ, FRM_RTZ)
 704 DEF_RVV_FRM_ENUM (RDN, FRM_RDN)
 705 DEF_RVV_FRM_ENUM (RUP, FRM_RUP)
 706 DEF_RVV_FRM_ENUM (RMM, FRM_RMM)
 707
 708 #include "riscv-vector-type-indexer.gen.def"
 709
 710 #undef DEF_RVV_PRED_TYPE
 711 #undef DEF_RVV_OP_TYPE
 712 #undef DEF_RVV_TYPE
 713 #undef DEF_RVV_TUPLE_TYPE
 714 #undef DEF_RVV_BASE_TYPE
 715 #undef DEF_RVV_TYPE_INDEX
 716 #undef DEF_RVV_VXRM_ENUM
 717 #undef DEF_RVV_FRM_ENUM