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re PR target/10781 (wrong class size and alignment with static class member)
[thirdparty/gcc.git] / gcc / config / rs6000 / linux64.h
1 /* Definitions of target machine for GNU compiler,
2 for 64 bit PowerPC linux.
3 Copyright (C) 2000, 2001, 2002, 2003, 2004
4 Free Software Foundation, Inc.
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify it
9 under the terms of the GNU General Public License as published
10 by the Free Software Foundation; either version 2, or (at your
11 option) any later version.
12
13 GCC is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to the
20 Free Software Foundation, 59 Temple Place - Suite 330, Boston,
21 MA 02111-1307, USA. */
22
23 #ifndef RS6000_BI_ARCH
24
25 #undef DEFAULT_ABI
26 #define DEFAULT_ABI ABI_AIX
27
28 #undef TARGET_64BIT
29 #define TARGET_64BIT 1
30
31 #define DEFAULT_ARCH64_P 1
32 #define RS6000_BI_ARCH_P 0
33
34 #else
35
36 #define DEFAULT_ARCH64_P (TARGET_DEFAULT & MASK_64BIT)
37 #define RS6000_BI_ARCH_P 1
38
39 #endif
40
41 #ifdef IN_LIBGCC2
42 #undef TARGET_64BIT
43 #ifdef __powerpc64__
44 #define TARGET_64BIT 1
45 #else
46 #define TARGET_64BIT 0
47 #endif
48 #endif
49
50 #undef TARGET_AIX
51 #define TARGET_AIX TARGET_64BIT
52
53 #undef PROCESSOR_DEFAULT64
54 #define PROCESSOR_DEFAULT64 PROCESSOR_PPC630
55
56 #undef TARGET_RELOCATABLE
57 #define TARGET_RELOCATABLE (!TARGET_64BIT && (target_flags & MASK_RELOCATABLE))
58
59 #undef RS6000_ABI_NAME
60 #define RS6000_ABI_NAME (TARGET_64BIT ? "aixdesc" : "sysv")
61
62 #define INVALID_64BIT "-m%s not supported in this configuration"
63 #define INVALID_32BIT INVALID_64BIT
64
65 #undef SUBSUBTARGET_OVERRIDE_OPTIONS
66 #define SUBSUBTARGET_OVERRIDE_OPTIONS \
67 do \
68 { \
69 if (rs6000_alignment_string == 0) \
70 rs6000_alignment_flags = MASK_ALIGN_NATURAL; \
71 if (TARGET_64BIT) \
72 { \
73 if (DEFAULT_ABI != ABI_AIX) \
74 { \
75 rs6000_current_abi = ABI_AIX; \
76 error (INVALID_64BIT, "call"); \
77 } \
78 if (target_flags & MASK_RELOCATABLE) \
79 { \
80 target_flags &= ~MASK_RELOCATABLE; \
81 error (INVALID_64BIT, "relocatable"); \
82 } \
83 if (target_flags & MASK_EABI) \
84 { \
85 target_flags &= ~MASK_EABI; \
86 error (INVALID_64BIT, "eabi"); \
87 } \
88 if (target_flags & MASK_PROTOTYPE) \
89 { \
90 target_flags &= ~MASK_PROTOTYPE; \
91 error (INVALID_64BIT, "prototype"); \
92 } \
93 if ((target_flags & MASK_POWERPC64) == 0) \
94 { \
95 target_flags |= MASK_POWERPC64; \
96 error ("-m64 requires a PowerPC64 cpu"); \
97 } \
98 } \
99 else \
100 { \
101 if (!RS6000_BI_ARCH_P) \
102 error (INVALID_32BIT, "32"); \
103 } \
104 } \
105 while (0)
106
107 #ifdef RS6000_BI_ARCH
108
109 #undef OVERRIDE_OPTIONS
110 #define OVERRIDE_OPTIONS \
111 rs6000_override_options (((TARGET_DEFAULT ^ target_flags) & MASK_64BIT) \
112 ? (char *) 0 : TARGET_CPU_DEFAULT)
113
114 #endif
115
116 #undef ASM_DEFAULT_SPEC
117 #undef ASM_SPEC
118 #undef LINK_OS_LINUX_SPEC
119
120 #ifndef RS6000_BI_ARCH
121 #define ASM_DEFAULT_SPEC "-mppc64"
122 #define ASM_SPEC "%(asm_spec64) %(asm_spec_common)"
123 #define LINK_OS_LINUX_SPEC "%(link_os_linux_spec64)"
124 #else
125 #if DEFAULT_ARCH64_P
126 #define ASM_DEFAULT_SPEC "-mppc%{!m32:64}"
127 #define ASM_SPEC "%{m32:%(asm_spec32)}%{!m32:%(asm_spec64)} %(asm_spec_common)"
128 #define LINK_OS_LINUX_SPEC "%{m32:%(link_os_linux_spec32)}%{!m32:%(link_os_linux_spec64)}"
129 #else
130 #define ASM_DEFAULT_SPEC "-mppc%{m64:64}"
131 #define ASM_SPEC "%{!m64:%(asm_spec32)}%{m64:%(asm_spec64)} %(asm_spec_common)"
132 #define LINK_OS_LINUX_SPEC "%{!m64:%(link_os_linux_spec32)}%{m64:%(link_os_linux_spec64)}"
133 #endif
134 #endif
135
136 #define ASM_SPEC32 "-a32 %{n} %{T} %{Ym,*} %{Yd,*} \
137 %{mrelocatable} %{mrelocatable-lib} %{fpic:-K PIC} %{fPIC:-K PIC} \
138 %{memb} %{!memb: %{msdata: -memb} %{msdata=eabi: -memb}} \
139 %{!mlittle: %{!mlittle-endian: %{!mbig: %{!mbig-endian: \
140 %{mcall-freebsd: -mbig} \
141 %{mcall-i960-old: -mlittle} \
142 %{mcall-linux: -mbig} \
143 %{mcall-gnu: -mbig} \
144 %{mcall-netbsd: -mbig} \
145 }}}}"
146
147 #define ASM_SPEC64 "-a64"
148
149 #define ASM_SPEC_COMMON "%(asm_cpu) \
150 %{.s: %{mregnames} %{mno-regnames}} %{.S: %{mregnames} %{mno-regnames}} \
151 %{v:-V} %{Qy:} %{!Qn:-Qy} %{Wa,*:%*} \
152 %{mlittle} %{mlittle-endian} %{mbig} %{mbig-endian}"
153
154 #undef SUBSUBTARGET_EXTRA_SPECS
155 #define SUBSUBTARGET_EXTRA_SPECS \
156 { "asm_spec_common", ASM_SPEC_COMMON }, \
157 { "asm_spec32", ASM_SPEC32 }, \
158 { "asm_spec64", ASM_SPEC64 }, \
159 { "link_os_linux_spec32", LINK_OS_LINUX_SPEC32 }, \
160 { "link_os_linux_spec64", LINK_OS_LINUX_SPEC64 },
161
162 #undef MULTILIB_DEFAULTS
163 #if DEFAULT_ARCH64_P
164 #define MULTILIB_DEFAULTS { "m64" }
165 #else
166 #define MULTILIB_DEFAULTS { "m32" }
167 #endif
168
169 #ifndef RS6000_BI_ARCH
170
171 /* 64-bit PowerPC Linux is always big-endian. */
172 #undef TARGET_LITTLE_ENDIAN
173 #define TARGET_LITTLE_ENDIAN 0
174
175 /* 64-bit PowerPC Linux always has a TOC. */
176 #undef TARGET_TOC
177 #define TARGET_TOC 1
178
179 /* Some things from sysv4.h we don't do when 64 bit. */
180 #undef TARGET_RELOCATABLE
181 #define TARGET_RELOCATABLE 0
182 #undef TARGET_EABI
183 #define TARGET_EABI 0
184 #undef TARGET_PROTOTYPE
185 #define TARGET_PROTOTYPE 0
186
187 #endif
188
189 #define MASK_PROFILE_KERNEL 0x00080000
190
191 /* Non-standard profiling for kernels, which just saves LR then calls
192 _mcount without worrying about arg saves. The idea is to change
193 the function prologue as little as possible as it isn't easy to
194 account for arg save/restore code added just for _mcount. */
195 #define TARGET_PROFILE_KERNEL (target_flags & MASK_PROFILE_KERNEL)
196
197 /* Override sysv4.h. */
198 #undef EXTRA_SUBTARGET_SWITCHES
199 #define EXTRA_SUBTARGET_SWITCHES \
200 {"profile-kernel", MASK_PROFILE_KERNEL, \
201 N_("Call mcount for profiling before a function prologue") }, \
202 {"no-profile-kernel", -MASK_PROFILE_KERNEL, \
203 N_("Call mcount for profiling after a function prologue") },
204
205 /* We use glibc _mcount for profiling. */
206 #define NO_PROFILE_COUNTERS TARGET_64BIT
207 #define PROFILE_HOOK(LABEL) \
208 do { if (TARGET_64BIT) output_profile_hook (LABEL); } while (0)
209
210 /* We don't need to generate entries in .fixup. */
211 #undef RELOCATABLE_NEEDS_FIXUP
212
213 /* PowerPC64 Linux word-aligns FP doubles when -malign-power is given. */
214 #undef ADJUST_FIELD_ALIGN
215 #define ADJUST_FIELD_ALIGN(FIELD, COMPUTED) \
216 ((TARGET_ALTIVEC && TREE_CODE (TREE_TYPE (FIELD)) == VECTOR_TYPE) \
217 ? 128 \
218 : (TARGET_64BIT \
219 && TARGET_ALIGN_NATURAL == 0 \
220 && TYPE_MODE (TREE_CODE (TREE_TYPE (FIELD)) == ARRAY_TYPE \
221 ? get_inner_array_type (FIELD) \
222 : TREE_TYPE (FIELD)) == DFmode) \
223 ? MIN ((COMPUTED), 32) \
224 : (COMPUTED))
225
226 /* PowerPC64 Linux increases natural record alignment to doubleword if
227 the first field is an FP double, only if in power alignment mode. */
228 #undef ROUND_TYPE_ALIGN
229 #define ROUND_TYPE_ALIGN(STRUCT, COMPUTED, SPECIFIED) \
230 ((TARGET_ALTIVEC && TREE_CODE (STRUCT) == VECTOR_TYPE) \
231 ? MAX (MAX ((COMPUTED), (SPECIFIED)), 128) \
232 : (TARGET_64BIT \
233 && (TREE_CODE (STRUCT) == RECORD_TYPE \
234 || TREE_CODE (STRUCT) == UNION_TYPE \
235 || TREE_CODE (STRUCT) == QUAL_UNION_TYPE) \
236 && TARGET_ALIGN_NATURAL == 0) \
237 ? rs6000_special_round_type_align (STRUCT, COMPUTED, SPECIFIED) \
238 : MAX ((COMPUTED), (SPECIFIED)))
239
240 /* Indicate that jump tables go in the text section. */
241 #undef JUMP_TABLES_IN_TEXT_SECTION
242 #define JUMP_TABLES_IN_TEXT_SECTION TARGET_64BIT
243
244 /* The linux ppc64 ABI isn't explicit on whether aggregates smaller
245 than a doubleword should be padded upward or downward. You could
246 reasonably assume that they follow the normal rules for structure
247 layout treating the parameter area as any other block of memory,
248 then map the reg param area to registers. ie. pad updard.
249 Setting both of the following defines results in this behavior.
250 Setting just the first one will result in aggregates that fit in a
251 doubleword being padded downward, and others being padded upward.
252 Not a bad idea as this results in struct { int x; } being passed
253 the same way as an int. */
254 #define AGGREGATE_PADDING_FIXED TARGET_64BIT
255 #define AGGREGATES_PAD_UPWARD_ALWAYS 0
256
257 /* We don't want anything in the reg parm area being passed on the
258 stack. */
259 #define MUST_PASS_IN_STACK(MODE, TYPE) \
260 ((TARGET_64BIT \
261 && (TYPE) != 0 \
262 && (TREE_CODE (TYPE_SIZE (TYPE)) != INTEGER_CST \
263 || TREE_ADDRESSABLE (TYPE))) \
264 || (!TARGET_64BIT \
265 && default_must_pass_in_stack ((MODE), (TYPE))))
266
267 /* Specify padding for the last element of a block move between
268 registers and memory. FIRST is nonzero if this is the only
269 element. */
270 #define BLOCK_REG_PADDING(MODE, TYPE, FIRST) \
271 (!(FIRST) ? upward : FUNCTION_ARG_PADDING (MODE, TYPE))
272
273 /* __throw will restore its own return address to be the same as the
274 return address of the function that the throw is being made to.
275 This is unfortunate, because we want to check the original
276 return address to see if we need to restore the TOC.
277 So we have to squirrel it away with this. */
278 #define SETUP_FRAME_ADDRESSES() \
279 do { if (TARGET_64BIT) rs6000_aix_emit_builtin_unwind_init (); } while (0)
280
281 /* Override svr4.h */
282 #undef MD_EXEC_PREFIX
283 #undef MD_STARTFILE_PREFIX
284
285 /* Override sysv4.h */
286 #undef CPP_SYSV_SPEC
287 #define CPP_SYSV_SPEC ""
288
289 #undef TARGET_OS_CPP_BUILTINS
290 #define TARGET_OS_CPP_BUILTINS() \
291 do \
292 { \
293 if (TARGET_64BIT) \
294 { \
295 builtin_define ("__PPC__"); \
296 builtin_define ("__PPC64__"); \
297 builtin_define ("__powerpc__"); \
298 builtin_define ("__powerpc64__"); \
299 builtin_define ("__PIC__"); \
300 builtin_assert ("cpu=powerpc64"); \
301 builtin_assert ("machine=powerpc64"); \
302 } \
303 else \
304 { \
305 builtin_define_std ("PPC"); \
306 builtin_define_std ("powerpc"); \
307 builtin_assert ("cpu=powerpc"); \
308 builtin_assert ("machine=powerpc"); \
309 TARGET_OS_SYSV_CPP_BUILTINS (); \
310 } \
311 } \
312 while (0)
313
314 #undef CPP_OS_DEFAULT_SPEC
315 #define CPP_OS_DEFAULT_SPEC "%(cpp_os_linux)"
316
317 /* The GNU C++ standard library currently requires _GNU_SOURCE being
318 defined on glibc-based systems. This temporary hack accomplishes this,
319 it should go away as soon as libstdc++-v3 has a real fix. */
320 #undef CPLUSPLUS_CPP_SPEC
321 #define CPLUSPLUS_CPP_SPEC "-D_GNU_SOURCE %(cpp)"
322
323 #undef LINK_SHLIB_SPEC
324 #define LINK_SHLIB_SPEC "%{shared:-shared} %{!shared: %{static:-static}}"
325
326 #undef LIB_DEFAULT_SPEC
327 #define LIB_DEFAULT_SPEC "%(lib_linux)"
328
329 #undef STARTFILE_DEFAULT_SPEC
330 #define STARTFILE_DEFAULT_SPEC "%(startfile_linux)"
331
332 #undef ENDFILE_DEFAULT_SPEC
333 #define ENDFILE_DEFAULT_SPEC "%(endfile_linux)"
334
335 #undef LINK_START_DEFAULT_SPEC
336 #define LINK_START_DEFAULT_SPEC "%(link_start_linux)"
337
338 #undef LINK_OS_DEFAULT_SPEC
339 #define LINK_OS_DEFAULT_SPEC "%(link_os_linux)"
340
341 #define LINK_OS_LINUX_SPEC32 "-m elf32ppclinux %{!shared: %{!static: \
342 %{rdynamic:-export-dynamic} \
343 %{!dynamic-linker:-dynamic-linker /lib/ld.so.1}}}"
344
345 #define LINK_OS_LINUX_SPEC64 "-m elf64ppc %{!shared: %{!static: \
346 %{rdynamic:-export-dynamic} \
347 %{!dynamic-linker:-dynamic-linker /lib64/ld64.so.1}}}"
348
349 #undef TOC_SECTION_ASM_OP
350 #define TOC_SECTION_ASM_OP \
351 (TARGET_64BIT \
352 ? "\t.section\t\".toc\",\"aw\"" \
353 : "\t.section\t\".got\",\"aw\"")
354
355 #undef MINIMAL_TOC_SECTION_ASM_OP
356 #define MINIMAL_TOC_SECTION_ASM_OP \
357 (TARGET_64BIT \
358 ? "\t.section\t\".toc1\",\"aw\"" \
359 : ((TARGET_RELOCATABLE || flag_pic) \
360 ? "\t.section\t\".got2\",\"aw\"" \
361 : "\t.section\t\".got1\",\"aw\""))
362
363 #undef TARGET_VERSION
364 #define TARGET_VERSION fprintf (stderr, " (PowerPC64 GNU/Linux)");
365
366 /* Must be at least as big as our pointer type. */
367 #undef SIZE_TYPE
368 #define SIZE_TYPE (TARGET_64BIT ? "long unsigned int" : "unsigned int")
369
370 #undef PTRDIFF_TYPE
371 #define PTRDIFF_TYPE (TARGET_64BIT ? "long int" : "int")
372
373 #undef WCHAR_TYPE
374 #define WCHAR_TYPE (TARGET_64BIT ? "int" : "long int")
375 #undef WCHAR_TYPE_SIZE
376 #define WCHAR_TYPE_SIZE 32
377
378 /* Override rs6000.h definition. */
379 #undef ASM_APP_ON
380 #define ASM_APP_ON "#APP\n"
381
382 /* Override rs6000.h definition. */
383 #undef ASM_APP_OFF
384 #define ASM_APP_OFF "#NO_APP\n"
385
386 /* PowerPC no-op instruction. */
387 #undef RS6000_CALL_GLUE
388 #define RS6000_CALL_GLUE (TARGET_64BIT ? "nop" : "cror 31,31,31")
389
390 #undef RS6000_MCOUNT
391 #define RS6000_MCOUNT "_mcount"
392
393 #ifdef __powerpc64__
394 /* _init and _fini functions are built from bits spread across many
395 object files, each potentially with a different TOC pointer. For
396 that reason, place a nop after the call so that the linker can
397 restore the TOC pointer if a TOC adjusting call stub is needed. */
398 #define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \
399 asm (SECTION_OP "\n" \
400 " bl ." #FUNC "\n" \
401 " nop\n" \
402 " .previous");
403 #endif
404
405 /* FP save and restore routines. */
406 #undef SAVE_FP_PREFIX
407 #define SAVE_FP_PREFIX (TARGET_64BIT ? "._savef" : "_savefpr_")
408 #undef SAVE_FP_SUFFIX
409 #define SAVE_FP_SUFFIX (TARGET_64BIT ? "" : "_l")
410 #undef RESTORE_FP_PREFIX
411 #define RESTORE_FP_PREFIX (TARGET_64BIT ? "._restf" : "_restfpr_")
412 #undef RESTORE_FP_SUFFIX
413 #define RESTORE_FP_SUFFIX (TARGET_64BIT ? "" : "_l")
414
415 /* Dwarf2 debugging. */
416 #undef PREFERRED_DEBUGGING_TYPE
417 #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
418
419 /* This is how to declare the size of a function. */
420 #undef ASM_DECLARE_FUNCTION_SIZE
421 #define ASM_DECLARE_FUNCTION_SIZE(FILE, FNAME, DECL) \
422 do \
423 { \
424 if (!flag_inhibit_size_directive) \
425 { \
426 fputs ("\t.size\t", (FILE)); \
427 if (TARGET_64BIT) \
428 putc ('.', (FILE)); \
429 assemble_name ((FILE), (FNAME)); \
430 fputs (",.-", (FILE)); \
431 if (TARGET_64BIT) \
432 putc ('.', (FILE)); \
433 assemble_name ((FILE), (FNAME)); \
434 putc ('\n', (FILE)); \
435 } \
436 } \
437 while (0)
438
439 /* Return nonzero if this entry is to be written into the constant
440 pool in a special way. We do so if this is a SYMBOL_REF, LABEL_REF
441 or a CONST containing one of them. If -mfp-in-toc (the default),
442 we also do this for floating-point constants. We actually can only
443 do this if the FP formats of the target and host machines are the
444 same, but we can't check that since not every file that uses
445 GO_IF_LEGITIMATE_ADDRESS_P includes real.h. We also do this when
446 we can write the entry into the TOC and the entry is not larger
447 than a TOC entry. */
448
449 #undef ASM_OUTPUT_SPECIAL_POOL_ENTRY_P
450 #define ASM_OUTPUT_SPECIAL_POOL_ENTRY_P(X, MODE) \
451 (TARGET_TOC \
452 && (GET_CODE (X) == SYMBOL_REF \
453 || (GET_CODE (X) == CONST && GET_CODE (XEXP (X, 0)) == PLUS \
454 && GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF) \
455 || GET_CODE (X) == LABEL_REF \
456 || (GET_CODE (X) == CONST_INT \
457 && GET_MODE_BITSIZE (MODE) <= GET_MODE_BITSIZE (Pmode)) \
458 || (GET_CODE (X) == CONST_DOUBLE \
459 && ((TARGET_64BIT \
460 && (TARGET_POWERPC64 \
461 || TARGET_MINIMAL_TOC \
462 || (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \
463 && ! TARGET_NO_FP_IN_TOC))) \
464 || (!TARGET_64BIT \
465 && !TARGET_NO_FP_IN_TOC \
466 && !TARGET_RELOCATABLE \
467 && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \
468 && BITS_PER_WORD == HOST_BITS_PER_INT)))))
469
470 /* This is the same as the dbxelf.h version, except that we need to
471 use the function code label, not the function descriptor. */
472 #undef ASM_OUTPUT_SOURCE_LINE
473 #define ASM_OUTPUT_SOURCE_LINE(FILE, LINE, COUNTER) \
474 do \
475 { \
476 char temp[256]; \
477 ASM_GENERATE_INTERNAL_LABEL (temp, "LM", COUNTER); \
478 fprintf (FILE, "\t.stabn 68,0,%d,", LINE); \
479 assemble_name (FILE, temp); \
480 putc ('-', FILE); \
481 if (TARGET_64BIT) \
482 putc ('.', FILE); \
483 assemble_name (FILE, \
484 XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0));\
485 putc ('\n', FILE); \
486 (*targetm.asm_out.internal_label) (FILE, "LM", COUNTER); \
487 } \
488 while (0)
489
490 /* Similarly, we want the function code label here. */
491 #define DBX_OUTPUT_BRAC(FILE, NAME, BRAC) \
492 do \
493 { \
494 const char *flab; \
495 fprintf (FILE, "%s%d,0,0,", ASM_STABN_OP, BRAC); \
496 assemble_name (FILE, NAME); \
497 putc ('-', FILE); \
498 if (current_function_func_begin_label != NULL_TREE) \
499 flab = IDENTIFIER_POINTER (current_function_func_begin_label); \
500 else \
501 { \
502 if (TARGET_64BIT) \
503 putc ('.', FILE); \
504 flab = XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0); \
505 } \
506 assemble_name (FILE, flab); \
507 putc ('\n', FILE); \
508 } \
509 while (0)
510
511 #define DBX_OUTPUT_LBRAC(FILE, NAME) DBX_OUTPUT_BRAC (FILE, NAME, N_LBRAC)
512 #define DBX_OUTPUT_RBRAC(FILE, NAME) DBX_OUTPUT_BRAC (FILE, NAME, N_RBRAC)
513
514 /* Another case where we want the dot name. */
515 #define DBX_OUTPUT_NFUN(FILE, LSCOPE, DECL) \
516 do \
517 { \
518 fprintf (FILE, "%s\"\",%d,0,0,", ASM_STABS_OP, N_FUN); \
519 assemble_name (FILE, LSCOPE); \
520 putc ('-', FILE); \
521 if (TARGET_64BIT) \
522 putc ('.', FILE); \
523 assemble_name (FILE, XSTR (XEXP (DECL_RTL (DECL), 0), 0)); \
524 putc ('\n', FILE); \
525 } \
526 while (0)
527
528 /* Select a format to encode pointers in exception handling data. CODE
529 is 0 for data, 1 for code labels, 2 for function pointers. GLOBAL is
530 true if the symbol may be affected by dynamic relocations. */
531 #undef ASM_PREFERRED_EH_DATA_FORMAT
532 #define ASM_PREFERRED_EH_DATA_FORMAT(CODE, GLOBAL) \
533 ((TARGET_64BIT || flag_pic || TARGET_RELOCATABLE) \
534 ? (((GLOBAL) ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel \
535 | (TARGET_64BIT ? DW_EH_PE_udata8 : DW_EH_PE_sdata4)) \
536 : DW_EH_PE_absptr)
537
538 /* For backward compatibility, we must continue to use the AIX
539 structure return convention. */
540 #undef DRAFT_V4_STRUCT_RET
541 #define DRAFT_V4_STRUCT_RET (!TARGET_64BIT)
542
543 #define TARGET_ASM_FILE_END file_end_indicate_exec_stack
544
545 #define LINK_GCC_C_SEQUENCE_SPEC \
546 "%{static:--start-group} %G %L %{static:--end-group}%{!static:%G}"
547
548 /* Do code reading to identify a signal frame, and set the frame
549 state data appropriately. See unwind-dw2.c for the structs. */
550
551 #ifdef IN_LIBGCC2
552 #include <signal.h>
553 #include <sys/ucontext.h>
554
555 #ifdef __powerpc64__
556 enum { SIGNAL_FRAMESIZE = 128 };
557 #else
558 enum { SIGNAL_FRAMESIZE = 64 };
559 #endif
560 #endif
561
562 #ifdef __powerpc64__
563
564 /* If the current unwind info (FS) does not contain explicit info
565 saving R2, then we have to do a minor amount of code reading to
566 figure out if it was saved. The big problem here is that the
567 code that does the save/restore is generated by the linker, so
568 we have no good way to determine at compile time what to do. */
569
570 #define MD_FROB_UPDATE_CONTEXT(CTX, FS) \
571 do { \
572 if ((FS)->regs.reg[2].how == REG_UNSAVED) \
573 { \
574 unsigned int *insn \
575 = (unsigned int *) \
576 _Unwind_GetGR ((CTX), LINK_REGISTER_REGNUM); \
577 if (*insn == 0xE8410028) \
578 _Unwind_SetGRPtr ((CTX), 2, (CTX)->cfa + 40); \
579 } \
580 } while (0)
581
582 #define MD_FALLBACK_FRAME_STATE_FOR(CONTEXT, FS, SUCCESS) \
583 do { \
584 unsigned char *pc_ = (CONTEXT)->ra; \
585 struct sigcontext *sc_; \
586 long new_cfa_; \
587 int i_; \
588 \
589 /* addi r1, r1, 128; li r0, 0x0077; sc (sigreturn) */ \
590 /* addi r1, r1, 128; li r0, 0x00AC; sc (rt_sigreturn) */ \
591 if (*(unsigned int *) (pc_+0) != 0x38210000 + SIGNAL_FRAMESIZE \
592 || *(unsigned int *) (pc_+8) != 0x44000002) \
593 break; \
594 if (*(unsigned int *) (pc_+4) == 0x38000077) \
595 { \
596 struct sigframe { \
597 char gap[SIGNAL_FRAMESIZE]; \
598 struct sigcontext sigctx; \
599 } *rt_ = (CONTEXT)->cfa; \
600 sc_ = &rt_->sigctx; \
601 } \
602 else if (*(unsigned int *) (pc_+4) == 0x380000AC) \
603 { \
604 struct rt_sigframe { \
605 int tramp[6]; \
606 struct siginfo *pinfo; \
607 struct ucontext *puc; \
608 } *rt_ = (struct rt_sigframe *) pc_; \
609 sc_ = &rt_->puc->uc_mcontext; \
610 } \
611 else \
612 break; \
613 \
614 new_cfa_ = sc_->regs->gpr[STACK_POINTER_REGNUM]; \
615 (FS)->cfa_how = CFA_REG_OFFSET; \
616 (FS)->cfa_reg = STACK_POINTER_REGNUM; \
617 (FS)->cfa_offset = new_cfa_ - (long) (CONTEXT)->cfa; \
618 \
619 for (i_ = 0; i_ < 32; i_++) \
620 if (i_ != STACK_POINTER_REGNUM) \
621 { \
622 (FS)->regs.reg[i_].how = REG_SAVED_OFFSET; \
623 (FS)->regs.reg[i_].loc.offset \
624 = (long)&(sc_->regs->gpr[i_]) - new_cfa_; \
625 } \
626 \
627 (FS)->regs.reg[LINK_REGISTER_REGNUM].how = REG_SAVED_OFFSET; \
628 (FS)->regs.reg[LINK_REGISTER_REGNUM].loc.offset \
629 = (long)&(sc_->regs->link) - new_cfa_; \
630 \
631 /* The unwinder expects the IP to point to the following insn, \
632 whereas the kernel returns the address of the actual \
633 faulting insn. We store NIP+4 in an unused register slot to \
634 get the same result for multiple evaluation of the same signal \
635 frame. */ \
636 sc_->regs->gpr[47] = sc_->regs->nip + 4; \
637 (FS)->regs.reg[CR0_REGNO].how = REG_SAVED_OFFSET; \
638 (FS)->regs.reg[CR0_REGNO].loc.offset \
639 = (long)&(sc_->regs->gpr[47]) - new_cfa_; \
640 (FS)->retaddr_column = CR0_REGNO; \
641 goto SUCCESS; \
642 } while (0)
643
644 #else
645
646 #define MD_FALLBACK_FRAME_STATE_FOR(CONTEXT, FS, SUCCESS) \
647 do { \
648 unsigned char *pc_ = (CONTEXT)->ra; \
649 struct sigcontext *sc_; \
650 long new_cfa_; \
651 int i_; \
652 \
653 /* li r0, 0x7777; sc (sigreturn old) */ \
654 /* li r0, 0x0077; sc (sigreturn new) */ \
655 /* li r0, 0x6666; sc (rt_sigreturn old) */ \
656 /* li r0, 0x00AC; sc (rt_sigreturn new) */ \
657 if (*(unsigned int *) (pc_+4) != 0x44000002) \
658 break; \
659 if (*(unsigned int *) (pc_+0) == 0x38007777 \
660 || *(unsigned int *) (pc_+0) == 0x38000077) \
661 { \
662 struct sigframe { \
663 char gap[SIGNAL_FRAMESIZE]; \
664 struct sigcontext sigctx; \
665 } *rt_ = (CONTEXT)->cfa; \
666 sc_ = &rt_->sigctx; \
667 } \
668 else if (*(unsigned int *) (pc_+0) == 0x38006666 \
669 || *(unsigned int *) (pc_+0) == 0x380000AC) \
670 { \
671 struct rt_sigframe { \
672 char gap[SIGNAL_FRAMESIZE]; \
673 unsigned long _unused[2]; \
674 struct siginfo *pinfo; \
675 void *puc; \
676 struct siginfo info; \
677 struct ucontext uc; \
678 } *rt_ = (CONTEXT)->cfa; \
679 sc_ = &rt_->uc.uc_mcontext; \
680 } \
681 else \
682 break; \
683 \
684 new_cfa_ = sc_->regs->gpr[STACK_POINTER_REGNUM]; \
685 (FS)->cfa_how = CFA_REG_OFFSET; \
686 (FS)->cfa_reg = STACK_POINTER_REGNUM; \
687 (FS)->cfa_offset = new_cfa_ - (long) (CONTEXT)->cfa; \
688 \
689 for (i_ = 0; i_ < 32; i_++) \
690 if (i_ != STACK_POINTER_REGNUM) \
691 { \
692 (FS)->regs.reg[i_].how = REG_SAVED_OFFSET; \
693 (FS)->regs.reg[i_].loc.offset \
694 = (long)&(sc_->regs->gpr[i_]) - new_cfa_; \
695 } \
696 \
697 (FS)->regs.reg[LINK_REGISTER_REGNUM].how = REG_SAVED_OFFSET; \
698 (FS)->regs.reg[LINK_REGISTER_REGNUM].loc.offset \
699 = (long)&(sc_->regs->link) - new_cfa_; \
700 \
701 /* The unwinder expects the IP to point to the following insn, \
702 whereas the kernel returns the address of the actual \
703 faulting insn. We store NIP+4 in an unused register slot to \
704 get the same result for multiple evaluation of the same signal \
705 frame. */ \
706 sc_->regs->gpr[47] = sc_->regs->nip + 4; \
707 (FS)->regs.reg[CR0_REGNO].how = REG_SAVED_OFFSET; \
708 (FS)->regs.reg[CR0_REGNO].loc.offset \
709 = (long)&(sc_->regs->gpr[47]) - new_cfa_; \
710 (FS)->retaddr_column = CR0_REGNO; \
711 goto SUCCESS; \
712 } while (0)
713
714 #endif
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