1 /* Subroutines used for code generation on IBM RS/6000.
2 Copyright (C) 1991, 93-8, 1999 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
26 #include "hard-reg-set.h"
28 #include "insn-config.h"
29 #include "conditions.h"
30 #include "insn-flags.h"
31 #include "insn-attr.h"
42 #ifndef TARGET_NO_PROTOTYPE
43 #define TARGET_NO_PROTOTYPE 0
46 extern int profile_block_flag
;
48 #define min(A,B) ((A) < (B) ? (A) : (B))
49 #define max(A,B) ((A) > (B) ? (A) : (B))
53 enum processor_type rs6000_cpu
;
54 struct rs6000_cpu_select rs6000_select
[3] =
56 /* switch name, tune arch */
57 { (const char *)0, "--with-cpu=", 1, 1 },
58 { (const char *)0, "-mcpu=", 1, 1 },
59 { (const char *)0, "-mtune=", 1, 0 },
62 /* Set to non-zero by "fix" operation to indicate that itrunc and
63 uitrunc must be defined. */
65 int rs6000_trunc_used
;
67 /* Set to non-zero once they have been defined. */
69 static int trunc_defined
;
71 /* Set to non-zero once AIX common-mode calls have been defined. */
72 static int common_mode_defined
;
74 /* Save information from a "cmpxx" operation until the branch or scc is
76 rtx rs6000_compare_op0
, rs6000_compare_op1
;
77 int rs6000_compare_fp_p
;
80 /* Label number of label created for -mrelocatable, to call to so we can
81 get the address of the GOT section */
82 int rs6000_pic_labelno
;
83 int rs6000_pic_func_labelno
;
85 /* Which abi to adhere to */
86 const char *rs6000_abi_name
= RS6000_ABI_NAME
;
88 /* Semantics of the small data area */
89 enum rs6000_sdata_type rs6000_sdata
= SDATA_DATA
;
91 /* Which small data model to use */
92 const char *rs6000_sdata_name
= (char *)0;
95 /* Whether a System V.4 varargs area was created. */
96 int rs6000_sysv_varargs_p
;
98 /* ABI enumeration available for subtarget to use. */
99 enum rs6000_abi rs6000_current_abi
;
101 /* Offset & size for fpmem stack locations used for converting between
102 float and integral types. */
103 int rs6000_fpmem_offset
;
104 int rs6000_fpmem_size
;
107 const char *rs6000_debug_name
;
108 int rs6000_debug_stack
; /* debug stack applications */
109 int rs6000_debug_arg
; /* debug argument handling */
111 /* Flag to say the TOC is initialized */
115 /* Default register names. */
116 char rs6000_reg_names
[][8] =
118 "0", "1", "2", "3", "4", "5", "6", "7",
119 "8", "9", "10", "11", "12", "13", "14", "15",
120 "16", "17", "18", "19", "20", "21", "22", "23",
121 "24", "25", "26", "27", "28", "29", "30", "31",
122 "0", "1", "2", "3", "4", "5", "6", "7",
123 "8", "9", "10", "11", "12", "13", "14", "15",
124 "16", "17", "18", "19", "20", "21", "22", "23",
125 "24", "25", "26", "27", "28", "29", "30", "31",
126 "mq", "lr", "ctr","ap",
127 "0", "1", "2", "3", "4", "5", "6", "7",
131 #ifdef TARGET_REGNAMES
132 static char alt_reg_names
[][8] =
134 "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7",
135 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15",
136 "%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23",
137 "%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31",
138 "%f0", "%f1", "%f2", "%f3", "%f4", "%f5", "%f6", "%f7",
139 "%f8", "%f9", "%f10", "%f11", "%f12", "%f13", "%f14", "%f15",
140 "%f16", "%f17", "%f18", "%f19", "%f20", "%f21", "%f22", "%f23",
141 "%f24", "%f25", "%f26", "%f27", "%f28", "%f29", "%f30", "%f31",
142 "mq", "lr", "ctr", "ap",
143 "%cr0", "%cr1", "%cr2", "%cr3", "%cr4", "%cr5", "%cr6", "%cr7",
148 #ifndef MASK_STRICT_ALIGN
149 #define MASK_STRICT_ALIGN 0
152 /* Override command line options. Mostly we process the processor
153 type and sometimes adjust other TARGET_ options. */
156 rs6000_override_options (default_cpu
)
157 const char *default_cpu
;
160 struct rs6000_cpu_select
*ptr
;
162 /* Simplify the entries below by making a mask for any POWER
163 variant and any PowerPC variant. */
165 #define POWER_MASKS (MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING)
166 #define POWERPC_MASKS (MASK_POWERPC | MASK_PPC_GPOPT \
167 | MASK_PPC_GFXOPT | MASK_POWERPC64)
168 #define POWERPC_OPT_MASKS (MASK_PPC_GPOPT | MASK_PPC_GFXOPT)
172 const char *name
; /* Canonical processor name. */
173 enum processor_type processor
; /* Processor type enum value. */
174 int target_enable
; /* Target flags to enable. */
175 int target_disable
; /* Target flags to disable. */
176 } processor_target_table
[]
177 = {{"common", PROCESSOR_COMMON
, MASK_NEW_MNEMONICS
,
178 POWER_MASKS
| POWERPC_MASKS
},
179 {"power", PROCESSOR_POWER
,
180 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
181 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
182 {"power2", PROCESSOR_POWER
,
183 MASK_POWER
| MASK_POWER2
| MASK_MULTIPLE
| MASK_STRING
,
184 POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
185 {"powerpc", PROCESSOR_POWERPC
,
186 MASK_POWERPC
| MASK_NEW_MNEMONICS
,
187 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
188 {"powerpc64", PROCESSOR_POWERPC64
,
189 MASK_POWERPC
| MASK_POWERPC64
| MASK_NEW_MNEMONICS
,
190 POWER_MASKS
| POWERPC_OPT_MASKS
},
191 {"rios", PROCESSOR_RIOS1
,
192 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
193 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
194 {"rios1", PROCESSOR_RIOS1
,
195 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
196 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
197 {"rsc", PROCESSOR_PPC601
,
198 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
199 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
200 {"rsc1", PROCESSOR_PPC601
,
201 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
202 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
203 {"rios2", PROCESSOR_RIOS2
,
204 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
| MASK_POWER2
,
205 POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
206 {"rs64a", PROCESSOR_RS64A
,
207 MASK_POWERPC
| MASK_NEW_MNEMONICS
,
208 POWER_MASKS
| POWERPC_OPT_MASKS
},
209 {"401", PROCESSOR_PPC403
,
210 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
211 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
212 {"403", PROCESSOR_PPC403
,
213 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
| MASK_STRICT_ALIGN
,
214 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
215 {"505", PROCESSOR_MPCCORE
,
216 MASK_POWERPC
| MASK_NEW_MNEMONICS
,
217 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
218 {"601", PROCESSOR_PPC601
,
219 MASK_POWER
| MASK_POWERPC
| MASK_NEW_MNEMONICS
| MASK_MULTIPLE
| MASK_STRING
,
220 MASK_POWER2
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
221 {"602", PROCESSOR_PPC603
,
222 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
223 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
224 {"603", PROCESSOR_PPC603
,
225 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
226 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
227 {"603e", PROCESSOR_PPC603
,
228 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
229 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
230 {"ec603e", PROCESSOR_PPC603
,
231 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
232 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
233 {"604", PROCESSOR_PPC604
,
234 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
235 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
236 {"604e", PROCESSOR_PPC604e
,
237 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
238 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
239 {"620", PROCESSOR_PPC620
,
240 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
241 POWER_MASKS
| MASK_PPC_GPOPT
},
242 {"630", PROCESSOR_PPC630
,
243 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
244 POWER_MASKS
| MASK_PPC_GPOPT
},
245 {"740", PROCESSOR_PPC750
,
246 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
247 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
248 {"750", PROCESSOR_PPC750
,
249 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
250 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
251 {"801", PROCESSOR_MPCCORE
,
252 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
253 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
254 {"821", PROCESSOR_MPCCORE
,
255 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
256 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
257 {"823", PROCESSOR_MPCCORE
,
258 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
259 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
260 {"860", PROCESSOR_MPCCORE
,
261 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
262 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
}};
264 size_t ptt_size
= sizeof (processor_target_table
) / sizeof (struct ptt
);
266 int multiple
= TARGET_MULTIPLE
; /* save current -mmultiple/-mno-multiple status */
267 int string
= TARGET_STRING
; /* save current -mstring/-mno-string status */
269 profile_block_flag
= 0;
271 /* Identify the processor type */
272 rs6000_select
[0].string
= default_cpu
;
273 rs6000_cpu
= TARGET_POWERPC64
? PROCESSOR_DEFAULT64
: PROCESSOR_DEFAULT
;
275 for (i
= 0; i
< sizeof (rs6000_select
) / sizeof (rs6000_select
[0]); i
++)
277 ptr
= &rs6000_select
[i
];
278 if (ptr
->string
!= (char *)0 && ptr
->string
[0] != '\0')
280 for (j
= 0; j
< ptt_size
; j
++)
281 if (! strcmp (ptr
->string
, processor_target_table
[j
].name
))
284 rs6000_cpu
= processor_target_table
[j
].processor
;
288 target_flags
|= processor_target_table
[j
].target_enable
;
289 target_flags
&= ~processor_target_table
[j
].target_disable
;
295 error ("bad value (%s) for %s switch", ptr
->string
, ptr
->name
);
299 /* If we are optimizing big endian systems for space, use the
300 store multiple instructions. */
301 if (BYTES_BIG_ENDIAN
&& optimize_size
)
302 target_flags
|= MASK_MULTIPLE
;
304 /* If -mmultiple or -mno-multiple was explicitly used, don't
305 override with the processor default */
306 if (TARGET_MULTIPLE_SET
)
307 target_flags
= (target_flags
& ~MASK_MULTIPLE
) | multiple
;
309 /* If -mstring or -mno-string was explicitly used, don't
310 override with the processor default */
311 if (TARGET_STRING_SET
)
312 target_flags
= (target_flags
& ~MASK_STRING
) | string
;
314 /* Don't allow -mmultiple or -mstring on little endian systems unless the cpu
315 is a 750, because the hardware doesn't support the instructions used in
316 little endian mode, and causes an alignment trap. The 750 does not cause
317 an alignment trap (except when the target is unaligned). */
319 if (! BYTES_BIG_ENDIAN
&& rs6000_cpu
!= PROCESSOR_PPC750
)
323 target_flags
&= ~MASK_MULTIPLE
;
324 if (TARGET_MULTIPLE_SET
)
325 warning ("-mmultiple is not supported on little endian systems");
330 target_flags
&= ~MASK_STRING
;
331 if (TARGET_STRING_SET
)
332 warning ("-mstring is not supported on little endian systems");
336 if (flag_pic
&& (DEFAULT_ABI
== ABI_AIX
))
338 warning ("-f%s ignored for AIX (all code is position independent)",
339 (flag_pic
> 1) ? "PIC" : "pic");
343 /* Set debug flags */
344 if (rs6000_debug_name
)
346 if (! strcmp (rs6000_debug_name
, "all"))
347 rs6000_debug_stack
= rs6000_debug_arg
= 1;
348 else if (! strcmp (rs6000_debug_name
, "stack"))
349 rs6000_debug_stack
= 1;
350 else if (! strcmp (rs6000_debug_name
, "arg"))
351 rs6000_debug_arg
= 1;
353 error ("Unknown -mdebug-%s switch", rs6000_debug_name
);
356 #ifdef TARGET_REGNAMES
357 /* If the user desires alternate register names, copy in the alternate names
360 bcopy ((char *)alt_reg_names
, (char *)rs6000_reg_names
,
361 sizeof (rs6000_reg_names
));
364 #ifdef SUBTARGET_OVERRIDE_OPTIONS
365 SUBTARGET_OVERRIDE_OPTIONS
;
370 optimization_options (level
, size
)
372 int size ATTRIBUTE_UNUSED
;
374 #ifdef HAVE_decrement_and_branch_on_count
375 /* When optimizing, enable use of BCT instruction. */
377 flag_branch_on_count_reg
= 1;
381 /* Do anything needed at the start of the asm file. */
384 rs6000_file_start (file
, default_cpu
)
386 const char *default_cpu
;
390 const char *start
= buffer
;
391 struct rs6000_cpu_select
*ptr
;
393 if (flag_verbose_asm
)
395 sprintf (buffer
, "\n%s rs6000/powerpc options:", ASM_COMMENT_START
);
396 rs6000_select
[0].string
= default_cpu
;
398 for (i
= 0; i
< sizeof (rs6000_select
) / sizeof (rs6000_select
[0]); i
++)
400 ptr
= &rs6000_select
[i
];
401 if (ptr
->string
!= (char *)0 && ptr
->string
[0] != '\0')
403 fprintf (file
, "%s %s%s", start
, ptr
->name
, ptr
->string
);
409 switch (rs6000_sdata
)
411 case SDATA_NONE
: fprintf (file
, "%s -msdata=none", start
); start
= ""; break;
412 case SDATA_DATA
: fprintf (file
, "%s -msdata=data", start
); start
= ""; break;
413 case SDATA_SYSV
: fprintf (file
, "%s -msdata=sysv", start
); start
= ""; break;
414 case SDATA_EABI
: fprintf (file
, "%s -msdata=eabi", start
); start
= ""; break;
417 if (rs6000_sdata
&& g_switch_value
)
419 fprintf (file
, "%s -G %d", start
, g_switch_value
);
430 /* Create a CONST_DOUBLE from a string. */
433 rs6000_float_const (string
, mode
)
435 enum machine_mode mode
;
437 REAL_VALUE_TYPE value
= REAL_VALUE_ATOF (string
, mode
);
438 return immed_real_const_1 (value
, mode
);
441 /* Return non-zero if this function is known to have a null epilogue. */
446 if (reload_completed
)
448 rs6000_stack_t
*info
= rs6000_stack_info ();
450 if (info
->first_gp_reg_save
== 32
451 && info
->first_fp_reg_save
== 64
461 /* Returns 1 always. */
464 any_operand (op
, mode
)
465 register rtx op ATTRIBUTE_UNUSED
;
466 enum machine_mode mode ATTRIBUTE_UNUSED
;
471 /* Returns 1 if op is the count register */
473 count_register_operand(op
, mode
)
475 enum machine_mode mode ATTRIBUTE_UNUSED
;
477 if (GET_CODE (op
) != REG
)
480 if (REGNO (op
) == COUNT_REGISTER_REGNUM
)
483 if (REGNO (op
) > FIRST_PSEUDO_REGISTER
)
489 /* Returns 1 if op is memory location for float/int conversions that masquerades
492 fpmem_operand(op
, mode
)
494 enum machine_mode mode ATTRIBUTE_UNUSED
;
496 if (GET_CODE (op
) != REG
)
499 if (FPMEM_REGNO_P (REGNO (op
)))
503 if (REGNO (op
) > FIRST_PSEUDO_REGISTER
)
510 /* Return 1 if OP is a constant that can fit in a D field. */
513 short_cint_operand (op
, mode
)
515 enum machine_mode mode ATTRIBUTE_UNUSED
;
517 return (GET_CODE (op
) == CONST_INT
518 && CONST_OK_FOR_LETTER_P (INTVAL (op
), 'I'));
521 /* Similar for a unsigned D field. */
524 u_short_cint_operand (op
, mode
)
526 enum machine_mode mode ATTRIBUTE_UNUSED
;
528 return (GET_CODE (op
) == CONST_INT
529 && CONST_OK_FOR_LETTER_P (INTVAL (op
), 'K'));
532 /* Return 1 if OP is a CONST_INT that cannot fit in a signed D field. */
535 non_short_cint_operand (op
, mode
)
537 enum machine_mode mode ATTRIBUTE_UNUSED
;
539 return (GET_CODE (op
) == CONST_INT
540 && (unsigned HOST_WIDE_INT
) (INTVAL (op
) + 0x8000) >= 0x10000);
543 /* Returns 1 if OP is a register that is not special (i.e., not MQ,
547 gpc_reg_operand (op
, mode
)
549 enum machine_mode mode
;
551 return (register_operand (op
, mode
)
552 && (GET_CODE (op
) != REG
553 || (REGNO (op
) >= 67 && !FPMEM_REGNO_P (REGNO (op
)))
554 || REGNO (op
) < 64));
557 /* Returns 1 if OP is either a pseudo-register or a register denoting a
561 cc_reg_operand (op
, mode
)
563 enum machine_mode mode
;
565 return (register_operand (op
, mode
)
566 && (GET_CODE (op
) != REG
567 || REGNO (op
) >= FIRST_PSEUDO_REGISTER
568 || CR_REGNO_P (REGNO (op
))));
571 /* Returns 1 if OP is either a pseudo-register or a register denoting a
572 CR field that isn't CR0. */
575 cc_reg_not_cr0_operand (op
, mode
)
577 enum machine_mode mode
;
579 return (register_operand (op
, mode
)
580 && (GET_CODE (op
) != REG
581 || REGNO (op
) >= FIRST_PSEUDO_REGISTER
582 || CR_REGNO_NOT_CR0_P (REGNO (op
))));
585 /* Returns 1 if OP is either a constant integer valid for a D-field or a
586 non-special register. If a register, it must be in the proper mode unless
590 reg_or_short_operand (op
, mode
)
592 enum machine_mode mode
;
594 return short_cint_operand (op
, mode
) || gpc_reg_operand (op
, mode
);
597 /* Similar, except check if the negation of the constant would be valid for
601 reg_or_neg_short_operand (op
, mode
)
603 enum machine_mode mode
;
605 if (GET_CODE (op
) == CONST_INT
)
606 return CONST_OK_FOR_LETTER_P (INTVAL (op
), 'P');
608 return gpc_reg_operand (op
, mode
);
611 /* Return 1 if the operand is either a register or an integer whose high-order
615 reg_or_u_short_operand (op
, mode
)
617 enum machine_mode mode
;
619 return u_short_cint_operand (op
, mode
) || gpc_reg_operand (op
, mode
);
622 /* Return 1 is the operand is either a non-special register or ANY
626 reg_or_cint_operand (op
, mode
)
628 enum machine_mode mode
;
630 return (GET_CODE (op
) == CONST_INT
631 || gpc_reg_operand (op
, mode
));
634 /* Return 1 if the operand is an operand that can be loaded via the GOT */
637 got_operand (op
, mode
)
639 enum machine_mode mode ATTRIBUTE_UNUSED
;
641 return (GET_CODE (op
) == SYMBOL_REF
642 || GET_CODE (op
) == CONST
643 || GET_CODE (op
) == LABEL_REF
);
646 /* Return 1 if the operand is a simple references that can be loaded via
647 the GOT (labels involving addition aren't allowed). */
650 got_no_const_operand (op
, mode
)
652 enum machine_mode mode ATTRIBUTE_UNUSED
;
654 return (GET_CODE (op
) == SYMBOL_REF
|| GET_CODE (op
) == LABEL_REF
);
657 /* Return the number of instructions it takes to form a constant in an
661 num_insns_constant_wide (value
)
664 /* signed constant loadable with {cal|addi} */
665 if (CONST_OK_FOR_LETTER_P (value
, 'I'))
668 /* constant loadable with {cau|addis} */
669 else if (CONST_OK_FOR_LETTER_P (value
, 'L'))
672 #if HOST_BITS_PER_WIDE_INT == 64
673 else if (TARGET_64BIT
)
675 HOST_WIDE_INT low
= value
& 0xffffffff;
676 HOST_WIDE_INT high
= value
>> 32;
678 if (high
== 0 && (low
& 0x80000000) == 0)
681 else if (high
== 0xffffffff && (low
& 0x80000000) != 0)
685 return num_insns_constant_wide (high
) + 1;
688 return (num_insns_constant_wide (high
)
689 + num_insns_constant_wide (low
) + 1);
698 num_insns_constant (op
, mode
)
700 enum machine_mode mode
;
702 if (GET_CODE (op
) == CONST_INT
)
703 return num_insns_constant_wide (INTVAL (op
));
705 else if (GET_CODE (op
) == CONST_DOUBLE
&& mode
== SFmode
)
710 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
711 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
712 return num_insns_constant_wide ((HOST_WIDE_INT
)l
);
715 else if (GET_CODE (op
) == CONST_DOUBLE
)
721 int endian
= (WORDS_BIG_ENDIAN
== 0);
723 if (mode
== VOIDmode
|| mode
== DImode
)
725 high
= CONST_DOUBLE_HIGH (op
);
726 low
= CONST_DOUBLE_LOW (op
);
730 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
731 REAL_VALUE_TO_TARGET_DOUBLE (rv
, l
);
737 return (num_insns_constant_wide (low
)
738 + num_insns_constant_wide (high
));
742 if (high
== 0 && (low
& 0x80000000) == 0)
743 return num_insns_constant_wide (low
);
745 else if (((high
& 0xffffffff) == 0xffffffff)
746 && ((low
& 0x80000000) != 0))
747 return num_insns_constant_wide (low
);
749 else if (mask64_operand (op
, mode
))
753 return num_insns_constant_wide (high
) + 1;
756 return (num_insns_constant_wide (high
)
757 + num_insns_constant_wide (low
) + 1);
765 /* Return 1 if the operand is a CONST_DOUBLE and it can be put into a register
766 with one instruction per word. We only do this if we can safely read
767 CONST_DOUBLE_{LOW,HIGH}. */
770 easy_fp_constant (op
, mode
)
772 register enum machine_mode mode
;
774 if (GET_CODE (op
) != CONST_DOUBLE
775 || GET_MODE (op
) != mode
776 || (GET_MODE_CLASS (mode
) != MODE_FLOAT
&& mode
!= DImode
))
779 /* Consider all constants with -msoft-float to be easy */
780 if (TARGET_SOFT_FLOAT
&& mode
!= DImode
)
783 /* If we are using V.4 style PIC, consider all constants to be hard */
784 if (flag_pic
&& (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
))
787 #ifdef TARGET_RELOCATABLE
788 /* Similarly if we are using -mrelocatable, consider all constants to be hard */
789 if (TARGET_RELOCATABLE
)
798 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
799 REAL_VALUE_TO_TARGET_DOUBLE (rv
, k
);
801 return (num_insns_constant_wide ((HOST_WIDE_INT
)k
[0]) == 1
802 && num_insns_constant_wide ((HOST_WIDE_INT
)k
[1]) == 1);
805 else if (mode
== SFmode
)
810 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
811 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
813 return num_insns_constant_wide (l
) == 1;
816 else if (mode
== DImode
)
817 return ((TARGET_64BIT
818 && GET_CODE (op
) == CONST_DOUBLE
&& CONST_DOUBLE_LOW (op
) == 0)
819 || (num_insns_constant (op
, DImode
) <= 2));
825 /* Return 1 if the operand is in volatile memory. Note that during the
826 RTL generation phase, memory_operand does not return TRUE for
827 volatile memory references. So this function allows us to
828 recognize volatile references where its safe. */
831 volatile_mem_operand (op
, mode
)
833 enum machine_mode mode
;
835 if (GET_CODE (op
) != MEM
)
838 if (!MEM_VOLATILE_P (op
))
841 if (mode
!= GET_MODE (op
))
844 if (reload_completed
)
845 return memory_operand (op
, mode
);
847 if (reload_in_progress
)
848 return strict_memory_address_p (mode
, XEXP (op
, 0));
850 return memory_address_p (mode
, XEXP (op
, 0));
853 /* Return 1 if the operand is an offsettable memory operand. */
856 offsettable_mem_operand (op
, mode
)
858 enum machine_mode mode
;
860 return ((GET_CODE (op
) == MEM
)
861 && offsettable_address_p (reload_completed
|| reload_in_progress
,
862 mode
, XEXP (op
, 0)));
865 /* Return 1 if the operand is either an easy FP constant (see above) or
869 mem_or_easy_const_operand (op
, mode
)
871 enum machine_mode mode
;
873 return memory_operand (op
, mode
) || easy_fp_constant (op
, mode
);
876 /* Return 1 if the operand is either a non-special register or an item
877 that can be used as the operand of a `mode' add insn. */
880 add_operand (op
, mode
)
882 enum machine_mode mode
;
884 return (reg_or_short_operand (op
, mode
)
885 || (GET_CODE (op
) == CONST_INT
886 && CONST_OK_FOR_LETTER_P (INTVAL(op
), 'L')));
889 /* Return 1 if OP is a constant but not a valid add_operand. */
892 non_add_cint_operand (op
, mode
)
894 enum machine_mode mode ATTRIBUTE_UNUSED
;
896 return (GET_CODE (op
) == CONST_INT
897 && (unsigned HOST_WIDE_INT
) (INTVAL (op
) + 0x8000) >= 0x10000
898 && ! CONST_OK_FOR_LETTER_P (INTVAL(op
), 'L'));
901 /* Return 1 if the operand is a non-special register or a constant that
902 can be used as the operand of an OR or XOR insn on the RS/6000. */
905 logical_operand (op
, mode
)
907 enum machine_mode mode
;
909 return (gpc_reg_operand (op
, mode
)
910 || (GET_CODE (op
) == CONST_INT
911 && ((INTVAL (op
) & GET_MODE_MASK (mode
)
912 & (~ (HOST_WIDE_INT
) 0xffff)) == 0
913 || (INTVAL (op
) & GET_MODE_MASK (mode
)
914 & (~ (HOST_WIDE_INT
) 0xffff0000)) == 0)));
917 /* Return 1 if C is a constant that is not a logical operand (as
921 non_logical_cint_operand (op
, mode
)
923 enum machine_mode mode
;
925 return (GET_CODE (op
) == CONST_INT
926 && (INTVAL (op
) & GET_MODE_MASK (mode
) &
927 (~ (HOST_WIDE_INT
) 0xffff)) != 0
928 && (INTVAL (op
) & GET_MODE_MASK (mode
) &
929 (~ (HOST_WIDE_INT
) 0xffff0000)) != 0);
932 /* Return 1 if C is a constant that can be encoded in a 32-bit mask on the
933 RS/6000. It is if there are no more than two 1->0 or 0->1 transitions.
934 Reject all ones and all zeros, since these should have been optimized
935 away and confuse the making of MB and ME. */
938 mask_operand (op
, mode
)
940 enum machine_mode mode ATTRIBUTE_UNUSED
;
947 if (GET_CODE (op
) != CONST_INT
)
952 if (c
== 0 || c
== ~0)
955 last_bit_value
= c
& 1;
957 for (i
= 1; i
< 32; i
++)
958 if (((c
>>= 1) & 1) != last_bit_value
)
959 last_bit_value
^= 1, transitions
++;
961 return transitions
<= 2;
964 /* Return 1 if the operand is a constant that is a PowerPC64 mask.
965 It is if there are no more than one 1->0 or 0->1 transitions.
966 Reject all ones and all zeros, since these should have been optimized
967 away and confuse the making of MB and ME. */
970 mask64_operand (op
, mode
)
972 enum machine_mode mode
;
974 if (GET_CODE (op
) == CONST_INT
)
976 HOST_WIDE_INT c
= INTVAL (op
);
981 if (c
== 0 || c
== ~0)
984 last_bit_value
= c
& 1;
986 for (i
= 1; i
< HOST_BITS_PER_WIDE_INT
; i
++)
987 if (((c
>>= 1) & 1) != last_bit_value
)
988 last_bit_value
^= 1, transitions
++;
990 #if HOST_BITS_PER_WIDE_INT == 32
991 /* Consider CONST_INT sign-extended. */
992 transitions
+= (last_bit_value
!= 1);
995 return transitions
<= 1;
997 else if (GET_CODE (op
) == CONST_DOUBLE
998 && (mode
== VOIDmode
|| mode
== DImode
))
1000 HOST_WIDE_INT low
= CONST_DOUBLE_LOW (op
);
1001 #if HOST_BITS_PER_WIDE_INT == 32
1002 HOST_WIDE_INT high
= CONST_DOUBLE_HIGH (op
);
1006 int transitions
= 0;
1009 #if HOST_BITS_PER_WIDE_INT == 32
1014 #if HOST_BITS_PER_WIDE_INT == 32
1020 last_bit_value
= low
& 1;
1022 for (i
= 1; i
< HOST_BITS_PER_WIDE_INT
; i
++)
1023 if (((low
>>= 1) & 1) != last_bit_value
)
1024 last_bit_value
^= 1, transitions
++;
1026 #if HOST_BITS_PER_WIDE_INT == 32
1027 if ((high
& 1) != last_bit_value
)
1028 last_bit_value
^= 1, transitions
++;
1030 for (i
= 1; i
< HOST_BITS_PER_WIDE_INT
; i
++)
1031 if (((high
>>= 1) & 1) != last_bit_value
)
1032 last_bit_value
^= 1, transitions
++;
1035 return transitions
<= 1;
1041 /* Return 1 if the operand is either a non-special register or a constant
1042 that can be used as the operand of a PowerPC64 logical AND insn. */
1045 and64_operand (op
, mode
)
1047 enum machine_mode mode
;
1049 if (fixed_regs
[68]) /* CR0 not available, don't do andi./andis. */
1050 return (gpc_reg_operand (op
, mode
) || mask64_operand (op
, mode
));
1052 return (logical_operand (op
, mode
) || mask64_operand (op
, mode
));
1055 /* Return 1 if the operand is either a non-special register or a
1056 constant that can be used as the operand of an RS/6000 logical AND insn. */
1059 and_operand (op
, mode
)
1061 enum machine_mode mode
;
1063 if (fixed_regs
[68]) /* CR0 not available, don't do andi./andis. */
1064 return (gpc_reg_operand (op
, mode
) || mask_operand (op
, mode
));
1066 return (logical_operand (op
, mode
) || mask_operand (op
, mode
));
1069 /* Return 1 if the operand is a general register or memory operand. */
1072 reg_or_mem_operand (op
, mode
)
1074 register enum machine_mode mode
;
1076 return (gpc_reg_operand (op
, mode
)
1077 || memory_operand (op
, mode
)
1078 || volatile_mem_operand (op
, mode
));
1081 /* Return 1 if the operand is a general register or memory operand without
1082 pre_inc or pre_dec which produces invalid form of PowerPC lwa
1086 lwa_operand (op
, mode
)
1088 register enum machine_mode mode
;
1092 if (reload_completed
&& GET_CODE (inner
) == SUBREG
)
1093 inner
= SUBREG_REG (inner
);
1095 return gpc_reg_operand (inner
, mode
)
1096 || (memory_operand (inner
, mode
)
1097 && GET_CODE (XEXP (inner
, 0)) != PRE_INC
1098 && GET_CODE (XEXP (inner
, 0)) != PRE_DEC
);
1101 /* Return 1 if the operand, used inside a MEM, is a valid first argument
1102 to CALL. This is a SYMBOL_REF or a pseudo-register, which will be
1106 call_operand (op
, mode
)
1108 enum machine_mode mode
;
1110 if (mode
!= VOIDmode
&& GET_MODE (op
) != mode
)
1113 return (GET_CODE (op
) == SYMBOL_REF
1114 || (GET_CODE (op
) == REG
&& REGNO (op
) >= FIRST_PSEUDO_REGISTER
));
1118 /* Return 1 if the operand is a SYMBOL_REF for a function known to be in
1119 this file and the function is not weakly defined. */
1122 current_file_function_operand (op
, mode
)
1124 enum machine_mode mode ATTRIBUTE_UNUSED
;
1126 return (GET_CODE (op
) == SYMBOL_REF
1127 && (SYMBOL_REF_FLAG (op
)
1128 || (op
== XEXP (DECL_RTL (current_function_decl
), 0)
1129 && !DECL_WEAK (current_function_decl
))));
1133 /* Return 1 if this operand is a valid input for a move insn. */
1136 input_operand (op
, mode
)
1138 enum machine_mode mode
;
1140 /* Memory is always valid. */
1141 if (memory_operand (op
, mode
))
1144 /* Only a tiny bit of handling for CONSTANT_P_RTX is necessary. */
1145 if (GET_CODE (op
) == CONSTANT_P_RTX
)
1148 /* For floating-point, easy constants are valid. */
1149 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1151 && easy_fp_constant (op
, mode
))
1154 /* Allow any integer constant. */
1155 if (GET_MODE_CLASS (mode
) == MODE_INT
1156 && (GET_CODE (op
) == CONST_INT
1157 || GET_CODE (op
) == CONST_DOUBLE
))
1160 /* For floating-point or multi-word mode, the only remaining valid type
1162 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1163 || GET_MODE_SIZE (mode
) > UNITS_PER_WORD
)
1164 return register_operand (op
, mode
);
1166 /* The only cases left are integral modes one word or smaller (we
1167 do not get called for MODE_CC values). These can be in any
1169 if (register_operand (op
, mode
))
1172 /* A SYMBOL_REF referring to the TOC is valid. */
1173 if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (op
))
1176 /* Windows NT allows SYMBOL_REFs and LABEL_REFs against the TOC
1177 directly in the instruction stream */
1178 if (DEFAULT_ABI
== ABI_NT
1179 && (GET_CODE (op
) == SYMBOL_REF
|| GET_CODE (op
) == LABEL_REF
))
1182 /* V.4 allows SYMBOL_REFs and CONSTs that are in the small data region
1184 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1185 && (GET_CODE (op
) == SYMBOL_REF
|| GET_CODE (op
) == CONST
)
1186 && small_data_operand (op
, Pmode
))
1192 /* Return 1 for an operand in small memory on V.4/eabi */
1195 small_data_operand (op
, mode
)
1196 rtx op ATTRIBUTE_UNUSED
;
1197 enum machine_mode mode ATTRIBUTE_UNUSED
;
1202 if (rs6000_sdata
== SDATA_NONE
|| rs6000_sdata
== SDATA_DATA
)
1205 if (DEFAULT_ABI
!= ABI_V4
&& DEFAULT_ABI
!= ABI_SOLARIS
)
1208 if (GET_CODE (op
) == SYMBOL_REF
)
1211 else if (GET_CODE (op
) != CONST
1212 || GET_CODE (XEXP (op
, 0)) != PLUS
1213 || GET_CODE (XEXP (XEXP (op
, 0), 0)) != SYMBOL_REF
1214 || GET_CODE (XEXP (XEXP (op
, 0), 1)) != CONST_INT
)
1219 rtx sum
= XEXP (op
, 0);
1220 HOST_WIDE_INT summand
;
1222 /* We have to be careful here, because it is the referenced address
1223 that must be 32k from _SDA_BASE_, not just the symbol. */
1224 summand
= INTVAL (XEXP (sum
, 1));
1225 if (summand
< 0 || summand
> g_switch_value
)
1228 sym_ref
= XEXP (sum
, 0);
1231 if (*XSTR (sym_ref
, 0) != '@')
1242 /* Initialize a variable CUM of type CUMULATIVE_ARGS
1243 for a call to a function whose data type is FNTYPE.
1244 For a library call, FNTYPE is 0.
1246 For incoming args we set the number of arguments in the prototype large
1247 so we never return a PARALLEL. */
1250 init_cumulative_args (cum
, fntype
, libname
, incoming
)
1251 CUMULATIVE_ARGS
*cum
;
1253 rtx libname ATTRIBUTE_UNUSED
;
1256 static CUMULATIVE_ARGS zero_cumulative
;
1257 enum rs6000_abi abi
= DEFAULT_ABI
;
1259 *cum
= zero_cumulative
;
1261 cum
->fregno
= FP_ARG_MIN_REG
;
1262 cum
->prototype
= (fntype
&& TYPE_ARG_TYPES (fntype
));
1263 cum
->call_cookie
= CALL_NORMAL
;
1264 cum
->sysv_gregno
= GP_ARG_MIN_REG
;
1267 cum
->nargs_prototype
= 1000; /* don't return a PARALLEL */
1269 else if (cum
->prototype
)
1270 cum
->nargs_prototype
= (list_length (TYPE_ARG_TYPES (fntype
)) - 1
1271 + (TYPE_MODE (TREE_TYPE (fntype
)) == BLKmode
1272 || RETURN_IN_MEMORY (TREE_TYPE (fntype
))));
1275 cum
->nargs_prototype
= 0;
1277 cum
->orig_nargs
= cum
->nargs_prototype
;
1279 /* Check for DLL import functions */
1282 && lookup_attribute ("dllimport", TYPE_ATTRIBUTES (fntype
)))
1283 cum
->call_cookie
= CALL_NT_DLLIMPORT
;
1285 /* Also check for longcall's */
1286 else if (fntype
&& lookup_attribute ("longcall", TYPE_ATTRIBUTES (fntype
)))
1287 cum
->call_cookie
= CALL_LONG
;
1289 if (TARGET_DEBUG_ARG
)
1291 fprintf (stderr
, "\ninit_cumulative_args:");
1294 tree ret_type
= TREE_TYPE (fntype
);
1295 fprintf (stderr
, " ret code = %s,",
1296 tree_code_name
[ (int)TREE_CODE (ret_type
) ]);
1299 if (cum
->call_cookie
& CALL_NT_DLLIMPORT
)
1300 fprintf (stderr
, " dllimport,");
1302 if (cum
->call_cookie
& CALL_LONG
)
1303 fprintf (stderr
, " longcall,");
1305 fprintf (stderr
, " proto = %d, nargs = %d\n",
1306 cum
->prototype
, cum
->nargs_prototype
);
1310 /* If defined, a C expression which determines whether, and in which
1311 direction, to pad out an argument with extra space. The value
1312 should be of type `enum direction': either `upward' to pad above
1313 the argument, `downward' to pad below, or `none' to inhibit
1316 For the AIX ABI structs are always stored left shifted in their
1320 function_arg_padding (mode
, type
)
1321 enum machine_mode mode
;
1324 if (type
!= 0 && AGGREGATE_TYPE_P (type
))
1327 /* This is the default definition. */
1328 return (! BYTES_BIG_ENDIAN
1331 ? (type
&& TREE_CODE (TYPE_SIZE (type
)) == INTEGER_CST
1332 && int_size_in_bytes (type
) < (PARM_BOUNDARY
/ BITS_PER_UNIT
))
1333 : GET_MODE_BITSIZE (mode
) < PARM_BOUNDARY
)
1334 ? (int)downward
: (int)upward
));
1337 /* If defined, a C expression that gives the alignment boundary, in bits,
1338 of an argument with the specified mode and type. If it is not defined,
1339 PARM_BOUNDARY is used for all arguments.
1341 Windows NT wants anything >= 8 bytes to be double word aligned.
1343 V.4 wants long longs to be double word aligned. */
1346 function_arg_boundary (mode
, type
)
1347 enum machine_mode mode
;
1350 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1351 && (mode
== DImode
|| mode
== DFmode
))
1354 if (DEFAULT_ABI
!= ABI_NT
|| TARGET_64BIT
)
1355 return PARM_BOUNDARY
;
1357 if (mode
!= BLKmode
)
1358 return (GET_MODE_SIZE (mode
)) >= 8 ? 64 : 32;
1360 return (int_size_in_bytes (type
) >= 8) ? 64 : 32;
1363 /* Update the data in CUM to advance over an argument
1364 of mode MODE and data type TYPE.
1365 (TYPE is null for libcalls where that information may not be available.) */
1368 function_arg_advance (cum
, mode
, type
, named
)
1369 CUMULATIVE_ARGS
*cum
;
1370 enum machine_mode mode
;
1374 cum
->nargs_prototype
--;
1376 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1378 if (TARGET_HARD_FLOAT
1379 && (mode
== SFmode
|| mode
== DFmode
))
1381 if (cum
->fregno
<= FP_ARG_V4_MAX_REG
)
1386 cum
->words
+= cum
->words
& 1;
1387 cum
->words
+= RS6000_ARG_SIZE (mode
, type
, 1);
1393 int gregno
= cum
->sysv_gregno
;
1395 /* Aggregates and IEEE quad get passed by reference. */
1396 if ((type
&& AGGREGATE_TYPE_P (type
))
1400 n_words
= RS6000_ARG_SIZE (mode
, type
, 1);
1402 /* Long long is put in odd registers. */
1403 if (n_words
== 2 && (gregno
& 1) == 0)
1406 /* Long long is not split between registers and stack. */
1407 if (gregno
+ n_words
- 1 > GP_ARG_MAX_REG
)
1409 /* Long long is aligned on the stack. */
1411 cum
->words
+= cum
->words
& 1;
1412 cum
->words
+= n_words
;
1415 /* Note: continuing to accumulate gregno past when we've started
1416 spilling to the stack indicates the fact that we've started
1417 spilling to the stack to expand_builtin_saveregs. */
1418 cum
->sysv_gregno
= gregno
+ n_words
;
1421 if (TARGET_DEBUG_ARG
)
1423 fprintf (stderr
, "function_adv: words = %2d, fregno = %2d, ",
1424 cum
->words
, cum
->fregno
);
1425 fprintf (stderr
, "gregno = %2d, nargs = %4d, proto = %d, ",
1426 cum
->sysv_gregno
, cum
->nargs_prototype
, cum
->prototype
);
1427 fprintf (stderr
, "mode = %4s, named = %d\n",
1428 GET_MODE_NAME (mode
), named
);
1433 int align
= (TARGET_32BIT
&& (cum
->words
& 1) != 0
1434 && function_arg_boundary (mode
, type
) == 64) ? 1 : 0;
1435 cum
->words
+= align
;
1439 cum
->words
+= RS6000_ARG_SIZE (mode
, type
, named
);
1440 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
&& TARGET_HARD_FLOAT
)
1444 if (TARGET_DEBUG_ARG
)
1446 fprintf (stderr
, "function_adv: words = %2d, fregno = %2d, ",
1447 cum
->words
, cum
->fregno
);
1448 fprintf (stderr
, "nargs = %4d, proto = %d, mode = %4s, ",
1449 cum
->nargs_prototype
, cum
->prototype
, GET_MODE_NAME (mode
));
1450 fprintf (stderr
, "named = %d, align = %d\n", named
, align
);
1455 /* Determine where to put an argument to a function.
1456 Value is zero to push the argument on the stack,
1457 or a hard register in which to store the argument.
1459 MODE is the argument's machine mode.
1460 TYPE is the data type of the argument (as a tree).
1461 This is null for libcalls where that information may
1463 CUM is a variable of type CUMULATIVE_ARGS which gives info about
1464 the preceding args and about the function being called.
1465 NAMED is nonzero if this argument is a named parameter
1466 (otherwise it is an extra parameter matching an ellipsis).
1468 On RS/6000 the first eight words of non-FP are normally in registers
1469 and the rest are pushed. Under AIX, the first 13 FP args are in registers.
1470 Under V.4, the first 8 FP args are in registers.
1472 If this is floating-point and no prototype is specified, we use
1473 both an FP and integer register (or possibly FP reg and stack). Library
1474 functions (when TYPE is zero) always have the proper types for args,
1475 so we can pass the FP value just in one register. emit_library_function
1476 doesn't support PARALLEL anyway. */
1479 function_arg (cum
, mode
, type
, named
)
1480 CUMULATIVE_ARGS
*cum
;
1481 enum machine_mode mode
;
1485 enum rs6000_abi abi
= DEFAULT_ABI
;
1487 /* Return a marker to indicate whether CR1 needs to set or clear the bit
1488 that V.4 uses to say fp args were passed in registers. Assume that we
1489 don't need the marker for software floating point, or compiler generated
1491 if (mode
== VOIDmode
)
1493 if ((abi
== ABI_V4
|| abi
== ABI_SOLARIS
)
1494 && TARGET_HARD_FLOAT
1495 && cum
->nargs_prototype
< 0
1496 && type
&& (cum
->prototype
|| TARGET_NO_PROTOTYPE
))
1498 return GEN_INT (cum
->call_cookie
1499 | ((cum
->fregno
== FP_ARG_MIN_REG
)
1500 ? CALL_V4_SET_FP_ARGS
1501 : CALL_V4_CLEAR_FP_ARGS
));
1504 return GEN_INT (cum
->call_cookie
);
1507 if (abi
== ABI_V4
|| abi
== ABI_SOLARIS
)
1509 if (TARGET_HARD_FLOAT
1510 && (mode
== SFmode
|| mode
== DFmode
))
1512 if (cum
->fregno
<= FP_ARG_V4_MAX_REG
)
1513 return gen_rtx_REG (mode
, cum
->fregno
);
1520 int gregno
= cum
->sysv_gregno
;
1522 /* Aggregates and IEEE quad get passed by reference. */
1523 if ((type
&& AGGREGATE_TYPE_P (type
))
1527 n_words
= RS6000_ARG_SIZE (mode
, type
, 1);
1529 /* Long long is put in odd registers. */
1530 if (n_words
== 2 && (gregno
& 1) == 0)
1533 /* Long long is not split between registers and stack. */
1534 if (gregno
+ n_words
- 1 <= GP_ARG_MAX_REG
)
1535 return gen_rtx_REG (mode
, gregno
);
1542 int align
= (TARGET_32BIT
&& (cum
->words
& 1) != 0
1543 && function_arg_boundary (mode
, type
) == 64) ? 1 : 0;
1544 int align_words
= cum
->words
+ align
;
1549 if (type
&& TREE_CODE (TYPE_SIZE (type
)) != INTEGER_CST
)
1552 if (USE_FP_FOR_ARG_P (*cum
, mode
, type
))
1555 || ((cum
->nargs_prototype
> 0)
1556 /* IBM AIX extended its linkage convention definition always
1557 to require FP args after register save area hole on the
1559 && (DEFAULT_ABI
!= ABI_AIX
1561 || (align_words
< GP_ARG_NUM_REG
))))
1562 return gen_rtx_REG (mode
, cum
->fregno
);
1564 return gen_rtx_PARALLEL (mode
,
1566 gen_rtx_EXPR_LIST (VOIDmode
,
1567 ((align_words
>= GP_ARG_NUM_REG
)
1570 + RS6000_ARG_SIZE (mode
, type
, named
)
1572 /* If this is partially on the stack, then
1573 we only include the portion actually
1574 in registers here. */
1575 ? gen_rtx_REG (SImode
,
1576 GP_ARG_MIN_REG
+ align_words
)
1577 : gen_rtx_REG (mode
,
1578 GP_ARG_MIN_REG
+ align_words
))),
1580 gen_rtx_EXPR_LIST (VOIDmode
,
1581 gen_rtx_REG (mode
, cum
->fregno
),
1584 else if (align_words
< GP_ARG_NUM_REG
)
1585 return gen_rtx_REG (mode
, GP_ARG_MIN_REG
+ align_words
);
1591 /* For an arg passed partly in registers and partly in memory,
1592 this is the number of registers used.
1593 For args passed entirely in registers or entirely in memory, zero. */
1596 function_arg_partial_nregs (cum
, mode
, type
, named
)
1597 CUMULATIVE_ARGS
*cum
;
1598 enum machine_mode mode
;
1605 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1608 if (USE_FP_FOR_ARG_P (*cum
, mode
, type
))
1610 if (cum
->nargs_prototype
>= 0)
1614 if (cum
->words
< GP_ARG_NUM_REG
1615 && GP_ARG_NUM_REG
< (cum
->words
+ RS6000_ARG_SIZE (mode
, type
, named
)))
1617 int ret
= GP_ARG_NUM_REG
- cum
->words
;
1618 if (ret
&& TARGET_DEBUG_ARG
)
1619 fprintf (stderr
, "function_arg_partial_nregs: %d\n", ret
);
1627 /* A C expression that indicates when an argument must be passed by
1628 reference. If nonzero for an argument, a copy of that argument is
1629 made in memory and a pointer to the argument is passed instead of
1630 the argument itself. The pointer is passed in whatever way is
1631 appropriate for passing a pointer to that type.
1633 Under V.4, structures and unions are passed by reference. */
1636 function_arg_pass_by_reference (cum
, mode
, type
, named
)
1637 CUMULATIVE_ARGS
*cum ATTRIBUTE_UNUSED
;
1638 enum machine_mode mode ATTRIBUTE_UNUSED
;
1640 int named ATTRIBUTE_UNUSED
;
1642 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1643 && ((type
&& AGGREGATE_TYPE_P (type
))
1646 if (TARGET_DEBUG_ARG
)
1647 fprintf (stderr
, "function_arg_pass_by_reference: aggregate\n");
1656 /* Perform any needed actions needed for a function that is receiving a
1657 variable number of arguments.
1661 MODE and TYPE are the mode and type of the current parameter.
1663 PRETEND_SIZE is a variable that should be set to the amount of stack
1664 that must be pushed by the prolog to pretend that our caller pushed
1667 Normally, this macro will push all remaining incoming registers on the
1668 stack and set PRETEND_SIZE to the length of the registers pushed. */
1671 setup_incoming_varargs (cum
, mode
, type
, pretend_size
, no_rtl
)
1672 CUMULATIVE_ARGS
*cum
;
1673 enum machine_mode mode
;
1679 CUMULATIVE_ARGS next_cum
;
1680 int reg_size
= TARGET_32BIT
? 4 : 8;
1682 int first_reg_offset
, set
;
1684 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1689 fntype
= TREE_TYPE (current_function_decl
);
1690 stdarg_p
= (TYPE_ARG_TYPES (fntype
) != 0
1691 && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (fntype
)))
1692 != void_type_node
));
1694 /* For varargs, we do not want to skip the dummy va_dcl argument.
1695 For stdargs, we do want to skip the last named argument. */
1698 function_arg_advance (&next_cum
, mode
, type
, 1);
1700 /* Indicate to allocate space on the stack for varargs save area. */
1701 /* ??? Does this really have to be located at a magic spot on the
1702 stack, or can we allocate this with assign_stack_local instead. */
1703 rs6000_sysv_varargs_p
= 1;
1705 save_area
= plus_constant (virtual_stack_vars_rtx
,
1706 - RS6000_VARARGS_SIZE
);
1708 first_reg_offset
= next_cum
.sysv_gregno
- GP_ARG_MIN_REG
;
1712 save_area
= virtual_incoming_args_rtx
;
1713 rs6000_sysv_varargs_p
= 0;
1715 first_reg_offset
= cum
->words
;
1716 if (MUST_PASS_IN_STACK (mode
, type
))
1717 first_reg_offset
+= RS6000_ARG_SIZE (TYPE_MODE (type
), type
, 1);
1720 set
= get_varargs_alias_set ();
1721 if (!no_rtl
&& first_reg_offset
< GP_ARG_NUM_REG
)
1723 mem
= gen_rtx_MEM (BLKmode
,
1724 plus_constant (save_area
,
1725 first_reg_offset
* reg_size
)),
1726 MEM_ALIAS_SET (mem
) = set
;
1729 (GP_ARG_MIN_REG
+ first_reg_offset
, mem
,
1730 GP_ARG_NUM_REG
- first_reg_offset
,
1731 (GP_ARG_NUM_REG
- first_reg_offset
) * UNITS_PER_WORD
);
1733 /* ??? Does ABI_V4 need this at all? */
1734 *pretend_size
= (GP_ARG_NUM_REG
- first_reg_offset
) * UNITS_PER_WORD
;
1737 /* Save FP registers if needed. */
1738 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1739 && TARGET_HARD_FLOAT
&& !no_rtl
1740 && next_cum
.fregno
<= FP_ARG_V4_MAX_REG
)
1742 int fregno
= next_cum
.fregno
;
1743 rtx cr1
= gen_rtx_REG (CCmode
, 69);
1744 rtx lab
= gen_label_rtx ();
1745 int off
= (GP_ARG_NUM_REG
* reg_size
) + ((fregno
- FP_ARG_MIN_REG
) * 8);
1747 emit_jump_insn (gen_rtx_SET (VOIDmode
,
1749 gen_rtx_IF_THEN_ELSE (VOIDmode
,
1750 gen_rtx_NE (VOIDmode
, cr1
,
1752 gen_rtx_LABEL_REF (VOIDmode
, lab
),
1755 while (fregno
<= FP_ARG_V4_MAX_REG
)
1757 mem
= gen_rtx_MEM (DFmode
, plus_constant (save_area
, off
));
1758 MEM_ALIAS_SET (mem
) = set
;
1759 emit_move_insn (mem
, gen_rtx_REG (DFmode
, fregno
));
1768 /* Create the va_list data type. */
1771 rs6000_build_va_list ()
1773 tree f_gpr
, f_fpr
, f_ovf
, f_sav
, record
;
1774 tree uchar_type_node
;
1776 /* Only SVR4 needs something special. */
1777 if (DEFAULT_ABI
!= ABI_V4
&& DEFAULT_ABI
!= ABI_SOLARIS
)
1778 return ptr_type_node
;
1780 record
= make_node (RECORD_TYPE
);
1781 uchar_type_node
= make_unsigned_type (CHAR_TYPE_SIZE
);
1783 f_gpr
= build_decl (FIELD_DECL
, get_identifier ("gpr"), uchar_type_node
);
1784 f_fpr
= build_decl (FIELD_DECL
, get_identifier ("fpr"), uchar_type_node
);
1785 f_ovf
= build_decl (FIELD_DECL
, get_identifier ("overflow_arg_area"),
1787 f_sav
= build_decl (FIELD_DECL
, get_identifier ("reg_save_area"),
1790 DECL_FIELD_CONTEXT (f_gpr
) = record
;
1791 DECL_FIELD_CONTEXT (f_fpr
) = record
;
1792 DECL_FIELD_CONTEXT (f_ovf
) = record
;
1793 DECL_FIELD_CONTEXT (f_sav
) = record
;
1795 TYPE_FIELDS (record
) = f_gpr
;
1796 TREE_CHAIN (f_gpr
) = f_fpr
;
1797 TREE_CHAIN (f_fpr
) = f_ovf
;
1798 TREE_CHAIN (f_ovf
) = f_sav
;
1800 layout_type (record
);
1802 /* The correct type is an array type of one element. */
1803 return build_array_type (record
, build_index_type (size_zero_node
));
1806 /* Implement va_start. */
1809 rs6000_va_start (stdarg_p
, valist
, nextarg
)
1814 HOST_WIDE_INT words
, n_gpr
, n_fpr
;
1815 tree f_gpr
, f_fpr
, f_ovf
, f_sav
;
1816 tree gpr
, fpr
, ovf
, sav
, t
;
1818 /* Only SVR4 needs something special. */
1819 if (DEFAULT_ABI
!= ABI_V4
&& DEFAULT_ABI
!= ABI_SOLARIS
)
1821 std_expand_builtin_va_start (stdarg_p
, valist
, nextarg
);
1825 f_gpr
= TYPE_FIELDS (va_list_type_node
);
1826 f_fpr
= TREE_CHAIN (f_gpr
);
1827 f_ovf
= TREE_CHAIN (f_fpr
);
1828 f_sav
= TREE_CHAIN (f_ovf
);
1830 gpr
= build (COMPONENT_REF
, TREE_TYPE (f_gpr
), valist
, f_gpr
);
1831 fpr
= build (COMPONENT_REF
, TREE_TYPE (f_fpr
), valist
, f_fpr
);
1832 ovf
= build (COMPONENT_REF
, TREE_TYPE (f_ovf
), valist
, f_ovf
);
1833 sav
= build (COMPONENT_REF
, TREE_TYPE (f_sav
), valist
, f_sav
);
1835 /* Count number of gp and fp argument registers used. */
1836 words
= current_function_args_info
.words
;
1837 n_gpr
= current_function_args_info
.sysv_gregno
- GP_ARG_MIN_REG
;
1838 n_fpr
= current_function_args_info
.fregno
- FP_ARG_MIN_REG
;
1840 if (TARGET_DEBUG_ARG
)
1841 fprintf (stderr
, "va_start: words = %d, n_gpr = %d, n_fpr = %d\n",
1842 words
, n_gpr
, n_fpr
);
1844 t
= build (MODIFY_EXPR
, TREE_TYPE (gpr
), gpr
, build_int_2 (n_gpr
, 0));
1845 TREE_SIDE_EFFECTS (t
) = 1;
1846 expand_expr (t
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
1848 t
= build (MODIFY_EXPR
, TREE_TYPE (fpr
), fpr
, build_int_2 (n_fpr
, 0));
1849 TREE_SIDE_EFFECTS (t
) = 1;
1850 expand_expr (t
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
1852 /* Find the overflow area. */
1853 t
= make_tree (TREE_TYPE (ovf
), virtual_incoming_args_rtx
);
1855 t
= build (PLUS_EXPR
, TREE_TYPE (ovf
), t
,
1856 build_int_2 (words
* UNITS_PER_WORD
, 0));
1857 t
= build (MODIFY_EXPR
, TREE_TYPE (ovf
), ovf
, t
);
1858 TREE_SIDE_EFFECTS (t
) = 1;
1859 expand_expr (t
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
1861 /* Find the register save area. */
1862 t
= make_tree (TREE_TYPE (sav
), virtual_stack_vars_rtx
);
1863 t
= build (PLUS_EXPR
, TREE_TYPE (sav
), t
,
1864 build_int_2 (-RS6000_VARARGS_SIZE
, -1));
1865 t
= build (MODIFY_EXPR
, TREE_TYPE (sav
), sav
, t
);
1866 TREE_SIDE_EFFECTS (t
) = 1;
1867 expand_expr (t
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
1870 /* Implement va_arg. */
1873 rs6000_va_arg (valist
, type
)
1876 tree f_gpr
, f_fpr
, f_ovf
, f_sav
;
1877 tree gpr
, fpr
, ovf
, sav
, reg
, t
, u
;
1878 int indirect_p
, size
, rsize
, n_reg
, sav_ofs
, sav_scale
;
1879 rtx lab_false
, lab_over
, addr_rtx
, r
;
1881 /* Only SVR4 needs something special. */
1882 if (DEFAULT_ABI
!= ABI_V4
&& DEFAULT_ABI
!= ABI_SOLARIS
)
1883 return std_expand_builtin_va_arg (valist
, type
);
1885 f_gpr
= TYPE_FIELDS (va_list_type_node
);
1886 f_fpr
= TREE_CHAIN (f_gpr
);
1887 f_ovf
= TREE_CHAIN (f_fpr
);
1888 f_sav
= TREE_CHAIN (f_ovf
);
1890 gpr
= build (COMPONENT_REF
, TREE_TYPE (f_gpr
), valist
, f_gpr
);
1891 fpr
= build (COMPONENT_REF
, TREE_TYPE (f_fpr
), valist
, f_fpr
);
1892 ovf
= build (COMPONENT_REF
, TREE_TYPE (f_ovf
), valist
, f_ovf
);
1893 sav
= build (COMPONENT_REF
, TREE_TYPE (f_sav
), valist
, f_sav
);
1895 size
= int_size_in_bytes (type
);
1896 rsize
= (size
+ UNITS_PER_WORD
- 1) / UNITS_PER_WORD
;
1898 if (AGGREGATE_TYPE_P (type
) || TYPE_MODE (type
) == TFmode
)
1900 /* Aggregates and long doubles are passed by reference. */
1906 size
= rsize
= UNITS_PER_WORD
;
1908 else if (FLOAT_TYPE_P (type
) && ! TARGET_SOFT_FLOAT
)
1910 /* FP args go in FP registers, if present. */
1919 /* Otherwise into GP registers. */
1928 * Pull the value out of the saved registers ...
1931 lab_false
= gen_label_rtx ();
1932 lab_over
= gen_label_rtx ();
1933 addr_rtx
= gen_reg_rtx (Pmode
);
1935 emit_cmp_and_jump_insns (expand_expr (reg
, NULL_RTX
, QImode
, EXPAND_NORMAL
),
1936 GEN_INT (8 - n_reg
+ 1),
1937 GE
, const1_rtx
, QImode
, 1, 1, lab_false
);
1939 /* Long long is aligned in the registers. */
1942 u
= build (BIT_AND_EXPR
, TREE_TYPE (reg
), reg
,
1943 build_int_2 (n_reg
- 1, 0));
1944 u
= build (PLUS_EXPR
, TREE_TYPE (reg
), reg
, u
);
1945 u
= build (MODIFY_EXPR
, TREE_TYPE (reg
), reg
, u
);
1946 TREE_SIDE_EFFECTS (u
) = 1;
1947 expand_expr (u
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
1951 t
= build (PLUS_EXPR
, ptr_type_node
, sav
, build_int_2 (sav_ofs
, 0));
1955 u
= build (POSTINCREMENT_EXPR
, TREE_TYPE (reg
), reg
, build_int_2 (n_reg
, 0));
1956 TREE_SIDE_EFFECTS (u
) = 1;
1958 u
= build1 (CONVERT_EXPR
, integer_type_node
, u
);
1959 TREE_SIDE_EFFECTS (u
) = 1;
1961 u
= build (MULT_EXPR
, integer_type_node
, u
, build_int_2 (sav_scale
, 0));
1962 TREE_SIDE_EFFECTS (u
) = 1;
1964 t
= build (PLUS_EXPR
, ptr_type_node
, t
, u
);
1965 TREE_SIDE_EFFECTS (t
) = 1;
1967 r
= expand_expr (t
, addr_rtx
, Pmode
, EXPAND_NORMAL
);
1969 emit_move_insn (addr_rtx
, r
);
1971 emit_jump_insn (gen_jump (lab_over
));
1973 emit_label (lab_false
);
1976 * ... otherwise out of the overflow area.
1979 /* Make sure we don't find reg 7 for the next int arg. */
1982 t
= build (MODIFY_EXPR
, TREE_TYPE (reg
), reg
, build_int_2 (8, 0));
1983 TREE_SIDE_EFFECTS (t
) = 1;
1984 expand_expr (t
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
1987 /* Care for on-stack alignment if needed. */
1992 t
= build (PLUS_EXPR
, TREE_TYPE (ovf
), ovf
, build_int_2 (7, 0));
1993 t
= build (BIT_AND_EXPR
, TREE_TYPE (t
), t
, build_int_2 (-8, -1));
1997 r
= expand_expr (t
, addr_rtx
, Pmode
, EXPAND_NORMAL
);
1999 emit_move_insn (addr_rtx
, r
);
2001 t
= build (PLUS_EXPR
, TREE_TYPE (t
), t
, build_int_2 (size
, 0));
2002 t
= build (MODIFY_EXPR
, TREE_TYPE (ovf
), ovf
, t
);
2003 TREE_SIDE_EFFECTS (t
) = 1;
2004 expand_expr (t
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
2006 emit_label (lab_over
);
2010 r
= gen_rtx_MEM (Pmode
, addr_rtx
);
2011 MEM_ALIAS_SET (r
) = get_varargs_alias_set ();
2012 emit_move_insn (addr_rtx
, r
);
2018 /* Generate a memory reference for expand_block_move, copying volatile,
2019 and other bits from an original memory reference. */
2022 expand_block_move_mem (mode
, addr
, orig_mem
)
2023 enum machine_mode mode
;
2027 rtx mem
= gen_rtx_MEM (mode
, addr
);
2029 RTX_UNCHANGING_P (mem
) = RTX_UNCHANGING_P (orig_mem
);
2030 MEM_COPY_ATTRIBUTES (mem
, orig_mem
);
2031 #ifdef MEM_UNALIGNED_P
2032 MEM_UNALIGNED_P (mem
) = MEM_UNALIGNED_P (orig_mem
);
2037 /* Expand a block move operation, and return 1 if successful. Return 0
2038 if we should let the compiler generate normal code.
2040 operands[0] is the destination
2041 operands[1] is the source
2042 operands[2] is the length
2043 operands[3] is the alignment */
2045 #define MAX_MOVE_REG 4
2048 expand_block_move (operands
)
2051 rtx orig_dest
= operands
[0];
2052 rtx orig_src
= operands
[1];
2053 rtx bytes_rtx
= operands
[2];
2054 rtx align_rtx
= operands
[3];
2055 int constp
= (GET_CODE (bytes_rtx
) == CONST_INT
);
2056 int align
= XINT (align_rtx
, 0);
2066 rtx stores
[MAX_MOVE_REG
];
2069 /* If this is not a fixed size move, just call memcpy */
2073 /* Anything to move? */
2074 bytes
= INTVAL (bytes_rtx
);
2078 /* Don't support real large moves. If string instructions are not used,
2079 then don't generate more than 8 loads. */
2085 else if (!STRICT_ALIGNMENT
)
2090 else if (bytes
> 8*align
)
2093 /* Move the address into scratch registers. */
2094 dest_reg
= copy_addr_to_reg (XEXP (orig_dest
, 0));
2095 src_reg
= copy_addr_to_reg (XEXP (orig_src
, 0));
2097 if (TARGET_STRING
) /* string instructions are available */
2099 for ( ; bytes
> 0; bytes
-= move_bytes
)
2101 if (bytes
> 24 /* move up to 32 bytes at a time */
2111 move_bytes
= (bytes
> 32) ? 32 : bytes
;
2112 emit_insn (gen_movstrsi_8reg (expand_block_move_mem (BLKmode
, dest_reg
, orig_dest
),
2113 expand_block_move_mem (BLKmode
, src_reg
, orig_src
),
2114 GEN_INT ((move_bytes
== 32) ? 0 : move_bytes
),
2117 else if (bytes
> 16 /* move up to 24 bytes at a time */
2125 move_bytes
= (bytes
> 24) ? 24 : bytes
;
2126 emit_insn (gen_movstrsi_6reg (expand_block_move_mem (BLKmode
, dest_reg
, orig_dest
),
2127 expand_block_move_mem (BLKmode
, src_reg
, orig_src
),
2128 GEN_INT (move_bytes
),
2131 else if (bytes
> 8 /* move up to 16 bytes at a time */
2137 move_bytes
= (bytes
> 16) ? 16 : bytes
;
2138 emit_insn (gen_movstrsi_4reg (expand_block_move_mem (BLKmode
, dest_reg
, orig_dest
),
2139 expand_block_move_mem (BLKmode
, src_reg
, orig_src
),
2140 GEN_INT (move_bytes
),
2143 else if (bytes
> 4 && !TARGET_64BIT
)
2144 { /* move up to 8 bytes at a time */
2145 move_bytes
= (bytes
> 8) ? 8 : bytes
;
2146 emit_insn (gen_movstrsi_2reg (expand_block_move_mem (BLKmode
, dest_reg
, orig_dest
),
2147 expand_block_move_mem (BLKmode
, src_reg
, orig_src
),
2148 GEN_INT (move_bytes
),
2151 else if (bytes
>= 4 && (align
>= 4 || !STRICT_ALIGNMENT
))
2152 { /* move 4 bytes */
2154 tmp_reg
= gen_reg_rtx (SImode
);
2155 emit_move_insn (tmp_reg
, expand_block_move_mem (SImode
, src_reg
, orig_src
));
2156 emit_move_insn (expand_block_move_mem (SImode
, dest_reg
, orig_dest
), tmp_reg
);
2158 else if (bytes
== 2 && (align
>= 2 || !STRICT_ALIGNMENT
))
2159 { /* move 2 bytes */
2161 tmp_reg
= gen_reg_rtx (HImode
);
2162 emit_move_insn (tmp_reg
, expand_block_move_mem (HImode
, src_reg
, orig_src
));
2163 emit_move_insn (expand_block_move_mem (HImode
, dest_reg
, orig_dest
), tmp_reg
);
2165 else if (bytes
== 1) /* move 1 byte */
2168 tmp_reg
= gen_reg_rtx (QImode
);
2169 emit_move_insn (tmp_reg
, expand_block_move_mem (QImode
, src_reg
, orig_src
));
2170 emit_move_insn (expand_block_move_mem (QImode
, dest_reg
, orig_dest
), tmp_reg
);
2173 { /* move up to 4 bytes at a time */
2174 move_bytes
= (bytes
> 4) ? 4 : bytes
;
2175 emit_insn (gen_movstrsi_1reg (expand_block_move_mem (BLKmode
, dest_reg
, orig_dest
),
2176 expand_block_move_mem (BLKmode
, src_reg
, orig_src
),
2177 GEN_INT (move_bytes
),
2181 if (bytes
> move_bytes
)
2183 emit_insn (gen_addsi3 (src_reg
, src_reg
, GEN_INT (move_bytes
)));
2184 emit_insn (gen_addsi3 (dest_reg
, dest_reg
, GEN_INT (move_bytes
)));
2189 else /* string instructions not available */
2191 num_reg
= offset
= 0;
2192 for ( ; bytes
> 0; (bytes
-= move_bytes
), (offset
+= move_bytes
))
2194 /* Calculate the correct offset for src/dest */
2198 dest_addr
= dest_reg
;
2202 src_addr
= plus_constant (src_reg
, offset
);
2203 dest_addr
= plus_constant (dest_reg
, offset
);
2206 /* Generate the appropriate load and store, saving the stores for later */
2207 if (bytes
>= 8 && TARGET_64BIT
&& (align
>= 8 || !STRICT_ALIGNMENT
))
2210 tmp_reg
= gen_reg_rtx (DImode
);
2211 emit_insn (gen_movdi (tmp_reg
, expand_block_move_mem (DImode
, src_addr
, orig_src
)));
2212 stores
[ num_reg
++ ] = gen_movdi (expand_block_move_mem (DImode
, dest_addr
, orig_dest
), tmp_reg
);
2214 else if (bytes
>= 4 && (align
>= 4 || !STRICT_ALIGNMENT
))
2217 tmp_reg
= gen_reg_rtx (SImode
);
2218 emit_insn (gen_movsi (tmp_reg
, expand_block_move_mem (SImode
, src_addr
, orig_src
)));
2219 stores
[ num_reg
++ ] = gen_movsi (expand_block_move_mem (SImode
, dest_addr
, orig_dest
), tmp_reg
);
2221 else if (bytes
>= 2 && (align
>= 2 || !STRICT_ALIGNMENT
))
2224 tmp_reg
= gen_reg_rtx (HImode
);
2225 emit_insn (gen_movsi (tmp_reg
, expand_block_move_mem (HImode
, src_addr
, orig_src
)));
2226 stores
[ num_reg
++ ] = gen_movhi (expand_block_move_mem (HImode
, dest_addr
, orig_dest
), tmp_reg
);
2231 tmp_reg
= gen_reg_rtx (QImode
);
2232 emit_insn (gen_movsi (tmp_reg
, expand_block_move_mem (QImode
, src_addr
, orig_src
)));
2233 stores
[ num_reg
++ ] = gen_movqi (expand_block_move_mem (QImode
, dest_addr
, orig_dest
), tmp_reg
);
2236 if (num_reg
>= MAX_MOVE_REG
)
2238 for (i
= 0; i
< num_reg
; i
++)
2239 emit_insn (stores
[i
]);
2244 for (i
= 0; i
< num_reg
; i
++)
2245 emit_insn (stores
[i
]);
2252 /* Return 1 if OP is a load multiple operation. It is known to be a
2253 PARALLEL and the first section will be tested. */
2256 load_multiple_operation (op
, mode
)
2258 enum machine_mode mode ATTRIBUTE_UNUSED
;
2260 int count
= XVECLEN (op
, 0);
2265 /* Perform a quick check so we don't blow up below. */
2267 || GET_CODE (XVECEXP (op
, 0, 0)) != SET
2268 || GET_CODE (SET_DEST (XVECEXP (op
, 0, 0))) != REG
2269 || GET_CODE (SET_SRC (XVECEXP (op
, 0, 0))) != MEM
)
2272 dest_regno
= REGNO (SET_DEST (XVECEXP (op
, 0, 0)));
2273 src_addr
= XEXP (SET_SRC (XVECEXP (op
, 0, 0)), 0);
2275 for (i
= 1; i
< count
; i
++)
2277 rtx elt
= XVECEXP (op
, 0, i
);
2279 if (GET_CODE (elt
) != SET
2280 || GET_CODE (SET_DEST (elt
)) != REG
2281 || GET_MODE (SET_DEST (elt
)) != SImode
2282 || REGNO (SET_DEST (elt
)) != dest_regno
+ i
2283 || GET_CODE (SET_SRC (elt
)) != MEM
2284 || GET_MODE (SET_SRC (elt
)) != SImode
2285 || GET_CODE (XEXP (SET_SRC (elt
), 0)) != PLUS
2286 || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt
), 0), 0), src_addr
)
2287 || GET_CODE (XEXP (XEXP (SET_SRC (elt
), 0), 1)) != CONST_INT
2288 || INTVAL (XEXP (XEXP (SET_SRC (elt
), 0), 1)) != i
* 4)
2295 /* Similar, but tests for store multiple. Here, the second vector element
2296 is a CLOBBER. It will be tested later. */
2299 store_multiple_operation (op
, mode
)
2301 enum machine_mode mode ATTRIBUTE_UNUSED
;
2303 int count
= XVECLEN (op
, 0) - 1;
2308 /* Perform a quick check so we don't blow up below. */
2310 || GET_CODE (XVECEXP (op
, 0, 0)) != SET
2311 || GET_CODE (SET_DEST (XVECEXP (op
, 0, 0))) != MEM
2312 || GET_CODE (SET_SRC (XVECEXP (op
, 0, 0))) != REG
)
2315 src_regno
= REGNO (SET_SRC (XVECEXP (op
, 0, 0)));
2316 dest_addr
= XEXP (SET_DEST (XVECEXP (op
, 0, 0)), 0);
2318 for (i
= 1; i
< count
; i
++)
2320 rtx elt
= XVECEXP (op
, 0, i
+ 1);
2322 if (GET_CODE (elt
) != SET
2323 || GET_CODE (SET_SRC (elt
)) != REG
2324 || GET_MODE (SET_SRC (elt
)) != SImode
2325 || REGNO (SET_SRC (elt
)) != src_regno
+ i
2326 || GET_CODE (SET_DEST (elt
)) != MEM
2327 || GET_MODE (SET_DEST (elt
)) != SImode
2328 || GET_CODE (XEXP (SET_DEST (elt
), 0)) != PLUS
2329 || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt
), 0), 0), dest_addr
)
2330 || GET_CODE (XEXP (XEXP (SET_DEST (elt
), 0), 1)) != CONST_INT
2331 || INTVAL (XEXP (XEXP (SET_DEST (elt
), 0), 1)) != i
* 4)
2338 /* Return 1 if OP is a comparison operation that is valid for a branch insn.
2339 We only check the opcode against the mode of the CC value here. */
2342 branch_comparison_operator (op
, mode
)
2344 enum machine_mode mode ATTRIBUTE_UNUSED
;
2346 enum rtx_code code
= GET_CODE (op
);
2347 enum machine_mode cc_mode
;
2349 if (GET_RTX_CLASS (code
) != '<')
2352 cc_mode
= GET_MODE (XEXP (op
, 0));
2353 if (GET_MODE_CLASS (cc_mode
) != MODE_CC
)
2356 if ((code
== GT
|| code
== LT
|| code
== GE
|| code
== LE
)
2357 && cc_mode
== CCUNSmode
)
2360 if ((code
== GTU
|| code
== LTU
|| code
== GEU
|| code
== LEU
)
2361 && (cc_mode
!= CCUNSmode
))
2367 /* Return 1 if OP is a comparison operation that is valid for an scc insn.
2368 We check the opcode against the mode of the CC value and disallow EQ or
2369 NE comparisons for integers. */
2372 scc_comparison_operator (op
, mode
)
2374 enum machine_mode mode
;
2376 enum rtx_code code
= GET_CODE (op
);
2377 enum machine_mode cc_mode
;
2379 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
2382 if (GET_RTX_CLASS (code
) != '<')
2385 cc_mode
= GET_MODE (XEXP (op
, 0));
2386 if (GET_MODE_CLASS (cc_mode
) != MODE_CC
)
2389 if (code
== NE
&& cc_mode
!= CCFPmode
)
2392 if ((code
== GT
|| code
== LT
|| code
== GE
|| code
== LE
)
2393 && cc_mode
== CCUNSmode
)
2396 if ((code
== GTU
|| code
== LTU
|| code
== GEU
|| code
== LEU
)
2397 && (cc_mode
!= CCUNSmode
))
2400 if (cc_mode
== CCEQmode
&& code
!= EQ
&& code
!= NE
)
2407 trap_comparison_operator (op
, mode
)
2409 enum machine_mode mode
;
2411 if (mode
!= VOIDmode
&& mode
!= GET_MODE (op
))
2413 return (GET_RTX_CLASS (GET_CODE (op
)) == '<'
2414 || GET_CODE (op
) == EQ
|| GET_CODE (op
) == NE
);
2417 /* Return 1 if ANDOP is a mask that has no bits on that are not in the
2418 mask required to convert the result of a rotate insn into a shift
2419 left insn of SHIFTOP bits. Both are known to be CONST_INT. */
2422 includes_lshift_p (shiftop
, andop
)
2423 register rtx shiftop
;
2426 int shift_mask
= (~0 << INTVAL (shiftop
));
2428 return (INTVAL (andop
) & ~shift_mask
) == 0;
2431 /* Similar, but for right shift. */
2434 includes_rshift_p (shiftop
, andop
)
2435 register rtx shiftop
;
2438 unsigned HOST_WIDE_INT shift_mask
= ~(unsigned HOST_WIDE_INT
) 0;
2440 shift_mask
>>= INTVAL (shiftop
);
2442 return (INTVAL (andop
) & ~ shift_mask
) == 0;
2445 /* Return 1 if REGNO (reg1) == REGNO (reg2) - 1 making them candidates
2446 for lfq and stfq insns.
2448 Note reg1 and reg2 *must* be hard registers. To be sure we will
2449 abort if we are passed pseudo registers. */
2452 registers_ok_for_quad_peep (reg1
, reg2
)
2455 /* We might have been passed a SUBREG. */
2456 if (GET_CODE (reg1
) != REG
|| GET_CODE (reg2
) != REG
)
2459 return (REGNO (reg1
) == REGNO (reg2
) - 1);
2462 /* Return 1 if addr1 and addr2 are suitable for lfq or stfq insn. addr1 and
2463 addr2 must be in consecutive memory locations (addr2 == addr1 + 8). */
2466 addrs_ok_for_quad_peep (addr1
, addr2
)
2473 /* Extract an offset (if used) from the first addr. */
2474 if (GET_CODE (addr1
) == PLUS
)
2476 /* If not a REG, return zero. */
2477 if (GET_CODE (XEXP (addr1
, 0)) != REG
)
2481 reg1
= REGNO (XEXP (addr1
, 0));
2482 /* The offset must be constant! */
2483 if (GET_CODE (XEXP (addr1
, 1)) != CONST_INT
)
2485 offset1
= INTVAL (XEXP (addr1
, 1));
2488 else if (GET_CODE (addr1
) != REG
)
2492 reg1
= REGNO (addr1
);
2493 /* This was a simple (mem (reg)) expression. Offset is 0. */
2497 /* Make sure the second address is a (mem (plus (reg) (const_int). */
2498 if (GET_CODE (addr2
) != PLUS
)
2501 if (GET_CODE (XEXP (addr2
, 0)) != REG
2502 || GET_CODE (XEXP (addr2
, 1)) != CONST_INT
)
2505 if (reg1
!= REGNO (XEXP (addr2
, 0)))
2508 /* The offset for the second addr must be 8 more than the first addr. */
2509 if (INTVAL (XEXP (addr2
, 1)) != offset1
+ 8)
2512 /* All the tests passed. addr1 and addr2 are valid for lfq or stfq
2517 /* Return the register class of a scratch register needed to copy IN into
2518 or out of a register in CLASS in MODE. If it can be done directly,
2519 NO_REGS is returned. */
2522 secondary_reload_class (class, mode
, in
)
2523 enum reg_class
class;
2524 enum machine_mode mode ATTRIBUTE_UNUSED
;
2530 /* We can not copy a symbolic operand directly into anything other than
2531 BASE_REGS for TARGET_ELF. So indicate that a register from BASE_REGS
2532 is needed as an intermediate register. */
2533 if (class != BASE_REGS
2534 && (GET_CODE (in
) == SYMBOL_REF
2535 || GET_CODE (in
) == LABEL_REF
2536 || GET_CODE (in
) == CONST
))
2540 if (GET_CODE (in
) == REG
)
2543 if (regno
>= FIRST_PSEUDO_REGISTER
)
2545 regno
= true_regnum (in
);
2546 if (regno
>= FIRST_PSEUDO_REGISTER
)
2550 else if (GET_CODE (in
) == SUBREG
)
2552 regno
= true_regnum (in
);
2553 if (regno
>= FIRST_PSEUDO_REGISTER
)
2559 /* We can place anything into GENERAL_REGS and can put GENERAL_REGS
2561 if (class == GENERAL_REGS
|| class == BASE_REGS
2562 || (regno
>= 0 && INT_REGNO_P (regno
)))
2565 /* Constants, memory, and FP registers can go into FP registers. */
2566 if ((regno
== -1 || FP_REGNO_P (regno
))
2567 && (class == FLOAT_REGS
|| class == NON_SPECIAL_REGS
))
2570 /* We can copy among the CR registers. */
2571 if ((class == CR_REGS
|| class == CR0_REGS
)
2572 && regno
>= 0 && CR_REGNO_P (regno
))
2575 /* Otherwise, we need GENERAL_REGS. */
2576 return GENERAL_REGS
;
2579 /* Given a comparison operation, return the bit number in CCR to test. We
2580 know this is a valid comparison.
2582 SCC_P is 1 if this is for an scc. That means that %D will have been
2583 used instead of %C, so the bits will be in different places.
2585 Return -1 if OP isn't a valid comparison for some reason. */
2592 enum rtx_code code
= GET_CODE (op
);
2593 enum machine_mode cc_mode
;
2597 if (GET_RTX_CLASS (code
) != '<')
2600 cc_mode
= GET_MODE (XEXP (op
, 0));
2601 cc_regnum
= REGNO (XEXP (op
, 0));
2602 base_bit
= 4 * (cc_regnum
- 68);
2604 /* In CCEQmode cases we have made sure that the result is always in the
2605 third bit of the CR field. */
2607 if (cc_mode
== CCEQmode
)
2608 return base_bit
+ 3;
2613 return scc_p
? base_bit
+ 3 : base_bit
+ 2;
2615 return base_bit
+ 2;
2617 return base_bit
+ 1;
2622 /* If floating-point, we will have done a cror to put the bit in the
2623 unordered position. So test that bit. For integer, this is ! LT
2624 unless this is an scc insn. */
2625 return cc_mode
== CCFPmode
|| scc_p
? base_bit
+ 3 : base_bit
;
2628 return cc_mode
== CCFPmode
|| scc_p
? base_bit
+ 3 : base_bit
+ 1;
2635 /* Return the GOT register. */
2638 rs6000_got_register (value
)
2639 rtx value ATTRIBUTE_UNUSED
;
2641 /* The second flow pass currently (June 1999) can't update regs_ever_live
2642 without disturbing other parts of the compiler, so update it here to
2643 make the prolog/epilogue code happy. */
2644 if (no_new_pseudos
&& ! regs_ever_live
[PIC_OFFSET_TABLE_REGNUM
])
2645 regs_ever_live
[PIC_OFFSET_TABLE_REGNUM
] = 1;
2647 current_function_uses_pic_offset_table
= 1;
2649 return pic_offset_table_rtx
;
2652 /* Search for any occurrence of the GOT_TOC register marker that should
2653 have been eliminated, but may have crept back in.
2655 This function could completely go away now (June 1999), but we leave it
2656 in for a while until all the possible issues with the new -fpic handling
2663 if (flag_pic
&& (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
))
2665 rtx got_reg
= gen_rtx_REG (Pmode
, 2);
2666 for ( ; insn
!= NULL_RTX
; insn
= NEXT_INSN (insn
))
2667 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
2668 && reg_mentioned_p (got_reg
, PATTERN (insn
)))
2669 fatal_insn ("GOT/TOC register marker not removed:", PATTERN (insn
));
2674 /* Define the structure for the machine field in struct function. */
2675 struct machine_function
2683 /* Functions to save and restore rs6000_fpmem_size.
2684 These will be called, via pointer variables,
2685 from push_function_context and pop_function_context. */
2688 rs6000_save_machine_status (p
)
2691 struct machine_function
*machine
=
2692 (struct machine_function
*) xmalloc (sizeof (struct machine_function
));
2694 p
->machine
= machine
;
2695 machine
->sysv_varargs_p
= rs6000_sysv_varargs_p
;
2696 machine
->fpmem_size
= rs6000_fpmem_size
;
2697 machine
->fpmem_offset
= rs6000_fpmem_offset
;
2701 rs6000_restore_machine_status (p
)
2704 struct machine_function
*machine
= p
->machine
;
2706 rs6000_sysv_varargs_p
= machine
->sysv_varargs_p
;
2707 rs6000_fpmem_size
= machine
->fpmem_size
;
2708 rs6000_fpmem_offset
= machine
->fpmem_offset
;
2711 p
->machine
= (struct machine_function
*)0;
2714 /* Do anything needed before RTL is emitted for each function. */
2717 rs6000_init_expanders ()
2719 /* Reset varargs and save TOC indicator */
2720 rs6000_sysv_varargs_p
= 0;
2721 rs6000_fpmem_size
= 0;
2722 rs6000_fpmem_offset
= 0;
2724 /* Arrange to save and restore machine status around nested functions. */
2725 save_machine_status
= rs6000_save_machine_status
;
2726 restore_machine_status
= rs6000_restore_machine_status
;
2730 /* Print an operand. Recognize special options, documented below. */
2733 #define SMALL_DATA_RELOC ((rs6000_sdata == SDATA_EABI) ? "sda21" : "sdarel")
2734 #define SMALL_DATA_REG ((rs6000_sdata == SDATA_EABI) ? 0 : 13)
2736 #define SMALL_DATA_RELOC "sda21"
2737 #define SMALL_DATA_REG 0
2741 print_operand (file
, x
, code
)
2749 /* These macros test for integers and extract the low-order bits. */
2751 ((GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE) \
2752 && GET_MODE (X) == VOIDmode)
2754 #define INT_LOWPART(X) \
2755 (GET_CODE (X) == CONST_INT ? INTVAL (X) : CONST_DOUBLE_LOW (X))
2760 /* Write out an instruction after the call which may be replaced
2761 with glue code by the loader. This depends on the AIX version. */
2762 asm_fprintf (file
, RS6000_CALL_GLUE
);
2766 /* Write the register number of the TOC register. */
2767 fputs (TARGET_MINIMAL_TOC
? reg_names
[30] : reg_names
[2 /* PIC_OFFSET_TABLE_REGNUM? */ ], file
);
2771 /* Write out either a '.' or '$' for the current location, depending
2772 on whether this is Solaris or not. */
2773 putc ((DEFAULT_ABI
== ABI_SOLARIS
) ? '.' : '$', file
);
2777 /* If X is a constant integer whose low-order 5 bits are zero,
2778 write 'l'. Otherwise, write 'r'. This is a kludge to fix a bug
2779 in the AIX assembler where "sri" with a zero shift count
2780 write a trash instruction. */
2781 if (GET_CODE (x
) == CONST_INT
&& (INTVAL (x
) & 31) == 0)
2788 /* Low-order 16 bits of constant, unsigned. */
2790 output_operand_lossage ("invalid %%b value");
2792 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INT_LOWPART (x
) & 0xffff);
2796 /* If the low-order bit is zero, write 'r'; otherwise, write 'l'
2797 for 64-bit mask direction. */
2798 putc (((INT_LOWPART(x
) & 1) == 0 ? 'r' : 'l'), file
);
2802 /* This is an optional cror needed for LE or GE floating-point
2803 comparisons. Otherwise write nothing. */
2804 if ((GET_CODE (x
) == LE
|| GET_CODE (x
) == GE
)
2805 && GET_MODE (XEXP (x
, 0)) == CCFPmode
)
2807 int base_bit
= 4 * (REGNO (XEXP (x
, 0)) - 68);
2809 fprintf (file
, "cror %d,%d,%d\n\t", base_bit
+ 3,
2810 base_bit
+ 2, base_bit
+ (GET_CODE (x
) == GE
));
2815 /* Similar, except that this is for an scc, so we must be able to
2816 encode the test in a single bit that is one. We do the above
2817 for any LE, GE, GEU, or LEU and invert the bit for NE. */
2818 if (GET_CODE (x
) == LE
|| GET_CODE (x
) == GE
2819 || GET_CODE (x
) == LEU
|| GET_CODE (x
) == GEU
)
2821 int base_bit
= 4 * (REGNO (XEXP (x
, 0)) - 68);
2823 fprintf (file
, "cror %d,%d,%d\n\t", base_bit
+ 3,
2825 base_bit
+ (GET_CODE (x
) == GE
|| GET_CODE (x
) == GEU
));
2828 else if (GET_CODE (x
) == NE
)
2830 int base_bit
= 4 * (REGNO (XEXP (x
, 0)) - 68);
2832 fprintf (file
, "crnor %d,%d,%d\n\t", base_bit
+ 3,
2833 base_bit
+ 2, base_bit
+ 2);
2838 /* X is a CR register. Print the number of the third bit of the CR */
2839 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
2840 output_operand_lossage ("invalid %%E value");
2842 fprintf(file
, "%d", 4 * (REGNO (x
) - 68) + 3);
2846 /* X is a CR register. Print the shift count needed to move it
2847 to the high-order four bits. */
2848 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
2849 output_operand_lossage ("invalid %%f value");
2851 fprintf (file
, "%d", 4 * (REGNO (x
) - 68));
2855 /* Similar, but print the count for the rotate in the opposite
2857 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
2858 output_operand_lossage ("invalid %%F value");
2860 fprintf (file
, "%d", 32 - 4 * (REGNO (x
) - 68));
2864 /* X is a constant integer. If it is negative, print "m",
2865 otherwise print "z". This is to make a aze or ame insn. */
2866 if (GET_CODE (x
) != CONST_INT
)
2867 output_operand_lossage ("invalid %%G value");
2868 else if (INTVAL (x
) >= 0)
2875 /* If constant, output low-order five bits. Otherwise,
2878 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INT_LOWPART (x
) & 31);
2880 print_operand (file
, x
, 0);
2884 /* If constant, output low-order six bits. Otherwise,
2887 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INT_LOWPART (x
) & 63);
2889 print_operand (file
, x
, 0);
2893 /* Print `i' if this is a constant, else nothing. */
2899 /* Write the bit number in CCR for jump. */
2902 output_operand_lossage ("invalid %%j code");
2904 fprintf (file
, "%d", i
);
2908 /* Similar, but add one for shift count in rlinm for scc and pass
2909 scc flag to `ccr_bit'. */
2912 output_operand_lossage ("invalid %%J code");
2914 /* If we want bit 31, write a shift count of zero, not 32. */
2915 fprintf (file
, "%d", i
== 31 ? 0 : i
+ 1);
2919 /* X must be a constant. Write the 1's complement of the
2922 output_operand_lossage ("invalid %%k value");
2924 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, ~ INT_LOWPART (x
));
2928 /* Write second word of DImode or DFmode reference. Works on register
2929 or non-indexed memory only. */
2930 if (GET_CODE (x
) == REG
)
2931 fprintf (file
, "%s", reg_names
[REGNO (x
) + 1]);
2932 else if (GET_CODE (x
) == MEM
)
2934 /* Handle possible auto-increment. Since it is pre-increment and
2935 we have already done it, we can just use an offset of word. */
2936 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
2937 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
2938 output_address (plus_constant_for_output (XEXP (XEXP (x
, 0), 0),
2941 output_address (plus_constant_for_output (XEXP (x
, 0),
2943 if (small_data_operand (x
, GET_MODE (x
)))
2944 fprintf (file
, "@%s(%s)", SMALL_DATA_RELOC
,
2945 reg_names
[SMALL_DATA_REG
]);
2950 /* MB value for a mask operand. */
2951 if (! mask_operand (x
, VOIDmode
))
2952 output_operand_lossage ("invalid %%m value");
2954 val
= INT_LOWPART (x
);
2956 /* If the high bit is set and the low bit is not, the value is zero.
2957 If the high bit is zero, the value is the first 1 bit we find from
2959 if ((val
& 0x80000000) && ((val
& 1) == 0))
2964 else if ((val
& 0x80000000) == 0)
2966 for (i
= 1; i
< 32; i
++)
2967 if ((val
<<= 1) & 0x80000000)
2969 fprintf (file
, "%d", i
);
2973 /* Otherwise, look for the first 0 bit from the right. The result is its
2974 number plus 1. We know the low-order bit is one. */
2975 for (i
= 0; i
< 32; i
++)
2976 if (((val
>>= 1) & 1) == 0)
2979 /* If we ended in ...01, i would be 0. The correct value is 31, so
2981 fprintf (file
, "%d", 31 - i
);
2985 /* ME value for a mask operand. */
2986 if (! mask_operand (x
, VOIDmode
))
2987 output_operand_lossage ("invalid %%M value");
2989 val
= INT_LOWPART (x
);
2991 /* If the low bit is set and the high bit is not, the value is 31.
2992 If the low bit is zero, the value is the first 1 bit we find from
2994 if ((val
& 1) && ((val
& 0x80000000) == 0))
2999 else if ((val
& 1) == 0)
3001 for (i
= 0; i
< 32; i
++)
3002 if ((val
>>= 1) & 1)
3005 /* If we had ....10, i would be 0. The result should be
3006 30, so we need 30 - i. */
3007 fprintf (file
, "%d", 30 - i
);
3011 /* Otherwise, look for the first 0 bit from the left. The result is its
3012 number minus 1. We know the high-order bit is one. */
3013 for (i
= 0; i
< 32; i
++)
3014 if (((val
<<= 1) & 0x80000000) == 0)
3017 fprintf (file
, "%d", i
);
3021 /* Write the number of elements in the vector times 4. */
3022 if (GET_CODE (x
) != PARALLEL
)
3023 output_operand_lossage ("invalid %%N value");
3025 fprintf (file
, "%d", XVECLEN (x
, 0) * 4);
3029 /* Similar, but subtract 1 first. */
3030 if (GET_CODE (x
) != PARALLEL
)
3031 output_operand_lossage ("invalid %%O value");
3033 fprintf (file
, "%d", (XVECLEN (x
, 0) - 1) * 4);
3037 /* X is a CONST_INT that is a power of two. Output the logarithm. */
3039 || (i
= exact_log2 (INT_LOWPART (x
))) < 0)
3040 output_operand_lossage ("invalid %%p value");
3042 fprintf (file
, "%d", i
);
3046 /* The operand must be an indirect memory reference. The result
3047 is the register number. */
3048 if (GET_CODE (x
) != MEM
|| GET_CODE (XEXP (x
, 0)) != REG
3049 || REGNO (XEXP (x
, 0)) >= 32)
3050 output_operand_lossage ("invalid %%P value");
3052 fprintf (file
, "%d", REGNO (XEXP (x
, 0)));
3056 /* X is a CR register. Print the mask for `mtcrf'. */
3057 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
3058 output_operand_lossage ("invalid %%R value");
3060 fprintf (file
, "%d", 128 >> (REGNO (x
) - 68));
3064 /* Low 5 bits of 32 - value */
3066 output_operand_lossage ("invalid %%s value");
3068 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, (32 - INT_LOWPART (x
)) & 31);
3072 /* PowerPC64 mask position. All 0's and all 1's are excluded.
3073 CONST_INT 32-bit mask is considered sign-extended so any
3074 transition must occur within the CONST_INT, not on the boundary. */
3075 if (! mask64_operand (x
, VOIDmode
))
3076 output_operand_lossage ("invalid %%S value");
3078 val
= INT_LOWPART (x
);
3080 if (val
& 1) /* Clear Left */
3082 for (i
= 0; i
< HOST_BITS_PER_WIDE_INT
; i
++)
3083 if (!((val
>>= 1) & 1))
3086 #if HOST_BITS_PER_WIDE_INT == 32
3087 if (GET_CODE (x
) == CONST_DOUBLE
&& i
== 32)
3089 val
= CONST_DOUBLE_HIGH (x
);
3094 for (i
= 32; i
< 64; i
++)
3095 if (!((val
>>= 1) & 1))
3099 /* i = index of last set bit from right
3100 mask begins at 63 - i from left */
3102 output_operand_lossage ("%%S computed all 1's mask");
3103 fprintf (file
, "%d", 63 - i
);
3106 else /* Clear Right */
3108 for (i
= 0; i
< HOST_BITS_PER_WIDE_INT
; i
++)
3109 if ((val
>>= 1) & 1)
3112 #if HOST_BITS_PER_WIDE_INT == 32
3113 if (GET_CODE (x
) == CONST_DOUBLE
&& i
== 32)
3115 val
= CONST_DOUBLE_HIGH (x
);
3117 if (val
== (HOST_WIDE_INT
) -1)
3120 for (i
= 32; i
< 64; i
++)
3121 if ((val
>>= 1) & 1)
3125 /* i = index of last clear bit from right
3126 mask ends at 62 - i from left */
3128 output_operand_lossage ("%%S computed all 0's mask");
3129 fprintf (file
, "%d", 62 - i
);
3134 /* Write 12 if this jump operation will branch if true, 4 otherwise.
3135 All floating-point operations except NE branch true and integer
3136 EQ, LT, GT, LTU and GTU also branch true. */
3137 if (GET_RTX_CLASS (GET_CODE (x
)) != '<')
3138 output_operand_lossage ("invalid %%t value");
3140 else if ((GET_MODE (XEXP (x
, 0)) == CCFPmode
3141 && GET_CODE (x
) != NE
)
3142 || GET_CODE (x
) == EQ
3143 || GET_CODE (x
) == LT
|| GET_CODE (x
) == GT
3144 || GET_CODE (x
) == LTU
|| GET_CODE (x
) == GTU
)
3151 /* Opposite of 't': write 4 if this jump operation will branch if true,
3153 if (GET_RTX_CLASS (GET_CODE (x
)) != '<')
3154 output_operand_lossage ("invalid %%T value");
3156 else if ((GET_MODE (XEXP (x
, 0)) == CCFPmode
3157 && GET_CODE (x
) != NE
)
3158 || GET_CODE (x
) == EQ
3159 || GET_CODE (x
) == LT
|| GET_CODE (x
) == GT
3160 || GET_CODE (x
) == LTU
|| GET_CODE (x
) == GTU
)
3167 /* High-order 16 bits of constant for use in unsigned operand. */
3169 output_operand_lossage ("invalid %%u value");
3171 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
,
3172 (INT_LOWPART (x
) >> 16) & 0xffff);
3176 /* High-order 16 bits of constant for use in signed operand. */
3178 output_operand_lossage ("invalid %%v value");
3181 int value
= (INT_LOWPART (x
) >> 16) & 0xffff;
3183 /* Solaris assembler doesn't like lis 0,0x8000 */
3184 if (DEFAULT_ABI
== ABI_SOLARIS
&& (value
& 0x8000) != 0)
3185 fprintf (file
, "%d", value
| (~0 << 16));
3187 fprintf (file
, "0x%x", value
);
3192 /* Print `u' if this has an auto-increment or auto-decrement. */
3193 if (GET_CODE (x
) == MEM
3194 && (GET_CODE (XEXP (x
, 0)) == PRE_INC
3195 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
))
3200 /* Print the trap code for this operand. */
3201 switch (GET_CODE (x
))
3204 fputs ("eq", file
); /* 4 */
3207 fputs ("ne", file
); /* 24 */
3210 fputs ("lt", file
); /* 16 */
3213 fputs ("le", file
); /* 20 */
3216 fputs ("gt", file
); /* 8 */
3219 fputs ("ge", file
); /* 12 */
3222 fputs ("llt", file
); /* 2 */
3225 fputs ("lle", file
); /* 6 */
3228 fputs ("lgt", file
); /* 1 */
3231 fputs ("lge", file
); /* 5 */
3239 /* If constant, low-order 16 bits of constant, signed. Otherwise, write
3242 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
,
3243 ((INT_LOWPART (x
) & 0xffff) ^ 0x8000) - 0x8000);
3245 print_operand (file
, x
, 0);
3249 /* If constant, low-order 16 bits of constant, unsigned.
3250 Otherwise, write normally. */
3252 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INT_LOWPART (x
) & 0xffff);
3254 print_operand (file
, x
, 0);
3258 if (GET_CODE (x
) == MEM
3259 && LEGITIMATE_INDEXED_ADDRESS_P (XEXP (x
, 0)))
3264 /* Like 'L', for third word of TImode */
3265 if (GET_CODE (x
) == REG
)
3266 fprintf (file
, "%s", reg_names
[REGNO (x
) + 2]);
3267 else if (GET_CODE (x
) == MEM
)
3269 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
3270 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
3271 output_address (plus_constant (XEXP (XEXP (x
, 0), 0), 8));
3273 output_address (plus_constant (XEXP (x
, 0), 8));
3274 if (small_data_operand (x
, GET_MODE (x
)))
3275 fprintf (file
, "@%s(%s)", SMALL_DATA_RELOC
,
3276 reg_names
[SMALL_DATA_REG
]);
3281 /* X is a SYMBOL_REF. Write out the name preceded by a
3282 period and without any trailing data in brackets. Used for function
3283 names. If we are configured for System V (or the embedded ABI) on
3284 the PowerPC, do not emit the period, since those systems do not use
3285 TOCs and the like. */
3286 if (GET_CODE (x
) != SYMBOL_REF
)
3289 if (XSTR (x
, 0)[0] != '.')
3291 switch (DEFAULT_ABI
)
3301 case ABI_AIX_NODESC
:
3310 RS6000_OUTPUT_BASENAME (file
, XSTR (x
, 0));
3314 /* Like 'L', for last word of TImode. */
3315 if (GET_CODE (x
) == REG
)
3316 fprintf (file
, "%s", reg_names
[REGNO (x
) + 3]);
3317 else if (GET_CODE (x
) == MEM
)
3319 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
3320 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
3321 output_address (plus_constant (XEXP (XEXP (x
, 0), 0), 12));
3323 output_address (plus_constant (XEXP (x
, 0), 12));
3324 if (small_data_operand (x
, GET_MODE (x
)))
3325 fprintf (file
, "@%s(%s)", SMALL_DATA_RELOC
,
3326 reg_names
[SMALL_DATA_REG
]);
3331 if (GET_CODE (x
) == REG
)
3332 fprintf (file
, "%s", reg_names
[REGNO (x
)]);
3333 else if (GET_CODE (x
) == MEM
)
3335 /* We need to handle PRE_INC and PRE_DEC here, since we need to
3336 know the width from the mode. */
3337 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
)
3338 fprintf (file
, "%d(%d)", GET_MODE_SIZE (GET_MODE (x
)),
3339 REGNO (XEXP (XEXP (x
, 0), 0)));
3340 else if (GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
3341 fprintf (file
, "%d(%d)", - GET_MODE_SIZE (GET_MODE (x
)),
3342 REGNO (XEXP (XEXP (x
, 0), 0)));
3344 output_address (XEXP (x
, 0));
3347 output_addr_const (file
, x
);
3351 output_operand_lossage ("invalid %%xn code");
3355 /* Print the address of an operand. */
3358 print_operand_address (file
, x
)
3362 if (GET_CODE (x
) == REG
)
3363 fprintf (file
, "0(%s)", reg_names
[ REGNO (x
) ]);
3364 else if (GET_CODE (x
) == SYMBOL_REF
|| GET_CODE (x
) == CONST
|| GET_CODE (x
) == LABEL_REF
)
3366 output_addr_const (file
, x
);
3367 if (small_data_operand (x
, GET_MODE (x
)))
3368 fprintf (file
, "@%s(%s)", SMALL_DATA_RELOC
,
3369 reg_names
[SMALL_DATA_REG
]);
3371 #ifdef TARGET_NO_TOC
3372 else if (TARGET_NO_TOC
)
3376 fprintf (file
, "(%s)", reg_names
[ TARGET_MINIMAL_TOC
? 30 : 2 /* PIC_OFFSET_TABLE_REGNUM? */ ]);
3378 else if (GET_CODE (x
) == PLUS
&& GET_CODE (XEXP (x
, 1)) == REG
)
3380 if (REGNO (XEXP (x
, 0)) == 0)
3381 fprintf (file
, "%s,%s", reg_names
[ REGNO (XEXP (x
, 1)) ],
3382 reg_names
[ REGNO (XEXP (x
, 0)) ]);
3384 fprintf (file
, "%s,%s", reg_names
[ REGNO (XEXP (x
, 0)) ],
3385 reg_names
[ REGNO (XEXP (x
, 1)) ]);
3387 else if (GET_CODE (x
) == PLUS
&& GET_CODE (XEXP (x
, 1)) == CONST_INT
)
3389 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (XEXP (x
, 1)));
3390 fprintf (file
, "(%s)", reg_names
[ REGNO (XEXP (x
, 0)) ]);
3393 else if (GET_CODE (x
) == LO_SUM
&& GET_CODE (XEXP (x
, 0)) == REG
3394 && CONSTANT_P (XEXP (x
, 1)))
3396 output_addr_const (file
, XEXP (x
, 1));
3397 fprintf (file
, "@l(%s)", reg_names
[ REGNO (XEXP (x
, 0)) ]);
3404 /* This page contains routines that are used to determine what the function
3405 prologue and epilogue code will do and write them out. */
3407 /* Return the first fixed-point register that is required to be saved. 32 if
3411 first_reg_to_save ()
3415 /* Find lowest numbered live register. */
3416 for (first_reg
= 13; first_reg
<= 31; first_reg
++)
3417 if (regs_ever_live
[first_reg
])
3422 /* AIX must save/restore every register that contains a parameter
3423 before/after the .__mcount call plus an additional register
3424 for the static chain, if needed; use registers from 30 down to 22
3426 if (DEFAULT_ABI
== ABI_AIX
)
3428 int last_parm_reg
, profile_first_reg
;
3430 /* Figure out last used parameter register. The proper thing
3431 to do is to walk incoming args of the function. A function
3432 might have live parameter registers even if it has no
3434 for (last_parm_reg
= 10;
3435 last_parm_reg
> 2 && ! regs_ever_live
[last_parm_reg
];
3439 /* Calculate first reg for saving parameter registers
3441 Skip reg 31 which may contain the frame pointer. */
3442 profile_first_reg
= (33 - last_parm_reg
3443 - (current_function_needs_context
? 1 : 0));
3444 /* Do not save frame pointer if no parameters needs to be saved. */
3445 if (profile_first_reg
== 31)
3446 profile_first_reg
= 32;
3448 if (first_reg
> profile_first_reg
)
3449 first_reg
= profile_first_reg
;
3452 /* SVR4 may need one register to preserve the static chain. */
3453 else if (current_function_needs_context
)
3455 /* Skip reg 31 which may contain the frame pointer. */
3464 /* Similar, for FP regs. */
3467 first_fp_reg_to_save ()
3471 /* Find lowest numbered live register. */
3472 for (first_reg
= 14 + 32; first_reg
<= 63; first_reg
++)
3473 if (regs_ever_live
[first_reg
])
3479 /* Return non-zero if this function makes calls. */
3482 rs6000_makes_calls ()
3486 /* If we are profiling, we will be making a call to __mcount.
3487 Under the System V ABI's, we store the LR directly, so
3488 we don't need to do it here. */
3489 if (DEFAULT_ABI
== ABI_AIX
&& profile_flag
)
3492 for (insn
= get_insns (); insn
; insn
= next_insn (insn
))
3493 if (GET_CODE (insn
) == CALL_INSN
)
3500 /* Calculate the stack information for the current function. This is
3501 complicated by having two separate calling sequences, the AIX calling
3502 sequence and the V.4 calling sequence.
3504 AIX stack frames look like:
3506 SP----> +---------------------------------------+
3507 | back chain to caller | 0 0
3508 +---------------------------------------+
3509 | saved CR | 4 8 (8-11)
3510 +---------------------------------------+
3512 +---------------------------------------+
3513 | reserved for compilers | 12 24
3514 +---------------------------------------+
3515 | reserved for binders | 16 32
3516 +---------------------------------------+
3517 | saved TOC pointer | 20 40
3518 +---------------------------------------+
3519 | Parameter save area (P) | 24 48
3520 +---------------------------------------+
3521 | Alloca space (A) | 24+P etc.
3522 +---------------------------------------+
3523 | Local variable space (L) | 24+P+A
3524 +---------------------------------------+
3525 | Float/int conversion temporary (X) | 24+P+A+L
3526 +---------------------------------------+
3527 | Save area for GP registers (G) | 24+P+A+X+L
3528 +---------------------------------------+
3529 | Save area for FP registers (F) | 24+P+A+X+L+G
3530 +---------------------------------------+
3531 old SP->| back chain to caller's caller |
3532 +---------------------------------------+
3534 The required alignment for AIX configurations is two words (i.e., 8
3538 V.4 stack frames look like:
3540 SP----> +---------------------------------------+
3541 | back chain to caller | 0
3542 +---------------------------------------+
3543 | caller's saved LR | 4
3544 +---------------------------------------+
3545 | Parameter save area (P) | 8
3546 +---------------------------------------+
3547 | Alloca space (A) | 8+P
3548 +---------------------------------------+
3549 | Varargs save area (V) | 8+P+A
3550 +---------------------------------------+
3551 | Local variable space (L) | 8+P+A+V
3552 +---------------------------------------+
3553 | Float/int conversion temporary (X) | 8+P+A+V+L
3554 +---------------------------------------+
3555 | saved CR (C) | 8+P+A+V+L+X
3556 +---------------------------------------+
3557 | Save area for GP registers (G) | 8+P+A+V+L+X+C
3558 +---------------------------------------+
3559 | Save area for FP registers (F) | 8+P+A+V+L+X+C+G
3560 +---------------------------------------+
3561 old SP->| back chain to caller's caller |
3562 +---------------------------------------+
3564 The required alignment for V.4 is 16 bytes, or 8 bytes if -meabi is
3565 given. (But note below and in sysv4.h that we require only 8 and
3566 may round up the size of our stack frame anyways. The historical
3567 reason is early versions of powerpc-linux which didn't properly
3568 align the stack at program startup. A happy side-effect is that
3569 -mno-eabi libraries can be used with -meabi programs.)
3572 A PowerPC Windows/NT frame looks like:
3574 SP----> +---------------------------------------+
3575 | back chain to caller | 0
3576 +---------------------------------------+
3578 +---------------------------------------+
3580 +---------------------------------------+
3582 +---------------------------------------+
3584 +---------------------------------------+
3586 +---------------------------------------+
3587 | Parameter save area (P) | 24
3588 +---------------------------------------+
3589 | Alloca space (A) | 24+P
3590 +---------------------------------------+
3591 | Local variable space (L) | 24+P+A
3592 +---------------------------------------+
3593 | Float/int conversion temporary (X) | 24+P+A+L
3594 +---------------------------------------+
3595 | Save area for FP registers (F) | 24+P+A+L+X
3596 +---------------------------------------+
3597 | Possible alignment area (Y) | 24+P+A+L+X+F
3598 +---------------------------------------+
3599 | Save area for GP registers (G) | 24+P+A+L+X+F+Y
3600 +---------------------------------------+
3601 | Save area for CR (C) | 24+P+A+L+X+F+Y+G
3602 +---------------------------------------+
3603 | Save area for TOC (T) | 24+P+A+L+X+F+Y+G+C
3604 +---------------------------------------+
3605 | Save area for LR (R) | 24+P+A+L+X+F+Y+G+C+T
3606 +---------------------------------------+
3607 old SP->| back chain to caller's caller |
3608 +---------------------------------------+
3610 For NT, there is no specific order to save the registers, but in
3611 order to support __builtin_return_address, the save area for the
3612 link register needs to be in a known place, so we use -4 off of the
3613 old SP. To support calls through pointers, we also allocate a
3614 fixed slot to store the TOC, -8 off the old SP.
3616 The required alignment for NT is 16 bytes.
3619 The EABI configuration defaults to the V.4 layout, unless
3620 -mcall-aix is used, in which case the AIX layout is used. However,
3621 the stack alignment requirements may differ. If -mno-eabi is not
3622 given, the required stack alignment is 8 bytes; if -mno-eabi is
3623 given, the required alignment is 16 bytes. (But see V.4 comment
3626 #ifndef ABI_STACK_BOUNDARY
3627 #define ABI_STACK_BOUNDARY STACK_BOUNDARY
3631 rs6000_stack_info ()
3633 static rs6000_stack_t info
, zero_info
;
3634 rs6000_stack_t
*info_ptr
= &info
;
3635 int reg_size
= TARGET_32BIT
? 4 : 8;
3636 enum rs6000_abi abi
;
3639 /* Zero all fields portably */
3642 /* Select which calling sequence */
3643 info_ptr
->abi
= abi
= DEFAULT_ABI
;
3645 /* Calculate which registers need to be saved & save area size */
3646 info_ptr
->first_gp_reg_save
= first_reg_to_save ();
3647 /* Assume that we will have to save PIC_OFFSET_TABLE_REGNUM,
3648 even if it currently looks like we won't. */
3650 && (abi
== ABI_V4
|| abi
== ABI_SOLARIS
)
3651 && info_ptr
->first_gp_reg_save
> PIC_OFFSET_TABLE_REGNUM
)
3652 info_ptr
->gp_size
= reg_size
* (32 - PIC_OFFSET_TABLE_REGNUM
);
3654 info_ptr
->gp_size
= reg_size
* (32 - info_ptr
->first_gp_reg_save
);
3656 info_ptr
->first_fp_reg_save
= first_fp_reg_to_save ();
3657 info_ptr
->fp_size
= 8 * (64 - info_ptr
->first_fp_reg_save
);
3659 /* Does this function call anything? */
3660 info_ptr
->calls_p
= rs6000_makes_calls ();
3662 /* Allocate space to save the toc. */
3663 if (abi
== ABI_NT
&& info_ptr
->calls_p
)
3665 info_ptr
->toc_save_p
= 1;
3666 info_ptr
->toc_size
= reg_size
;
3669 /* Does this machine need the float/int conversion area? */
3670 info_ptr
->fpmem_p
= regs_ever_live
[FPMEM_REGNUM
];
3672 /* If this is main and we need to call a function to set things up,
3673 save main's arguments around the call. */
3678 if (0 == strcmp (IDENTIFIER_POINTER (DECL_NAME (current_function_decl
)),
3680 && DECL_CONTEXT (current_function_decl
) == NULL_TREE
)
3682 info_ptr
->main_p
= 1;
3685 info_ptr
->calls_p
= 1;
3687 if (DECL_ARGUMENTS (current_function_decl
))
3692 info_ptr
->main_save_p
= 1;
3693 info_ptr
->main_size
= 0;
3695 for ((i
= 0), (arg
= DECL_ARGUMENTS (current_function_decl
));
3696 arg
!= NULL_TREE
&& i
< 8;
3697 (arg
= TREE_CHAIN (arg
)), i
++)
3699 info_ptr
->main_size
+= reg_size
;
3706 /* Determine if we need to save the link register */
3707 if (regs_ever_live
[65]
3708 || (DEFAULT_ABI
== ABI_AIX
&& profile_flag
)
3709 #ifdef TARGET_RELOCATABLE
3710 || (TARGET_RELOCATABLE
&& (get_pool_size () != 0))
3712 || (info_ptr
->first_fp_reg_save
!= 64
3713 && !FP_SAVE_INLINE (info_ptr
->first_fp_reg_save
))
3714 || (abi
== ABI_V4
&& current_function_calls_alloca
)
3715 || (abi
== ABI_SOLARIS
&& current_function_calls_alloca
)
3716 || info_ptr
->calls_p
)
3718 info_ptr
->lr_save_p
= 1;
3719 regs_ever_live
[65] = 1;
3721 info_ptr
->lr_size
= reg_size
;
3724 /* Determine if we need to save the condition code registers */
3725 if (regs_ever_live
[70] || regs_ever_live
[71] || regs_ever_live
[72])
3727 info_ptr
->cr_save_p
= 1;
3728 if (abi
== ABI_V4
|| abi
== ABI_NT
|| abi
== ABI_SOLARIS
)
3729 info_ptr
->cr_size
= reg_size
;
3732 /* Determine various sizes */
3733 info_ptr
->reg_size
= reg_size
;
3734 info_ptr
->fixed_size
= RS6000_SAVE_AREA
;
3735 info_ptr
->varargs_size
= RS6000_VARARGS_AREA
;
3736 info_ptr
->vars_size
= RS6000_ALIGN (get_frame_size (), 8);
3737 info_ptr
->parm_size
= RS6000_ALIGN (current_function_outgoing_args_size
, 8);
3738 info_ptr
->fpmem_size
= (info_ptr
->fpmem_p
) ? 8 : 0;
3739 info_ptr
->save_size
= RS6000_ALIGN (info_ptr
->fp_size
3743 + info_ptr
->toc_size
3744 + info_ptr
->main_size
, 8);
3746 /* Calculate the offsets */
3754 case ABI_AIX_NODESC
:
3755 info_ptr
->fp_save_offset
= - info_ptr
->fp_size
;
3756 info_ptr
->gp_save_offset
= info_ptr
->fp_save_offset
- info_ptr
->gp_size
;
3757 info_ptr
->main_save_offset
= info_ptr
->gp_save_offset
- info_ptr
->main_size
;
3758 info_ptr
->cr_save_offset
= reg_size
; /* first word when 64-bit. */
3759 info_ptr
->lr_save_offset
= 2*reg_size
;
3764 info_ptr
->fp_save_offset
= - info_ptr
->fp_size
;
3765 info_ptr
->gp_save_offset
= info_ptr
->fp_save_offset
- info_ptr
->gp_size
;
3766 info_ptr
->cr_save_offset
= info_ptr
->gp_save_offset
- info_ptr
->cr_size
;
3767 info_ptr
->toc_save_offset
= info_ptr
->cr_save_offset
- info_ptr
->toc_size
;
3768 info_ptr
->main_save_offset
= info_ptr
->toc_save_offset
- info_ptr
->main_size
;
3769 info_ptr
->lr_save_offset
= reg_size
;
3773 info_ptr
->lr_save_offset
= -reg_size
;
3774 info_ptr
->toc_save_offset
= info_ptr
->lr_save_offset
- info_ptr
->lr_size
;
3775 info_ptr
->cr_save_offset
= info_ptr
->toc_save_offset
- info_ptr
->toc_size
;
3776 info_ptr
->gp_save_offset
= info_ptr
->cr_save_offset
- info_ptr
->cr_size
- info_ptr
->gp_size
+ reg_size
;
3777 info_ptr
->fp_save_offset
= info_ptr
->gp_save_offset
- info_ptr
->fp_size
;
3778 if (info_ptr
->fp_size
&& ((- info_ptr
->fp_save_offset
) % 8) != 0)
3779 info_ptr
->fp_save_offset
-= reg_size
;
3781 info_ptr
->main_save_offset
= info_ptr
->fp_save_offset
- info_ptr
->main_size
;
3785 /* Ensure that fpmem_offset will be aligned to an 8-byte boundary. */
3786 if (info_ptr
->fpmem_p
3787 && (info_ptr
->main_save_offset
- info_ptr
->fpmem_size
) % 8)
3788 info_ptr
->fpmem_size
+= reg_size
;
3790 total_raw_size
= (info_ptr
->vars_size
3791 + info_ptr
->parm_size
3792 + info_ptr
->fpmem_size
3793 + info_ptr
->save_size
3794 + info_ptr
->varargs_size
3795 + info_ptr
->fixed_size
);
3797 info_ptr
->total_size
= RS6000_ALIGN (total_raw_size
, ABI_STACK_BOUNDARY
/ BITS_PER_UNIT
);
3799 /* Determine if we need to allocate any stack frame:
3801 For AIX we need to push the stack if a frame pointer is needed (because
3802 the stack might be dynamically adjusted), if we are debugging, if we
3803 make calls, or if the sum of fp_save, gp_save, fpmem, and local variables
3804 are more than the space needed to save all non-volatile registers:
3805 32-bit: 18*8 + 19*4 = 220 or 64-bit: 18*8 + 18*8 = 288 (GPR13 reserved).
3807 For V.4 we don't have the stack cushion that AIX uses, but assume that
3808 the debugger can handle stackless frames. */
3810 if (info_ptr
->calls_p
)
3811 info_ptr
->push_p
= 1;
3813 else if (abi
== ABI_V4
|| abi
== ABI_NT
|| abi
== ABI_SOLARIS
)
3814 info_ptr
->push_p
= (total_raw_size
> info_ptr
->fixed_size
3815 || (abi
== ABI_NT
? info_ptr
->lr_save_p
3816 : info_ptr
->calls_p
));
3819 info_ptr
->push_p
= (frame_pointer_needed
3820 || write_symbols
!= NO_DEBUG
3821 || ((total_raw_size
- info_ptr
->fixed_size
)
3822 > (TARGET_32BIT
? 220 : 288)));
3824 if (info_ptr
->fpmem_p
)
3826 info_ptr
->fpmem_offset
= info_ptr
->main_save_offset
- info_ptr
->fpmem_size
;
3827 rs6000_fpmem_size
= info_ptr
->fpmem_size
;
3828 rs6000_fpmem_offset
= (info_ptr
->push_p
3829 ? info_ptr
->total_size
+ info_ptr
->fpmem_offset
3830 : info_ptr
->fpmem_offset
);
3833 info_ptr
->fpmem_offset
= 0;
3835 /* Zero offsets if we're not saving those registers */
3836 if (info_ptr
->fp_size
== 0)
3837 info_ptr
->fp_save_offset
= 0;
3839 if (info_ptr
->gp_size
== 0)
3840 info_ptr
->gp_save_offset
= 0;
3842 if (!info_ptr
->lr_save_p
)
3843 info_ptr
->lr_save_offset
= 0;
3845 if (!info_ptr
->cr_save_p
)
3846 info_ptr
->cr_save_offset
= 0;
3848 if (!info_ptr
->toc_save_p
)
3849 info_ptr
->toc_save_offset
= 0;
3851 if (!info_ptr
->main_save_p
)
3852 info_ptr
->main_save_offset
= 0;
3858 debug_stack_info (info
)
3859 rs6000_stack_t
*info
;
3861 const char *abi_string
;
3864 info
= rs6000_stack_info ();
3866 fprintf (stderr
, "\nStack information for function %s:\n",
3867 ((current_function_decl
&& DECL_NAME (current_function_decl
))
3868 ? IDENTIFIER_POINTER (DECL_NAME (current_function_decl
))
3873 default: abi_string
= "Unknown"; break;
3874 case ABI_NONE
: abi_string
= "NONE"; break;
3875 case ABI_AIX
: abi_string
= "AIX"; break;
3876 case ABI_AIX_NODESC
: abi_string
= "AIX"; break;
3877 case ABI_V4
: abi_string
= "V.4"; break;
3878 case ABI_SOLARIS
: abi_string
= "Solaris"; break;
3879 case ABI_NT
: abi_string
= "NT"; break;
3882 fprintf (stderr
, "\tABI = %5s\n", abi_string
);
3884 if (info
->first_gp_reg_save
!= 32)
3885 fprintf (stderr
, "\tfirst_gp_reg_save = %5d\n", info
->first_gp_reg_save
);
3887 if (info
->first_fp_reg_save
!= 64)
3888 fprintf (stderr
, "\tfirst_fp_reg_save = %5d\n", info
->first_fp_reg_save
);
3890 if (info
->lr_save_p
)
3891 fprintf (stderr
, "\tlr_save_p = %5d\n", info
->lr_save_p
);
3893 if (info
->cr_save_p
)
3894 fprintf (stderr
, "\tcr_save_p = %5d\n", info
->cr_save_p
);
3896 if (info
->toc_save_p
)
3897 fprintf (stderr
, "\ttoc_save_p = %5d\n", info
->toc_save_p
);
3900 fprintf (stderr
, "\tpush_p = %5d\n", info
->push_p
);
3903 fprintf (stderr
, "\tcalls_p = %5d\n", info
->calls_p
);
3906 fprintf (stderr
, "\tmain_p = %5d\n", info
->main_p
);
3908 if (info
->main_save_p
)
3909 fprintf (stderr
, "\tmain_save_p = %5d\n", info
->main_save_p
);
3912 fprintf (stderr
, "\tfpmem_p = %5d\n", info
->fpmem_p
);
3914 if (info
->gp_save_offset
)
3915 fprintf (stderr
, "\tgp_save_offset = %5d\n", info
->gp_save_offset
);
3917 if (info
->fp_save_offset
)
3918 fprintf (stderr
, "\tfp_save_offset = %5d\n", info
->fp_save_offset
);
3920 if (info
->lr_save_offset
)
3921 fprintf (stderr
, "\tlr_save_offset = %5d\n", info
->lr_save_offset
);
3923 if (info
->cr_save_offset
)
3924 fprintf (stderr
, "\tcr_save_offset = %5d\n", info
->cr_save_offset
);
3926 if (info
->toc_save_offset
)
3927 fprintf (stderr
, "\ttoc_save_offset = %5d\n", info
->toc_save_offset
);
3929 if (info
->varargs_save_offset
)
3930 fprintf (stderr
, "\tvarargs_save_offset = %5d\n", info
->varargs_save_offset
);
3932 if (info
->main_save_offset
)
3933 fprintf (stderr
, "\tmain_save_offset = %5d\n", info
->main_save_offset
);
3935 if (info
->fpmem_offset
)
3936 fprintf (stderr
, "\tfpmem_offset = %5d\n", info
->fpmem_offset
);
3938 if (info
->total_size
)
3939 fprintf (stderr
, "\ttotal_size = %5d\n", info
->total_size
);
3941 if (info
->varargs_size
)
3942 fprintf (stderr
, "\tvarargs_size = %5d\n", info
->varargs_size
);
3944 if (info
->vars_size
)
3945 fprintf (stderr
, "\tvars_size = %5d\n", info
->vars_size
);
3947 if (info
->parm_size
)
3948 fprintf (stderr
, "\tparm_size = %5d\n", info
->parm_size
);
3950 if (info
->fpmem_size
)
3951 fprintf (stderr
, "\tfpmem_size = %5d\n", info
->fpmem_size
);
3953 if (info
->fixed_size
)
3954 fprintf (stderr
, "\tfixed_size = %5d\n", info
->fixed_size
);
3957 fprintf (stderr
, "\tgp_size = %5d\n", info
->gp_size
);
3960 fprintf (stderr
, "\tfp_size = %5d\n", info
->fp_size
);
3963 fprintf (stderr
, "\tlr_size = %5d\n", info
->cr_size
);
3966 fprintf (stderr
, "\tcr_size = %5d\n", info
->cr_size
);
3969 fprintf (stderr
, "\ttoc_size = %5d\n", info
->toc_size
);
3971 if (info
->main_size
)
3972 fprintf (stderr
, "\tmain_size = %5d\n", info
->main_size
);
3974 if (info
->save_size
)
3975 fprintf (stderr
, "\tsave_size = %5d\n", info
->save_size
);
3977 if (info
->reg_size
!= 4)
3978 fprintf (stderr
, "\treg_size = %5d\n", info
->reg_size
);
3980 fprintf (stderr
, "\n");
3983 /* Write out an instruction to load the TOC_TABLE address into register 30.
3984 This is only needed when TARGET_TOC, TARGET_MINIMAL_TOC, and there is
3988 rs6000_output_load_toc_table (file
, reg
)
3995 if (TARGET_RELOCATABLE
)
3997 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCF", rs6000_pic_labelno
);
3998 fprintf (file
, "\tbl ");
3999 assemble_name (file
, buf
);
4000 fprintf (file
, "\n");
4002 /* possibly create the toc section */
4003 if (!toc_initialized
)
4006 function_section (current_function_decl
);
4009 /* If not first call in this function, we need to put the
4010 different between .LCTOC1 and the address we get to right
4011 after the bl. It will mess up disassembling the instructions
4012 but that can't be helped. We will later need to bias the
4013 address before loading. */
4014 if (rs6000_pic_func_labelno
!= rs6000_pic_labelno
)
4016 const char *init_ptr
= TARGET_32BIT
? ".long" : ".quad";
4017 const char *buf_ptr
;
4019 ASM_OUTPUT_INTERNAL_LABEL (file
, "LCL", rs6000_pic_labelno
);
4021 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCTOC", 1);
4022 STRIP_NAME_ENCODING (buf_ptr
, buf
);
4023 fprintf (file
, "\t%s %s-", init_ptr
, buf_ptr
);
4025 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCF", rs6000_pic_labelno
);
4026 fprintf (file
, "%s\n", buf_ptr
);
4029 ASM_OUTPUT_INTERNAL_LABEL (file
, "LCF", rs6000_pic_labelno
);
4030 fprintf (file
, "\tmflr %s\n", reg_names
[reg
]);
4032 if (rs6000_pic_func_labelno
!= rs6000_pic_labelno
)
4033 asm_fprintf(file
, "\t{cal|la} %s,%d(%s)\n", reg_names
[reg
],
4034 (TARGET_32BIT
? 4 : 8), reg_names
[reg
]);
4036 asm_fprintf (file
, (TARGET_32BIT
) ? "\t{l|lwz} %s,(" : "\tld %s,(",
4038 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCL", rs6000_pic_labelno
);
4039 assemble_name (file
, buf
);
4041 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCF", rs6000_pic_labelno
);
4042 assemble_name (file
, buf
);
4043 fprintf (file
, ")(%s)\n", reg_names
[reg
]);
4044 asm_fprintf (file
, "\t{cax|add} %s,%s,%s\n",
4045 reg_names
[reg
], reg_names
[0], reg_names
[reg
]);
4046 rs6000_pic_labelno
++;
4048 else if (! TARGET_64BIT
)
4050 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCTOC", 1);
4051 asm_fprintf (file
, "\t{liu|lis} %s,", reg_names
[reg
]);
4052 assemble_name (file
, buf
);
4053 fputs ("@ha\n", file
);
4054 asm_fprintf (file
, "\t{cal|la} %s,", reg_names
[reg
]);
4055 assemble_name (file
, buf
);
4056 asm_fprintf (file
, "@l(%s)\n", reg_names
[reg
]);
4061 #else /* !USING_SVR4_H */
4062 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCTOC", 0);
4063 asm_fprintf (file
, TARGET_32BIT
? "\t{l|lwz} %s," : "\tld %s,",
4065 assemble_name (file
, buf
);
4066 asm_fprintf (file
, "(%s)\n", reg_names
[2]);
4067 #endif /* USING_SVR4_H */
4071 /* Emit the correct code for allocating stack space. If COPY_R12, make sure a copy
4072 of the old frame is left in r12. */
4075 rs6000_allocate_stack_space (file
, size
, copy_r12
)
4080 int neg_size
= -size
;
4085 (TARGET_32BIT
) ? "\t{stu|stwu} %s,%d(%s)\n" : "\tstdu %s,%d(%s)\n",
4086 reg_names
[1], neg_size
, reg_names
[1]);
4090 fprintf (file
, "\tmr %s,%s\n", reg_names
[12], reg_names
[1]);
4092 asm_fprintf (file
, "\t{liu|lis} %s,0x%x\n\t{oril|ori} %s,%s,%d\n",
4093 reg_names
[0], (neg_size
>> 16) & 0xffff,
4094 reg_names
[0], reg_names
[0], neg_size
& 0xffff);
4096 (TARGET_32BIT
) ? "\t{stux|stwux} %s,%s,%s\n" : "\tstdux %s,%s,%s\n",
4097 reg_names
[1], reg_names
[1], reg_names
[0]);
4102 fprintf (file
, "\tmr %s,%s\n", reg_names
[12], reg_names
[1]);
4104 asm_fprintf (file
, "\t{cal|la} %s,%d(%s)\n",
4105 reg_names
[1], neg_size
, reg_names
[1]);
4108 asm_fprintf (file
, "\t{liu|lis} %s,0x%x\n\t{oril|ori} %s,%s,%d\n",
4109 reg_names
[0], (neg_size
>> 16) & 0xffff,
4110 reg_names
[0], reg_names
[0], neg_size
& 0xffff);
4111 asm_fprintf (file
, "\t{cax|add} %s,%s,%s\n", reg_names
[1],
4112 reg_names
[0], reg_names
[1]);
4116 (TARGET_32BIT
) ? "\t{st|stw} %s,0(%s)\n" : "\tstd %s,0(%s)\n",
4117 reg_names
[12], reg_names
[1]);
4122 /* Write function prologue. */
4124 output_prolog (file
, size
)
4126 int size ATTRIBUTE_UNUSED
;
4128 rs6000_stack_t
*info
= rs6000_stack_info ();
4129 int reg_size
= info
->reg_size
;
4130 const char *store_reg
;
4131 const char *load_reg
;
4137 store_reg
= "\t{st|stw} %s,%d(%s)\n";
4138 load_reg
= "\t{l|lwz} %s,%d(%s)\n";
4142 store_reg
= "\tstd %s,%d(%s)\n";
4143 load_reg
= "\tlld %s,%d(%s)\n";
4146 if (TARGET_DEBUG_STACK
)
4147 debug_stack_info (info
);
4149 /* Write .extern for any function we will call to save and restore fp
4151 if (info
->first_fp_reg_save
< 64 && !FP_SAVE_INLINE (info
->first_fp_reg_save
))
4152 fprintf (file
, "\t.extern %s%d%s\n\t.extern %s%d%s\n",
4153 SAVE_FP_PREFIX
, info
->first_fp_reg_save
- 32, SAVE_FP_SUFFIX
,
4154 RESTORE_FP_PREFIX
, info
->first_fp_reg_save
- 32, RESTORE_FP_SUFFIX
);
4156 /* Write .extern for truncation routines, if needed. */
4157 if (rs6000_trunc_used
&& ! trunc_defined
)
4159 fprintf (file
, "\t.extern .%s\n\t.extern .%s\n",
4160 RS6000_ITRUNC
, RS6000_UITRUNC
);
4164 /* Write .extern for AIX common mode routines, if needed. */
4165 if (! TARGET_POWER
&& ! TARGET_POWERPC
&& ! common_mode_defined
)
4167 fputs ("\t.extern __mulh\n", file
);
4168 fputs ("\t.extern __mull\n", file
);
4169 fputs ("\t.extern __divss\n", file
);
4170 fputs ("\t.extern __divus\n", file
);
4171 fputs ("\t.extern __quoss\n", file
);
4172 fputs ("\t.extern __quous\n", file
);
4173 common_mode_defined
= 1;
4176 /* For V.4, update stack before we do any saving and set back pointer. */
4177 if (info
->push_p
&& (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
))
4179 if (info
->total_size
< 32767)
4180 sp_offset
= info
->total_size
;
4183 rs6000_allocate_stack_space (file
, info
->total_size
, sp_reg
== 12);
4186 /* If we use the link register, get it into r0. */
4187 if (info
->lr_save_p
)
4188 asm_fprintf (file
, "\tmflr %s\n", reg_names
[0]);
4190 /* If we need to save CR, put it into r12. */
4191 if (info
->cr_save_p
&& sp_reg
!= 12)
4192 asm_fprintf (file
, "\tmfcr %s\n", reg_names
[12]);
4194 /* Do any required saving of fpr's. If only one or two to save, do it
4195 ourself. Otherwise, call function. Note that since they are statically
4196 linked, we do not need a nop following them. */
4197 if (FP_SAVE_INLINE (info
->first_fp_reg_save
))
4199 int regno
= info
->first_fp_reg_save
;
4200 int loc
= info
->fp_save_offset
+ sp_offset
;
4202 for ( ; regno
< 64; regno
++, loc
+= 8)
4203 asm_fprintf (file
, "\tstfd %s,%d(%s)\n", reg_names
[regno
], loc
, reg_names
[sp_reg
]);
4205 else if (info
->first_fp_reg_save
!= 64)
4206 asm_fprintf (file
, "\tbl %s%d%s\n", SAVE_FP_PREFIX
,
4207 info
->first_fp_reg_save
- 32, SAVE_FP_SUFFIX
);
4209 /* Now save gpr's. */
4210 if (! TARGET_MULTIPLE
|| info
->first_gp_reg_save
== 31 || TARGET_64BIT
)
4212 int regno
= info
->first_gp_reg_save
;
4213 int loc
= info
->gp_save_offset
+ sp_offset
;
4215 for ( ; regno
< 32; regno
++, loc
+= reg_size
)
4216 asm_fprintf (file
, store_reg
, reg_names
[regno
], loc
, reg_names
[sp_reg
]);
4219 else if (info
->first_gp_reg_save
!= 32)
4220 asm_fprintf (file
, "\t{stm|stmw} %s,%d(%s)\n",
4221 reg_names
[info
->first_gp_reg_save
],
4222 info
->gp_save_offset
+ sp_offset
,
4225 /* Save main's arguments if we need to call a function */
4227 if (info
->main_save_p
)
4230 int loc
= info
->main_save_offset
+ sp_offset
;
4231 int size
= info
->main_size
;
4233 for (regno
= 3; size
> 0; regno
++, loc
+= reg_size
, size
-= reg_size
)
4234 asm_fprintf (file
, store_reg
, reg_names
[regno
], loc
, reg_names
[sp_reg
]);
4238 /* Save lr if we used it. */
4239 if (info
->lr_save_p
)
4240 asm_fprintf (file
, store_reg
, reg_names
[0], info
->lr_save_offset
+ sp_offset
,
4243 /* Save CR if we use any that must be preserved. */
4244 if (info
->cr_save_p
)
4246 if (sp_reg
== 12) /* If r12 is used to hold the original sp, copy cr now */
4248 asm_fprintf (file
, "\tmfcr %s\n", reg_names
[0]);
4249 asm_fprintf (file
, store_reg
, reg_names
[0],
4250 info
->cr_save_offset
+ sp_offset
,
4254 asm_fprintf (file
, store_reg
, reg_names
[12], info
->cr_save_offset
+ sp_offset
,
4258 /* If we need PIC_OFFSET_TABLE_REGNUM, initialize it now */
4259 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
4260 && flag_pic
== 1 && regs_ever_live
[PIC_OFFSET_TABLE_REGNUM
])
4262 if (!info
->lr_save_p
)
4263 asm_fprintf (file
, "\tmflr %s\n", reg_names
[0]);
4265 fputs ("\tbl _GLOBAL_OFFSET_TABLE_@local-4\n", file
);
4266 asm_fprintf (file
, "\tmflr %s\n", reg_names
[PIC_OFFSET_TABLE_REGNUM
]);
4268 if (!info
->lr_save_p
)
4269 asm_fprintf (file
, "\tmtlr %s\n", reg_names
[0]);
4272 /* NT needs us to probe the stack frame every 4k pages for large frames, so
4274 if (DEFAULT_ABI
== ABI_NT
&& info
->total_size
> 4096)
4276 if (info
->total_size
< 32768)
4278 int probe_offset
= 4096;
4279 while (probe_offset
< info
->total_size
)
4281 asm_fprintf (file
, "\t{l|lwz} %s,%d(%s)\n", reg_names
[0], -probe_offset
, reg_names
[1]);
4282 probe_offset
+= 4096;
4287 int probe_iterations
= info
->total_size
/ 4096;
4288 static int probe_labelno
= 0;
4291 if (probe_iterations
< 32768)
4292 asm_fprintf (file
, "\tli %s,%d\n", reg_names
[12], probe_iterations
);
4295 asm_fprintf (file
, "\tlis %s,%d\n", reg_names
[12], probe_iterations
>> 16);
4296 if (probe_iterations
& 0xffff)
4297 asm_fprintf (file
, "\tori %s,%s,%d\n", reg_names
[12], reg_names
[12],
4298 probe_iterations
& 0xffff);
4300 asm_fprintf (file
, "\tmtctr %s\n", reg_names
[12]);
4301 asm_fprintf (file
, "\tmr %s,%s\n", reg_names
[12], reg_names
[1]);
4302 ASM_OUTPUT_INTERNAL_LABEL (file
, "LCprobe", probe_labelno
);
4303 asm_fprintf (file
, "\t{lu|lwzu} %s,-4096(%s)\n", reg_names
[0], reg_names
[12]);
4304 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCprobe", probe_labelno
++);
4305 fputs ("\tbdnz ", file
);
4306 assemble_name (file
, buf
);
4311 /* Update stack and set back pointer unless this is V.4, which was done previously */
4312 if (info
->push_p
&& DEFAULT_ABI
!= ABI_V4
&& DEFAULT_ABI
!= ABI_SOLARIS
)
4313 rs6000_allocate_stack_space (file
, info
->total_size
, FALSE
);
4315 /* Set frame pointer, if needed. */
4316 if (frame_pointer_needed
)
4317 asm_fprintf (file
, "\tmr %s,%s\n", reg_names
[31], reg_names
[1]);
4320 /* If we need to call a function to set things up for main, do so now
4321 before dealing with the TOC. */
4324 const char *prefix
= "";
4326 switch (DEFAULT_ABI
)
4328 case ABI_AIX
: prefix
= "."; break;
4329 case ABI_NT
: prefix
= ".."; break;
4332 fprintf (file
, "\tbl %s%s\n", prefix
, NAME__MAIN
);
4333 #ifdef RS6000_CALL_GLUE2
4334 fprintf (file
, "\t%s%s%s\n", RS6000_CALL_GLUE2
, prefix
, NAME_MAIN
);
4336 #ifdef RS6000_CALL_GLUE
4337 if (DEFAULT_ABI
== ABI_AIX
|| DEFAULT_ABI
== ABI_NT
)
4340 asm_fprintf (file
, RS6000_CALL_GLUE
);
4346 if (info
->main_save_p
)
4350 int size
= info
->main_size
;
4352 if (info
->total_size
< 32767)
4354 loc
= info
->total_size
+ info
->main_save_offset
;
4355 for (regno
= 3; size
> 0; regno
++, size
-= reg_size
, loc
+= reg_size
)
4356 asm_fprintf (file
, load_reg
, reg_names
[regno
], loc
, reg_names
[1]);
4360 int neg_size
= info
->main_save_offset
- info
->total_size
;
4362 asm_fprintf (file
, "\t{liu|lis} %s,0x%x\n\t{oril|ori} %s,%s,%d\n",
4363 reg_names
[0], (neg_size
>> 16) & 0xffff,
4364 reg_names
[0], reg_names
[0], neg_size
& 0xffff);
4366 asm_fprintf (file
, "\t{sf|subf} %s,%s,%s\n", reg_names
[0], reg_names
[0],
4369 for (regno
= 3; size
> 0; regno
++, size
-= reg_size
, loc
+= reg_size
)
4370 asm_fprintf (file
, load_reg
, reg_names
[regno
], loc
, reg_names
[0]);
4377 /* If TARGET_MINIMAL_TOC, and the constant pool is needed, then load the
4378 TOC_TABLE address into register 30. */
4379 if (TARGET_TOC
&& TARGET_MINIMAL_TOC
&& get_pool_size () != 0)
4383 rs6000_pic_func_labelno
= rs6000_pic_labelno
;
4385 rs6000_output_load_toc_table (file
, 30);
4388 if (DEFAULT_ABI
== ABI_NT
)
4390 assemble_name (file
, XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0));
4391 fputs (".b:\n", file
);
4395 /* Write function epilogue. */
4398 output_epilog (file
, size
)
4400 int size ATTRIBUTE_UNUSED
;
4402 rs6000_stack_t
*info
= rs6000_stack_info ();
4403 const char *load_reg
= (TARGET_32BIT
) ? "\t{l|lwz} %s,%d(%s)\n" : "\tld %s,%d(%s)\n";
4404 rtx insn
= get_last_insn ();
4408 /* If the last insn was a BARRIER, we don't have to write anything except
4410 if (GET_CODE (insn
) == NOTE
)
4411 insn
= prev_nonnote_insn (insn
);
4412 if (insn
== 0 || GET_CODE (insn
) != BARRIER
)
4414 /* If we have a frame pointer, a call to alloca, or a large stack
4415 frame, restore the old stack pointer using the backchain. Otherwise,
4416 we know what size to update it with. */
4417 if (frame_pointer_needed
|| current_function_calls_alloca
4418 || info
->total_size
> 32767)
4420 /* Under V.4, don't reset the stack pointer until after we're done
4421 loading the saved registers. */
4422 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
4425 asm_fprintf (file
, load_reg
, reg_names
[sp_reg
], 0, reg_names
[1]);
4427 else if (info
->push_p
)
4429 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
4430 sp_offset
= info
->total_size
;
4432 asm_fprintf (file
, "\t{cal|la} %s,%d(%s)\n",
4433 reg_names
[1], info
->total_size
, reg_names
[1]);
4436 /* Get the old lr if we saved it. */
4437 if (info
->lr_save_p
)
4438 asm_fprintf (file
, load_reg
, reg_names
[0], info
->lr_save_offset
+ sp_offset
, reg_names
[sp_reg
]);
4440 /* Get the old cr if we saved it. */
4441 if (info
->cr_save_p
)
4442 asm_fprintf (file
, load_reg
, reg_names
[12], info
->cr_save_offset
+ sp_offset
, reg_names
[sp_reg
]);
4444 /* Set LR here to try to overlap restores below. */
4445 if (info
->lr_save_p
)
4446 asm_fprintf (file
, "\tmtlr %s\n", reg_names
[0]);
4448 /* Restore gpr's. */
4449 if (! TARGET_MULTIPLE
|| info
->first_gp_reg_save
== 31 || TARGET_64BIT
)
4451 int regno
= info
->first_gp_reg_save
;
4452 int loc
= info
->gp_save_offset
+ sp_offset
;
4453 int reg_size
= (TARGET_32BIT
) ? 4 : 8;
4455 for ( ; regno
< 32; regno
++, loc
+= reg_size
)
4456 asm_fprintf (file
, load_reg
, reg_names
[regno
], loc
, reg_names
[sp_reg
]);
4459 else if (info
->first_gp_reg_save
!= 32)
4460 asm_fprintf (file
, "\t{lm|lmw} %s,%d(%s)\n",
4461 reg_names
[info
->first_gp_reg_save
],
4462 info
->gp_save_offset
+ sp_offset
,
4465 /* Restore fpr's if we can do it without calling a function. */
4466 if (FP_SAVE_INLINE (info
->first_fp_reg_save
))
4468 int regno
= info
->first_fp_reg_save
;
4469 int loc
= info
->fp_save_offset
+ sp_offset
;
4471 for ( ; regno
< 64; regno
++, loc
+= 8)
4472 asm_fprintf (file
, "\tlfd %s,%d(%s)\n", reg_names
[regno
], loc
, reg_names
[sp_reg
]);
4475 /* If we saved cr, restore it here. Just those of cr2, cr3, and cr4
4477 if (info
->cr_save_p
)
4478 asm_fprintf (file
, "\tmtcrf %d,%s\n",
4479 (regs_ever_live
[70] != 0) * 0x20
4480 + (regs_ever_live
[71] != 0) * 0x10
4481 + (regs_ever_live
[72] != 0) * 0x8, reg_names
[12]);
4483 /* If this is V.4, unwind the stack pointer after all of the loads
4486 asm_fprintf (file
, "\t{cal|la} %s,%d(%s)\n",
4487 reg_names
[1], sp_offset
, reg_names
[1]);
4488 else if (sp_reg
!= 1)
4489 asm_fprintf (file
, "\tmr %s,%s\n", reg_names
[1], reg_names
[sp_reg
]);
4491 /* If we have to restore more than two FP registers, branch to the
4492 restore function. It will return to our caller. */
4493 if (info
->first_fp_reg_save
!= 64 && !FP_SAVE_INLINE (info
->first_fp_reg_save
))
4494 asm_fprintf (file
, "\tb %s%d%s\n", RESTORE_FP_PREFIX
,
4495 info
->first_fp_reg_save
- 32, RESTORE_FP_SUFFIX
);
4497 asm_fprintf (file
, "\t{br|blr}\n");
4500 /* Output a traceback table here. See /usr/include/sys/debug.h for info
4503 We don't output a traceback table if -finhibit-size-directive was
4504 used. The documentation for -finhibit-size-directive reads
4505 ``don't output a @code{.size} assembler directive, or anything
4506 else that would cause trouble if the function is split in the
4507 middle, and the two halves are placed at locations far apart in
4508 memory.'' The traceback table has this property, since it
4509 includes the offset from the start of the function to the
4510 traceback table itself.
4512 System V.4 Powerpc's (and the embedded ABI derived from it) use a
4513 different traceback table. */
4514 if (DEFAULT_ABI
== ABI_AIX
&& ! flag_inhibit_size_directive
)
4516 char *fname
= XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0);
4517 int fixed_parms
, float_parms
, parm_info
;
4520 while (*fname
== '.') /* V.4 encodes . in the name */
4523 /* Need label immediately before tbtab, so we can compute its offset
4524 from the function start. */
4527 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LT");
4528 ASM_OUTPUT_LABEL (file
, fname
);
4530 /* The .tbtab pseudo-op can only be used for the first eight
4531 expressions, since it can't handle the possibly variable
4532 length fields that follow. However, if you omit the optional
4533 fields, the assembler outputs zeros for all optional fields
4534 anyways, giving each variable length field is minimum length
4535 (as defined in sys/debug.h). Thus we can not use the .tbtab
4536 pseudo-op at all. */
4538 /* An all-zero word flags the start of the tbtab, for debuggers
4539 that have to find it by searching forward from the entry
4540 point or from the current pc. */
4541 fputs ("\t.long 0\n", file
);
4543 /* Tbtab format type. Use format type 0. */
4544 fputs ("\t.byte 0,", file
);
4546 /* Language type. Unfortunately, there doesn't seem to be any
4547 official way to get this info, so we use language_string. C
4548 is 0. C++ is 9. No number defined for Obj-C, so use the
4549 value for C for now. There is no official value for Java,
4550 although IBM appears to be using 13. There is no official value
4551 for Chill, so we've choosen 44 pseudo-randomly. */
4552 if (! strcmp (language_string
, "GNU C")
4553 || ! strcmp (language_string
, "GNU Obj-C"))
4555 else if (! strcmp (language_string
, "GNU F77"))
4557 else if (! strcmp (language_string
, "GNU Ada"))
4559 else if (! strcmp (language_string
, "GNU Pascal"))
4561 else if (! strcmp (language_string
, "GNU C++"))
4563 else if (! strcmp (language_string
, "GNU Java"))
4565 else if (! strcmp (language_string
, "GNU CHILL"))
4569 fprintf (file
, "%d,", i
);
4571 /* 8 single bit fields: global linkage (not set for C extern linkage,
4572 apparently a PL/I convention?), out-of-line epilogue/prologue, offset
4573 from start of procedure stored in tbtab, internal function, function
4574 has controlled storage, function has no toc, function uses fp,
4575 function logs/aborts fp operations. */
4576 /* Assume that fp operations are used if any fp reg must be saved. */
4577 fprintf (file
, "%d,", (1 << 5) | ((info
->first_fp_reg_save
!= 64) << 1));
4579 /* 6 bitfields: function is interrupt handler, name present in
4580 proc table, function calls alloca, on condition directives
4581 (controls stack walks, 3 bits), saves condition reg, saves
4583 /* The `function calls alloca' bit seems to be set whenever reg 31 is
4584 set up as a frame pointer, even when there is no alloca call. */
4585 fprintf (file
, "%d,",
4586 ((1 << 6) | (frame_pointer_needed
<< 5)
4587 | (info
->cr_save_p
<< 1) | (info
->lr_save_p
)));
4589 /* 3 bitfields: saves backchain, spare bit, number of fpr saved
4591 fprintf (file
, "%d,",
4592 (info
->push_p
<< 7) | (64 - info
->first_fp_reg_save
));
4594 /* 2 bitfields: spare bits (2 bits), number of gpr saved (6 bits). */
4595 fprintf (file
, "%d,", (32 - first_reg_to_save ()));
4598 /* Compute the parameter info from the function decl argument
4601 int next_parm_info_bit
;
4603 next_parm_info_bit
= 31;
4608 for (decl
= DECL_ARGUMENTS (current_function_decl
);
4609 decl
; decl
= TREE_CHAIN (decl
))
4611 rtx parameter
= DECL_INCOMING_RTL (decl
);
4612 enum machine_mode mode
= GET_MODE (parameter
);
4614 if (GET_CODE (parameter
) == REG
)
4616 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
4624 else if (mode
== DFmode
)
4629 /* If only one bit will fit, don't or in this entry. */
4630 if (next_parm_info_bit
> 0)
4631 parm_info
|= (bits
<< (next_parm_info_bit
- 1));
4632 next_parm_info_bit
-= 2;
4636 fixed_parms
+= ((GET_MODE_SIZE (mode
)
4637 + (UNITS_PER_WORD
- 1))
4639 next_parm_info_bit
-= 1;
4645 /* Number of fixed point parameters. */
4646 /* This is actually the number of words of fixed point parameters; thus
4647 an 8 byte struct counts as 2; and thus the maximum value is 8. */
4648 fprintf (file
, "%d,", fixed_parms
);
4650 /* 2 bitfields: number of floating point parameters (7 bits), parameters
4652 /* This is actually the number of fp registers that hold parameters;
4653 and thus the maximum value is 13. */
4654 /* Set parameters on stack bit if parameters are not in their original
4655 registers, regardless of whether they are on the stack? Xlc
4656 seems to set the bit when not optimizing. */
4657 fprintf (file
, "%d\n", ((float_parms
<< 1) | (! optimize
)));
4659 /* Optional fields follow. Some are variable length. */
4661 /* Parameter types, left adjusted bit fields: 0 fixed, 10 single float,
4663 /* There is an entry for each parameter in a register, in the order that
4664 they occur in the parameter list. Any intervening arguments on the
4665 stack are ignored. If the list overflows a long (max possible length
4666 34 bits) then completely leave off all elements that don't fit. */
4667 /* Only emit this long if there was at least one parameter. */
4668 if (fixed_parms
|| float_parms
)
4669 fprintf (file
, "\t.long %d\n", parm_info
);
4671 /* Offset from start of code to tb table. */
4672 fputs ("\t.long ", file
);
4673 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LT");
4674 RS6000_OUTPUT_BASENAME (file
, fname
);
4676 RS6000_OUTPUT_BASENAME (file
, fname
);
4679 /* Interrupt handler mask. */
4680 /* Omit this long, since we never set the interrupt handler bit
4683 /* Number of CTL (controlled storage) anchors. */
4684 /* Omit this long, since the has_ctl bit is never set above. */
4686 /* Displacement into stack of each CTL anchor. */
4687 /* Omit this list of longs, because there are no CTL anchors. */
4689 /* Length of function name. */
4690 fprintf (file
, "\t.short %d\n", (int) strlen (fname
));
4692 /* Function name. */
4693 assemble_string (fname
, strlen (fname
));
4695 /* Register for alloca automatic storage; this is always reg 31.
4696 Only emit this if the alloca bit was set above. */
4697 if (frame_pointer_needed
)
4698 fputs ("\t.byte 31\n", file
);
4701 if (DEFAULT_ABI
== ABI_NT
)
4703 RS6000_OUTPUT_BASENAME (file
, XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0));
4704 fputs (".e:\nFE_MOT_RESVD..", file
);
4705 RS6000_OUTPUT_BASENAME (file
, XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0));
4706 fputs (":\n", file
);
4710 /* A C compound statement that outputs the assembler code for a thunk function,
4711 used to implement C++ virtual function calls with multiple inheritance. The
4712 thunk acts as a wrapper around a virtual function, adjusting the implicit
4713 object parameter before handing control off to the real function.
4715 First, emit code to add the integer DELTA to the location that contains the
4716 incoming first argument. Assume that this argument contains a pointer, and
4717 is the one used to pass the `this' pointer in C++. This is the incoming
4718 argument *before* the function prologue, e.g. `%o0' on a sparc. The
4719 addition must preserve the values of all other incoming arguments.
4721 After the addition, emit code to jump to FUNCTION, which is a
4722 `FUNCTION_DECL'. This is a direct pure jump, not a call, and does not touch
4723 the return address. Hence returning from FUNCTION will return to whoever
4724 called the current `thunk'.
4726 The effect must be as if FUNCTION had been called directly with the adjusted
4727 first argument. This macro is responsible for emitting all of the code for
4728 a thunk function; `FUNCTION_PROLOGUE' and `FUNCTION_EPILOGUE' are not
4731 The THUNK_FNDECL is redundant. (DELTA and FUNCTION have already been
4732 extracted from it.) It might possibly be useful on some targets, but
4735 If you do not define this macro, the target-independent code in the C++
4736 frontend will generate a less efficient heavyweight thunk that calls
4737 FUNCTION instead of jumping to it. The generic approach does not support
4741 output_mi_thunk (file
, thunk_fndecl
, delta
, function
)
4743 tree thunk_fndecl ATTRIBUTE_UNUSED
;
4747 const char *this_reg
= reg_names
[ aggregate_value_p (TREE_TYPE (TREE_TYPE (function
))) ? 4 : 3 ];
4750 const char *r0
= reg_names
[0];
4751 const char *sp
= reg_names
[1];
4752 const char *toc
= reg_names
[2];
4753 const char *schain
= reg_names
[11];
4754 const char *r12
= reg_names
[12];
4756 static int labelno
= 0;
4758 /* Small constants that can be done by one add instruction */
4759 if (delta
>= -32768 && delta
<= 32767)
4761 if (! TARGET_NEW_MNEMONICS
)
4762 fprintf (file
, "\tcal %s,%d(%s)\n", this_reg
, delta
, this_reg
);
4764 fprintf (file
, "\taddi %s,%s,%d\n", this_reg
, this_reg
, delta
);
4767 /* Large constants that can be done by one addis instruction */
4768 else if ((delta
& 0xffff) == 0 && num_insns_constant_wide (delta
) == 1)
4769 asm_fprintf (file
, "\t{cau|addis} %s,%s,%d\n", this_reg
, this_reg
,
4772 /* 32-bit constants that can be done by an add and addis instruction. */
4773 else if (TARGET_32BIT
|| num_insns_constant_wide (delta
) == 1)
4775 /* Break into two pieces, propagating the sign bit from the low word to
4777 int delta_high
= delta
>> 16;
4778 int delta_low
= delta
& 0xffff;
4779 if ((delta_low
& 0x8000) != 0)
4782 delta_low
= (delta_low
^ 0x8000) - 0x8000; /* sign extend */
4785 asm_fprintf (file
, "\t{cau|addis} %s,%s,%d\n", this_reg
, this_reg
,
4788 if (! TARGET_NEW_MNEMONICS
)
4789 fprintf (file
, "\tcal %s,%d(%s)\n", this_reg
, delta_low
, this_reg
);
4791 fprintf (file
, "\taddi %s,%s,%d\n", this_reg
, this_reg
, delta_low
);
4794 /* 64-bit constants, fixme */
4798 /* Get the prefix in front of the names. */
4799 switch (DEFAULT_ABI
)
4809 case ABI_AIX_NODESC
:
4819 /* If the function is compiled in this module, jump to it directly.
4820 Otherwise, load up its address and jump to it. */
4822 fname
= XSTR (XEXP (DECL_RTL (function
), 0), 0);
4824 if (current_file_function_operand (XEXP (DECL_RTL (function
), 0))
4825 && ! lookup_attribute ("longcall",
4826 TYPE_ATTRIBUTES (TREE_TYPE (function
))))
4828 fprintf (file
, "\tb %s", prefix
);
4829 assemble_name (file
, fname
);
4830 if (DEFAULT_ABI
== ABI_V4
&& flag_pic
) fputs ("@local", file
);
4836 switch (DEFAULT_ABI
)
4843 /* Set up a TOC entry for the function. */
4844 ASM_GENERATE_INTERNAL_LABEL (buf
, "Lthunk", labelno
);
4846 ASM_OUTPUT_INTERNAL_LABEL (file
, "Lthunk", labelno
);
4849 /* Note, MINIMAL_TOC doesn't make sense in the case of a thunk, since
4850 there will be only one TOC entry for this function. */
4851 fputs ("\t.tc\t", file
);
4852 assemble_name (file
, buf
);
4853 fputs ("[TC],", file
);
4854 assemble_name (file
, buf
);
4857 asm_fprintf (file
, (TARGET_32BIT
) ? "\t{l|lwz} %s," : "\tld %s", r12
);
4858 assemble_name (file
, buf
);
4859 asm_fprintf (file
, "(%s)\n", reg_names
[2]);
4861 (TARGET_32BIT
) ? "\t{l|lwz} %s,0(%s)\n" : "\tld %s,0(%s)\n",
4865 (TARGET_32BIT
) ? "\t{l|lwz} %s,4(%s)\n" : "\tld %s,8(%s)\n",
4868 asm_fprintf (file
, "\tmtctr %s\n", r0
);
4870 (TARGET_32BIT
) ? "\t{l|lwz} %s,8(%s)\n" : "\tld %s,16(%s)\n",
4873 asm_fprintf (file
, "\tbctr\n");
4877 fprintf (file
, "\tb %s", prefix
);
4878 assemble_name (file
, fname
);
4879 if (flag_pic
) fputs ("@plt", file
);
4883 /* Don't use r11, that contains the static chain, just use r0/r12. */
4884 case ABI_AIX_NODESC
:
4888 fprintf (file
, "\tmflr %s\n", r0
);
4889 fputs ("\tbl _GLOBAL_OFFSET_TABLE_@local-4\n", file
);
4890 asm_fprintf (file
, "\tmflr %s\n", r12
);
4891 asm_fprintf (file
, "\tmtlr %s\n", r0
);
4892 asm_fprintf (file
, "\t{l|lwz} %s,", r0
);
4893 assemble_name (file
, fname
);
4894 asm_fprintf (file
, "@got(%s)\n", r12
);
4895 asm_fprintf (file
, "\tmtctr %s\n", r0
);
4896 asm_fprintf (file
, "\tbctr\n");
4899 else if (flag_pic
> 1 || TARGET_RELOCATABLE
)
4901 ASM_GENERATE_INTERNAL_LABEL (buf
, "Lthunk", labelno
);
4903 fprintf (file
, "\tmflr %s\n", r0
);
4904 asm_fprintf (file
, "\t{st|stw} %s,4(%s)\n", r0
, sp
);
4905 rs6000_pic_func_labelno
= rs6000_pic_labelno
;
4906 rs6000_output_load_toc_table (file
, 12);
4907 asm_fprintf (file
, "\t{l|lwz} %s,", r0
);
4908 assemble_name (file
, buf
);
4909 asm_fprintf (file
, "(%s)\n", r12
);
4910 asm_fprintf (file
, "\t{l|lwz} %s,4(%s)\n", r12
, sp
);
4911 asm_fprintf (file
, "\tmtlr %s\n", r12
);
4912 asm_fprintf (file
, "\tmtctr %s\n", r0
);
4913 asm_fprintf (file
, "\tbctr\n");
4914 asm_fprintf (file
, "%s\n", MINIMAL_TOC_SECTION_ASM_OP
);
4915 assemble_name (file
, buf
);
4916 fputs (" = .-.LCTOC1\n", file
);
4917 fputs ("\t.long ", file
);
4918 assemble_name (file
, fname
);
4919 fputs ("\n\t.previous\n", file
);
4921 #endif /* TARGET_ELF */
4925 asm_fprintf (file
, "\t{liu|lis} %s,", r12
);
4926 assemble_name (file
, fname
);
4927 asm_fprintf (file
, "@ha\n");
4928 asm_fprintf (file
, "\t{cal|la} %s,", r12
);
4929 assemble_name (file
, fname
);
4930 asm_fprintf (file
, "@l(%s)\n", r12
);
4931 asm_fprintf (file
, "\tmtctr %s\n", r12
);
4932 asm_fprintf (file
, "\tbctr\n");
4941 /* Output a TOC entry. We derive the entry name from what is
4945 output_toc (file
, x
, labelno
)
4952 const char *real_name
;
4959 /* if we're going to put a double constant in the TOC, make sure it's
4960 aligned properly when strict alignment is on. */
4961 if (GET_CODE (x
) == CONST_DOUBLE
4963 && GET_MODE (x
) == DFmode
4964 && ! (TARGET_NO_FP_IN_TOC
&& ! TARGET_MINIMAL_TOC
)) {
4965 ASM_OUTPUT_ALIGN (file
, 3);
4969 if (TARGET_ELF
&& TARGET_MINIMAL_TOC
)
4971 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LC");
4972 fprintf (file
, "%d = .-", labelno
);
4973 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LCTOC");
4974 fputs ("1\n", file
);
4977 ASM_OUTPUT_INTERNAL_LABEL (file
, "LC", labelno
);
4979 /* Handle FP constants specially. Note that if we have a minimal
4980 TOC, things we put here aren't actually in the TOC, so we can allow
4982 if (GET_CODE (x
) == CONST_DOUBLE
&& GET_MODE (x
) == DFmode
4983 && ! (TARGET_NO_FP_IN_TOC
&& ! TARGET_MINIMAL_TOC
))
4988 REAL_VALUE_FROM_CONST_DOUBLE (rv
, x
);
4989 REAL_VALUE_TO_TARGET_DOUBLE (rv
, k
);
4993 if (TARGET_MINIMAL_TOC
)
4994 fprintf (file
, "\t.llong 0x%lx%08lx\n", k
[0], k
[1]);
4996 fprintf (file
, "\t.tc FD_%lx_%lx[TC],0x%lx%08lx\n",
4997 k
[0], k
[1], k
[0] & 0xffffffff, k
[1] & 0xffffffff);
5002 if (TARGET_MINIMAL_TOC
)
5003 fprintf (file
, "\t.long 0x%lx\n\t.long 0x%lx\n", k
[0], k
[1]);
5005 fprintf (file
, "\t.tc FD_%lx_%lx[TC],0x%lx,0x%lx\n",
5006 k
[0], k
[1], k
[0], k
[1]);
5010 else if (GET_CODE (x
) == CONST_DOUBLE
&& GET_MODE (x
) == SFmode
5011 && ! (TARGET_NO_FP_IN_TOC
&& ! TARGET_MINIMAL_TOC
))
5016 REAL_VALUE_FROM_CONST_DOUBLE (rv
, x
);
5017 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
5021 if (TARGET_MINIMAL_TOC
)
5022 fprintf (file
, "\t.llong 0x%lx00000000\n", l
);
5024 fprintf (file
, "\t.tc FS_%lx[TC],0x%lx00000000\n", l
, l
);
5029 if (TARGET_MINIMAL_TOC
)
5030 fprintf (file
, "\t.long 0x%lx\n", l
);
5032 fprintf (file
, "\t.tc FS_%lx[TC],0x%lx\n", l
, l
);
5036 else if (GET_MODE (x
) == DImode
5037 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
)
5038 && ! (TARGET_NO_FP_IN_TOC
&& ! TARGET_MINIMAL_TOC
))
5043 if (GET_CODE (x
) == CONST_DOUBLE
)
5045 low
= CONST_DOUBLE_LOW (x
);
5046 high
= CONST_DOUBLE_HIGH (x
);
5049 #if HOST_BITS_PER_WIDE_INT == 32
5052 high
= (low
< 0) ? ~0 : 0;
5056 low
= INTVAL (x
) & 0xffffffff;
5057 high
= (HOST_WIDE_INT
) INTVAL (x
) >> 32;
5063 if (TARGET_MINIMAL_TOC
)
5064 fprintf (file
, "\t.llong 0x%lx%08lx\n", (long)high
, (long)low
);
5066 fprintf (file
, "\t.tc ID_%lx_%lx[TC],0x%lx%08lx\n",
5067 (long)high
, (long)low
, (long)high
, (long)low
);
5072 if (TARGET_MINIMAL_TOC
)
5073 fprintf (file
, "\t.long 0x%lx\n\t.long 0x%lx\n",
5074 (long)high
, (long)low
);
5076 fprintf (file
, "\t.tc ID_%lx_%lx[TC],0x%lx,0x%lx\n",
5077 (long)high
, (long)low
, (long)high
, (long)low
);
5082 if (GET_CODE (x
) == CONST
)
5084 base
= XEXP (XEXP (x
, 0), 0);
5085 offset
= INTVAL (XEXP (XEXP (x
, 0), 1));
5088 if (GET_CODE (base
) == SYMBOL_REF
)
5089 name
= XSTR (base
, 0);
5090 else if (GET_CODE (base
) == LABEL_REF
)
5091 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (XEXP (base
, 0)));
5092 else if (GET_CODE (base
) == CODE_LABEL
)
5093 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (base
));
5097 STRIP_NAME_ENCODING (real_name
, name
);
5098 if (TARGET_MINIMAL_TOC
)
5099 fputs (TARGET_32BIT
? "\t.long " : "\t.llong ", file
);
5102 fprintf (file
, "\t.tc %s", real_name
);
5105 fprintf (file
, ".N%d", - offset
);
5107 fprintf (file
, ".P%d", offset
);
5109 fputs ("[TC],", file
);
5112 /* Currently C++ toc references to vtables can be emitted before it
5113 is decided whether the vtable is public or private. If this is
5114 the case, then the linker will eventually complain that there is
5115 a TOC reference to an unknown section. Thus, for vtables only,
5116 we emit the TOC reference to reference the symbol and not the
5118 if (!strncmp ("_vt.", name
, 4))
5120 RS6000_OUTPUT_BASENAME (file
, name
);
5122 fprintf (file
, "%d", offset
);
5123 else if (offset
> 0)
5124 fprintf (file
, "+%d", offset
);
5127 output_addr_const (file
, x
);
5131 /* Output an assembler pseudo-op to write an ASCII string of N characters
5132 starting at P to FILE.
5134 On the RS/6000, we have to do this using the .byte operation and
5135 write out special characters outside the quoted string.
5136 Also, the assembler is broken; very long strings are truncated,
5137 so we must artificially break them up early. */
5140 output_ascii (file
, p
, n
)
5146 int i
, count_string
;
5147 const char *for_string
= "\t.byte \"";
5148 const char *for_decimal
= "\t.byte ";
5149 const char *to_close
= NULL
;
5152 for (i
= 0; i
< n
; i
++)
5155 if (c
>= ' ' && c
< 0177)
5158 fputs (for_string
, file
);
5161 /* Write two quotes to get one. */
5169 for_decimal
= "\"\n\t.byte ";
5173 if (count_string
>= 512)
5175 fputs (to_close
, file
);
5177 for_string
= "\t.byte \"";
5178 for_decimal
= "\t.byte ";
5186 fputs (for_decimal
, file
);
5187 fprintf (file
, "%d", c
);
5189 for_string
= "\n\t.byte \"";
5196 /* Now close the string if we have written one. Then end the line. */
5198 fprintf (file
, to_close
);
5201 /* Generate a unique section name for FILENAME for a section type
5202 represented by SECTION_DESC. Output goes into BUF.
5204 SECTION_DESC can be any string, as long as it is different for each
5205 possible section type.
5207 We name the section in the same manner as xlc. The name begins with an
5208 underscore followed by the filename (after stripping any leading directory
5209 names) with the last period replaced by the string SECTION_DESC. If
5210 FILENAME does not contain a period, SECTION_DESC is appended to the end of
5214 rs6000_gen_section_name (buf
, filename
, section_desc
)
5219 char *q
, *after_last_slash
, *last_period
= 0;
5223 after_last_slash
= filename
;
5224 for (q
= filename
; *q
; q
++)
5227 after_last_slash
= q
+ 1;
5232 len
= strlen (after_last_slash
) + strlen (section_desc
) + 2;
5233 *buf
= (char *) permalloc (len
);
5238 for (q
= after_last_slash
; *q
; q
++)
5240 if (q
== last_period
)
5242 strcpy (p
, section_desc
);
5243 p
+= strlen (section_desc
);
5246 else if (ISALNUM (*q
))
5250 if (last_period
== 0)
5251 strcpy (p
, section_desc
);
5256 /* Write function profiler code. */
5259 output_function_profiler (file
, labelno
)
5263 /* The last used parameter register. */
5268 ASM_GENERATE_INTERNAL_LABEL (buf
, "LP", labelno
);
5269 switch (DEFAULT_ABI
)
5276 case ABI_AIX_NODESC
:
5277 fprintf (file
, "\tmflr %s\n", reg_names
[0]);
5280 fputs ("\tbl _GLOBAL_OFFSET_TABLE_@local-4\n", file
);
5281 asm_fprintf (file
, "\t{st|stw} %s,4(%s)\n",
5282 reg_names
[0], reg_names
[1]);
5283 asm_fprintf (file
, "\tmflr %s\n", reg_names
[12]);
5284 asm_fprintf (file
, "\t{l|lwz} %s,", reg_names
[0]);
5285 assemble_name (file
, buf
);
5286 asm_fprintf (file
, "@got(%s)\n", reg_names
[12]);
5289 else if (flag_pic
> 1 || TARGET_RELOCATABLE
)
5291 asm_fprintf (file
, "\t{st|stw} %s,4(%s)\n",
5292 reg_names
[0], reg_names
[1]);
5293 rs6000_pic_func_labelno
= rs6000_pic_labelno
;
5294 rs6000_output_load_toc_table (file
, 12);
5295 asm_fprintf (file
, "\t{l|lwz} %s,", reg_names
[12]);
5296 assemble_name (file
, buf
);
5297 asm_fprintf (file
, "X(%s)\n", reg_names
[12]);
5298 asm_fprintf (file
, "%s\n", MINIMAL_TOC_SECTION_ASM_OP
);
5299 assemble_name (file
, buf
);
5300 fputs ("X = .-.LCTOC1\n", file
);
5301 fputs ("\t.long ", file
);
5302 assemble_name (file
, buf
);
5303 fputs ("\n\t.previous\n", file
);
5308 asm_fprintf (file
, "\t{liu|lis} %s,", reg_names
[12]);
5309 assemble_name (file
, buf
);
5310 fputs ("@ha\n", file
);
5311 asm_fprintf (file
, "\t{st|stw} %s,4(%s)\n",
5312 reg_names
[0], reg_names
[1]);
5313 asm_fprintf (file
, "\t{cal|la} %s,", reg_names
[0]);
5314 assemble_name (file
, buf
);
5315 asm_fprintf (file
, "@l(%s)\n", reg_names
[12]);
5318 if (current_function_needs_context
)
5319 asm_fprintf (file
, "\tmr %s,%s\n",
5320 reg_names
[30], reg_names
[STATIC_CHAIN_REGNUM
]);
5321 fprintf (file
, "\tbl %s\n", RS6000_MCOUNT
);
5322 if (current_function_needs_context
)
5323 asm_fprintf (file
, "\tmr %s,%s\n",
5324 reg_names
[STATIC_CHAIN_REGNUM
], reg_names
[30]);
5328 /* Set up a TOC entry for the profiler label. */
5330 ASM_OUTPUT_INTERNAL_LABEL (file
, "LPC", labelno
);
5331 if (TARGET_MINIMAL_TOC
)
5333 fputs (TARGET_32BIT
? "\t.long " : "\t.llong ", file
);
5334 assemble_name (file
, buf
);
5339 fputs ("\t.tc\t", file
);
5340 assemble_name (file
, buf
);
5341 fputs ("[TC],", file
);
5342 assemble_name (file
, buf
);
5347 /* Figure out last used parameter register. The proper thing to do is
5348 to walk incoming args of the function. A function might have live
5349 parameter registers even if it has no incoming args. */
5351 for (last_parm_reg
= 10;
5352 last_parm_reg
> 2 && ! regs_ever_live
[last_parm_reg
];
5356 /* Save parameter registers in regs 23-30 and static chain in r22.
5357 Don't overwrite reg 31, since it might be set up as the frame pointer. */
5359 for (i
= 3, j
= 30; i
<= last_parm_reg
; i
++, j
--)
5360 asm_fprintf (file
, "\tmr %d,%d\n", j
, i
);
5361 if (current_function_needs_context
)
5362 asm_fprintf (file
, "\tmr %d,%d\n", j
, STATIC_CHAIN_REGNUM
);
5364 /* Load location address into r3, and call mcount. */
5366 ASM_GENERATE_INTERNAL_LABEL (buf
, "LPC", labelno
);
5367 asm_fprintf (file
, TARGET_32BIT
? "\t{l|lwz} %s," : "\tld %s,",
5369 assemble_name (file
, buf
);
5370 asm_fprintf (file
, "(%s)\n\tbl %s\n\t", reg_names
[2], RS6000_MCOUNT
);
5371 asm_fprintf (file
, RS6000_CALL_GLUE
);
5374 /* Restore parameter registers and static chain. */
5376 for (i
= 3, j
= 30; i
<= last_parm_reg
; i
++, j
--)
5377 asm_fprintf (file
, "\tmr %d,%d\n", i
, j
);
5378 if (current_function_needs_context
)
5379 asm_fprintf (file
, "\tmr %d,%d\n", STATIC_CHAIN_REGNUM
, j
);
5385 /* Adjust the cost of a scheduling dependency. Return the new cost of
5386 a dependency LINK or INSN on DEP_INSN. COST is the current cost. */
5389 rs6000_adjust_cost (insn
, link
, dep_insn
, cost
)
5392 rtx dep_insn ATTRIBUTE_UNUSED
;
5395 if (! recog_memoized (insn
))
5398 if (REG_NOTE_KIND (link
) != 0)
5401 if (REG_NOTE_KIND (link
) == 0)
5403 /* Data dependency; DEP_INSN writes a register that INSN reads some
5406 /* Tell the first scheduling pass about the latency between a mtctr
5407 and bctr (and mtlr and br/blr). The first scheduling pass will not
5408 know about this latency since the mtctr instruction, which has the
5409 latency associated to it, will be generated by reload. */
5410 if (get_attr_type (insn
) == TYPE_JMPREG
)
5411 return TARGET_POWER
? 5 : 4;
5413 /* Fall out to return default cost. */
5419 /* A C statement (sans semicolon) to update the integer scheduling priority
5420 INSN_PRIORITY (INSN). Reduce the priority to execute the INSN earlier,
5421 increase the priority to execute INSN later. Do not define this macro if
5422 you do not need to adjust the scheduling priorities of insns. */
5425 rs6000_adjust_priority (insn
, priority
)
5426 rtx insn ATTRIBUTE_UNUSED
;
5429 /* On machines (like the 750) which have asymetric integer units, where one
5430 integer unit can do multiply and divides and the other can't, reduce the
5431 priority of multiply/divide so it is scheduled before other integer
5435 if (GET_RTX_CLASS (GET_CODE (insn
)) != 'i')
5438 if (GET_CODE (PATTERN (insn
)) == USE
)
5441 switch (rs6000_cpu_attr
) {
5443 switch (get_attr_type (insn
))
5450 fprintf (stderr
, "priority was %#x (%d) before adjustment\n",
5451 priority
, priority
);
5452 if (priority
>= 0 && priority
< 0x01000000)
5462 /* Return how many instructions the machine can issue per cycle */
5463 int get_issue_rate()
5465 switch (rs6000_cpu_attr
) {
5466 case CPU_RIOS1
: /* ? */
5468 case CPU_PPC601
: /* ? */
5485 /* Output assembler code for a block containing the constant parts
5486 of a trampoline, leaving space for the variable parts.
5488 The trampoline should set the static chain pointer to value placed
5489 into the trampoline and should branch to the specified routine. */
5492 rs6000_trampoline_template (file
)
5495 const char *sc
= reg_names
[STATIC_CHAIN_REGNUM
];
5496 const char *r0
= reg_names
[0];
5497 const char *r2
= reg_names
[2];
5499 switch (DEFAULT_ABI
)
5504 /* Under AIX, this is not code at all, but merely a data area,
5505 since that is the way all functions are called. The first word is
5506 the address of the function, the second word is the TOC pointer (r2),
5507 and the third word is the static chain value. */
5512 /* V.4/eabi function pointers are just a single pointer, so we need to
5513 do the full gory code to load up the static chain. */
5516 case ABI_AIX_NODESC
:
5519 /* NT function pointers point to a two word area (real address, TOC)
5520 which unfortunately does not include a static chain field. So we
5521 use the function field to point to ..LTRAMP1 and the toc field
5522 to point to the whole table. */
5524 if (STATIC_CHAIN_REGNUM
== 0
5525 || STATIC_CHAIN_REGNUM
== 2
5527 || !TARGET_NEW_MNEMONICS
)
5530 fprintf (file
, "\t.ualong 0\n"); /* offset 0 */
5531 fprintf (file
, "\t.ualong 0\n"); /* offset 4 */
5532 fprintf (file
, "\t.ualong 0\n"); /* offset 8 */
5533 fprintf (file
, "\t.ualong 0\n"); /* offset 12 */
5534 fprintf (file
, "\t.ualong 0\n"); /* offset 16 */
5535 fprintf (file
, "..LTRAMP1..0:\n"); /* offset 20 */
5536 fprintf (file
, "\tlwz %s,8(%s)\n", r0
, r2
); /* offset 24 */
5537 fprintf (file
, "\tlwz %s,12(%s)\n", sc
, r2
); /* offset 28 */
5538 fprintf (file
, "\tmtctr %s\n", r0
); /* offset 32 */
5539 fprintf (file
, "\tlwz %s,16(%s)\n", r2
, r2
); /* offset 36 */
5540 fprintf (file
, "\tbctr\n"); /* offset 40 */
5547 /* Length in units of the trampoline for entering a nested function. */
5550 rs6000_trampoline_size ()
5554 switch (DEFAULT_ABI
)
5560 ret
= (TARGET_32BIT
) ? 12 : 24;
5565 case ABI_AIX_NODESC
:
5566 ret
= (TARGET_32BIT
) ? 40 : 48;
5577 /* Emit RTL insns to initialize the variable parts of a trampoline.
5578 FNADDR is an RTX for the address of the function's pure code.
5579 CXT is an RTX for the static chain value for the function. */
5582 rs6000_initialize_trampoline (addr
, fnaddr
, cxt
)
5587 enum machine_mode pmode
= Pmode
;
5588 int regsize
= (TARGET_32BIT
) ? 4 : 8;
5589 rtx ctx_reg
= force_reg (pmode
, cxt
);
5591 switch (DEFAULT_ABI
)
5596 /* Macros to shorten the code expansions below. */
5597 #define MEM_DEREF(addr) gen_rtx_MEM (pmode, memory_address (pmode, addr))
5598 #define MEM_PLUS(addr,offset) \
5599 gen_rtx_MEM (pmode, memory_address (pmode, plus_constant (addr, offset)))
5601 /* Under AIX, just build the 3 word function descriptor */
5604 rtx fn_reg
= gen_reg_rtx (pmode
);
5605 rtx toc_reg
= gen_reg_rtx (pmode
);
5606 emit_move_insn (fn_reg
, MEM_DEREF (fnaddr
));
5607 emit_move_insn (toc_reg
, MEM_PLUS (fnaddr
, 4));
5608 emit_move_insn (MEM_DEREF (addr
), fn_reg
);
5609 emit_move_insn (MEM_PLUS (addr
, regsize
), toc_reg
);
5610 emit_move_insn (MEM_PLUS (addr
, 2*regsize
), ctx_reg
);
5614 /* Under V.4/eabi, call __trampoline_setup to do the real work. */
5617 case ABI_AIX_NODESC
:
5618 emit_library_call (gen_rtx_SYMBOL_REF (SImode
, "__trampoline_setup"),
5621 GEN_INT (rs6000_trampoline_size ()), SImode
,
5626 /* Under NT, update the first word to point to the ..LTRAMP1..0 header,
5627 the second word will point to the whole trampoline, third-fifth words
5628 will then have the real address, static chain, and toc value. */
5631 rtx tramp_reg
= gen_reg_rtx (pmode
);
5632 rtx fn_reg
= gen_reg_rtx (pmode
);
5633 rtx toc_reg
= gen_reg_rtx (pmode
);
5635 emit_move_insn (tramp_reg
, gen_rtx_SYMBOL_REF (pmode
, "..LTRAMP1..0"));
5636 addr
= force_reg (pmode
, addr
);
5637 emit_move_insn (fn_reg
, MEM_DEREF (fnaddr
));
5638 emit_move_insn (toc_reg
, MEM_PLUS (fnaddr
, regsize
));
5639 emit_move_insn (MEM_DEREF (addr
), tramp_reg
);
5640 emit_move_insn (MEM_PLUS (addr
, regsize
), addr
);
5641 emit_move_insn (MEM_PLUS (addr
, 2*regsize
), fn_reg
);
5642 emit_move_insn (MEM_PLUS (addr
, 3*regsize
), ctx_reg
);
5643 emit_move_insn (MEM_PLUS (addr
, 4*regsize
), gen_rtx_REG (pmode
, 2));
5652 /* If defined, a C expression whose value is nonzero if IDENTIFIER
5653 with arguments ARGS is a valid machine specific attribute for DECL.
5654 The attributes in ATTRIBUTES have previously been assigned to DECL. */
5657 rs6000_valid_decl_attribute_p (decl
, attributes
, identifier
, args
)
5658 tree decl ATTRIBUTE_UNUSED
;
5659 tree attributes ATTRIBUTE_UNUSED
;
5660 tree identifier ATTRIBUTE_UNUSED
;
5661 tree args ATTRIBUTE_UNUSED
;
5666 /* If defined, a C expression whose value is nonzero if IDENTIFIER
5667 with arguments ARGS is a valid machine specific attribute for TYPE.
5668 The attributes in ATTRIBUTES have previously been assigned to TYPE. */
5671 rs6000_valid_type_attribute_p (type
, attributes
, identifier
, args
)
5673 tree attributes ATTRIBUTE_UNUSED
;
5677 if (TREE_CODE (type
) != FUNCTION_TYPE
5678 && TREE_CODE (type
) != FIELD_DECL
5679 && TREE_CODE (type
) != TYPE_DECL
)
5682 /* Longcall attribute says that the function is not within 2**26 bytes
5683 of the current function, and to do an indirect call. */
5684 if (is_attribute_p ("longcall", identifier
))
5685 return (args
== NULL_TREE
);
5687 if (DEFAULT_ABI
== ABI_NT
)
5689 /* Stdcall attribute says callee is responsible for popping arguments
5690 if they are not variable. */
5691 if (is_attribute_p ("stdcall", identifier
))
5692 return (args
== NULL_TREE
);
5694 /* Cdecl attribute says the callee is a normal C declaration */
5695 if (is_attribute_p ("cdecl", identifier
))
5696 return (args
== NULL_TREE
);
5698 /* Dllimport attribute says the caller is to call the function
5699 indirectly through a __imp_<name> pointer. */
5700 if (is_attribute_p ("dllimport", identifier
))
5701 return (args
== NULL_TREE
);
5703 /* Dllexport attribute says the callee is to create a __imp_<name>
5705 if (is_attribute_p ("dllexport", identifier
))
5706 return (args
== NULL_TREE
);
5708 /* Exception attribute allows the user to specify 1-2 strings
5709 or identifiers that will fill in the 3rd and 4th fields
5710 of the structured exception table. */
5711 if (is_attribute_p ("exception", identifier
))
5715 if (args
== NULL_TREE
)
5718 for (i
= 0; i
< 2 && args
!= NULL_TREE
; i
++)
5720 tree this_arg
= TREE_VALUE (args
);
5721 args
= TREE_PURPOSE (args
);
5723 if (TREE_CODE (this_arg
) != STRING_CST
5724 && TREE_CODE (this_arg
) != IDENTIFIER_NODE
)
5728 return (args
== NULL_TREE
);
5735 /* If defined, a C expression whose value is zero if the attributes on
5736 TYPE1 and TYPE2 are incompatible, one if they are compatible, and
5737 two if they are nearly compatible (which causes a warning to be
5741 rs6000_comp_type_attributes (type1
, type2
)
5742 tree type1 ATTRIBUTE_UNUSED
;
5743 tree type2 ATTRIBUTE_UNUSED
;
5748 /* If defined, a C statement that assigns default attributes to newly
5752 rs6000_set_default_type_attributes (type
)
5753 tree type ATTRIBUTE_UNUSED
;
5758 /* Return a dll import reference corresponding to a call's SYMBOL_REF */
5760 rs6000_dll_import_ref (call_ref
)
5763 const char *call_name
;
5769 if (GET_CODE (call_ref
) != SYMBOL_REF
)
5772 call_name
= XSTR (call_ref
, 0);
5773 len
= sizeof ("__imp_") + strlen (call_name
);
5775 reg2
= gen_reg_rtx (Pmode
);
5777 strcpy (p
, "__imp_");
5778 strcat (p
, call_name
);
5779 node
= get_identifier (p
);
5781 reg1
= force_reg (Pmode
, gen_rtx_SYMBOL_REF (VOIDmode
,
5782 IDENTIFIER_POINTER (node
)));
5783 emit_move_insn (reg2
, gen_rtx_MEM (Pmode
, reg1
));
5788 /* Return a reference suitable for calling a function with the
5789 longcall attribute. */
5791 rs6000_longcall_ref (call_ref
)
5794 const char *call_name
;
5797 if (GET_CODE (call_ref
) != SYMBOL_REF
)
5800 /* System V adds '.' to the internal name, so skip them. */
5801 call_name
= XSTR (call_ref
, 0);
5802 if (*call_name
== '.')
5804 while (*call_name
== '.')
5807 node
= get_identifier (call_name
);
5808 call_ref
= gen_rtx_SYMBOL_REF (VOIDmode
, IDENTIFIER_POINTER (node
));
5811 return force_reg (Pmode
, call_ref
);
5815 /* A C statement or statements to switch to the appropriate section
5816 for output of RTX in mode MODE. You can assume that RTX is some
5817 kind of constant in RTL. The argument MODE is redundant except in
5818 the case of a `const_int' rtx. Select the section by calling
5819 `text_section' or one of the alternatives for other sections.
5821 Do not define this macro if you put all constants in the read-only
5827 rs6000_select_rtx_section (mode
, x
)
5828 enum machine_mode mode ATTRIBUTE_UNUSED
;
5831 if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (x
))
5837 /* A C statement or statements to switch to the appropriate
5838 section for output of DECL. DECL is either a `VAR_DECL' node
5839 or a constant of some sort. RELOC indicates whether forming
5840 the initial value of DECL requires link-time relocations. */
5843 rs6000_select_section (decl
, reloc
)
5847 int size
= int_size_in_bytes (TREE_TYPE (decl
));
5849 if (TREE_CODE (decl
) == STRING_CST
)
5851 if (! flag_writable_strings
)
5856 else if (TREE_CODE (decl
) == VAR_DECL
)
5858 if ((flag_pic
&& reloc
)
5859 || ! TREE_READONLY (decl
)
5860 || TREE_SIDE_EFFECTS (decl
)
5861 || ! DECL_INITIAL (decl
)
5862 || (DECL_INITIAL (decl
) != error_mark_node
5863 && ! TREE_CONSTANT (DECL_INITIAL (decl
))))
5865 if (rs6000_sdata
!= SDATA_NONE
&& (size
> 0)
5866 && (size
<= g_switch_value
))
5873 if (rs6000_sdata
!= SDATA_NONE
&& (size
> 0)
5874 && (size
<= g_switch_value
))
5876 if (rs6000_sdata
== SDATA_EABI
)
5879 sdata_section (); /* System V doesn't have .sdata2/.sbss2 */
5890 /* If we are referencing a function that is static or is known to be
5891 in this file, make the SYMBOL_REF special. We can use this to indicate
5892 that we can branch to this function without emitting a no-op after the
5893 call. For real AIX and NT calling sequences, we also replace the
5894 function name with the real name (1 or 2 leading .'s), rather than
5895 the function descriptor name. This saves a lot of overriding code
5896 to read the prefixes. */
5899 rs6000_encode_section_info (decl
)
5902 if (TREE_CODE (decl
) == FUNCTION_DECL
)
5904 rtx sym_ref
= XEXP (DECL_RTL (decl
), 0);
5905 if ((TREE_ASM_WRITTEN (decl
) || ! TREE_PUBLIC (decl
))
5906 && !DECL_WEAK (decl
))
5907 SYMBOL_REF_FLAG (sym_ref
) = 1;
5909 if (DEFAULT_ABI
== ABI_AIX
|| DEFAULT_ABI
== ABI_NT
)
5911 const char *prefix
= (DEFAULT_ABI
== ABI_AIX
) ? "." : "..";
5912 char *str
= permalloc (strlen (prefix
) + 1
5913 + strlen (XSTR (sym_ref
, 0)));
5914 strcpy (str
, prefix
);
5915 strcat (str
, XSTR (sym_ref
, 0));
5916 XSTR (sym_ref
, 0) = str
;
5919 else if (rs6000_sdata
!= SDATA_NONE
5920 && (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
5921 && TREE_CODE (decl
) == VAR_DECL
)
5923 int size
= int_size_in_bytes (TREE_TYPE (decl
));
5924 tree section_name
= DECL_SECTION_NAME (decl
);
5925 const char *name
= (char *)0;
5930 if (TREE_CODE (section_name
) == STRING_CST
)
5932 name
= TREE_STRING_POINTER (section_name
);
5933 len
= TREE_STRING_LENGTH (section_name
);
5939 if ((size
> 0 && size
<= g_switch_value
)
5941 && ((len
== sizeof (".sdata") - 1
5942 && strcmp (name
, ".sdata") == 0)
5943 || (len
== sizeof (".sdata2") - 1
5944 && strcmp (name
, ".sdata2") == 0)
5945 || (len
== sizeof (".sbss") - 1
5946 && strcmp (name
, ".sbss") == 0)
5947 || (len
== sizeof (".sbss2") - 1
5948 && strcmp (name
, ".sbss2") == 0)
5949 || (len
== sizeof (".PPC.EMB.sdata0") - 1
5950 && strcmp (name
, ".PPC.EMB.sdata0") == 0)
5951 || (len
== sizeof (".PPC.EMB.sbss0") - 1
5952 && strcmp (name
, ".PPC.EMB.sbss0") == 0))))
5954 rtx sym_ref
= XEXP (DECL_RTL (decl
), 0);
5955 char *str
= permalloc (2 + strlen (XSTR (sym_ref
, 0)));
5957 strcat (str
, XSTR (sym_ref
, 0));
5958 XSTR (sym_ref
, 0) = str
;
5963 #endif /* USING_SVR4_H */
5966 /* Return a REG that occurs in ADDR with coefficient 1.
5967 ADDR can be effectively incremented by incrementing REG.
5969 r0 is special and we must not select it as an address
5970 register by this routine since our caller will try to
5971 increment the returned register via an "la" instruction. */
5974 find_addr_reg (addr
)
5977 while (GET_CODE (addr
) == PLUS
)
5979 if (GET_CODE (XEXP (addr
, 0)) == REG
5980 && REGNO (XEXP (addr
, 0)) != 0)
5981 addr
= XEXP (addr
, 0);
5982 else if (GET_CODE (XEXP (addr
, 1)) == REG
5983 && REGNO (XEXP (addr
, 1)) != 0)
5984 addr
= XEXP (addr
, 1);
5985 else if (CONSTANT_P (XEXP (addr
, 0)))
5986 addr
= XEXP (addr
, 1);
5987 else if (CONSTANT_P (XEXP (addr
, 1)))
5988 addr
= XEXP (addr
, 0);
5992 if (GET_CODE (addr
) == REG
&& REGNO (addr
) != 0)
5998 rs6000_fatal_bad_address (op
)
6001 fatal_insn ("bad address", op
);