1 /* Subroutines used for code generation on IBM RS/6000.
2 Copyright (C) 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001 Free Software Foundation, Inc.
4 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
6 This file is part of GNU CC.
8 GNU CC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GNU CC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GNU CC; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
27 #include "hard-reg-set.h"
29 #include "insn-config.h"
30 #include "conditions.h"
31 #include "insn-attr.h"
40 #include "basic-block.h"
46 #include "target-def.h"
48 #ifndef TARGET_NO_PROTOTYPE
49 #define TARGET_NO_PROTOTYPE 0
52 extern int profile_block_flag
;
54 #define min(A,B) ((A) < (B) ? (A) : (B))
55 #define max(A,B) ((A) > (B) ? (A) : (B))
59 enum processor_type rs6000_cpu
;
60 struct rs6000_cpu_select rs6000_select
[3] =
62 /* switch name, tune arch */
63 { (const char *)0, "--with-cpu=", 1, 1 },
64 { (const char *)0, "-mcpu=", 1, 1 },
65 { (const char *)0, "-mtune=", 1, 0 },
68 /* Set to non-zero once AIX common-mode calls have been defined. */
69 static int common_mode_defined
;
71 /* Save information from a "cmpxx" operation until the branch or scc is
73 rtx rs6000_compare_op0
, rs6000_compare_op1
;
74 int rs6000_compare_fp_p
;
76 /* Label number of label created for -mrelocatable, to call to so we can
77 get the address of the GOT section */
78 int rs6000_pic_labelno
;
81 /* Which abi to adhere to */
82 const char *rs6000_abi_name
= RS6000_ABI_NAME
;
84 /* Semantics of the small data area */
85 enum rs6000_sdata_type rs6000_sdata
= SDATA_DATA
;
87 /* Which small data model to use */
88 const char *rs6000_sdata_name
= (char *)0;
90 /* Counter for labels which are to be placed in .fixup. */
94 /* ABI enumeration available for subtarget to use. */
95 enum rs6000_abi rs6000_current_abi
;
98 const char *rs6000_debug_name
;
99 int rs6000_debug_stack
; /* debug stack applications */
100 int rs6000_debug_arg
; /* debug argument handling */
102 /* Flag to say the TOC is initialized */
104 char toc_label_name
[10];
106 /* Alias set for saves and restores from the rs6000 stack. */
107 static int rs6000_sr_alias_set
;
109 static void rs6000_add_gc_roots
PARAMS ((void));
110 static int num_insns_constant_wide
PARAMS ((HOST_WIDE_INT
));
111 static rtx expand_block_move_mem
PARAMS ((enum machine_mode
, rtx
, rtx
));
112 static void validate_condition_mode
113 PARAMS ((enum rtx_code
, enum machine_mode
));
114 static rtx rs6000_generate_compare
PARAMS ((enum rtx_code
));
115 static void rs6000_maybe_dead
PARAMS ((rtx
));
116 static void rs6000_emit_stack_tie
PARAMS ((void));
117 static void rs6000_frame_related
PARAMS ((rtx
, rtx
, HOST_WIDE_INT
, rtx
, rtx
));
118 static void rs6000_emit_allocate_stack
PARAMS ((HOST_WIDE_INT
, int));
119 static unsigned rs6000_hash_constant
PARAMS ((rtx
));
120 static unsigned toc_hash_function
PARAMS ((const void *));
121 static int toc_hash_eq
PARAMS ((const void *, const void *));
122 static int toc_hash_mark_entry
PARAMS ((void **, void *));
123 static void toc_hash_mark_table
PARAMS ((void *));
124 static int constant_pool_expr_1
PARAMS ((rtx
, int *, int *));
125 static void rs6000_free_machine_status
PARAMS ((struct function
*));
126 static void rs6000_init_machine_status
PARAMS ((struct function
*));
127 static int rs6000_ra_ever_killed
PARAMS ((void));
128 static int rs6000_valid_type_attribute_p
PARAMS ((tree
, tree
, tree
, tree
));
130 /* Default register names. */
131 char rs6000_reg_names
[][8] =
133 "0", "1", "2", "3", "4", "5", "6", "7",
134 "8", "9", "10", "11", "12", "13", "14", "15",
135 "16", "17", "18", "19", "20", "21", "22", "23",
136 "24", "25", "26", "27", "28", "29", "30", "31",
137 "0", "1", "2", "3", "4", "5", "6", "7",
138 "8", "9", "10", "11", "12", "13", "14", "15",
139 "16", "17", "18", "19", "20", "21", "22", "23",
140 "24", "25", "26", "27", "28", "29", "30", "31",
141 "mq", "lr", "ctr","ap",
142 "0", "1", "2", "3", "4", "5", "6", "7",
146 #ifdef TARGET_REGNAMES
147 static char alt_reg_names
[][8] =
149 "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7",
150 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15",
151 "%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23",
152 "%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31",
153 "%f0", "%f1", "%f2", "%f3", "%f4", "%f5", "%f6", "%f7",
154 "%f8", "%f9", "%f10", "%f11", "%f12", "%f13", "%f14", "%f15",
155 "%f16", "%f17", "%f18", "%f19", "%f20", "%f21", "%f22", "%f23",
156 "%f24", "%f25", "%f26", "%f27", "%f28", "%f29", "%f30", "%f31",
157 "mq", "lr", "ctr", "ap",
158 "%cr0", "%cr1", "%cr2", "%cr3", "%cr4", "%cr5", "%cr6", "%cr7",
163 #ifndef MASK_STRICT_ALIGN
164 #define MASK_STRICT_ALIGN 0
167 /* Initialize the GCC target structure. */
168 #undef TARGET_VALID_TYPE_ATTRIBUTE
169 #define TARGET_VALID_TYPE_ATTRIBUTE rs6000_valid_type_attribute_p
171 struct gcc_target target
= TARGET_INITIALIZER
;
173 /* Override command line options. Mostly we process the processor
174 type and sometimes adjust other TARGET_ options. */
177 rs6000_override_options (default_cpu
)
178 const char *default_cpu
;
181 struct rs6000_cpu_select
*ptr
;
183 /* Simplify the entries below by making a mask for any POWER
184 variant and any PowerPC variant. */
186 #define POWER_MASKS (MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING)
187 #define POWERPC_MASKS (MASK_POWERPC | MASK_PPC_GPOPT \
188 | MASK_PPC_GFXOPT | MASK_POWERPC64)
189 #define POWERPC_OPT_MASKS (MASK_PPC_GPOPT | MASK_PPC_GFXOPT)
193 const char *name
; /* Canonical processor name. */
194 enum processor_type processor
; /* Processor type enum value. */
195 int target_enable
; /* Target flags to enable. */
196 int target_disable
; /* Target flags to disable. */
197 } processor_target_table
[]
198 = {{"common", PROCESSOR_COMMON
, MASK_NEW_MNEMONICS
,
199 POWER_MASKS
| POWERPC_MASKS
},
200 {"power", PROCESSOR_POWER
,
201 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
202 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
203 {"power2", PROCESSOR_POWER
,
204 MASK_POWER
| MASK_POWER2
| MASK_MULTIPLE
| MASK_STRING
,
205 POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
206 {"power3", PROCESSOR_PPC630
,
207 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
208 POWER_MASKS
| MASK_PPC_GPOPT
},
209 {"powerpc", PROCESSOR_POWERPC
,
210 MASK_POWERPC
| MASK_NEW_MNEMONICS
,
211 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
212 {"powerpc64", PROCESSOR_POWERPC64
,
213 MASK_POWERPC
| MASK_POWERPC64
| MASK_NEW_MNEMONICS
,
214 POWER_MASKS
| POWERPC_OPT_MASKS
},
215 {"rios", PROCESSOR_RIOS1
,
216 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
217 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
218 {"rios1", PROCESSOR_RIOS1
,
219 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
220 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
221 {"rsc", PROCESSOR_PPC601
,
222 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
223 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
224 {"rsc1", PROCESSOR_PPC601
,
225 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
226 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
227 {"rios2", PROCESSOR_RIOS2
,
228 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
| MASK_POWER2
,
229 POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
230 {"rs64a", PROCESSOR_RS64A
,
231 MASK_POWERPC
| MASK_NEW_MNEMONICS
,
232 POWER_MASKS
| POWERPC_OPT_MASKS
},
233 {"401", PROCESSOR_PPC403
,
234 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
235 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
236 {"403", PROCESSOR_PPC403
,
237 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
| MASK_STRICT_ALIGN
,
238 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
239 {"505", PROCESSOR_MPCCORE
,
240 MASK_POWERPC
| MASK_NEW_MNEMONICS
,
241 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
242 {"601", PROCESSOR_PPC601
,
243 MASK_POWER
| MASK_POWERPC
| MASK_NEW_MNEMONICS
| MASK_MULTIPLE
| MASK_STRING
,
244 MASK_POWER2
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
245 {"602", PROCESSOR_PPC603
,
246 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
247 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
248 {"603", PROCESSOR_PPC603
,
249 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
250 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
251 {"603e", PROCESSOR_PPC603
,
252 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
253 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
254 {"ec603e", PROCESSOR_PPC603
,
255 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
256 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
257 {"604", PROCESSOR_PPC604
,
258 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
259 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
260 {"604e", PROCESSOR_PPC604e
,
261 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
262 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
263 {"620", PROCESSOR_PPC620
,
264 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
265 POWER_MASKS
| MASK_PPC_GPOPT
},
266 {"630", PROCESSOR_PPC630
,
267 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
268 POWER_MASKS
| MASK_PPC_GPOPT
},
269 {"740", PROCESSOR_PPC750
,
270 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
271 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
272 {"750", PROCESSOR_PPC750
,
273 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
274 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
275 {"801", PROCESSOR_MPCCORE
,
276 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
277 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
278 {"821", PROCESSOR_MPCCORE
,
279 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
280 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
281 {"823", PROCESSOR_MPCCORE
,
282 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
283 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
284 {"860", PROCESSOR_MPCCORE
,
285 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
286 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
}};
288 size_t ptt_size
= sizeof (processor_target_table
) / sizeof (struct ptt
);
290 int multiple
= TARGET_MULTIPLE
; /* save current -mmultiple/-mno-multiple status */
291 int string
= TARGET_STRING
; /* save current -mstring/-mno-string status */
293 profile_block_flag
= 0;
295 /* Identify the processor type */
296 rs6000_select
[0].string
= default_cpu
;
297 rs6000_cpu
= TARGET_POWERPC64
? PROCESSOR_DEFAULT64
: PROCESSOR_DEFAULT
;
299 for (i
= 0; i
< ARRAY_SIZE (rs6000_select
); i
++)
301 ptr
= &rs6000_select
[i
];
302 if (ptr
->string
!= (char *)0 && ptr
->string
[0] != '\0')
304 for (j
= 0; j
< ptt_size
; j
++)
305 if (! strcmp (ptr
->string
, processor_target_table
[j
].name
))
308 rs6000_cpu
= processor_target_table
[j
].processor
;
312 target_flags
|= processor_target_table
[j
].target_enable
;
313 target_flags
&= ~processor_target_table
[j
].target_disable
;
319 error ("bad value (%s) for %s switch", ptr
->string
, ptr
->name
);
323 /* If we are optimizing big endian systems for space, use the
324 store multiple instructions. */
325 if (BYTES_BIG_ENDIAN
&& optimize_size
)
326 target_flags
|= MASK_MULTIPLE
;
328 /* If -mmultiple or -mno-multiple was explicitly used, don't
329 override with the processor default */
330 if (TARGET_MULTIPLE_SET
)
331 target_flags
= (target_flags
& ~MASK_MULTIPLE
) | multiple
;
333 /* If -mstring or -mno-string was explicitly used, don't
334 override with the processor default */
335 if (TARGET_STRING_SET
)
336 target_flags
= (target_flags
& ~MASK_STRING
) | string
;
338 /* Don't allow -mmultiple or -mstring on little endian systems unless the cpu
339 is a 750, because the hardware doesn't support the instructions used in
340 little endian mode, and causes an alignment trap. The 750 does not cause
341 an alignment trap (except when the target is unaligned). */
343 if (! BYTES_BIG_ENDIAN
&& rs6000_cpu
!= PROCESSOR_PPC750
)
347 target_flags
&= ~MASK_MULTIPLE
;
348 if (TARGET_MULTIPLE_SET
)
349 warning ("-mmultiple is not supported on little endian systems");
354 target_flags
&= ~MASK_STRING
;
355 if (TARGET_STRING_SET
)
356 warning ("-mstring is not supported on little endian systems");
360 if (flag_pic
&& (DEFAULT_ABI
== ABI_AIX
))
362 warning ("-f%s ignored for AIX (all code is position independent)",
363 (flag_pic
> 1) ? "PIC" : "pic");
367 if (flag_function_sections
&& (write_symbols
!= NO_DEBUG
)
368 && (DEFAULT_ABI
== ABI_AIX
))
370 warning ("-ffunction-sections disabled on AIX when debugging");
371 flag_function_sections
= 0;
374 if (flag_data_sections
&& (DEFAULT_ABI
== ABI_AIX
))
376 warning ("-fdata-sections not supported on AIX");
377 flag_data_sections
= 0;
380 /* Set debug flags */
381 if (rs6000_debug_name
)
383 if (! strcmp (rs6000_debug_name
, "all"))
384 rs6000_debug_stack
= rs6000_debug_arg
= 1;
385 else if (! strcmp (rs6000_debug_name
, "stack"))
386 rs6000_debug_stack
= 1;
387 else if (! strcmp (rs6000_debug_name
, "arg"))
388 rs6000_debug_arg
= 1;
390 error ("Unknown -mdebug-%s switch", rs6000_debug_name
);
393 #ifdef TARGET_REGNAMES
394 /* If the user desires alternate register names, copy in the alternate names
397 memcpy (rs6000_reg_names
, alt_reg_names
, sizeof (rs6000_reg_names
));
400 #ifdef SUBTARGET_OVERRIDE_OPTIONS
401 SUBTARGET_OVERRIDE_OPTIONS
;
404 /* Register global variables with the garbage collector. */
405 rs6000_add_gc_roots ();
407 /* Allocate an alias set for register saves & restores from stack. */
408 rs6000_sr_alias_set
= new_alias_set ();
411 ASM_GENERATE_INTERNAL_LABEL (toc_label_name
, "LCTOC", 1);
413 /* Arrange to save and restore machine status around nested functions. */
414 init_machine_status
= rs6000_init_machine_status
;
415 free_machine_status
= rs6000_free_machine_status
;
419 optimization_options (level
, size
)
420 int level ATTRIBUTE_UNUSED
;
421 int size ATTRIBUTE_UNUSED
;
425 /* Do anything needed at the start of the asm file. */
428 rs6000_file_start (file
, default_cpu
)
430 const char *default_cpu
;
434 const char *start
= buffer
;
435 struct rs6000_cpu_select
*ptr
;
437 if (flag_verbose_asm
)
439 sprintf (buffer
, "\n%s rs6000/powerpc options:", ASM_COMMENT_START
);
440 rs6000_select
[0].string
= default_cpu
;
442 for (i
= 0; i
< ARRAY_SIZE (rs6000_select
); i
++)
444 ptr
= &rs6000_select
[i
];
445 if (ptr
->string
!= (char *)0 && ptr
->string
[0] != '\0')
447 fprintf (file
, "%s %s%s", start
, ptr
->name
, ptr
->string
);
453 switch (rs6000_sdata
)
455 case SDATA_NONE
: fprintf (file
, "%s -msdata=none", start
); start
= ""; break;
456 case SDATA_DATA
: fprintf (file
, "%s -msdata=data", start
); start
= ""; break;
457 case SDATA_SYSV
: fprintf (file
, "%s -msdata=sysv", start
); start
= ""; break;
458 case SDATA_EABI
: fprintf (file
, "%s -msdata=eabi", start
); start
= ""; break;
461 if (rs6000_sdata
&& g_switch_value
)
463 fprintf (file
, "%s -G %d", start
, g_switch_value
);
474 /* Create a CONST_DOUBLE from a string. */
477 rs6000_float_const (string
, mode
)
479 enum machine_mode mode
;
481 REAL_VALUE_TYPE value
;
482 value
= REAL_VALUE_ATOF (string
, mode
);
483 return immed_real_const_1 (value
, mode
);
486 /* Return non-zero if this function is known to have a null epilogue. */
491 if (reload_completed
)
493 rs6000_stack_t
*info
= rs6000_stack_info ();
495 if (info
->first_gp_reg_save
== 32
496 && info
->first_fp_reg_save
== 64
506 /* Returns 1 always. */
509 any_operand (op
, mode
)
510 register rtx op ATTRIBUTE_UNUSED
;
511 enum machine_mode mode ATTRIBUTE_UNUSED
;
516 /* Returns 1 if op is the count register */
518 count_register_operand(op
, mode
)
520 enum machine_mode mode ATTRIBUTE_UNUSED
;
522 if (GET_CODE (op
) != REG
)
525 if (REGNO (op
) == COUNT_REGISTER_REGNUM
)
528 if (REGNO (op
) > FIRST_PSEUDO_REGISTER
)
535 xer_operand(op
, mode
)
537 enum machine_mode mode ATTRIBUTE_UNUSED
;
539 if (GET_CODE (op
) != REG
)
542 if (XER_REGNO_P (REGNO (op
)))
548 /* Return 1 if OP is a constant that can fit in a D field. */
551 short_cint_operand (op
, mode
)
553 enum machine_mode mode ATTRIBUTE_UNUSED
;
555 return (GET_CODE (op
) == CONST_INT
556 && CONST_OK_FOR_LETTER_P (INTVAL (op
), 'I'));
559 /* Similar for a unsigned D field. */
562 u_short_cint_operand (op
, mode
)
564 enum machine_mode mode ATTRIBUTE_UNUSED
;
566 return (GET_CODE (op
) == CONST_INT
567 && CONST_OK_FOR_LETTER_P (INTVAL (op
), 'K'));
570 /* Return 1 if OP is a CONST_INT that cannot fit in a signed D field. */
573 non_short_cint_operand (op
, mode
)
575 enum machine_mode mode ATTRIBUTE_UNUSED
;
577 return (GET_CODE (op
) == CONST_INT
578 && (unsigned HOST_WIDE_INT
) (INTVAL (op
) + 0x8000) >= 0x10000);
581 /* Returns 1 if OP is a register that is not special (i.e., not MQ,
585 gpc_reg_operand (op
, mode
)
587 enum machine_mode mode
;
589 return (register_operand (op
, mode
)
590 && (GET_CODE (op
) != REG
591 || (REGNO (op
) >= ARG_POINTER_REGNUM
592 && !XER_REGNO_P (REGNO (op
)))
593 || REGNO (op
) < MQ_REGNO
));
596 /* Returns 1 if OP is either a pseudo-register or a register denoting a
600 cc_reg_operand (op
, mode
)
602 enum machine_mode mode
;
604 return (register_operand (op
, mode
)
605 && (GET_CODE (op
) != REG
606 || REGNO (op
) >= FIRST_PSEUDO_REGISTER
607 || CR_REGNO_P (REGNO (op
))));
610 /* Returns 1 if OP is either a pseudo-register or a register denoting a
611 CR field that isn't CR0. */
614 cc_reg_not_cr0_operand (op
, mode
)
616 enum machine_mode mode
;
618 return (register_operand (op
, mode
)
619 && (GET_CODE (op
) != REG
620 || REGNO (op
) >= FIRST_PSEUDO_REGISTER
621 || CR_REGNO_NOT_CR0_P (REGNO (op
))));
624 /* Returns 1 if OP is either a constant integer valid for a D-field or a
625 non-special register. If a register, it must be in the proper mode unless
629 reg_or_short_operand (op
, mode
)
631 enum machine_mode mode
;
633 return short_cint_operand (op
, mode
) || gpc_reg_operand (op
, mode
);
636 /* Similar, except check if the negation of the constant would be valid for
640 reg_or_neg_short_operand (op
, mode
)
642 enum machine_mode mode
;
644 if (GET_CODE (op
) == CONST_INT
)
645 return CONST_OK_FOR_LETTER_P (INTVAL (op
), 'P');
647 return gpc_reg_operand (op
, mode
);
650 /* Return 1 if the operand is either a register or an integer whose high-order
654 reg_or_u_short_operand (op
, mode
)
656 enum machine_mode mode
;
658 return u_short_cint_operand (op
, mode
) || gpc_reg_operand (op
, mode
);
661 /* Return 1 is the operand is either a non-special register or ANY
665 reg_or_cint_operand (op
, mode
)
667 enum machine_mode mode
;
669 return (GET_CODE (op
) == CONST_INT
|| gpc_reg_operand (op
, mode
));
672 /* Return 1 is the operand is either a non-special register or ANY
673 32-bit signed constant integer. */
676 reg_or_arith_cint_operand (op
, mode
)
678 enum machine_mode mode
;
680 return (gpc_reg_operand (op
, mode
)
681 || (GET_CODE (op
) == CONST_INT
682 #if HOST_BITS_PER_WIDE_INT != 32
683 && ((unsigned HOST_WIDE_INT
) (INTVAL (op
) + 0x80000000)
684 < (unsigned HOST_WIDE_INT
) 0x100000000ll
)
689 /* Return 1 is the operand is either a non-special register or ANY
690 32-bit unsigned constant integer. */
693 reg_or_logical_cint_operand (op
, mode
)
695 enum machine_mode mode
;
697 if (GET_CODE (op
) == CONST_INT
)
699 if (GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
)
701 if (GET_MODE_BITSIZE (mode
) <= 32)
708 return ((INTVAL (op
) & GET_MODE_MASK (mode
)
709 & (~ (unsigned HOST_WIDE_INT
) 0xffffffff)) == 0);
711 else if (GET_CODE (op
) == CONST_DOUBLE
)
713 if (GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
717 return CONST_DOUBLE_HIGH (op
) == 0;
720 return gpc_reg_operand (op
, mode
);
723 /* Return 1 if the operand is an operand that can be loaded via the GOT */
726 got_operand (op
, mode
)
728 enum machine_mode mode ATTRIBUTE_UNUSED
;
730 return (GET_CODE (op
) == SYMBOL_REF
731 || GET_CODE (op
) == CONST
732 || GET_CODE (op
) == LABEL_REF
);
735 /* Return 1 if the operand is a simple references that can be loaded via
736 the GOT (labels involving addition aren't allowed). */
739 got_no_const_operand (op
, mode
)
741 enum machine_mode mode ATTRIBUTE_UNUSED
;
743 return (GET_CODE (op
) == SYMBOL_REF
|| GET_CODE (op
) == LABEL_REF
);
746 /* Return the number of instructions it takes to form a constant in an
750 num_insns_constant_wide (value
)
753 /* signed constant loadable with {cal|addi} */
754 if (CONST_OK_FOR_LETTER_P (value
, 'I'))
757 /* constant loadable with {cau|addis} */
758 else if (CONST_OK_FOR_LETTER_P (value
, 'L'))
761 #if HOST_BITS_PER_WIDE_INT == 64
762 else if (TARGET_POWERPC64
)
764 HOST_WIDE_INT low
= value
& 0xffffffff;
765 HOST_WIDE_INT high
= value
>> 32;
767 low
= (low
^ 0x80000000) - 0x80000000; /* sign extend */
769 if (high
== 0 && (low
& 0x80000000) == 0)
772 else if (high
== -1 && (low
& 0x80000000) != 0)
776 return num_insns_constant_wide (high
) + 1;
779 return (num_insns_constant_wide (high
)
780 + num_insns_constant_wide (low
) + 1);
789 num_insns_constant (op
, mode
)
791 enum machine_mode mode
;
793 if (GET_CODE (op
) == CONST_INT
)
795 #if HOST_BITS_PER_WIDE_INT == 64
796 if (mask64_operand (op
, mode
))
800 return num_insns_constant_wide (INTVAL (op
));
803 else if (GET_CODE (op
) == CONST_DOUBLE
&& mode
== SFmode
)
808 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
809 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
810 return num_insns_constant_wide ((HOST_WIDE_INT
)l
);
813 else if (GET_CODE (op
) == CONST_DOUBLE
)
819 int endian
= (WORDS_BIG_ENDIAN
== 0);
821 if (mode
== VOIDmode
|| mode
== DImode
)
823 high
= CONST_DOUBLE_HIGH (op
);
824 low
= CONST_DOUBLE_LOW (op
);
828 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
829 REAL_VALUE_TO_TARGET_DOUBLE (rv
, l
);
835 return (num_insns_constant_wide (low
)
836 + num_insns_constant_wide (high
));
840 if (high
== 0 && (low
& 0x80000000) == 0)
841 return num_insns_constant_wide (low
);
843 else if (high
== -1 && (low
& 0x80000000) != 0)
844 return num_insns_constant_wide (low
);
846 else if (mask64_operand (op
, mode
))
850 return num_insns_constant_wide (high
) + 1;
853 return (num_insns_constant_wide (high
)
854 + num_insns_constant_wide (low
) + 1);
862 /* Return 1 if the operand is a CONST_DOUBLE and it can be put into a register
863 with one instruction per word. We only do this if we can safely read
864 CONST_DOUBLE_{LOW,HIGH}. */
867 easy_fp_constant (op
, mode
)
869 register enum machine_mode mode
;
871 if (GET_CODE (op
) != CONST_DOUBLE
872 || GET_MODE (op
) != mode
873 || (GET_MODE_CLASS (mode
) != MODE_FLOAT
&& mode
!= DImode
))
876 /* Consider all constants with -msoft-float to be easy */
877 if (TARGET_SOFT_FLOAT
&& mode
!= DImode
)
880 /* If we are using V.4 style PIC, consider all constants to be hard */
881 if (flag_pic
&& (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
))
884 #ifdef TARGET_RELOCATABLE
885 /* Similarly if we are using -mrelocatable, consider all constants to be hard */
886 if (TARGET_RELOCATABLE
)
895 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
896 REAL_VALUE_TO_TARGET_DOUBLE (rv
, k
);
898 return (num_insns_constant_wide ((HOST_WIDE_INT
)k
[0]) == 1
899 && num_insns_constant_wide ((HOST_WIDE_INT
)k
[1]) == 1);
902 else if (mode
== SFmode
)
907 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
908 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
910 return num_insns_constant_wide (l
) == 1;
913 else if (mode
== DImode
)
914 return ((TARGET_POWERPC64
915 && GET_CODE (op
) == CONST_DOUBLE
&& CONST_DOUBLE_LOW (op
) == 0)
916 || (num_insns_constant (op
, DImode
) <= 2));
918 else if (mode
== SImode
)
924 /* Return 1 if the operand is 0.0. */
926 zero_fp_constant (op
, mode
)
928 register enum machine_mode mode
;
930 return GET_MODE_CLASS (mode
) == MODE_FLOAT
&& op
== CONST0_RTX (mode
);
933 /* Return 1 if the operand is in volatile memory. Note that during the
934 RTL generation phase, memory_operand does not return TRUE for
935 volatile memory references. So this function allows us to
936 recognize volatile references where its safe. */
939 volatile_mem_operand (op
, mode
)
941 enum machine_mode mode
;
943 if (GET_CODE (op
) != MEM
)
946 if (!MEM_VOLATILE_P (op
))
949 if (mode
!= GET_MODE (op
))
952 if (reload_completed
)
953 return memory_operand (op
, mode
);
955 if (reload_in_progress
)
956 return strict_memory_address_p (mode
, XEXP (op
, 0));
958 return memory_address_p (mode
, XEXP (op
, 0));
961 /* Return 1 if the operand is an offsettable memory operand. */
964 offsettable_mem_operand (op
, mode
)
966 enum machine_mode mode
;
968 return ((GET_CODE (op
) == MEM
)
969 && offsettable_address_p (reload_completed
|| reload_in_progress
,
970 mode
, XEXP (op
, 0)));
973 /* Return 1 if the operand is either an easy FP constant (see above) or
977 mem_or_easy_const_operand (op
, mode
)
979 enum machine_mode mode
;
981 return memory_operand (op
, mode
) || easy_fp_constant (op
, mode
);
984 /* Return 1 if the operand is either a non-special register or an item
985 that can be used as the operand of a `mode' add insn. */
988 add_operand (op
, mode
)
990 enum machine_mode mode
;
992 return (reg_or_short_operand (op
, mode
)
993 || (GET_CODE (op
) == CONST_INT
994 && CONST_OK_FOR_LETTER_P (INTVAL (op
), 'L')));
997 /* Return 1 if OP is a constant but not a valid add_operand. */
1000 non_add_cint_operand (op
, mode
)
1002 enum machine_mode mode ATTRIBUTE_UNUSED
;
1004 return (GET_CODE (op
) == CONST_INT
1005 && (unsigned HOST_WIDE_INT
) (INTVAL (op
) + 0x8000) >= 0x10000
1006 && ! CONST_OK_FOR_LETTER_P (INTVAL (op
), 'L'));
1009 /* Return 1 if the operand is a non-special register or a constant that
1010 can be used as the operand of an OR or XOR insn on the RS/6000. */
1013 logical_operand (op
, mode
)
1015 enum machine_mode mode
;
1017 /* an unsigned representation of 'op'. */
1018 unsigned HOST_WIDE_INT opl
, oph
;
1020 if (gpc_reg_operand (op
, mode
))
1023 if (GET_CODE (op
) == CONST_INT
)
1025 else if (GET_CODE (op
) == CONST_DOUBLE
)
1027 if (GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
1030 opl
= CONST_DOUBLE_LOW (op
);
1031 oph
= CONST_DOUBLE_HIGH (op
);
1033 if (oph
!= ((unsigned HOST_WIDE_INT
)0
1034 - ((opl
& ((unsigned HOST_WIDE_INT
)1
1035 << (HOST_BITS_PER_WIDE_INT
- 1))) != 0)))
1041 /* This must really be SImode, not MODE. */
1042 if (opl
!= (unsigned HOST_WIDE_INT
) trunc_int_for_mode (opl
, SImode
))
1045 return ((opl
& 0xffff) == 0
1046 || (opl
& ~ (unsigned HOST_WIDE_INT
) 0xffff) == 0);
1049 /* Return 1 if C is a constant that is not a logical operand (as
1050 above), but could be split into one. */
1053 non_logical_cint_operand (op
, mode
)
1055 enum machine_mode mode
;
1057 return ((GET_CODE (op
) == CONST_INT
|| GET_CODE (op
) == CONST_DOUBLE
)
1058 && ! logical_operand (op
, mode
)
1059 && reg_or_logical_cint_operand (op
, mode
));
1062 /* Return 1 if C is a constant that can be encoded in a 32-bit mask on the
1063 RS/6000. It is if there are no more than two 1->0 or 0->1 transitions.
1064 Reject all ones and all zeros, since these should have been optimized
1065 away and confuse the making of MB and ME. */
1068 mask_operand (op
, mode
)
1070 enum machine_mode mode ATTRIBUTE_UNUSED
;
1075 int transitions
= 0;
1077 if (GET_CODE (op
) != CONST_INT
)
1082 if (c
== 0 || c
== ~0)
1085 last_bit_value
= c
& 1;
1087 for (i
= 1; i
< 32; i
++)
1088 if (((c
>>= 1) & 1) != last_bit_value
)
1089 last_bit_value
^= 1, transitions
++;
1091 return transitions
<= 2;
1094 /* Return 1 if the operand is a constant that is a PowerPC64 mask.
1095 It is if there are no more than one 1->0 or 0->1 transitions.
1096 Reject all ones and all zeros, since these should have been optimized
1097 away and confuse the making of MB and ME. */
1100 mask64_operand (op
, mode
)
1102 enum machine_mode mode
;
1104 if (GET_CODE (op
) == CONST_INT
)
1106 HOST_WIDE_INT c
= INTVAL (op
);
1109 int transitions
= 0;
1111 if (c
== 0 || c
== ~0)
1114 last_bit_value
= c
& 1;
1116 for (i
= 1; i
< HOST_BITS_PER_WIDE_INT
; i
++)
1117 if (((c
>>= 1) & 1) != last_bit_value
)
1118 last_bit_value
^= 1, transitions
++;
1120 return transitions
<= 1;
1122 else if (GET_CODE (op
) == CONST_DOUBLE
1123 && (mode
== VOIDmode
|| mode
== DImode
))
1125 HOST_WIDE_INT low
= CONST_DOUBLE_LOW (op
);
1126 #if HOST_BITS_PER_WIDE_INT == 32
1127 HOST_WIDE_INT high
= CONST_DOUBLE_HIGH (op
);
1131 int transitions
= 0;
1134 #if HOST_BITS_PER_WIDE_INT == 32
1139 #if HOST_BITS_PER_WIDE_INT == 32
1145 last_bit_value
= low
& 1;
1147 for (i
= 1; i
< HOST_BITS_PER_WIDE_INT
; i
++)
1148 if (((low
>>= 1) & 1) != last_bit_value
)
1149 last_bit_value
^= 1, transitions
++;
1151 #if HOST_BITS_PER_WIDE_INT == 32
1152 if ((high
& 1) != last_bit_value
)
1153 last_bit_value
^= 1, transitions
++;
1155 for (i
= 1; i
< HOST_BITS_PER_WIDE_INT
; i
++)
1156 if (((high
>>= 1) & 1) != last_bit_value
)
1157 last_bit_value
^= 1, transitions
++;
1160 return transitions
<= 1;
1166 /* Return 1 if the operand is a constant that is a PowerPC64 mask.
1167 It is if there are no more than two 1->0 or 0->1 transitions.
1168 Reject all ones and all zeros, since these should have been optimized
1169 away and confuse the making of MB and ME. */
1172 rldic_operand (op
, mode
)
1174 enum machine_mode mode
;
1176 if (GET_CODE (op
) == CONST_INT
)
1178 HOST_WIDE_INT c
= INTVAL (op
);
1181 int transitions
= 0;
1183 if (c
== 0 || c
== ~0)
1186 last_bit_value
= c
& 1;
1188 for (i
= 1; i
< HOST_BITS_PER_WIDE_INT
; i
++)
1189 if (((c
>>= 1) & 1) != last_bit_value
)
1190 last_bit_value
^= 1, transitions
++;
1192 return transitions
<= 2;
1194 else if (GET_CODE (op
) == CONST_DOUBLE
1195 && (mode
== VOIDmode
|| mode
== DImode
))
1197 HOST_WIDE_INT low
= CONST_DOUBLE_LOW (op
);
1198 #if HOST_BITS_PER_WIDE_INT == 32
1199 HOST_WIDE_INT high
= CONST_DOUBLE_HIGH (op
);
1203 int transitions
= 0;
1206 #if HOST_BITS_PER_WIDE_INT == 32
1211 #if HOST_BITS_PER_WIDE_INT == 32
1217 last_bit_value
= low
& 1;
1219 for (i
= 1; i
< HOST_BITS_PER_WIDE_INT
; i
++)
1220 if (((low
>>= 1) & 1) != last_bit_value
)
1221 last_bit_value
^= 1, transitions
++;
1223 #if HOST_BITS_PER_WIDE_INT == 32
1224 if ((high
& 1) != last_bit_value
)
1225 last_bit_value
^= 1, transitions
++;
1227 for (i
= 1; i
< HOST_BITS_PER_WIDE_INT
; i
++)
1228 if (((high
>>= 1) & 1) != last_bit_value
)
1229 last_bit_value
^= 1, transitions
++;
1232 return transitions
<= 2;
1238 /* Return 1 if the operand is either a non-special register or a constant
1239 that can be used as the operand of a PowerPC64 logical AND insn. */
1242 and64_operand (op
, mode
)
1244 enum machine_mode mode
;
1246 if (fixed_regs
[CR0_REGNO
]) /* CR0 not available, don't do andi./andis. */
1247 return (gpc_reg_operand (op
, mode
) || mask64_operand (op
, mode
));
1249 return (logical_operand (op
, mode
) || mask64_operand (op
, mode
));
1252 /* Return 1 if the operand is either a non-special register or a
1253 constant that can be used as the operand of an RS/6000 logical AND insn. */
1256 and_operand (op
, mode
)
1258 enum machine_mode mode
;
1260 if (fixed_regs
[CR0_REGNO
]) /* CR0 not available, don't do andi./andis. */
1261 return (gpc_reg_operand (op
, mode
) || mask_operand (op
, mode
));
1263 return (logical_operand (op
, mode
) || mask_operand (op
, mode
));
1266 /* Return 1 if the operand is a general register or memory operand. */
1269 reg_or_mem_operand (op
, mode
)
1271 register enum machine_mode mode
;
1273 return (gpc_reg_operand (op
, mode
)
1274 || memory_operand (op
, mode
)
1275 || volatile_mem_operand (op
, mode
));
1278 /* Return 1 if the operand is a general register or memory operand without
1279 pre_inc or pre_dec which produces invalid form of PowerPC lwa
1283 lwa_operand (op
, mode
)
1285 register enum machine_mode mode
;
1289 if (reload_completed
&& GET_CODE (inner
) == SUBREG
)
1290 inner
= SUBREG_REG (inner
);
1292 return gpc_reg_operand (inner
, mode
)
1293 || (memory_operand (inner
, mode
)
1294 && GET_CODE (XEXP (inner
, 0)) != PRE_INC
1295 && GET_CODE (XEXP (inner
, 0)) != PRE_DEC
);
1298 /* Return 1 if the operand, used inside a MEM, is a valid first argument
1299 to CALL. This is a SYMBOL_REF or a pseudo-register, which will be
1303 call_operand (op
, mode
)
1305 enum machine_mode mode
;
1307 if (mode
!= VOIDmode
&& GET_MODE (op
) != mode
)
1310 return (GET_CODE (op
) == SYMBOL_REF
1311 || (GET_CODE (op
) == REG
&& REGNO (op
) >= FIRST_PSEUDO_REGISTER
));
1315 /* Return 1 if the operand is a SYMBOL_REF for a function known to be in
1316 this file and the function is not weakly defined. */
1319 current_file_function_operand (op
, mode
)
1321 enum machine_mode mode ATTRIBUTE_UNUSED
;
1323 return (GET_CODE (op
) == SYMBOL_REF
1324 && (SYMBOL_REF_FLAG (op
)
1325 || (op
== XEXP (DECL_RTL (current_function_decl
), 0)
1326 && ! DECL_WEAK (current_function_decl
))));
1330 /* Return 1 if this operand is a valid input for a move insn. */
1333 input_operand (op
, mode
)
1335 enum machine_mode mode
;
1337 /* Memory is always valid. */
1338 if (memory_operand (op
, mode
))
1341 /* Only a tiny bit of handling for CONSTANT_P_RTX is necessary. */
1342 if (GET_CODE (op
) == CONSTANT_P_RTX
)
1345 /* For floating-point, easy constants are valid. */
1346 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1348 && easy_fp_constant (op
, mode
))
1351 /* Allow any integer constant. */
1352 if (GET_MODE_CLASS (mode
) == MODE_INT
1353 && (GET_CODE (op
) == CONST_INT
1354 || GET_CODE (op
) == CONST_DOUBLE
))
1357 /* For floating-point or multi-word mode, the only remaining valid type
1359 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1360 || GET_MODE_SIZE (mode
) > UNITS_PER_WORD
)
1361 return register_operand (op
, mode
);
1363 /* The only cases left are integral modes one word or smaller (we
1364 do not get called for MODE_CC values). These can be in any
1366 if (register_operand (op
, mode
))
1369 /* A SYMBOL_REF referring to the TOC is valid. */
1370 if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (op
))
1373 /* A constant pool expression (relative to the TOC) is valid */
1374 if (TOC_RELATIVE_EXPR_P (op
))
1377 /* V.4 allows SYMBOL_REFs and CONSTs that are in the small data region
1379 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1380 && (GET_CODE (op
) == SYMBOL_REF
|| GET_CODE (op
) == CONST
)
1381 && small_data_operand (op
, Pmode
))
1387 /* Return 1 for an operand in small memory on V.4/eabi */
1390 small_data_operand (op
, mode
)
1391 rtx op ATTRIBUTE_UNUSED
;
1392 enum machine_mode mode ATTRIBUTE_UNUSED
;
1397 if (rs6000_sdata
== SDATA_NONE
|| rs6000_sdata
== SDATA_DATA
)
1400 if (DEFAULT_ABI
!= ABI_V4
&& DEFAULT_ABI
!= ABI_SOLARIS
)
1403 if (GET_CODE (op
) == SYMBOL_REF
)
1406 else if (GET_CODE (op
) != CONST
1407 || GET_CODE (XEXP (op
, 0)) != PLUS
1408 || GET_CODE (XEXP (XEXP (op
, 0), 0)) != SYMBOL_REF
1409 || GET_CODE (XEXP (XEXP (op
, 0), 1)) != CONST_INT
)
1414 rtx sum
= XEXP (op
, 0);
1415 HOST_WIDE_INT summand
;
1417 /* We have to be careful here, because it is the referenced address
1418 that must be 32k from _SDA_BASE_, not just the symbol. */
1419 summand
= INTVAL (XEXP (sum
, 1));
1420 if (summand
< 0 || summand
> g_switch_value
)
1423 sym_ref
= XEXP (sum
, 0);
1426 if (*XSTR (sym_ref
, 0) != '@')
1437 constant_pool_expr_1 (op
, have_sym
, have_toc
)
1442 switch (GET_CODE(op
))
1445 if (CONSTANT_POOL_ADDRESS_P (op
))
1447 if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (get_pool_constant (op
), Pmode
))
1455 else if (! strcmp (XSTR (op
, 0), toc_label_name
))
1464 return constant_pool_expr_1 (XEXP (op
, 0), have_sym
, have_toc
) &&
1465 constant_pool_expr_1 (XEXP (op
, 1), have_sym
, have_toc
);
1467 return constant_pool_expr_1 (XEXP (op
, 0), have_sym
, have_toc
);
1476 constant_pool_expr_p (op
)
1481 return constant_pool_expr_1 (op
, &have_sym
, &have_toc
) && have_sym
;
1485 toc_relative_expr_p (op
)
1490 return constant_pool_expr_1 (op
, &have_sym
, &have_toc
) && have_toc
;
1493 /* Try machine-dependent ways of modifying an illegitimate address
1494 to be legitimate. If we find one, return the new, valid address.
1495 This is used from only one place: `memory_address' in explow.c.
1497 OLDX is the address as it was before break_out_memory_refs was called.
1498 In some cases it is useful to look at this to decide what needs to be done.
1500 MODE is passed so that this macro can use GO_IF_LEGITIMATE_ADDRESS.
1502 It is always safe for this macro to do nothing. It exists to recognize
1503 opportunities to optimize the output.
1505 On RS/6000, first check for the sum of a register with a constant
1506 integer that is out of range. If so, generate code to add the
1507 constant with the low-order 16 bits masked to the register and force
1508 this result into another register (this can be done with `cau').
1509 Then generate an address of REG+(CONST&0xffff), allowing for the
1510 possibility of bit 16 being a one.
1512 Then check for the sum of a register and something not constant, try to
1513 load the other things into a register and return the sum. */
1515 rs6000_legitimize_address (x
, oldx
, mode
)
1517 rtx oldx ATTRIBUTE_UNUSED
;
1518 enum machine_mode mode
;
1520 if (GET_CODE (x
) == PLUS
1521 && GET_CODE (XEXP (x
, 0)) == REG
1522 && GET_CODE (XEXP (x
, 1)) == CONST_INT
1523 && (unsigned HOST_WIDE_INT
) (INTVAL (XEXP (x
, 1)) + 0x8000) >= 0x10000)
1525 HOST_WIDE_INT high_int
, low_int
;
1527 high_int
= INTVAL (XEXP (x
, 1)) & (~ (HOST_WIDE_INT
) 0xffff);
1528 low_int
= INTVAL (XEXP (x
, 1)) & 0xffff;
1529 if (low_int
& 0x8000)
1530 high_int
+= 0x10000, low_int
|= ((HOST_WIDE_INT
) -1) << 16;
1531 sum
= force_operand (gen_rtx_PLUS (Pmode
, XEXP (x
, 0),
1532 GEN_INT (high_int
)), 0);
1533 return gen_rtx_PLUS (Pmode
, sum
, GEN_INT (low_int
));
1535 else if (GET_CODE (x
) == PLUS
1536 && GET_CODE (XEXP (x
, 0)) == REG
1537 && GET_CODE (XEXP (x
, 1)) != CONST_INT
1538 && (TARGET_HARD_FLOAT
|| TARGET_POWERPC64
|| mode
!= DFmode
)
1539 && (TARGET_POWERPC64
|| mode
!= DImode
)
1542 return gen_rtx_PLUS (Pmode
, XEXP (x
, 0),
1543 force_reg (Pmode
, force_operand (XEXP (x
, 1), 0)));
1545 else if (TARGET_ELF
&& TARGET_32BIT
&& TARGET_NO_TOC
&& ! flag_pic
1546 && GET_CODE (x
) != CONST_INT
1547 && GET_CODE (x
) != CONST_DOUBLE
1549 && (TARGET_HARD_FLOAT
|| mode
!= DFmode
)
1553 rtx reg
= gen_reg_rtx (Pmode
);
1554 emit_insn (gen_elf_high (reg
, (x
)));
1555 return gen_rtx_LO_SUM (Pmode
, reg
, (x
));
1557 else if (TARGET_MACHO
&& TARGET_32BIT
&& TARGET_NO_TOC
1559 && GET_CODE (x
) != CONST_INT
1560 && GET_CODE (x
) != CONST_DOUBLE
1562 && (TARGET_HARD_FLOAT
|| mode
!= DFmode
)
1566 rtx reg
= gen_reg_rtx (Pmode
);
1567 emit_insn (gen_macho_high (reg
, (x
)));
1568 return gen_rtx_LO_SUM (Pmode
, reg
, (x
));
1571 && CONSTANT_POOL_EXPR_P (x
)
1572 && ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (get_pool_constant (x
), Pmode
))
1574 return create_TOC_reference (x
);
1580 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1581 that is a valid memory address for an instruction.
1582 The MODE argument is the machine mode for the MEM expression
1583 that wants to use this address.
1585 On the RS/6000, there are four valid address: a SYMBOL_REF that
1586 refers to a constant pool entry of an address (or the sum of it
1587 plus a constant), a short (16-bit signed) constant plus a register,
1588 the sum of two registers, or a register indirect, possibly with an
1589 auto-increment. For DFmode and DImode with an constant plus register,
1590 we must ensure that both words are addressable or PowerPC64 with offset
1593 For modes spanning multiple registers (DFmode in 32-bit GPRs,
1594 32-bit DImode, TImode), indexed addressing cannot be used because
1595 adjacent memory cells are accessed by adding word-sized offsets
1596 during assembly output. */
1598 rs6000_legitimate_address (mode
, x
, reg_ok_strict
)
1599 enum machine_mode mode
;
1603 if (LEGITIMATE_INDIRECT_ADDRESS_P (x
, reg_ok_strict
))
1605 if ((GET_CODE (x
) == PRE_INC
|| GET_CODE (x
) == PRE_DEC
)
1607 && LEGITIMATE_INDIRECT_ADDRESS_P (XEXP (x
, 0), reg_ok_strict
))
1609 if (LEGITIMATE_SMALL_DATA_P (mode
, x
))
1611 if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (x
))
1613 /* If not REG_OK_STRICT (before reload) let pass any stack offset. */
1615 && GET_CODE (x
) == PLUS
1616 && GET_CODE (XEXP (x
, 0)) == REG
1617 && XEXP (x
, 0) == virtual_stack_vars_rtx
1618 && GET_CODE (XEXP (x
, 1)) == CONST_INT
)
1620 if (LEGITIMATE_OFFSET_ADDRESS_P (mode
, x
, reg_ok_strict
))
1623 && (TARGET_HARD_FLOAT
|| TARGET_POWERPC64
|| mode
!= DFmode
)
1624 && (TARGET_POWERPC64
|| mode
!= DImode
)
1625 && LEGITIMATE_INDEXED_ADDRESS_P (x
, reg_ok_strict
))
1627 if (LEGITIMATE_LO_SUM_ADDRESS_P (mode
, x
, reg_ok_strict
))
1632 /* Emit a move from SOURCE to DEST in mode MODE. */
1634 rs6000_emit_move (dest
, source
, mode
)
1637 enum machine_mode mode
;
1641 operands
[1] = source
;
1643 /* Sanity checks. Check that we get CONST_DOUBLE only when we should. */
1644 if (GET_CODE (operands
[1]) == CONST_DOUBLE
1645 && ! FLOAT_MODE_P (mode
)
1646 && GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
1648 /* FIXME. This should never happen. */
1649 /* Since it seems that it does, do the safe thing and convert
1652 GEN_INT (trunc_int_for_mode (CONST_DOUBLE_LOW (operands
[1]), mode
));
1654 if (GET_CODE (operands
[1]) == CONST_DOUBLE
1655 && ! FLOAT_MODE_P (mode
)
1656 && ((CONST_DOUBLE_HIGH (operands
[1]) == 0
1657 && CONST_DOUBLE_LOW (operands
[1]) >= 0)
1658 || (CONST_DOUBLE_HIGH (operands
[1]) == -1
1659 && CONST_DOUBLE_LOW (operands
[1]) < 0)))
1662 if (! no_new_pseudos
&& GET_CODE (operands
[0]) != REG
)
1663 operands
[1] = force_reg (mode
, operands
[1]);
1665 if (mode
== SFmode
&& ! TARGET_POWERPC
&& TARGET_HARD_FLOAT
1666 && GET_CODE (operands
[0]) == MEM
)
1670 if (reload_in_progress
|| reload_completed
)
1671 regnum
= true_regnum (operands
[1]);
1672 else if (GET_CODE (operands
[1]) == REG
)
1673 regnum
= REGNO (operands
[1]);
1677 /* If operands[1] is a register, on POWER it may have
1678 double-precision data in it, so truncate it to single
1680 if (FP_REGNO_P (regnum
) || regnum
>= FIRST_PSEUDO_REGISTER
)
1683 newreg
= (no_new_pseudos
? operands
[1] : gen_reg_rtx (mode
));
1684 emit_insn (gen_aux_truncdfsf2 (newreg
, operands
[1]));
1685 operands
[1] = newreg
;
1689 /* Handle the case where reload calls us with an invalid address;
1690 and the case of CONSTANT_P_RTX. */
1691 if (! general_operand (operands
[1], mode
)
1692 || ! nonimmediate_operand (operands
[0], mode
)
1693 || GET_CODE (operands
[1]) == CONSTANT_P_RTX
)
1695 emit_insn (gen_rtx_SET (VOIDmode
, operands
[0], operands
[1]));
1699 /* FIXME: In the long term, this switch statement should go away
1700 and be replaced by a sequence of tests based on things like
1706 if (CONSTANT_P (operands
[1])
1707 && GET_CODE (operands
[1]) != CONST_INT
)
1708 operands
[1] = force_const_mem (mode
, operands
[1]);
1713 if (CONSTANT_P (operands
[1])
1714 && ! easy_fp_constant (operands
[1], mode
))
1715 operands
[1] = force_const_mem (mode
, operands
[1]);
1720 /* Use default pattern for address of ELF small data */
1723 && (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1724 && (GET_CODE (operands
[1]) == SYMBOL_REF
1725 || GET_CODE (operands
[1]) == CONST
)
1726 && small_data_operand (operands
[1], mode
))
1728 emit_insn (gen_rtx_SET (VOIDmode
, operands
[0], operands
[1]));
1732 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1733 && mode
== Pmode
&& mode
== SImode
1734 && flag_pic
== 1 && got_operand (operands
[1], mode
))
1736 emit_insn (gen_movsi_got (operands
[0], operands
[1]));
1740 if ((TARGET_ELF
|| DEFAULT_ABI
== ABI_DARWIN
)
1741 && TARGET_NO_TOC
&& ! flag_pic
1743 && CONSTANT_P (operands
[1])
1744 && GET_CODE (operands
[1]) != HIGH
1745 && GET_CODE (operands
[1]) != CONST_INT
)
1747 rtx target
= (no_new_pseudos
? operands
[0] : gen_reg_rtx (mode
));
1749 /* If this is a function address on -mcall-aixdesc,
1750 convert it to the address of the descriptor. */
1751 if (DEFAULT_ABI
== ABI_AIX
1752 && GET_CODE (operands
[1]) == SYMBOL_REF
1753 && XSTR (operands
[1], 0)[0] == '.')
1755 const char *name
= XSTR (operands
[1], 0);
1757 while (*name
== '.')
1759 new_ref
= gen_rtx_SYMBOL_REF (Pmode
, name
);
1760 CONSTANT_POOL_ADDRESS_P (new_ref
)
1761 = CONSTANT_POOL_ADDRESS_P (operands
[1]);
1762 SYMBOL_REF_FLAG (new_ref
) = SYMBOL_REF_FLAG (operands
[1]);
1763 SYMBOL_REF_USED (new_ref
) = SYMBOL_REF_USED (operands
[1]);
1764 operands
[1] = new_ref
;
1767 if (DEFAULT_ABI
== ABI_DARWIN
)
1769 emit_insn (gen_macho_high (target
, operands
[1]));
1770 emit_insn (gen_macho_low (operands
[0], target
, operands
[1]));
1774 emit_insn (gen_elf_high (target
, operands
[1]));
1775 emit_insn (gen_elf_low (operands
[0], target
, operands
[1]));
1779 /* If this is a SYMBOL_REF that refers to a constant pool entry,
1780 and we have put it in the TOC, we just need to make a TOC-relative
1783 && GET_CODE (operands
[1]) == SYMBOL_REF
1784 && CONSTANT_POOL_EXPR_P (operands
[1])
1785 && ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (get_pool_constant (operands
[1]),
1786 get_pool_mode (operands
[1])))
1788 operands
[1] = create_TOC_reference (operands
[1]);
1790 else if (mode
== Pmode
1791 && CONSTANT_P (operands
[1])
1792 && ((GET_CODE (operands
[1]) != CONST_INT
1793 && ! easy_fp_constant (operands
[1], mode
))
1794 || (GET_CODE (operands
[1]) == CONST_INT
1795 && num_insns_constant (operands
[1], mode
) > 2)
1796 || (GET_CODE (operands
[0]) == REG
1797 && FP_REGNO_P (REGNO (operands
[0]))))
1798 && GET_CODE (operands
[1]) != HIGH
1799 && ! LEGITIMATE_CONSTANT_POOL_ADDRESS_P (operands
[1])
1800 && ! TOC_RELATIVE_EXPR_P (operands
[1]))
1802 /* Emit a USE operation so that the constant isn't deleted if
1803 expensive optimizations are turned on because nobody
1804 references it. This should only be done for operands that
1805 contain SYMBOL_REFs with CONSTANT_POOL_ADDRESS_P set.
1806 This should not be done for operands that contain LABEL_REFs.
1807 For now, we just handle the obvious case. */
1808 if (GET_CODE (operands
[1]) != LABEL_REF
)
1809 emit_insn (gen_rtx_USE (VOIDmode
, operands
[1]));
1811 /* Darwin uses a special PIC legitimizer. */
1812 if (DEFAULT_ABI
== ABI_DARWIN
&& flag_pic
)
1815 rtx temp_reg
= ((reload_in_progress
|| reload_completed
)
1816 ? operands
[0] : NULL
);
1819 rs6000_machopic_legitimize_pic_address (operands
[1], mode
,
1822 emit_insn (gen_rtx_SET (VOIDmode
, operands
[0], operands
[1]));
1826 /* If we are to limit the number of things we put in the TOC and
1827 this is a symbol plus a constant we can add in one insn,
1828 just put the symbol in the TOC and add the constant. Don't do
1829 this if reload is in progress. */
1830 if (GET_CODE (operands
[1]) == CONST
1831 && TARGET_NO_SUM_IN_TOC
&& ! reload_in_progress
1832 && GET_CODE (XEXP (operands
[1], 0)) == PLUS
1833 && add_operand (XEXP (XEXP (operands
[1], 0), 1), mode
)
1834 && (GET_CODE (XEXP (XEXP (operands
[1], 0), 0)) == LABEL_REF
1835 || GET_CODE (XEXP (XEXP (operands
[1], 0), 0)) == SYMBOL_REF
)
1836 && ! side_effects_p (operands
[0]))
1838 rtx sym
= force_const_mem (mode
, XEXP (XEXP (operands
[1], 0), 0));
1839 rtx other
= XEXP (XEXP (operands
[1], 0), 1);
1841 sym
= force_reg (mode
, sym
);
1843 emit_insn (gen_addsi3 (operands
[0], sym
, other
));
1845 emit_insn (gen_adddi3 (operands
[0], sym
, other
));
1849 operands
[1] = force_const_mem (mode
, operands
[1]);
1852 && CONSTANT_POOL_EXPR_P (XEXP (operands
[1], 0))
1853 && ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (
1854 get_pool_constant (XEXP (operands
[1], 0)),
1855 get_pool_mode (XEXP (operands
[1], 0))))
1857 operands
[1] = gen_rtx_MEM (mode
,
1858 create_TOC_reference (XEXP (operands
[1], 0)));
1859 MEM_ALIAS_SET (operands
[1]) = get_TOC_alias_set ();
1860 RTX_UNCHANGING_P (operands
[1]) = 1;
1866 if (GET_CODE (operands
[0]) == MEM
1867 && GET_CODE (XEXP (operands
[0], 0)) != REG
1868 && ! reload_in_progress
)
1869 operands
[0] = change_address (operands
[0], TImode
,
1870 copy_addr_to_reg (XEXP (operands
[0], 0)));
1872 if (GET_CODE (operands
[1]) == MEM
1873 && GET_CODE (XEXP (operands
[1], 0)) != REG
1874 && ! reload_in_progress
)
1875 operands
[1] = change_address (operands
[1], TImode
,
1876 copy_addr_to_reg (XEXP (operands
[1], 0)));
1883 /* Above, we may have called force_const_mem which may have returned
1884 an invalid address. If we can, fix this up; otherwise, reload will
1885 have to deal with it. */
1886 if (GET_CODE (operands
[1]) == MEM
1887 && ! memory_address_p (mode
, XEXP (operands
[1], 0))
1888 && ! reload_in_progress
)
1889 operands
[1] = adjust_address (operands
[1], mode
, 0);
1891 emit_insn (gen_rtx_SET (VOIDmode
, operands
[0], operands
[1]));
1895 /* Initialize a variable CUM of type CUMULATIVE_ARGS
1896 for a call to a function whose data type is FNTYPE.
1897 For a library call, FNTYPE is 0.
1899 For incoming args we set the number of arguments in the prototype large
1900 so we never return a PARALLEL. */
1903 init_cumulative_args (cum
, fntype
, libname
, incoming
)
1904 CUMULATIVE_ARGS
*cum
;
1906 rtx libname ATTRIBUTE_UNUSED
;
1909 static CUMULATIVE_ARGS zero_cumulative
;
1911 *cum
= zero_cumulative
;
1913 cum
->fregno
= FP_ARG_MIN_REG
;
1914 cum
->prototype
= (fntype
&& TYPE_ARG_TYPES (fntype
));
1915 cum
->call_cookie
= CALL_NORMAL
;
1916 cum
->sysv_gregno
= GP_ARG_MIN_REG
;
1919 cum
->nargs_prototype
= 1000; /* don't return a PARALLEL */
1921 else if (cum
->prototype
)
1922 cum
->nargs_prototype
= (list_length (TYPE_ARG_TYPES (fntype
)) - 1
1923 + (TYPE_MODE (TREE_TYPE (fntype
)) == BLKmode
1924 || RETURN_IN_MEMORY (TREE_TYPE (fntype
))));
1927 cum
->nargs_prototype
= 0;
1929 cum
->orig_nargs
= cum
->nargs_prototype
;
1931 /* Check for longcall's */
1932 if (fntype
&& lookup_attribute ("longcall", TYPE_ATTRIBUTES (fntype
)))
1933 cum
->call_cookie
= CALL_LONG
;
1935 if (TARGET_DEBUG_ARG
)
1937 fprintf (stderr
, "\ninit_cumulative_args:");
1940 tree ret_type
= TREE_TYPE (fntype
);
1941 fprintf (stderr
, " ret code = %s,",
1942 tree_code_name
[ (int)TREE_CODE (ret_type
) ]);
1945 if (cum
->call_cookie
& CALL_LONG
)
1946 fprintf (stderr
, " longcall,");
1948 fprintf (stderr
, " proto = %d, nargs = %d\n",
1949 cum
->prototype
, cum
->nargs_prototype
);
1953 /* If defined, a C expression which determines whether, and in which
1954 direction, to pad out an argument with extra space. The value
1955 should be of type `enum direction': either `upward' to pad above
1956 the argument, `downward' to pad below, or `none' to inhibit
1959 For the AIX ABI structs are always stored left shifted in their
1963 function_arg_padding (mode
, type
)
1964 enum machine_mode mode
;
1967 if (type
!= 0 && AGGREGATE_TYPE_P (type
))
1970 /* This is the default definition. */
1971 return (! BYTES_BIG_ENDIAN
1974 ? (type
&& TREE_CODE (TYPE_SIZE (type
)) == INTEGER_CST
1975 && int_size_in_bytes (type
) < (PARM_BOUNDARY
/ BITS_PER_UNIT
))
1976 : GET_MODE_BITSIZE (mode
) < PARM_BOUNDARY
)
1977 ? downward
: upward
));
1980 /* If defined, a C expression that gives the alignment boundary, in bits,
1981 of an argument with the specified mode and type. If it is not defined,
1982 PARM_BOUNDARY is used for all arguments.
1984 V.4 wants long longs to be double word aligned. */
1987 function_arg_boundary (mode
, type
)
1988 enum machine_mode mode
;
1989 tree type ATTRIBUTE_UNUSED
;
1991 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1992 && (mode
== DImode
|| mode
== DFmode
))
1995 return PARM_BOUNDARY
;
1998 /* Update the data in CUM to advance over an argument
1999 of mode MODE and data type TYPE.
2000 (TYPE is null for libcalls where that information may not be available.) */
2003 function_arg_advance (cum
, mode
, type
, named
)
2004 CUMULATIVE_ARGS
*cum
;
2005 enum machine_mode mode
;
2009 cum
->nargs_prototype
--;
2011 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
2013 if (TARGET_HARD_FLOAT
2014 && (mode
== SFmode
|| mode
== DFmode
))
2016 if (cum
->fregno
<= FP_ARG_V4_MAX_REG
)
2021 cum
->words
+= cum
->words
& 1;
2022 cum
->words
+= RS6000_ARG_SIZE (mode
, type
);
2028 int gregno
= cum
->sysv_gregno
;
2030 /* Aggregates and IEEE quad get passed by reference. */
2031 if ((type
&& AGGREGATE_TYPE_P (type
))
2035 n_words
= RS6000_ARG_SIZE (mode
, type
);
2037 /* Long long is put in odd registers. */
2038 if (n_words
== 2 && (gregno
& 1) == 0)
2041 /* Long long is not split between registers and stack. */
2042 if (gregno
+ n_words
- 1 > GP_ARG_MAX_REG
)
2044 /* Long long is aligned on the stack. */
2046 cum
->words
+= cum
->words
& 1;
2047 cum
->words
+= n_words
;
2050 /* Note: continuing to accumulate gregno past when we've started
2051 spilling to the stack indicates the fact that we've started
2052 spilling to the stack to expand_builtin_saveregs. */
2053 cum
->sysv_gregno
= gregno
+ n_words
;
2056 if (TARGET_DEBUG_ARG
)
2058 fprintf (stderr
, "function_adv: words = %2d, fregno = %2d, ",
2059 cum
->words
, cum
->fregno
);
2060 fprintf (stderr
, "gregno = %2d, nargs = %4d, proto = %d, ",
2061 cum
->sysv_gregno
, cum
->nargs_prototype
, cum
->prototype
);
2062 fprintf (stderr
, "mode = %4s, named = %d\n",
2063 GET_MODE_NAME (mode
), named
);
2068 int align
= (TARGET_32BIT
&& (cum
->words
& 1) != 0
2069 && function_arg_boundary (mode
, type
) == 64) ? 1 : 0;
2070 cum
->words
+= align
+ RS6000_ARG_SIZE (mode
, type
);
2072 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
&& TARGET_HARD_FLOAT
)
2075 if (TARGET_DEBUG_ARG
)
2077 fprintf (stderr
, "function_adv: words = %2d, fregno = %2d, ",
2078 cum
->words
, cum
->fregno
);
2079 fprintf (stderr
, "nargs = %4d, proto = %d, mode = %4s, ",
2080 cum
->nargs_prototype
, cum
->prototype
, GET_MODE_NAME (mode
));
2081 fprintf (stderr
, "named = %d, align = %d\n", named
, align
);
2086 /* Determine where to put an argument to a function.
2087 Value is zero to push the argument on the stack,
2088 or a hard register in which to store the argument.
2090 MODE is the argument's machine mode.
2091 TYPE is the data type of the argument (as a tree).
2092 This is null for libcalls where that information may
2094 CUM is a variable of type CUMULATIVE_ARGS which gives info about
2095 the preceding args and about the function being called.
2096 NAMED is nonzero if this argument is a named parameter
2097 (otherwise it is an extra parameter matching an ellipsis).
2099 On RS/6000 the first eight words of non-FP are normally in registers
2100 and the rest are pushed. Under AIX, the first 13 FP args are in registers.
2101 Under V.4, the first 8 FP args are in registers.
2103 If this is floating-point and no prototype is specified, we use
2104 both an FP and integer register (or possibly FP reg and stack). Library
2105 functions (when TYPE is zero) always have the proper types for args,
2106 so we can pass the FP value just in one register. emit_library_function
2107 doesn't support PARALLEL anyway. */
2110 function_arg (cum
, mode
, type
, named
)
2111 CUMULATIVE_ARGS
*cum
;
2112 enum machine_mode mode
;
2114 int named ATTRIBUTE_UNUSED
;
2116 enum rs6000_abi abi
= DEFAULT_ABI
;
2118 /* Return a marker to indicate whether CR1 needs to set or clear the bit
2119 that V.4 uses to say fp args were passed in registers. Assume that we
2120 don't need the marker for software floating point, or compiler generated
2122 if (mode
== VOIDmode
)
2124 if ((abi
== ABI_V4
|| abi
== ABI_SOLARIS
)
2125 && TARGET_HARD_FLOAT
2126 && cum
->nargs_prototype
< 0
2127 && type
&& (cum
->prototype
|| TARGET_NO_PROTOTYPE
))
2129 return GEN_INT (cum
->call_cookie
2130 | ((cum
->fregno
== FP_ARG_MIN_REG
)
2131 ? CALL_V4_SET_FP_ARGS
2132 : CALL_V4_CLEAR_FP_ARGS
));
2135 return GEN_INT (cum
->call_cookie
);
2138 if (abi
== ABI_V4
|| abi
== ABI_SOLARIS
)
2140 if (TARGET_HARD_FLOAT
2141 && (mode
== SFmode
|| mode
== DFmode
))
2143 if (cum
->fregno
<= FP_ARG_V4_MAX_REG
)
2144 return gen_rtx_REG (mode
, cum
->fregno
);
2151 int gregno
= cum
->sysv_gregno
;
2153 /* Aggregates and IEEE quad get passed by reference. */
2154 if ((type
&& AGGREGATE_TYPE_P (type
))
2158 n_words
= RS6000_ARG_SIZE (mode
, type
);
2160 /* Long long is put in odd registers. */
2161 if (n_words
== 2 && (gregno
& 1) == 0)
2164 /* Long long is not split between registers and stack. */
2165 if (gregno
+ n_words
- 1 <= GP_ARG_MAX_REG
)
2166 return gen_rtx_REG (mode
, gregno
);
2173 int align
= (TARGET_32BIT
&& (cum
->words
& 1) != 0
2174 && function_arg_boundary (mode
, type
) == 64) ? 1 : 0;
2175 int align_words
= cum
->words
+ align
;
2177 if (type
&& TREE_CODE (TYPE_SIZE (type
)) != INTEGER_CST
)
2180 if (USE_FP_FOR_ARG_P (*cum
, mode
, type
))
2183 || ((cum
->nargs_prototype
> 0)
2184 /* IBM AIX extended its linkage convention definition always
2185 to require FP args after register save area hole on the
2187 && (DEFAULT_ABI
!= ABI_AIX
2189 || (align_words
< GP_ARG_NUM_REG
))))
2190 return gen_rtx_REG (mode
, cum
->fregno
);
2192 return gen_rtx_PARALLEL (mode
,
2194 gen_rtx_EXPR_LIST (VOIDmode
,
2195 ((align_words
>= GP_ARG_NUM_REG
)
2198 + RS6000_ARG_SIZE (mode
, type
)
2200 /* If this is partially on the stack, then
2201 we only include the portion actually
2202 in registers here. */
2203 ? gen_rtx_REG (SImode
,
2204 GP_ARG_MIN_REG
+ align_words
)
2205 : gen_rtx_REG (mode
,
2206 GP_ARG_MIN_REG
+ align_words
))),
2208 gen_rtx_EXPR_LIST (VOIDmode
,
2209 gen_rtx_REG (mode
, cum
->fregno
),
2212 else if (align_words
< GP_ARG_NUM_REG
)
2213 return gen_rtx_REG (mode
, GP_ARG_MIN_REG
+ align_words
);
2219 /* For an arg passed partly in registers and partly in memory,
2220 this is the number of registers used.
2221 For args passed entirely in registers or entirely in memory, zero. */
2224 function_arg_partial_nregs (cum
, mode
, type
, named
)
2225 CUMULATIVE_ARGS
*cum
;
2226 enum machine_mode mode
;
2228 int named ATTRIBUTE_UNUSED
;
2230 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
2233 if (USE_FP_FOR_ARG_P (*cum
, mode
, type
))
2235 if (cum
->nargs_prototype
>= 0)
2239 if (cum
->words
< GP_ARG_NUM_REG
2240 && GP_ARG_NUM_REG
< (cum
->words
+ RS6000_ARG_SIZE (mode
, type
)))
2242 int ret
= GP_ARG_NUM_REG
- cum
->words
;
2243 if (ret
&& TARGET_DEBUG_ARG
)
2244 fprintf (stderr
, "function_arg_partial_nregs: %d\n", ret
);
2252 /* A C expression that indicates when an argument must be passed by
2253 reference. If nonzero for an argument, a copy of that argument is
2254 made in memory and a pointer to the argument is passed instead of
2255 the argument itself. The pointer is passed in whatever way is
2256 appropriate for passing a pointer to that type.
2258 Under V.4, structures and unions are passed by reference. */
2261 function_arg_pass_by_reference (cum
, mode
, type
, named
)
2262 CUMULATIVE_ARGS
*cum ATTRIBUTE_UNUSED
;
2263 enum machine_mode mode ATTRIBUTE_UNUSED
;
2265 int named ATTRIBUTE_UNUSED
;
2267 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
2268 && ((type
&& AGGREGATE_TYPE_P (type
))
2271 if (TARGET_DEBUG_ARG
)
2272 fprintf (stderr
, "function_arg_pass_by_reference: aggregate\n");
2280 /* Perform any needed actions needed for a function that is receiving a
2281 variable number of arguments.
2285 MODE and TYPE are the mode and type of the current parameter.
2287 PRETEND_SIZE is a variable that should be set to the amount of stack
2288 that must be pushed by the prolog to pretend that our caller pushed
2291 Normally, this macro will push all remaining incoming registers on the
2292 stack and set PRETEND_SIZE to the length of the registers pushed. */
2295 setup_incoming_varargs (cum
, mode
, type
, pretend_size
, no_rtl
)
2296 CUMULATIVE_ARGS
*cum
;
2297 enum machine_mode mode
;
2303 CUMULATIVE_ARGS next_cum
;
2304 int reg_size
= TARGET_32BIT
? 4 : 8;
2305 rtx save_area
= NULL_RTX
, mem
;
2306 int first_reg_offset
, set
;
2310 fntype
= TREE_TYPE (current_function_decl
);
2311 stdarg_p
= (TYPE_ARG_TYPES (fntype
) != 0
2312 && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (fntype
)))
2313 != void_type_node
));
2315 /* For varargs, we do not want to skip the dummy va_dcl argument.
2316 For stdargs, we do want to skip the last named argument. */
2319 function_arg_advance (&next_cum
, mode
, type
, 1);
2321 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
2323 /* Indicate to allocate space on the stack for varargs save area. */
2324 /* ??? Does this really have to be located at a magic spot on the
2325 stack, or can we allocate this with assign_stack_local instead. */
2326 cfun
->machine
->sysv_varargs_p
= 1;
2328 save_area
= plus_constant (virtual_stack_vars_rtx
,
2329 - RS6000_VARARGS_SIZE
);
2331 first_reg_offset
= next_cum
.sysv_gregno
- GP_ARG_MIN_REG
;
2335 first_reg_offset
= next_cum
.words
;
2336 save_area
= virtual_incoming_args_rtx
;
2337 cfun
->machine
->sysv_varargs_p
= 0;
2339 if (MUST_PASS_IN_STACK (mode
, type
))
2340 first_reg_offset
+= RS6000_ARG_SIZE (TYPE_MODE (type
), type
);
2343 set
= get_varargs_alias_set ();
2344 if (! no_rtl
&& first_reg_offset
< GP_ARG_NUM_REG
)
2346 mem
= gen_rtx_MEM (BLKmode
,
2347 plus_constant (save_area
,
2348 first_reg_offset
* reg_size
)),
2349 MEM_ALIAS_SET (mem
) = set
;
2352 (GP_ARG_MIN_REG
+ first_reg_offset
, mem
,
2353 GP_ARG_NUM_REG
- first_reg_offset
,
2354 (GP_ARG_NUM_REG
- first_reg_offset
) * UNITS_PER_WORD
);
2356 /* ??? Does ABI_V4 need this at all? */
2357 *pretend_size
= (GP_ARG_NUM_REG
- first_reg_offset
) * UNITS_PER_WORD
;
2360 /* Save FP registers if needed. */
2361 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
2362 && TARGET_HARD_FLOAT
&& ! no_rtl
2363 && next_cum
.fregno
<= FP_ARG_V4_MAX_REG
)
2365 int fregno
= next_cum
.fregno
;
2366 rtx cr1
= gen_rtx_REG (CCmode
, CR1_REGNO
);
2367 rtx lab
= gen_label_rtx ();
2368 int off
= (GP_ARG_NUM_REG
* reg_size
) + ((fregno
- FP_ARG_MIN_REG
) * 8);
2370 emit_jump_insn (gen_rtx_SET (VOIDmode
,
2372 gen_rtx_IF_THEN_ELSE (VOIDmode
,
2373 gen_rtx_NE (VOIDmode
, cr1
,
2375 gen_rtx_LABEL_REF (VOIDmode
, lab
),
2378 while (fregno
<= FP_ARG_V4_MAX_REG
)
2380 mem
= gen_rtx_MEM (DFmode
, plus_constant (save_area
, off
));
2381 MEM_ALIAS_SET (mem
) = set
;
2382 emit_move_insn (mem
, gen_rtx_REG (DFmode
, fregno
));
2391 /* Create the va_list data type. */
2394 rs6000_build_va_list ()
2396 tree f_gpr
, f_fpr
, f_ovf
, f_sav
, record
, type_decl
;
2398 /* For AIX, prefer 'char *' because that's what the system
2399 header files like. */
2400 if (DEFAULT_ABI
!= ABI_V4
&& DEFAULT_ABI
!= ABI_SOLARIS
)
2401 return build_pointer_type (char_type_node
);
2403 record
= make_lang_type (RECORD_TYPE
);
2404 type_decl
= build_decl (TYPE_DECL
, get_identifier ("__va_list_tag"), record
);
2406 f_gpr
= build_decl (FIELD_DECL
, get_identifier ("gpr"),
2407 unsigned_char_type_node
);
2408 f_fpr
= build_decl (FIELD_DECL
, get_identifier ("fpr"),
2409 unsigned_char_type_node
);
2410 f_ovf
= build_decl (FIELD_DECL
, get_identifier ("overflow_arg_area"),
2412 f_sav
= build_decl (FIELD_DECL
, get_identifier ("reg_save_area"),
2415 DECL_FIELD_CONTEXT (f_gpr
) = record
;
2416 DECL_FIELD_CONTEXT (f_fpr
) = record
;
2417 DECL_FIELD_CONTEXT (f_ovf
) = record
;
2418 DECL_FIELD_CONTEXT (f_sav
) = record
;
2420 TREE_CHAIN (record
) = type_decl
;
2421 TYPE_NAME (record
) = type_decl
;
2422 TYPE_FIELDS (record
) = f_gpr
;
2423 TREE_CHAIN (f_gpr
) = f_fpr
;
2424 TREE_CHAIN (f_fpr
) = f_ovf
;
2425 TREE_CHAIN (f_ovf
) = f_sav
;
2427 layout_type (record
);
2429 /* The correct type is an array type of one element. */
2430 return build_array_type (record
, build_index_type (size_zero_node
));
2433 /* Implement va_start. */
2436 rs6000_va_start (stdarg_p
, valist
, nextarg
)
2441 HOST_WIDE_INT words
, n_gpr
, n_fpr
;
2442 tree f_gpr
, f_fpr
, f_ovf
, f_sav
;
2443 tree gpr
, fpr
, ovf
, sav
, t
;
2445 /* Only SVR4 needs something special. */
2446 if (DEFAULT_ABI
!= ABI_V4
&& DEFAULT_ABI
!= ABI_SOLARIS
)
2448 std_expand_builtin_va_start (stdarg_p
, valist
, nextarg
);
2452 f_gpr
= TYPE_FIELDS (TREE_TYPE (va_list_type_node
));
2453 f_fpr
= TREE_CHAIN (f_gpr
);
2454 f_ovf
= TREE_CHAIN (f_fpr
);
2455 f_sav
= TREE_CHAIN (f_ovf
);
2457 valist
= build1 (INDIRECT_REF
, TREE_TYPE (TREE_TYPE (valist
)), valist
);
2458 gpr
= build (COMPONENT_REF
, TREE_TYPE (f_gpr
), valist
, f_gpr
);
2459 fpr
= build (COMPONENT_REF
, TREE_TYPE (f_fpr
), valist
, f_fpr
);
2460 ovf
= build (COMPONENT_REF
, TREE_TYPE (f_ovf
), valist
, f_ovf
);
2461 sav
= build (COMPONENT_REF
, TREE_TYPE (f_sav
), valist
, f_sav
);
2463 /* Count number of gp and fp argument registers used. */
2464 words
= current_function_args_info
.words
;
2465 n_gpr
= current_function_args_info
.sysv_gregno
- GP_ARG_MIN_REG
;
2466 n_fpr
= current_function_args_info
.fregno
- FP_ARG_MIN_REG
;
2468 if (TARGET_DEBUG_ARG
)
2470 fputs ("va_start: words = ", stderr
);
2471 fprintf (stderr
, HOST_WIDE_INT_PRINT_DEC
, words
);
2472 fputs (", n_gpr = ", stderr
);
2473 fprintf (stderr
, HOST_WIDE_INT_PRINT_DEC
, n_gpr
);
2474 fputs (", n_fpr = ", stderr
);
2475 fprintf (stderr
, HOST_WIDE_INT_PRINT_DEC
, n_fpr
);
2476 putc ('\n', stderr
);
2479 t
= build (MODIFY_EXPR
, TREE_TYPE (gpr
), gpr
, build_int_2 (n_gpr
, 0));
2480 TREE_SIDE_EFFECTS (t
) = 1;
2481 expand_expr (t
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
2483 t
= build (MODIFY_EXPR
, TREE_TYPE (fpr
), fpr
, build_int_2 (n_fpr
, 0));
2484 TREE_SIDE_EFFECTS (t
) = 1;
2485 expand_expr (t
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
2487 /* Find the overflow area. */
2488 t
= make_tree (TREE_TYPE (ovf
), virtual_incoming_args_rtx
);
2490 t
= build (PLUS_EXPR
, TREE_TYPE (ovf
), t
,
2491 build_int_2 (words
* UNITS_PER_WORD
, 0));
2492 t
= build (MODIFY_EXPR
, TREE_TYPE (ovf
), ovf
, t
);
2493 TREE_SIDE_EFFECTS (t
) = 1;
2494 expand_expr (t
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
2496 /* Find the register save area. */
2497 t
= make_tree (TREE_TYPE (sav
), virtual_stack_vars_rtx
);
2498 t
= build (PLUS_EXPR
, TREE_TYPE (sav
), t
,
2499 build_int_2 (-RS6000_VARARGS_SIZE
, -1));
2500 t
= build (MODIFY_EXPR
, TREE_TYPE (sav
), sav
, t
);
2501 TREE_SIDE_EFFECTS (t
) = 1;
2502 expand_expr (t
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
2505 /* Implement va_arg. */
2508 rs6000_va_arg (valist
, type
)
2511 tree f_gpr
, f_fpr
, f_ovf
, f_sav
;
2512 tree gpr
, fpr
, ovf
, sav
, reg
, t
, u
;
2513 int indirect_p
, size
, rsize
, n_reg
, sav_ofs
, sav_scale
;
2514 rtx lab_false
, lab_over
, addr_rtx
, r
;
2516 /* For AIX, the rule is that structures are passed left-aligned in
2517 their stack slot. However, GCC does not presently do this:
2518 structures which are the same size as integer types are passed
2519 right-aligned, as if they were in fact integers. This only
2520 matters for structures of size 1 or 2, or 4 when TARGET_64BIT. */
2521 if (DEFAULT_ABI
!= ABI_V4
&& DEFAULT_ABI
!= ABI_SOLARIS
)
2523 HOST_WIDE_INT align
, rounded_size
;
2524 enum machine_mode mode
;
2527 /* Compute the rounded size of the type. */
2528 align
= PARM_BOUNDARY
/ BITS_PER_UNIT
;
2529 rounded_size
= (((int_size_in_bytes (type
) + align
- 1) / align
)
2534 mode
= TYPE_MODE (type
);
2535 if (mode
!= BLKmode
)
2538 adj
= TREE_INT_CST_LOW (TYPE_SIZE (type
)) / BITS_PER_UNIT
;
2539 if (rounded_size
> align
)
2542 addr_tree
= build (PLUS_EXPR
, TREE_TYPE (addr_tree
), addr_tree
,
2543 build_int_2 (rounded_size
- adj
, 0));
2546 addr_rtx
= expand_expr (addr_tree
, NULL_RTX
, Pmode
, EXPAND_NORMAL
);
2547 addr_rtx
= copy_to_reg (addr_rtx
);
2549 /* Compute new value for AP. */
2550 t
= build (MODIFY_EXPR
, TREE_TYPE (valist
), valist
,
2551 build (PLUS_EXPR
, TREE_TYPE (valist
), valist
,
2552 build_int_2 (rounded_size
, 0)));
2553 TREE_SIDE_EFFECTS (t
) = 1;
2554 expand_expr (t
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
2559 f_gpr
= TYPE_FIELDS (TREE_TYPE (va_list_type_node
));
2560 f_fpr
= TREE_CHAIN (f_gpr
);
2561 f_ovf
= TREE_CHAIN (f_fpr
);
2562 f_sav
= TREE_CHAIN (f_ovf
);
2564 valist
= build1 (INDIRECT_REF
, TREE_TYPE (TREE_TYPE (valist
)), valist
);
2565 gpr
= build (COMPONENT_REF
, TREE_TYPE (f_gpr
), valist
, f_gpr
);
2566 fpr
= build (COMPONENT_REF
, TREE_TYPE (f_fpr
), valist
, f_fpr
);
2567 ovf
= build (COMPONENT_REF
, TREE_TYPE (f_ovf
), valist
, f_ovf
);
2568 sav
= build (COMPONENT_REF
, TREE_TYPE (f_sav
), valist
, f_sav
);
2570 size
= int_size_in_bytes (type
);
2571 rsize
= (size
+ UNITS_PER_WORD
- 1) / UNITS_PER_WORD
;
2573 if (AGGREGATE_TYPE_P (type
) || TYPE_MODE (type
) == TFmode
)
2575 /* Aggregates and long doubles are passed by reference. */
2581 size
= rsize
= UNITS_PER_WORD
;
2583 else if (FLOAT_TYPE_P (type
) && ! TARGET_SOFT_FLOAT
)
2585 /* FP args go in FP registers, if present. */
2594 /* Otherwise into GP registers. */
2603 * Pull the value out of the saved registers ...
2606 lab_false
= gen_label_rtx ();
2607 lab_over
= gen_label_rtx ();
2608 addr_rtx
= gen_reg_rtx (Pmode
);
2610 emit_cmp_and_jump_insns (expand_expr (reg
, NULL_RTX
, QImode
, EXPAND_NORMAL
),
2611 GEN_INT (8 - n_reg
+ 1),
2612 GE
, const1_rtx
, QImode
, 1, 1, lab_false
);
2614 /* Long long is aligned in the registers. */
2617 u
= build (BIT_AND_EXPR
, TREE_TYPE (reg
), reg
,
2618 build_int_2 (n_reg
- 1, 0));
2619 u
= build (PLUS_EXPR
, TREE_TYPE (reg
), reg
, u
);
2620 u
= build (MODIFY_EXPR
, TREE_TYPE (reg
), reg
, u
);
2621 TREE_SIDE_EFFECTS (u
) = 1;
2622 expand_expr (u
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
2626 t
= build (PLUS_EXPR
, ptr_type_node
, sav
, build_int_2 (sav_ofs
, 0));
2630 u
= build (POSTINCREMENT_EXPR
, TREE_TYPE (reg
), reg
, build_int_2 (n_reg
, 0));
2631 TREE_SIDE_EFFECTS (u
) = 1;
2633 u
= build1 (CONVERT_EXPR
, integer_type_node
, u
);
2634 TREE_SIDE_EFFECTS (u
) = 1;
2636 u
= build (MULT_EXPR
, integer_type_node
, u
, build_int_2 (sav_scale
, 0));
2637 TREE_SIDE_EFFECTS (u
) = 1;
2639 t
= build (PLUS_EXPR
, ptr_type_node
, t
, u
);
2640 TREE_SIDE_EFFECTS (t
) = 1;
2642 r
= expand_expr (t
, addr_rtx
, Pmode
, EXPAND_NORMAL
);
2644 emit_move_insn (addr_rtx
, r
);
2646 emit_jump_insn (gen_jump (lab_over
));
2648 emit_label (lab_false
);
2651 * ... otherwise out of the overflow area.
2654 /* Make sure we don't find reg 7 for the next int arg. */
2657 t
= build (MODIFY_EXPR
, TREE_TYPE (reg
), reg
, build_int_2 (8, 0));
2658 TREE_SIDE_EFFECTS (t
) = 1;
2659 expand_expr (t
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
2662 /* Care for on-stack alignment if needed. */
2667 t
= build (PLUS_EXPR
, TREE_TYPE (ovf
), ovf
, build_int_2 (7, 0));
2668 t
= build (BIT_AND_EXPR
, TREE_TYPE (t
), t
, build_int_2 (-8, -1));
2672 r
= expand_expr (t
, addr_rtx
, Pmode
, EXPAND_NORMAL
);
2674 emit_move_insn (addr_rtx
, r
);
2676 t
= build (PLUS_EXPR
, TREE_TYPE (t
), t
, build_int_2 (size
, 0));
2677 t
= build (MODIFY_EXPR
, TREE_TYPE (ovf
), ovf
, t
);
2678 TREE_SIDE_EFFECTS (t
) = 1;
2679 expand_expr (t
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
2681 emit_label (lab_over
);
2685 r
= gen_rtx_MEM (Pmode
, addr_rtx
);
2686 MEM_ALIAS_SET (r
) = get_varargs_alias_set ();
2687 emit_move_insn (addr_rtx
, r
);
2693 /* Generate a memory reference for expand_block_move, copying volatile,
2694 and other bits from an original memory reference. */
2697 expand_block_move_mem (mode
, addr
, orig_mem
)
2698 enum machine_mode mode
;
2702 rtx mem
= gen_rtx_MEM (mode
, addr
);
2704 MEM_COPY_ATTRIBUTES (mem
, orig_mem
);
2705 #ifdef MEM_UNALIGNED_P
2706 MEM_UNALIGNED_P (mem
) = MEM_UNALIGNED_P (orig_mem
);
2711 /* Expand a block move operation, and return 1 if successful. Return 0
2712 if we should let the compiler generate normal code.
2714 operands[0] is the destination
2715 operands[1] is the source
2716 operands[2] is the length
2717 operands[3] is the alignment */
2719 #define MAX_MOVE_REG 4
2722 expand_block_move (operands
)
2725 rtx orig_dest
= operands
[0];
2726 rtx orig_src
= operands
[1];
2727 rtx bytes_rtx
= operands
[2];
2728 rtx align_rtx
= operands
[3];
2729 int constp
= (GET_CODE (bytes_rtx
) == CONST_INT
);
2740 rtx stores
[MAX_MOVE_REG
];
2743 /* If this is not a fixed size move, just call memcpy */
2747 /* If this is not a fixed size alignment, abort */
2748 if (GET_CODE (align_rtx
) != CONST_INT
)
2750 align
= INTVAL (align_rtx
);
2752 /* Anything to move? */
2753 bytes
= INTVAL (bytes_rtx
);
2757 /* Don't support real large moves. If string instructions are not used,
2758 then don't generate more than 8 loads. */
2764 else if (! STRICT_ALIGNMENT
)
2766 if (TARGET_POWERPC64
&& align
>= 4)
2775 else if (bytes
> 8*align
)
2778 /* Move the address into scratch registers. */
2779 dest_reg
= copy_addr_to_reg (XEXP (orig_dest
, 0));
2780 src_reg
= copy_addr_to_reg (XEXP (orig_src
, 0));
2782 if (TARGET_STRING
) /* string instructions are available */
2784 for ( ; bytes
> 0; bytes
-= move_bytes
)
2786 if (bytes
> 24 /* move up to 32 bytes at a time */
2794 && ! fixed_regs
[12])
2796 move_bytes
= (bytes
> 32) ? 32 : bytes
;
2797 emit_insn (gen_movstrsi_8reg (expand_block_move_mem (BLKmode
,
2800 expand_block_move_mem (BLKmode
,
2803 GEN_INT ((move_bytes
== 32)
2807 else if (bytes
> 16 /* move up to 24 bytes at a time */
2813 && ! fixed_regs
[10])
2815 move_bytes
= (bytes
> 24) ? 24 : bytes
;
2816 emit_insn (gen_movstrsi_6reg (expand_block_move_mem (BLKmode
,
2819 expand_block_move_mem (BLKmode
,
2822 GEN_INT (move_bytes
),
2825 else if (bytes
> 8 /* move up to 16 bytes at a time */
2831 move_bytes
= (bytes
> 16) ? 16 : bytes
;
2832 emit_insn (gen_movstrsi_4reg (expand_block_move_mem (BLKmode
,
2835 expand_block_move_mem (BLKmode
,
2838 GEN_INT (move_bytes
),
2841 else if (bytes
>= 8 && TARGET_POWERPC64
2842 /* 64-bit loads and stores require word-aligned displacements. */
2843 && (align
>= 8 || (! STRICT_ALIGNMENT
&& align
>= 4)))
2846 tmp_reg
= gen_reg_rtx (DImode
);
2847 emit_move_insn (tmp_reg
,
2848 expand_block_move_mem (DImode
,
2849 src_reg
, orig_src
));
2850 emit_move_insn (expand_block_move_mem (DImode
,
2851 dest_reg
, orig_dest
),
2855 { /* move up to 8 bytes at a time */
2856 move_bytes
= (bytes
> 8) ? 8 : bytes
;
2857 emit_insn (gen_movstrsi_2reg (expand_block_move_mem (BLKmode
,
2860 expand_block_move_mem (BLKmode
,
2863 GEN_INT (move_bytes
),
2866 else if (bytes
>= 4 && (align
>= 4 || ! STRICT_ALIGNMENT
))
2867 { /* move 4 bytes */
2869 tmp_reg
= gen_reg_rtx (SImode
);
2870 emit_move_insn (tmp_reg
,
2871 expand_block_move_mem (SImode
,
2872 src_reg
, orig_src
));
2873 emit_move_insn (expand_block_move_mem (SImode
,
2874 dest_reg
, orig_dest
),
2877 else if (bytes
== 2 && (align
>= 2 || ! STRICT_ALIGNMENT
))
2878 { /* move 2 bytes */
2880 tmp_reg
= gen_reg_rtx (HImode
);
2881 emit_move_insn (tmp_reg
,
2882 expand_block_move_mem (HImode
,
2883 src_reg
, orig_src
));
2884 emit_move_insn (expand_block_move_mem (HImode
,
2885 dest_reg
, orig_dest
),
2888 else if (bytes
== 1) /* move 1 byte */
2891 tmp_reg
= gen_reg_rtx (QImode
);
2892 emit_move_insn (tmp_reg
,
2893 expand_block_move_mem (QImode
,
2894 src_reg
, orig_src
));
2895 emit_move_insn (expand_block_move_mem (QImode
,
2896 dest_reg
, orig_dest
),
2900 { /* move up to 4 bytes at a time */
2901 move_bytes
= (bytes
> 4) ? 4 : bytes
;
2902 emit_insn (gen_movstrsi_1reg (expand_block_move_mem (BLKmode
,
2905 expand_block_move_mem (BLKmode
,
2908 GEN_INT (move_bytes
),
2912 if (bytes
> move_bytes
)
2914 if (! TARGET_POWERPC64
)
2916 emit_insn (gen_addsi3 (src_reg
, src_reg
,
2917 GEN_INT (move_bytes
)));
2918 emit_insn (gen_addsi3 (dest_reg
, dest_reg
,
2919 GEN_INT (move_bytes
)));
2923 emit_insn (gen_adddi3 (src_reg
, src_reg
,
2924 GEN_INT (move_bytes
)));
2925 emit_insn (gen_adddi3 (dest_reg
, dest_reg
,
2926 GEN_INT (move_bytes
)));
2932 else /* string instructions not available */
2934 num_reg
= offset
= 0;
2935 for ( ; bytes
> 0; (bytes
-= move_bytes
), (offset
+= move_bytes
))
2937 /* Calculate the correct offset for src/dest */
2941 dest_addr
= dest_reg
;
2945 src_addr
= plus_constant (src_reg
, offset
);
2946 dest_addr
= plus_constant (dest_reg
, offset
);
2949 /* Generate the appropriate load and store, saving the stores
2951 if (bytes
>= 8 && TARGET_POWERPC64
2952 /* 64-bit loads and stores require word-aligned displacements. */
2953 && (align
>= 8 || (! STRICT_ALIGNMENT
&& align
>= 4)))
2956 tmp_reg
= gen_reg_rtx (DImode
);
2957 emit_insn (gen_movdi (tmp_reg
,
2958 expand_block_move_mem (DImode
,
2961 stores
[num_reg
++] = gen_movdi (expand_block_move_mem (DImode
,
2966 else if (bytes
>= 4 && (align
>= 4 || ! STRICT_ALIGNMENT
))
2969 tmp_reg
= gen_reg_rtx (SImode
);
2970 emit_insn (gen_movsi (tmp_reg
,
2971 expand_block_move_mem (SImode
,
2974 stores
[num_reg
++] = gen_movsi (expand_block_move_mem (SImode
,
2979 else if (bytes
>= 2 && (align
>= 2 || ! STRICT_ALIGNMENT
))
2982 tmp_reg
= gen_reg_rtx (HImode
);
2983 emit_insn (gen_movhi (tmp_reg
,
2984 expand_block_move_mem (HImode
,
2987 stores
[num_reg
++] = gen_movhi (expand_block_move_mem (HImode
,
2995 tmp_reg
= gen_reg_rtx (QImode
);
2996 emit_insn (gen_movqi (tmp_reg
,
2997 expand_block_move_mem (QImode
,
3000 stores
[num_reg
++] = gen_movqi (expand_block_move_mem (QImode
,
3006 if (num_reg
>= MAX_MOVE_REG
)
3008 for (i
= 0; i
< num_reg
; i
++)
3009 emit_insn (stores
[i
]);
3014 for (i
= 0; i
< num_reg
; i
++)
3015 emit_insn (stores
[i
]);
3022 /* Return 1 if OP is a load multiple operation. It is known to be a
3023 PARALLEL and the first section will be tested. */
3026 load_multiple_operation (op
, mode
)
3028 enum machine_mode mode ATTRIBUTE_UNUSED
;
3030 int count
= XVECLEN (op
, 0);
3031 unsigned int dest_regno
;
3035 /* Perform a quick check so we don't blow up below. */
3037 || GET_CODE (XVECEXP (op
, 0, 0)) != SET
3038 || GET_CODE (SET_DEST (XVECEXP (op
, 0, 0))) != REG
3039 || GET_CODE (SET_SRC (XVECEXP (op
, 0, 0))) != MEM
)
3042 dest_regno
= REGNO (SET_DEST (XVECEXP (op
, 0, 0)));
3043 src_addr
= XEXP (SET_SRC (XVECEXP (op
, 0, 0)), 0);
3045 for (i
= 1; i
< count
; i
++)
3047 rtx elt
= XVECEXP (op
, 0, i
);
3049 if (GET_CODE (elt
) != SET
3050 || GET_CODE (SET_DEST (elt
)) != REG
3051 || GET_MODE (SET_DEST (elt
)) != SImode
3052 || REGNO (SET_DEST (elt
)) != dest_regno
+ i
3053 || GET_CODE (SET_SRC (elt
)) != MEM
3054 || GET_MODE (SET_SRC (elt
)) != SImode
3055 || GET_CODE (XEXP (SET_SRC (elt
), 0)) != PLUS
3056 || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt
), 0), 0), src_addr
)
3057 || GET_CODE (XEXP (XEXP (SET_SRC (elt
), 0), 1)) != CONST_INT
3058 || INTVAL (XEXP (XEXP (SET_SRC (elt
), 0), 1)) != i
* 4)
3065 /* Similar, but tests for store multiple. Here, the second vector element
3066 is a CLOBBER. It will be tested later. */
3069 store_multiple_operation (op
, mode
)
3071 enum machine_mode mode ATTRIBUTE_UNUSED
;
3073 int count
= XVECLEN (op
, 0) - 1;
3074 unsigned int src_regno
;
3078 /* Perform a quick check so we don't blow up below. */
3080 || GET_CODE (XVECEXP (op
, 0, 0)) != SET
3081 || GET_CODE (SET_DEST (XVECEXP (op
, 0, 0))) != MEM
3082 || GET_CODE (SET_SRC (XVECEXP (op
, 0, 0))) != REG
)
3085 src_regno
= REGNO (SET_SRC (XVECEXP (op
, 0, 0)));
3086 dest_addr
= XEXP (SET_DEST (XVECEXP (op
, 0, 0)), 0);
3088 for (i
= 1; i
< count
; i
++)
3090 rtx elt
= XVECEXP (op
, 0, i
+ 1);
3092 if (GET_CODE (elt
) != SET
3093 || GET_CODE (SET_SRC (elt
)) != REG
3094 || GET_MODE (SET_SRC (elt
)) != SImode
3095 || REGNO (SET_SRC (elt
)) != src_regno
+ i
3096 || GET_CODE (SET_DEST (elt
)) != MEM
3097 || GET_MODE (SET_DEST (elt
)) != SImode
3098 || GET_CODE (XEXP (SET_DEST (elt
), 0)) != PLUS
3099 || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt
), 0), 0), dest_addr
)
3100 || GET_CODE (XEXP (XEXP (SET_DEST (elt
), 0), 1)) != CONST_INT
3101 || INTVAL (XEXP (XEXP (SET_DEST (elt
), 0), 1)) != i
* 4)
3108 /* Return 1 for an PARALLEL suitable for mtcrf. */
3111 mtcrf_operation (op
, mode
)
3113 enum machine_mode mode ATTRIBUTE_UNUSED
;
3115 int count
= XVECLEN (op
, 0);
3119 /* Perform a quick check so we don't blow up below. */
3121 || GET_CODE (XVECEXP (op
, 0, 0)) != SET
3122 || GET_CODE (SET_SRC (XVECEXP (op
, 0, 0))) != UNSPEC
3123 || XVECLEN (SET_SRC (XVECEXP (op
, 0, 0)), 0) != 2)
3125 src_reg
= XVECEXP (SET_SRC (XVECEXP (op
, 0, 0)), 0, 0);
3127 if (GET_CODE (src_reg
) != REG
3128 || GET_MODE (src_reg
) != SImode
3129 || ! INT_REGNO_P (REGNO (src_reg
)))
3132 for (i
= 0; i
< count
; i
++)
3134 rtx exp
= XVECEXP (op
, 0, i
);
3138 if (GET_CODE (exp
) != SET
3139 || GET_CODE (SET_DEST (exp
)) != REG
3140 || GET_MODE (SET_DEST (exp
)) != CCmode
3141 || ! CR_REGNO_P (REGNO (SET_DEST (exp
))))
3143 unspec
= SET_SRC (exp
);
3144 maskval
= 1 << (MAX_CR_REGNO
- REGNO (SET_DEST (exp
)));
3146 if (GET_CODE (unspec
) != UNSPEC
3147 || XINT (unspec
, 1) != 20
3148 || XVECLEN (unspec
, 0) != 2
3149 || XVECEXP (unspec
, 0, 0) != src_reg
3150 || GET_CODE (XVECEXP (unspec
, 0, 1)) != CONST_INT
3151 || INTVAL (XVECEXP (unspec
, 0, 1)) != maskval
)
3157 /* Return 1 for an PARALLEL suitable for lmw. */
3160 lmw_operation (op
, mode
)
3162 enum machine_mode mode ATTRIBUTE_UNUSED
;
3164 int count
= XVECLEN (op
, 0);
3165 unsigned int dest_regno
;
3167 unsigned int base_regno
;
3168 HOST_WIDE_INT offset
;
3171 /* Perform a quick check so we don't blow up below. */
3173 || GET_CODE (XVECEXP (op
, 0, 0)) != SET
3174 || GET_CODE (SET_DEST (XVECEXP (op
, 0, 0))) != REG
3175 || GET_CODE (SET_SRC (XVECEXP (op
, 0, 0))) != MEM
)
3178 dest_regno
= REGNO (SET_DEST (XVECEXP (op
, 0, 0)));
3179 src_addr
= XEXP (SET_SRC (XVECEXP (op
, 0, 0)), 0);
3182 || count
!= 32 - (int) dest_regno
)
3185 if (LEGITIMATE_INDIRECT_ADDRESS_P (src_addr
, 0))
3188 base_regno
= REGNO (src_addr
);
3189 if (base_regno
== 0)
3192 else if (LEGITIMATE_OFFSET_ADDRESS_P (SImode
, src_addr
, 0))
3194 offset
= INTVAL (XEXP (src_addr
, 1));
3195 base_regno
= REGNO (XEXP (src_addr
, 0));
3200 for (i
= 0; i
< count
; i
++)
3202 rtx elt
= XVECEXP (op
, 0, i
);
3205 HOST_WIDE_INT newoffset
;
3207 if (GET_CODE (elt
) != SET
3208 || GET_CODE (SET_DEST (elt
)) != REG
3209 || GET_MODE (SET_DEST (elt
)) != SImode
3210 || REGNO (SET_DEST (elt
)) != dest_regno
+ i
3211 || GET_CODE (SET_SRC (elt
)) != MEM
3212 || GET_MODE (SET_SRC (elt
)) != SImode
)
3214 newaddr
= XEXP (SET_SRC (elt
), 0);
3215 if (LEGITIMATE_INDIRECT_ADDRESS_P (newaddr
, 0))
3220 else if (LEGITIMATE_OFFSET_ADDRESS_P (SImode
, newaddr
, 0))
3222 addr_reg
= XEXP (newaddr
, 0);
3223 newoffset
= INTVAL (XEXP (newaddr
, 1));
3227 if (REGNO (addr_reg
) != base_regno
3228 || newoffset
!= offset
+ 4 * i
)
3235 /* Return 1 for an PARALLEL suitable for stmw. */
3238 stmw_operation (op
, mode
)
3240 enum machine_mode mode ATTRIBUTE_UNUSED
;
3242 int count
= XVECLEN (op
, 0);
3243 unsigned int src_regno
;
3245 unsigned int base_regno
;
3246 HOST_WIDE_INT offset
;
3249 /* Perform a quick check so we don't blow up below. */
3251 || GET_CODE (XVECEXP (op
, 0, 0)) != SET
3252 || GET_CODE (SET_DEST (XVECEXP (op
, 0, 0))) != MEM
3253 || GET_CODE (SET_SRC (XVECEXP (op
, 0, 0))) != REG
)
3256 src_regno
= REGNO (SET_SRC (XVECEXP (op
, 0, 0)));
3257 dest_addr
= XEXP (SET_DEST (XVECEXP (op
, 0, 0)), 0);
3260 || count
!= 32 - (int) src_regno
)
3263 if (LEGITIMATE_INDIRECT_ADDRESS_P (dest_addr
, 0))
3266 base_regno
= REGNO (dest_addr
);
3267 if (base_regno
== 0)
3270 else if (LEGITIMATE_OFFSET_ADDRESS_P (SImode
, dest_addr
, 0))
3272 offset
= INTVAL (XEXP (dest_addr
, 1));
3273 base_regno
= REGNO (XEXP (dest_addr
, 0));
3278 for (i
= 0; i
< count
; i
++)
3280 rtx elt
= XVECEXP (op
, 0, i
);
3283 HOST_WIDE_INT newoffset
;
3285 if (GET_CODE (elt
) != SET
3286 || GET_CODE (SET_SRC (elt
)) != REG
3287 || GET_MODE (SET_SRC (elt
)) != SImode
3288 || REGNO (SET_SRC (elt
)) != src_regno
+ i
3289 || GET_CODE (SET_DEST (elt
)) != MEM
3290 || GET_MODE (SET_DEST (elt
)) != SImode
)
3292 newaddr
= XEXP (SET_DEST (elt
), 0);
3293 if (LEGITIMATE_INDIRECT_ADDRESS_P (newaddr
, 0))
3298 else if (LEGITIMATE_OFFSET_ADDRESS_P (SImode
, newaddr
, 0))
3300 addr_reg
= XEXP (newaddr
, 0);
3301 newoffset
= INTVAL (XEXP (newaddr
, 1));
3305 if (REGNO (addr_reg
) != base_regno
3306 || newoffset
!= offset
+ 4 * i
)
3314 /* A validation routine: say whether CODE, a condition code,
3315 and MODE match. The other alternatives either don't make
3316 sense or should never be generated. */
3318 validate_condition_mode (code
, mode
)
3320 enum machine_mode mode
;
3322 if (GET_RTX_CLASS (code
) != '<'
3323 || GET_MODE_CLASS (mode
) != MODE_CC
)
3326 /* These don't make sense. */
3327 if ((code
== GT
|| code
== LT
|| code
== GE
|| code
== LE
)
3328 && mode
== CCUNSmode
)
3331 if ((code
== GTU
|| code
== LTU
|| code
== GEU
|| code
== LEU
)
3332 && mode
!= CCUNSmode
)
3335 if (mode
!= CCFPmode
3336 && (code
== ORDERED
|| code
== UNORDERED
3337 || code
== UNEQ
|| code
== LTGT
3338 || code
== UNGT
|| code
== UNLT
3339 || code
== UNGE
|| code
== UNLE
))
3342 /* These should never be generated except for
3343 flag_unsafe_math_optimizations. */
3344 if (mode
== CCFPmode
3345 && ! flag_unsafe_math_optimizations
3346 && (code
== LE
|| code
== GE
3347 || code
== UNEQ
|| code
== LTGT
3348 || code
== UNGT
|| code
== UNLT
))
3351 /* These are invalid; the information is not there. */
3352 if (mode
== CCEQmode
3353 && code
!= EQ
&& code
!= NE
)
3357 /* Return 1 if OP is a comparison operation that is valid for a branch insn.
3358 We only check the opcode against the mode of the CC value here. */
3361 branch_comparison_operator (op
, mode
)
3363 enum machine_mode mode ATTRIBUTE_UNUSED
;
3365 enum rtx_code code
= GET_CODE (op
);
3366 enum machine_mode cc_mode
;
3368 if (GET_RTX_CLASS (code
) != '<')
3371 cc_mode
= GET_MODE (XEXP (op
, 0));
3372 if (GET_MODE_CLASS (cc_mode
) != MODE_CC
)
3375 validate_condition_mode (code
, cc_mode
);
3380 /* Return 1 if OP is a comparison operation that is valid for a branch
3381 insn and which is true if the corresponding bit in the CC register
3385 branch_positive_comparison_operator (op
, mode
)
3387 enum machine_mode mode
;
3391 if (! branch_comparison_operator (op
, mode
))
3394 code
= GET_CODE (op
);
3395 return (code
== EQ
|| code
== LT
|| code
== GT
3396 || code
== LTU
|| code
== GTU
3397 || code
== UNORDERED
);
3401 /* Return 1 if OP is a comparison operation that is valid for an scc insn.
3402 We check the opcode against the mode of the CC value and disallow EQ or
3403 NE comparisons for integers. */
3406 scc_comparison_operator (op
, mode
)
3408 enum machine_mode mode
;
3410 enum rtx_code code
= GET_CODE (op
);
3411 enum machine_mode cc_mode
;
3413 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
3416 if (GET_RTX_CLASS (code
) != '<')
3419 cc_mode
= GET_MODE (XEXP (op
, 0));
3420 if (GET_MODE_CLASS (cc_mode
) != MODE_CC
)
3423 validate_condition_mode (code
, cc_mode
);
3425 if (code
== NE
&& cc_mode
!= CCFPmode
)
3432 trap_comparison_operator (op
, mode
)
3434 enum machine_mode mode
;
3436 if (mode
!= VOIDmode
&& mode
!= GET_MODE (op
))
3438 return GET_RTX_CLASS (GET_CODE (op
)) == '<';
3442 boolean_operator (op
, mode
)
3444 enum machine_mode mode ATTRIBUTE_UNUSED
;
3446 enum rtx_code code
= GET_CODE (op
);
3447 return (code
== AND
|| code
== IOR
|| code
== XOR
);
3451 boolean_or_operator (op
, mode
)
3453 enum machine_mode mode ATTRIBUTE_UNUSED
;
3455 enum rtx_code code
= GET_CODE (op
);
3456 return (code
== IOR
|| code
== XOR
);
3460 min_max_operator (op
, mode
)
3462 enum machine_mode mode ATTRIBUTE_UNUSED
;
3464 enum rtx_code code
= GET_CODE (op
);
3465 return (code
== SMIN
|| code
== SMAX
|| code
== UMIN
|| code
== UMAX
);
3468 /* Return 1 if ANDOP is a mask that has no bits on that are not in the
3469 mask required to convert the result of a rotate insn into a shift
3470 left insn of SHIFTOP bits. Both are known to be CONST_INT. */
3473 includes_lshift_p (shiftop
, andop
)
3474 register rtx shiftop
;
3477 unsigned HOST_WIDE_INT shift_mask
= ~(unsigned HOST_WIDE_INT
) 0;
3479 shift_mask
<<= INTVAL (shiftop
);
3481 return (INTVAL (andop
) & ~shift_mask
) == 0;
3484 /* Similar, but for right shift. */
3487 includes_rshift_p (shiftop
, andop
)
3488 register rtx shiftop
;
3491 unsigned HOST_WIDE_INT shift_mask
= ~(unsigned HOST_WIDE_INT
) 0;
3493 shift_mask
>>= INTVAL (shiftop
);
3495 return (INTVAL (andop
) & ~shift_mask
) == 0;
3498 /* Return 1 if ANDOP is a mask that has no bits on that are not in the
3499 mask required to convert the result of a rotate insn into a shift
3500 left insn of SHIFTOP bits. */
3503 includes_lshift64_p (shiftop
, andop
)
3504 register rtx shiftop
;
3507 #if HOST_BITS_PER_WIDE_INT == 64
3508 unsigned HOST_WIDE_INT shift_mask
= ~(unsigned HOST_WIDE_INT
) 0;
3510 shift_mask
<<= INTVAL (shiftop
);
3512 return (INTVAL (andop
) & ~shift_mask
) == 0;
3514 unsigned HOST_WIDE_INT shift_mask_low
= ~(unsigned HOST_WIDE_INT
) 0;
3515 unsigned HOST_WIDE_INT shift_mask_high
= ~(unsigned HOST_WIDE_INT
) 0;
3517 shift_mask_low
<<= INTVAL (shiftop
);
3519 if (INTVAL (shiftop
) > 32)
3520 shift_mask_high
<<= (INTVAL (shiftop
) - 32);
3522 if (GET_CODE (andop
) == CONST_INT
)
3523 return (INTVAL (andop
) & ~shift_mask_low
) == 0;
3525 return ((CONST_DOUBLE_HIGH (andop
) & ~shift_mask_high
) == 0
3526 && (CONST_DOUBLE_LOW (andop
) & ~shift_mask_low
) == 0);
3530 /* Return 1 if REGNO (reg1) == REGNO (reg2) - 1 making them candidates
3531 for lfq and stfq insns.
3533 Note reg1 and reg2 *must* be hard registers. To be sure we will
3534 abort if we are passed pseudo registers. */
3537 registers_ok_for_quad_peep (reg1
, reg2
)
3540 /* We might have been passed a SUBREG. */
3541 if (GET_CODE (reg1
) != REG
|| GET_CODE (reg2
) != REG
)
3544 return (REGNO (reg1
) == REGNO (reg2
) - 1);
3547 /* Return 1 if addr1 and addr2 are suitable for lfq or stfq insn. addr1 and
3548 addr2 must be in consecutive memory locations (addr2 == addr1 + 8). */
3551 addrs_ok_for_quad_peep (addr1
, addr2
)
3558 /* Extract an offset (if used) from the first addr. */
3559 if (GET_CODE (addr1
) == PLUS
)
3561 /* If not a REG, return zero. */
3562 if (GET_CODE (XEXP (addr1
, 0)) != REG
)
3566 reg1
= REGNO (XEXP (addr1
, 0));
3567 /* The offset must be constant! */
3568 if (GET_CODE (XEXP (addr1
, 1)) != CONST_INT
)
3570 offset1
= INTVAL (XEXP (addr1
, 1));
3573 else if (GET_CODE (addr1
) != REG
)
3577 reg1
= REGNO (addr1
);
3578 /* This was a simple (mem (reg)) expression. Offset is 0. */
3582 /* Make sure the second address is a (mem (plus (reg) (const_int))). */
3583 if (GET_CODE (addr2
) != PLUS
)
3586 if (GET_CODE (XEXP (addr2
, 0)) != REG
3587 || GET_CODE (XEXP (addr2
, 1)) != CONST_INT
)
3590 if (reg1
!= REGNO (XEXP (addr2
, 0)))
3593 /* The offset for the second addr must be 8 more than the first addr. */
3594 if (INTVAL (XEXP (addr2
, 1)) != offset1
+ 8)
3597 /* All the tests passed. addr1 and addr2 are valid for lfq or stfq
3602 /* Return the register class of a scratch register needed to copy IN into
3603 or out of a register in CLASS in MODE. If it can be done directly,
3604 NO_REGS is returned. */
3607 secondary_reload_class (class, mode
, in
)
3608 enum reg_class
class;
3609 enum machine_mode mode ATTRIBUTE_UNUSED
;
3614 if (TARGET_ELF
|| (DEFAULT_ABI
== ABI_DARWIN
&& flag_pic
))
3616 /* We cannot copy a symbolic operand directly into anything
3617 other than BASE_REGS for TARGET_ELF. So indicate that a
3618 register from BASE_REGS is needed as an intermediate
3621 On Darwin, pic addresses require a load from memory, which
3622 needs a base register. */
3623 if (class != BASE_REGS
3624 && (GET_CODE (in
) == SYMBOL_REF
3625 || GET_CODE (in
) == HIGH
3626 || GET_CODE (in
) == LABEL_REF
3627 || GET_CODE (in
) == CONST
))
3631 if (GET_CODE (in
) == REG
)
3634 if (regno
>= FIRST_PSEUDO_REGISTER
)
3636 regno
= true_regnum (in
);
3637 if (regno
>= FIRST_PSEUDO_REGISTER
)
3641 else if (GET_CODE (in
) == SUBREG
)
3643 regno
= true_regnum (in
);
3644 if (regno
>= FIRST_PSEUDO_REGISTER
)
3650 /* We can place anything into GENERAL_REGS and can put GENERAL_REGS
3652 if (class == GENERAL_REGS
|| class == BASE_REGS
3653 || (regno
>= 0 && INT_REGNO_P (regno
)))
3656 /* Constants, memory, and FP registers can go into FP registers. */
3657 if ((regno
== -1 || FP_REGNO_P (regno
))
3658 && (class == FLOAT_REGS
|| class == NON_SPECIAL_REGS
))
3661 /* We can copy among the CR registers. */
3662 if ((class == CR_REGS
|| class == CR0_REGS
)
3663 && regno
>= 0 && CR_REGNO_P (regno
))
3666 /* Otherwise, we need GENERAL_REGS. */
3667 return GENERAL_REGS
;
3670 /* Given a comparison operation, return the bit number in CCR to test. We
3671 know this is a valid comparison.
3673 SCC_P is 1 if this is for an scc. That means that %D will have been
3674 used instead of %C, so the bits will be in different places.
3676 Return -1 if OP isn't a valid comparison for some reason. */
3683 enum rtx_code code
= GET_CODE (op
);
3684 enum machine_mode cc_mode
;
3689 if (GET_RTX_CLASS (code
) != '<')
3694 if (GET_CODE (reg
) != REG
3695 || ! CR_REGNO_P (REGNO (reg
)))
3698 cc_mode
= GET_MODE (reg
);
3699 cc_regnum
= REGNO (reg
);
3700 base_bit
= 4 * (cc_regnum
- CR0_REGNO
);
3702 validate_condition_mode (code
, cc_mode
);
3707 return scc_p
? base_bit
+ 3 : base_bit
+ 2;
3709 return base_bit
+ 2;
3710 case GT
: case GTU
: case UNLE
:
3711 return base_bit
+ 1;
3712 case LT
: case LTU
: case UNGE
:
3714 case ORDERED
: case UNORDERED
:
3715 return base_bit
+ 3;
3718 /* If scc, we will have done a cror to put the bit in the
3719 unordered position. So test that bit. For integer, this is ! LT
3720 unless this is an scc insn. */
3721 return scc_p
? base_bit
+ 3 : base_bit
;
3724 return scc_p
? base_bit
+ 3 : base_bit
+ 1;
3731 /* Return the GOT register. */
3734 rs6000_got_register (value
)
3735 rtx value ATTRIBUTE_UNUSED
;
3737 /* The second flow pass currently (June 1999) can't update regs_ever_live
3738 without disturbing other parts of the compiler, so update it here to
3739 make the prolog/epilogue code happy. */
3740 if (no_new_pseudos
&& ! regs_ever_live
[PIC_OFFSET_TABLE_REGNUM
])
3741 regs_ever_live
[PIC_OFFSET_TABLE_REGNUM
] = 1;
3743 current_function_uses_pic_offset_table
= 1;
3745 return pic_offset_table_rtx
;
3748 /* Functions to init, mark and free struct machine_function.
3749 These will be called, via pointer variables,
3750 from push_function_context and pop_function_context. */
3753 rs6000_init_machine_status (p
)
3756 p
->machine
= (machine_function
*) xcalloc (1, sizeof (machine_function
));
3760 rs6000_free_machine_status (p
)
3763 if (p
->machine
== NULL
)
3771 /* Print an operand. Recognize special options, documented below. */
3774 #define SMALL_DATA_RELOC ((rs6000_sdata == SDATA_EABI) ? "sda21" : "sdarel")
3775 #define SMALL_DATA_REG ((rs6000_sdata == SDATA_EABI) ? 0 : 13)
3777 #define SMALL_DATA_RELOC "sda21"
3778 #define SMALL_DATA_REG 0
3782 print_operand (file
, x
, code
)
3790 /* These macros test for integers and extract the low-order bits. */
3792 ((GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE) \
3793 && GET_MODE (X) == VOIDmode)
3795 #define INT_LOWPART(X) \
3796 (GET_CODE (X) == CONST_INT ? INTVAL (X) : CONST_DOUBLE_LOW (X))
3801 /* Write out an instruction after the call which may be replaced
3802 with glue code by the loader. This depends on the AIX version. */
3803 asm_fprintf (file
, RS6000_CALL_GLUE
);
3807 /* Write out either a '.' or '$' for the current location, depending
3808 on whether this is Solaris or not. */
3809 putc ((DEFAULT_ABI
== ABI_SOLARIS
) ? '.' : '$', file
);
3812 /* %a is output_address. */
3815 /* If X is a constant integer whose low-order 5 bits are zero,
3816 write 'l'. Otherwise, write 'r'. This is a kludge to fix a bug
3817 in the AIX assembler where "sri" with a zero shift count
3818 write a trash instruction. */
3819 if (GET_CODE (x
) == CONST_INT
&& (INTVAL (x
) & 31) == 0)
3826 /* If constant, low-order 16 bits of constant, unsigned.
3827 Otherwise, write normally. */
3829 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INT_LOWPART (x
) & 0xffff);
3831 print_operand (file
, x
, 0);
3835 /* If the low-order bit is zero, write 'r'; otherwise, write 'l'
3836 for 64-bit mask direction. */
3837 putc (((INT_LOWPART(x
) & 1) == 0 ? 'r' : 'l'), file
);
3840 /* %c is output_addr_const if a CONSTANT_ADDRESS_P, otherwise
3844 /* There used to be a comment for 'C' reading "This is an
3845 optional cror needed for certain floating-point
3846 comparisons. Otherwise write nothing." */
3848 /* Similar, except that this is for an scc, so we must be able to
3849 encode the test in a single bit that is one. We do the above
3850 for any LE, GE, GEU, or LEU and invert the bit for NE. */
3851 if (GET_CODE (x
) == LE
|| GET_CODE (x
) == GE
3852 || GET_CODE (x
) == LEU
|| GET_CODE (x
) == GEU
)
3854 int base_bit
= 4 * (REGNO (XEXP (x
, 0)) - CR0_REGNO
);
3856 fprintf (file
, "cror %d,%d,%d\n\t", base_bit
+ 3,
3858 base_bit
+ (GET_CODE (x
) == GE
|| GET_CODE (x
) == GEU
));
3861 else if (GET_CODE (x
) == NE
)
3863 int base_bit
= 4 * (REGNO (XEXP (x
, 0)) - CR0_REGNO
);
3865 fprintf (file
, "crnor %d,%d,%d\n\t", base_bit
+ 3,
3866 base_bit
+ 2, base_bit
+ 2);
3871 /* X is a CR register. Print the number of the EQ bit of the CR */
3872 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
3873 output_operand_lossage ("invalid %%E value");
3875 fprintf (file
, "%d", 4 * (REGNO (x
) - CR0_REGNO
) + 2);
3879 /* X is a CR register. Print the shift count needed to move it
3880 to the high-order four bits. */
3881 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
3882 output_operand_lossage ("invalid %%f value");
3884 fprintf (file
, "%d", 4 * (REGNO (x
) - CR0_REGNO
));
3888 /* Similar, but print the count for the rotate in the opposite
3890 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
3891 output_operand_lossage ("invalid %%F value");
3893 fprintf (file
, "%d", 32 - 4 * (REGNO (x
) - CR0_REGNO
));
3897 /* X is a constant integer. If it is negative, print "m",
3898 otherwise print "z". This is to make a aze or ame insn. */
3899 if (GET_CODE (x
) != CONST_INT
)
3900 output_operand_lossage ("invalid %%G value");
3901 else if (INTVAL (x
) >= 0)
3908 /* If constant, output low-order five bits. Otherwise,
3911 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INT_LOWPART (x
) & 31);
3913 print_operand (file
, x
, 0);
3917 /* If constant, output low-order six bits. Otherwise,
3920 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INT_LOWPART (x
) & 63);
3922 print_operand (file
, x
, 0);
3926 /* Print `i' if this is a constant, else nothing. */
3932 /* Write the bit number in CCR for jump. */
3935 output_operand_lossage ("invalid %%j code");
3937 fprintf (file
, "%d", i
);
3941 /* Similar, but add one for shift count in rlinm for scc and pass
3942 scc flag to `ccr_bit'. */
3945 output_operand_lossage ("invalid %%J code");
3947 /* If we want bit 31, write a shift count of zero, not 32. */
3948 fprintf (file
, "%d", i
== 31 ? 0 : i
+ 1);
3952 /* X must be a constant. Write the 1's complement of the
3955 output_operand_lossage ("invalid %%k value");
3957 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, ~ INT_LOWPART (x
));
3961 /* X must be a symbolic constant on ELF. Write an
3962 expression suitable for an 'addi' that adds in the low 16
3964 if (GET_CODE (x
) != CONST
)
3966 print_operand_address (file
, x
);
3971 if (GET_CODE (XEXP (x
, 0)) != PLUS
3972 || (GET_CODE (XEXP (XEXP (x
, 0), 0)) != SYMBOL_REF
3973 && GET_CODE (XEXP (XEXP (x
, 0), 0)) != LABEL_REF
)
3974 || GET_CODE (XEXP (XEXP (x
, 0), 1)) != CONST_INT
)
3975 output_operand_lossage ("invalid %%K value");
3976 print_operand_address (file
, XEXP (XEXP (x
, 0), 0));
3978 print_operand (file
, XEXP (XEXP (x
, 0), 1), 0);
3982 /* %l is output_asm_label. */
3985 /* Write second word of DImode or DFmode reference. Works on register
3986 or non-indexed memory only. */
3987 if (GET_CODE (x
) == REG
)
3988 fprintf (file
, "%s", reg_names
[REGNO (x
) + 1]);
3989 else if (GET_CODE (x
) == MEM
)
3991 /* Handle possible auto-increment. Since it is pre-increment and
3992 we have already done it, we can just use an offset of word. */
3993 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
3994 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
3995 output_address (plus_constant (XEXP (XEXP (x
, 0), 0),
3998 output_address (plus_constant (XEXP (x
, 0), UNITS_PER_WORD
));
4000 if (small_data_operand (x
, GET_MODE (x
)))
4001 fprintf (file
, "@%s(%s)", SMALL_DATA_RELOC
,
4002 reg_names
[SMALL_DATA_REG
]);
4007 /* MB value for a mask operand. */
4008 if (! mask_operand (x
, VOIDmode
))
4009 output_operand_lossage ("invalid %%m value");
4011 val
= INT_LOWPART (x
);
4013 /* If the high bit is set and the low bit is not, the value is zero.
4014 If the high bit is zero, the value is the first 1 bit we find from
4016 if ((val
& 0x80000000) && ((val
& 1) == 0))
4021 else if ((val
& 0x80000000) == 0)
4023 for (i
= 1; i
< 32; i
++)
4024 if ((val
<<= 1) & 0x80000000)
4026 fprintf (file
, "%d", i
);
4030 /* Otherwise, look for the first 0 bit from the right. The result is its
4031 number plus 1. We know the low-order bit is one. */
4032 for (i
= 0; i
< 32; i
++)
4033 if (((val
>>= 1) & 1) == 0)
4036 /* If we ended in ...01, i would be 0. The correct value is 31, so
4038 fprintf (file
, "%d", 31 - i
);
4042 /* ME value for a mask operand. */
4043 if (! mask_operand (x
, VOIDmode
))
4044 output_operand_lossage ("invalid %%M value");
4046 val
= INT_LOWPART (x
);
4048 /* If the low bit is set and the high bit is not, the value is 31.
4049 If the low bit is zero, the value is the first 1 bit we find from
4051 if ((val
& 1) && ((val
& 0x80000000) == 0))
4056 else if ((val
& 1) == 0)
4058 for (i
= 0; i
< 32; i
++)
4059 if ((val
>>= 1) & 1)
4062 /* If we had ....10, i would be 0. The result should be
4063 30, so we need 30 - i. */
4064 fprintf (file
, "%d", 30 - i
);
4068 /* Otherwise, look for the first 0 bit from the left. The result is its
4069 number minus 1. We know the high-order bit is one. */
4070 for (i
= 0; i
< 32; i
++)
4071 if (((val
<<= 1) & 0x80000000) == 0)
4074 fprintf (file
, "%d", i
);
4077 /* %n outputs the negative of its operand. */
4080 /* Write the number of elements in the vector times 4. */
4081 if (GET_CODE (x
) != PARALLEL
)
4082 output_operand_lossage ("invalid %%N value");
4084 fprintf (file
, "%d", XVECLEN (x
, 0) * 4);
4088 /* Similar, but subtract 1 first. */
4089 if (GET_CODE (x
) != PARALLEL
)
4090 output_operand_lossage ("invalid %%O value");
4092 fprintf (file
, "%d", (XVECLEN (x
, 0) - 1) * 4);
4096 /* X is a CONST_INT that is a power of two. Output the logarithm. */
4098 || (i
= exact_log2 (INT_LOWPART (x
))) < 0)
4099 output_operand_lossage ("invalid %%p value");
4101 fprintf (file
, "%d", i
);
4105 /* The operand must be an indirect memory reference. The result
4106 is the register number. */
4107 if (GET_CODE (x
) != MEM
|| GET_CODE (XEXP (x
, 0)) != REG
4108 || REGNO (XEXP (x
, 0)) >= 32)
4109 output_operand_lossage ("invalid %%P value");
4111 fprintf (file
, "%d", REGNO (XEXP (x
, 0)));
4115 /* This outputs the logical code corresponding to a boolean
4116 expression. The expression may have one or both operands
4117 negated (if one, only the first one). For condition register
4118 logical operations, it will also treat the negated
4119 CR codes as NOTs, but not handle NOTs of them. */
4121 const char *const *t
= 0;
4123 enum rtx_code code
= GET_CODE (x
);
4124 static const char * const tbl
[3][3] = {
4125 { "and", "andc", "nor" },
4126 { "or", "orc", "nand" },
4127 { "xor", "eqv", "xor" } };
4131 else if (code
== IOR
)
4133 else if (code
== XOR
)
4136 output_operand_lossage ("invalid %%q value");
4138 if (GET_CODE (XEXP (x
, 0)) != NOT
)
4142 if (GET_CODE (XEXP (x
, 1)) == NOT
)
4153 /* X is a CR register. Print the mask for `mtcrf'. */
4154 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
4155 output_operand_lossage ("invalid %%R value");
4157 fprintf (file
, "%d", 128 >> (REGNO (x
) - CR0_REGNO
));
4161 /* Low 5 bits of 32 - value */
4163 output_operand_lossage ("invalid %%s value");
4165 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, (32 - INT_LOWPART (x
)) & 31);
4169 /* PowerPC64 mask position. All 0's and all 1's are excluded.
4170 CONST_INT 32-bit mask is considered sign-extended so any
4171 transition must occur within the CONST_INT, not on the boundary. */
4172 if (! mask64_operand (x
, VOIDmode
))
4173 output_operand_lossage ("invalid %%S value");
4175 val
= INT_LOWPART (x
);
4177 if (val
& 1) /* Clear Left */
4179 for (i
= 0; i
< HOST_BITS_PER_WIDE_INT
; i
++)
4180 if (!((val
>>= 1) & 1))
4183 #if HOST_BITS_PER_WIDE_INT == 32
4184 if (GET_CODE (x
) == CONST_DOUBLE
&& i
== 32)
4186 val
= CONST_DOUBLE_HIGH (x
);
4191 for (i
= 32; i
< 64; i
++)
4192 if (!((val
>>= 1) & 1))
4196 /* i = index of last set bit from right
4197 mask begins at 63 - i from left */
4199 output_operand_lossage ("%%S computed all 1's mask");
4201 fprintf (file
, "%d", 63 - i
);
4204 else /* Clear Right */
4206 for (i
= 0; i
< HOST_BITS_PER_WIDE_INT
; i
++)
4207 if ((val
>>= 1) & 1)
4210 #if HOST_BITS_PER_WIDE_INT == 32
4211 if (GET_CODE (x
) == CONST_DOUBLE
&& i
== 32)
4213 val
= CONST_DOUBLE_HIGH (x
);
4215 if (val
== (HOST_WIDE_INT
) -1)
4218 for (i
= 32; i
< 64; i
++)
4219 if ((val
>>= 1) & 1)
4223 /* i = index of last clear bit from right
4224 mask ends at 62 - i from left */
4226 output_operand_lossage ("%%S computed all 0's mask");
4228 fprintf (file
, "%d", 62 - i
);
4233 /* Print the symbolic name of a branch target register. */
4234 if (GET_CODE (x
) != REG
|| (REGNO (x
) != LINK_REGISTER_REGNUM
4235 && REGNO (x
) != COUNT_REGISTER_REGNUM
))
4236 output_operand_lossage ("invalid %%T value");
4237 else if (REGNO (x
) == LINK_REGISTER_REGNUM
)
4238 fputs (TARGET_NEW_MNEMONICS
? "lr" : "r", file
);
4240 fputs ("ctr", file
);
4244 /* High-order 16 bits of constant for use in unsigned operand. */
4246 output_operand_lossage ("invalid %%u value");
4248 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
,
4249 (INT_LOWPART (x
) >> 16) & 0xffff);
4253 /* High-order 16 bits of constant for use in signed operand. */
4255 output_operand_lossage ("invalid %%v value");
4258 int value
= (INT_LOWPART (x
) >> 16) & 0xffff;
4260 /* Solaris assembler doesn't like lis 0,0x8000 */
4261 if (DEFAULT_ABI
== ABI_SOLARIS
&& (value
& 0x8000) != 0)
4262 fprintf (file
, "%d", value
| (~0 << 16));
4264 fprintf (file
, "0x%x", value
);
4269 /* Print `u' if this has an auto-increment or auto-decrement. */
4270 if (GET_CODE (x
) == MEM
4271 && (GET_CODE (XEXP (x
, 0)) == PRE_INC
4272 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
))
4277 /* Print the trap code for this operand. */
4278 switch (GET_CODE (x
))
4281 fputs ("eq", file
); /* 4 */
4284 fputs ("ne", file
); /* 24 */
4287 fputs ("lt", file
); /* 16 */
4290 fputs ("le", file
); /* 20 */
4293 fputs ("gt", file
); /* 8 */
4296 fputs ("ge", file
); /* 12 */
4299 fputs ("llt", file
); /* 2 */
4302 fputs ("lle", file
); /* 6 */
4305 fputs ("lgt", file
); /* 1 */
4308 fputs ("lge", file
); /* 5 */
4316 /* If constant, low-order 16 bits of constant, signed. Otherwise, write
4319 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
,
4320 ((INT_LOWPART (x
) & 0xffff) ^ 0x8000) - 0x8000);
4322 print_operand (file
, x
, 0);
4326 /* MB value for a PowerPC64 rldic operand. */
4327 if (! rldic_operand (x
, VOIDmode
))
4328 output_operand_lossage ("invalid %%W value");
4330 val
= (GET_CODE (x
) == CONST_INT
4331 ? INTVAL (x
) : CONST_DOUBLE_HIGH (x
));
4336 for (i
= 0; i
< HOST_BITS_PER_WIDE_INT
; i
++)
4337 if ((val
<<= 1) < 0)
4340 #if HOST_BITS_PER_WIDE_INT == 32
4341 if (GET_CODE (x
) == CONST_INT
&& i
>= 0)
4342 i
+= 32; /* zero-extend high-part was all 0's */
4343 else if (GET_CODE (x
) == CONST_DOUBLE
&& i
== 32)
4345 val
= CONST_DOUBLE_LOW (x
);
4352 for ( ; i
< 64; i
++)
4353 if ((val
<<= 1) < 0)
4358 fprintf (file
, "%d", i
+ 1);
4362 if (GET_CODE (x
) == MEM
4363 && LEGITIMATE_INDEXED_ADDRESS_P (XEXP (x
, 0), 0))
4368 /* Like 'L', for third word of TImode */
4369 if (GET_CODE (x
) == REG
)
4370 fprintf (file
, "%s", reg_names
[REGNO (x
) + 2]);
4371 else if (GET_CODE (x
) == MEM
)
4373 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
4374 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
4375 output_address (plus_constant (XEXP (XEXP (x
, 0), 0), 8));
4377 output_address (plus_constant (XEXP (x
, 0), 8));
4378 if (small_data_operand (x
, GET_MODE (x
)))
4379 fprintf (file
, "@%s(%s)", SMALL_DATA_RELOC
,
4380 reg_names
[SMALL_DATA_REG
]);
4385 /* X is a SYMBOL_REF. Write out the name preceded by a
4386 period and without any trailing data in brackets. Used for function
4387 names. If we are configured for System V (or the embedded ABI) on
4388 the PowerPC, do not emit the period, since those systems do not use
4389 TOCs and the like. */
4390 if (GET_CODE (x
) != SYMBOL_REF
)
4393 if (XSTR (x
, 0)[0] != '.')
4395 switch (DEFAULT_ABI
)
4405 case ABI_AIX_NODESC
:
4412 RS6000_OUTPUT_BASENAME (file
, XSTR (x
, 0));
4414 assemble_name (file
, XSTR (x
, 0));
4419 /* Like 'L', for last word of TImode. */
4420 if (GET_CODE (x
) == REG
)
4421 fprintf (file
, "%s", reg_names
[REGNO (x
) + 3]);
4422 else if (GET_CODE (x
) == MEM
)
4424 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
4425 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
4426 output_address (plus_constant (XEXP (XEXP (x
, 0), 0), 12));
4428 output_address (plus_constant (XEXP (x
, 0), 12));
4429 if (small_data_operand (x
, GET_MODE (x
)))
4430 fprintf (file
, "@%s(%s)", SMALL_DATA_RELOC
,
4431 reg_names
[SMALL_DATA_REG
]);
4436 if (GET_CODE (x
) == REG
)
4437 fprintf (file
, "%s", reg_names
[REGNO (x
)]);
4438 else if (GET_CODE (x
) == MEM
)
4440 /* We need to handle PRE_INC and PRE_DEC here, since we need to
4441 know the width from the mode. */
4442 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
)
4443 fprintf (file
, "%d(%s)", GET_MODE_SIZE (GET_MODE (x
)),
4444 reg_names
[REGNO (XEXP (XEXP (x
, 0), 0))]);
4445 else if (GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
4446 fprintf (file
, "%d(%s)", - GET_MODE_SIZE (GET_MODE (x
)),
4447 reg_names
[REGNO (XEXP (XEXP (x
, 0), 0))]);
4449 output_address (XEXP (x
, 0));
4452 output_addr_const (file
, x
);
4456 output_operand_lossage ("invalid %%xn code");
4460 /* Print the address of an operand. */
4463 print_operand_address (file
, x
)
4467 if (GET_CODE (x
) == REG
)
4468 fprintf (file
, "0(%s)", reg_names
[ REGNO (x
) ]);
4469 else if (GET_CODE (x
) == SYMBOL_REF
|| GET_CODE (x
) == CONST
4470 || GET_CODE (x
) == LABEL_REF
)
4472 output_addr_const (file
, x
);
4473 if (small_data_operand (x
, GET_MODE (x
)))
4474 fprintf (file
, "@%s(%s)", SMALL_DATA_RELOC
,
4475 reg_names
[SMALL_DATA_REG
]);
4476 else if (TARGET_TOC
)
4479 else if (GET_CODE (x
) == PLUS
&& GET_CODE (XEXP (x
, 1)) == REG
)
4481 if (REGNO (XEXP (x
, 0)) == 0)
4482 fprintf (file
, "%s,%s", reg_names
[ REGNO (XEXP (x
, 1)) ],
4483 reg_names
[ REGNO (XEXP (x
, 0)) ]);
4485 fprintf (file
, "%s,%s", reg_names
[ REGNO (XEXP (x
, 0)) ],
4486 reg_names
[ REGNO (XEXP (x
, 1)) ]);
4488 else if (GET_CODE (x
) == PLUS
&& GET_CODE (XEXP (x
, 1)) == CONST_INT
)
4490 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (XEXP (x
, 1)));
4491 fprintf (file
, "(%s)", reg_names
[ REGNO (XEXP (x
, 0)) ]);
4494 else if (GET_CODE (x
) == LO_SUM
&& GET_CODE (XEXP (x
, 0)) == REG
4495 && CONSTANT_P (XEXP (x
, 1)))
4497 output_addr_const (file
, XEXP (x
, 1));
4498 fprintf (file
, "@l(%s)", reg_names
[ REGNO (XEXP (x
, 0)) ]);
4501 else if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (x
))
4505 rtx contains_minus
= XEXP (x
, 1);
4508 /* Find the (minus (sym) (toc)) buried in X, and temporarily
4509 turn it into (sym) for output_addr_const. */
4510 while (GET_CODE (XEXP (contains_minus
, 0)) != MINUS
)
4511 contains_minus
= XEXP (contains_minus
, 0);
4513 minus
= XEXP (contains_minus
, 0);
4514 XEXP (contains_minus
, 0) = XEXP (minus
, 0);
4515 output_addr_const (file
, XEXP (x
, 1));
4516 XEXP (contains_minus
, 0) = minus
;
4519 output_addr_const (file
, XEXP (x
, 1));
4521 fprintf (file
, "(%s)", reg_names
[REGNO (XEXP (x
, 0))]);
4528 rs6000_reverse_condition (mode
, code
)
4529 enum machine_mode mode
;
4532 /* Reversal of FP compares takes care -- an ordered compare
4533 becomes an unordered compare and vice versa. */
4534 if (mode
== CCFPmode
)
4535 return reverse_condition_maybe_unordered (code
);
4537 return reverse_condition (code
);
4541 /* Generate a compare for CODE. Return a brand-new rtx that
4542 represents the result of the compare. */
4544 rs6000_generate_compare (code
)
4547 enum machine_mode comp_mode
;
4550 if (rs6000_compare_fp_p
)
4551 comp_mode
= CCFPmode
;
4552 else if (code
== GTU
|| code
== LTU
4553 || code
== GEU
|| code
== LEU
)
4554 comp_mode
= CCUNSmode
;
4558 /* First, the compare. */
4559 compare_result
= gen_reg_rtx (comp_mode
);
4560 emit_insn (gen_rtx_SET (VOIDmode
, compare_result
,
4561 gen_rtx_COMPARE (comp_mode
,
4563 rs6000_compare_op1
)));
4565 /* Some kinds of FP comparisons need an OR operation;
4566 except for flag_unsafe_math_optimizations we don't bother. */
4567 if (rs6000_compare_fp_p
4568 && ! flag_unsafe_math_optimizations
4569 && (code
== LE
|| code
== GE
4570 || code
== UNEQ
|| code
== LTGT
4571 || code
== UNGT
|| code
== UNLT
))
4573 enum rtx_code or1
, or2
;
4574 rtx or1_rtx
, or2_rtx
, compare2_rtx
;
4575 rtx or_result
= gen_reg_rtx (CCEQmode
);
4579 case LE
: or1
= LT
; or2
= EQ
; break;
4580 case GE
: or1
= GT
; or2
= EQ
; break;
4581 case UNEQ
: or1
= UNORDERED
; or2
= EQ
; break;
4582 case LTGT
: or1
= LT
; or2
= GT
; break;
4583 case UNGT
: or1
= UNORDERED
; or2
= GT
; break;
4584 case UNLT
: or1
= UNORDERED
; or2
= LT
; break;
4587 validate_condition_mode (or1
, comp_mode
);
4588 validate_condition_mode (or2
, comp_mode
);
4589 or1_rtx
= gen_rtx (or1
, SImode
, compare_result
, const0_rtx
);
4590 or2_rtx
= gen_rtx (or2
, SImode
, compare_result
, const0_rtx
);
4591 compare2_rtx
= gen_rtx_COMPARE (CCEQmode
,
4592 gen_rtx_IOR (SImode
, or1_rtx
, or2_rtx
),
4594 emit_insn (gen_rtx_SET (VOIDmode
, or_result
, compare2_rtx
));
4596 compare_result
= or_result
;
4600 validate_condition_mode (code
, GET_MODE (compare_result
));
4602 return gen_rtx (code
, VOIDmode
, compare_result
, const0_rtx
);
4606 /* Emit the RTL for an sCOND pattern. */
4609 rs6000_emit_sCOND (code
, result
)
4614 enum machine_mode op_mode
;
4616 condition_rtx
= rs6000_generate_compare (code
);
4618 op_mode
= GET_MODE (rs6000_compare_op0
);
4619 if (op_mode
== VOIDmode
)
4620 op_mode
= GET_MODE (rs6000_compare_op1
);
4622 if (TARGET_POWERPC64
&& (op_mode
== DImode
|| rs6000_compare_fp_p
))
4624 PUT_MODE (condition_rtx
, DImode
);
4625 convert_move (result
, condition_rtx
, 0);
4629 PUT_MODE (condition_rtx
, SImode
);
4630 emit_insn (gen_rtx_SET (VOIDmode
, result
, condition_rtx
));
4635 /* Emit a branch of kind CODE to location LOC. */
4638 rs6000_emit_cbranch (code
, loc
)
4642 rtx condition_rtx
, loc_ref
;
4644 condition_rtx
= rs6000_generate_compare (code
);
4645 loc_ref
= gen_rtx_LABEL_REF (VOIDmode
, loc
);
4646 emit_jump_insn (gen_rtx_SET (VOIDmode
, pc_rtx
,
4647 gen_rtx_IF_THEN_ELSE (VOIDmode
, condition_rtx
,
4652 /* Return the string to output a conditional branch to LABEL, which is
4653 the operand number of the label, or -1 if the branch is really a
4656 OP is the conditional expression. XEXP (OP, 0) is assumed to be a
4657 condition code register and its mode specifies what kind of
4660 REVERSED is non-zero if we should reverse the sense of the comparison.
4662 INSN is the insn. */
4665 output_cbranch (op
, label
, reversed
, insn
)
4671 static char string
[64];
4672 enum rtx_code code
= GET_CODE (op
);
4673 rtx cc_reg
= XEXP (op
, 0);
4674 enum machine_mode mode
= GET_MODE (cc_reg
);
4675 int cc_regno
= REGNO (cc_reg
) - CR0_REGNO
;
4676 int need_longbranch
= label
!= NULL
&& get_attr_length (insn
) == 8;
4677 int really_reversed
= reversed
^ need_longbranch
;
4683 validate_condition_mode (code
, mode
);
4685 /* Work out which way this really branches. We could use
4686 reverse_condition_maybe_unordered here always but this
4687 makes the resulting assembler clearer. */
4688 if (really_reversed
)
4689 code
= rs6000_reverse_condition (mode
, code
);
4693 /* Not all of these are actually distinct opcodes, but
4694 we distinguish them for clarity of the resulting assembler. */
4696 ccode
= "ne"; break;
4698 ccode
= "eq"; break;
4700 ccode
= "ge"; break;
4701 case GT
: case GTU
: case UNGT
:
4702 ccode
= "gt"; break;
4704 ccode
= "le"; break;
4705 case LT
: case LTU
: case UNLT
:
4706 ccode
= "lt"; break;
4707 case UNORDERED
: ccode
= "un"; break;
4708 case ORDERED
: ccode
= "nu"; break;
4709 case UNGE
: ccode
= "nl"; break;
4710 case UNLE
: ccode
= "ng"; break;
4715 /* Maybe we have a guess as to how likely the branch is.
4716 The old mnemonics don't have a way to specify this information. */
4717 note
= find_reg_note (insn
, REG_BR_PROB
, NULL_RTX
);
4718 if (note
!= NULL_RTX
)
4720 /* PROB is the difference from 50%. */
4721 int prob
= INTVAL (XEXP (note
, 0)) - REG_BR_PROB_BASE
/ 2;
4723 /* For branches that are very close to 50%, assume not-taken. */
4724 if (abs (prob
) > REG_BR_PROB_BASE
/ 20
4725 && ((prob
> 0) ^ need_longbranch
))
4734 s
+= sprintf (s
, "{b%sr|b%slr%s} ", ccode
, ccode
, pred
);
4736 s
+= sprintf (s
, "{b%s|b%s%s} ", ccode
, ccode
, pred
);
4738 /* We need to escape any '%' characters in the reg_names string.
4739 Assume they'd only be the first character... */
4740 if (reg_names
[cc_regno
+ CR0_REGNO
][0] == '%')
4742 s
+= sprintf (s
, "%s", reg_names
[cc_regno
+ CR0_REGNO
]);
4746 /* If the branch distance was too far, we may have to use an
4747 unconditional branch to go the distance. */
4748 if (need_longbranch
)
4749 s
+= sprintf (s
, ",%c$+8\n\tb %s", '%', label
);
4751 s
+= sprintf (s
, ",%s", label
);
4757 /* Emit a conditional move: move TRUE_COND to DEST if OP of the
4758 operands of the last comparison is nonzero/true, FALSE_COND if it
4759 is zero/false. Return 0 if the hardware has no such operation. */
4761 rs6000_emit_cmove (dest
, op
, true_cond
, false_cond
)
4767 enum rtx_code code
= GET_CODE (op
);
4768 rtx op0
= rs6000_compare_op0
;
4769 rtx op1
= rs6000_compare_op1
;
4771 enum machine_mode mode
= GET_MODE (op0
);
4774 /* First, work out if the hardware can do this at all, or
4775 if it's too slow... */
4776 /* If the comparison is an integer one, since we only have fsel
4777 it'll be cheaper to use a branch. */
4778 if (! rs6000_compare_fp_p
)
4781 /* Eliminate half of the comparisons by switching operands, this
4782 makes the remaining code simpler. */
4783 if (code
== UNLT
|| code
== UNGT
|| code
== UNORDERED
|| code
== NE
4784 || code
== LTGT
|| code
== LT
)
4786 code
= reverse_condition_maybe_unordered (code
);
4788 true_cond
= false_cond
;
4792 /* UNEQ and LTGT take four instructions for a comparison with zero,
4793 it'll probably be faster to use a branch here too. */
4797 if (GET_CODE (op1
) == CONST_DOUBLE
)
4798 REAL_VALUE_FROM_CONST_DOUBLE (c1
, op1
);
4800 /* We're going to try to implement comparions by performing
4801 a subtract, then comparing against zero. Unfortunately,
4802 Inf - Inf is NaN which is not zero, and so if we don't
4803 know that the the operand is finite and the comparison
4804 would treat EQ different to UNORDERED, we can't do it. */
4805 if (! flag_unsafe_math_optimizations
4806 && code
!= GT
&& code
!= UNGE
4807 && (GET_CODE (op1
) != CONST_DOUBLE
|| target_isinf (c1
))
4808 /* Constructs of the form (a OP b ? a : b) are safe. */
4809 && ((! rtx_equal_p (op0
, false_cond
) && ! rtx_equal_p (op1
, false_cond
))
4810 || (! rtx_equal_p (op0
, true_cond
)
4811 && ! rtx_equal_p (op1
, true_cond
))))
4813 /* At this point we know we can use fsel. */
4815 /* Reduce the comparison to a comparison against zero. */
4816 temp
= gen_reg_rtx (mode
);
4817 emit_insn (gen_rtx_SET (VOIDmode
, temp
,
4818 gen_rtx_MINUS (mode
, op0
, op1
)));
4820 op1
= CONST0_RTX (mode
);
4822 /* If we don't care about NaNs we can reduce some of the comparisons
4823 down to faster ones. */
4824 if (flag_unsafe_math_optimizations
)
4830 true_cond
= false_cond
;
4843 /* Now, reduce everything down to a GE. */
4850 temp
= gen_reg_rtx (mode
);
4851 emit_insn (gen_rtx_SET (VOIDmode
, temp
, gen_rtx_NEG (mode
, op0
)));
4856 temp
= gen_reg_rtx (mode
);
4857 emit_insn (gen_rtx_SET (VOIDmode
, temp
, gen_rtx_ABS (mode
, op0
)));
4862 temp
= gen_reg_rtx (mode
);
4863 emit_insn (gen_rtx_SET (VOIDmode
, temp
,
4865 gen_rtx_ABS (mode
, op0
))));
4870 temp
= gen_reg_rtx (mode
);
4871 emit_insn (gen_rtx_SET (VOIDmode
, temp
,
4872 gen_rtx_IF_THEN_ELSE (mode
,
4873 gen_rtx_GE (VOIDmode
,
4875 true_cond
, false_cond
)));
4877 true_cond
= false_cond
;
4879 temp
= gen_reg_rtx (mode
);
4880 emit_insn (gen_rtx_SET (VOIDmode
, temp
, gen_rtx_NEG (mode
, op0
)));
4885 temp
= gen_reg_rtx (mode
);
4886 emit_insn (gen_rtx_SET (VOIDmode
, temp
,
4887 gen_rtx_IF_THEN_ELSE (mode
,
4888 gen_rtx_GE (VOIDmode
,
4890 true_cond
, false_cond
)));
4892 false_cond
= true_cond
;
4894 temp
= gen_reg_rtx (mode
);
4895 emit_insn (gen_rtx_SET (VOIDmode
, temp
, gen_rtx_NEG (mode
, op0
)));
4903 emit_insn (gen_rtx_SET (VOIDmode
, dest
,
4904 gen_rtx_IF_THEN_ELSE (mode
,
4905 gen_rtx_GE (VOIDmode
,
4907 true_cond
, false_cond
)));
4912 rs6000_emit_minmax (dest
, code
, op0
, op1
)
4918 enum machine_mode mode
= GET_MODE (op0
);
4920 if (code
== SMAX
|| code
== UMAX
)
4921 target
= emit_conditional_move (dest
, GE
, op0
, op1
, mode
,
4924 target
= emit_conditional_move (dest
, GE
, op0
, op1
, mode
,
4926 if (target
== NULL_RTX
)
4929 emit_move_insn (dest
, target
);
4932 /* This page contains routines that are used to determine what the function
4933 prologue and epilogue code will do and write them out. */
4935 /* Return the first fixed-point register that is required to be saved. 32 if
4939 first_reg_to_save ()
4943 /* Find lowest numbered live register. */
4944 for (first_reg
= 13; first_reg
<= 31; first_reg
++)
4945 if (regs_ever_live
[first_reg
]
4946 && (! call_used_regs
[first_reg
]
4947 || (first_reg
== PIC_OFFSET_TABLE_REGNUM
4948 && (((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
4950 || (DEFAULT_ABI
== ABI_DARWIN
4956 /* AIX must save/restore every register that contains a parameter
4957 before/after the .__mcount call plus an additional register
4958 for the static chain, if needed; use registers from 30 down to 22
4960 if (DEFAULT_ABI
== ABI_AIX
|| DEFAULT_ABI
== ABI_DARWIN
)
4962 int last_parm_reg
, profile_first_reg
;
4964 /* Figure out last used parameter register. The proper thing
4965 to do is to walk incoming args of the function. A function
4966 might have live parameter registers even if it has no
4968 for (last_parm_reg
= 10;
4969 last_parm_reg
> 2 && ! regs_ever_live
[last_parm_reg
];
4973 /* Calculate first reg for saving parameter registers
4975 Skip reg 31 which may contain the frame pointer. */
4976 profile_first_reg
= (33 - last_parm_reg
4977 - (current_function_needs_context
? 1 : 0));
4979 /* Need to skip another reg to account for R31 being PICBASE
4980 (when flag_pic is set) or R30 being used as the frame
4981 pointer (when flag_pic is not set). */
4982 --profile_first_reg
;
4984 /* Do not save frame pointer if no parameters needs to be saved. */
4985 if (profile_first_reg
== 31)
4986 profile_first_reg
= 32;
4988 if (first_reg
> profile_first_reg
)
4989 first_reg
= profile_first_reg
;
4992 /* SVR4 may need one register to preserve the static chain. */
4993 else if (current_function_needs_context
)
4995 /* Skip reg 31 which may contain the frame pointer. */
5002 if (flag_pic
&& current_function_uses_pic_offset_table
&&
5003 (first_reg
> PIC_OFFSET_TABLE_REGNUM
))
5004 return PIC_OFFSET_TABLE_REGNUM
;
5010 /* Similar, for FP regs. */
5013 first_fp_reg_to_save ()
5017 /* Find lowest numbered live register. */
5018 for (first_reg
= 14 + 32; first_reg
<= 63; first_reg
++)
5019 if (regs_ever_live
[first_reg
])
5025 /* Calculate the stack information for the current function. This is
5026 complicated by having two separate calling sequences, the AIX calling
5027 sequence and the V.4 calling sequence.
5029 AIX (and Darwin/Mac OS) stack frames look like:
5031 SP----> +---------------------------------------+
5032 | back chain to caller | 0 0
5033 +---------------------------------------+
5034 | saved CR | 4 8 (8-11)
5035 +---------------------------------------+
5037 +---------------------------------------+
5038 | reserved for compilers | 12 24
5039 +---------------------------------------+
5040 | reserved for binders | 16 32
5041 +---------------------------------------+
5042 | saved TOC pointer | 20 40
5043 +---------------------------------------+
5044 | Parameter save area (P) | 24 48
5045 +---------------------------------------+
5046 | Alloca space (A) | 24+P etc.
5047 +---------------------------------------+
5048 | Local variable space (L) | 24+P+A
5049 +---------------------------------------+
5050 | Float/int conversion temporary (X) | 24+P+A+L
5051 +---------------------------------------+
5052 | Save area for GP registers (G) | 24+P+A+X+L
5053 +---------------------------------------+
5054 | Save area for FP registers (F) | 24+P+A+X+L+G
5055 +---------------------------------------+
5056 old SP->| back chain to caller's caller |
5057 +---------------------------------------+
5059 The required alignment for AIX configurations is two words (i.e., 8
5063 V.4 stack frames look like:
5065 SP----> +---------------------------------------+
5066 | back chain to caller | 0
5067 +---------------------------------------+
5068 | caller's saved LR | 4
5069 +---------------------------------------+
5070 | Parameter save area (P) | 8
5071 +---------------------------------------+
5072 | Alloca space (A) | 8+P
5073 +---------------------------------------+
5074 | Varargs save area (V) | 8+P+A
5075 +---------------------------------------+
5076 | Local variable space (L) | 8+P+A+V
5077 +---------------------------------------+
5078 | Float/int conversion temporary (X) | 8+P+A+V+L
5079 +---------------------------------------+
5080 | saved CR (C) | 8+P+A+V+L+X
5081 +---------------------------------------+
5082 | Save area for GP registers (G) | 8+P+A+V+L+X+C
5083 +---------------------------------------+
5084 | Save area for FP registers (F) | 8+P+A+V+L+X+C+G
5085 +---------------------------------------+
5086 old SP->| back chain to caller's caller |
5087 +---------------------------------------+
5089 The required alignment for V.4 is 16 bytes, or 8 bytes if -meabi is
5090 given. (But note below and in sysv4.h that we require only 8 and
5091 may round up the size of our stack frame anyways. The historical
5092 reason is early versions of powerpc-linux which didn't properly
5093 align the stack at program startup. A happy side-effect is that
5094 -mno-eabi libraries can be used with -meabi programs.)
5097 The EABI configuration defaults to the V.4 layout, unless
5098 -mcall-aix is used, in which case the AIX layout is used. However,
5099 the stack alignment requirements may differ. If -mno-eabi is not
5100 given, the required stack alignment is 8 bytes; if -mno-eabi is
5101 given, the required alignment is 16 bytes. (But see V.4 comment
5104 #ifndef ABI_STACK_BOUNDARY
5105 #define ABI_STACK_BOUNDARY STACK_BOUNDARY
5109 rs6000_stack_info ()
5111 static rs6000_stack_t info
, zero_info
;
5112 rs6000_stack_t
*info_ptr
= &info
;
5113 int reg_size
= TARGET_POWERPC64
? 8 : 4;
5114 enum rs6000_abi abi
;
5118 /* Zero all fields portably */
5121 /* Select which calling sequence */
5122 info_ptr
->abi
= abi
= DEFAULT_ABI
;
5124 /* Calculate which registers need to be saved & save area size */
5125 info_ptr
->first_gp_reg_save
= first_reg_to_save ();
5126 /* Assume that we will have to save PIC_OFFSET_TABLE_REGNUM,
5127 even if it currently looks like we won't. */
5129 && (abi
== ABI_V4
|| abi
== ABI_SOLARIS
))
5132 && info_ptr
->first_gp_reg_save
> PIC_OFFSET_TABLE_REGNUM
)
5133 info_ptr
->gp_size
= reg_size
* (32 - PIC_OFFSET_TABLE_REGNUM
);
5135 info_ptr
->gp_size
= reg_size
* (32 - info_ptr
->first_gp_reg_save
);
5137 info_ptr
->first_fp_reg_save
= first_fp_reg_to_save ();
5138 info_ptr
->fp_size
= 8 * (64 - info_ptr
->first_fp_reg_save
);
5140 /* Does this function call anything? */
5141 info_ptr
->calls_p
= (! current_function_is_leaf
5142 || cfun
->machine
->ra_needs_full_frame
);
5144 /* Determine if we need to save the link register */
5145 if (rs6000_ra_ever_killed ()
5146 || (DEFAULT_ABI
== ABI_AIX
&& profile_flag
)
5147 #ifdef TARGET_RELOCATABLE
5148 || (TARGET_RELOCATABLE
&& (get_pool_size () != 0))
5150 || (info_ptr
->first_fp_reg_save
!= 64
5151 && !FP_SAVE_INLINE (info_ptr
->first_fp_reg_save
))
5152 || (abi
== ABI_V4
&& current_function_calls_alloca
)
5153 || (abi
== ABI_SOLARIS
&& current_function_calls_alloca
)
5154 || (DEFAULT_ABI
== ABI_DARWIN
&& flag_pic
&& current_function_uses_pic_offset_table
)
5155 || info_ptr
->calls_p
)
5157 info_ptr
->lr_save_p
= 1;
5158 regs_ever_live
[LINK_REGISTER_REGNUM
] = 1;
5161 /* Determine if we need to save the condition code registers. */
5162 if (regs_ever_live
[CR2_REGNO
]
5163 || regs_ever_live
[CR3_REGNO
]
5164 || regs_ever_live
[CR4_REGNO
])
5166 info_ptr
->cr_save_p
= 1;
5167 if (abi
== ABI_V4
|| abi
== ABI_SOLARIS
)
5168 info_ptr
->cr_size
= reg_size
;
5171 /* If the current function calls __builtin_eh_return, then we need
5172 to allocate stack space for registers that will hold data for
5173 the exception handler. */
5174 if (current_function_calls_eh_return
)
5177 for (i
= 0; EH_RETURN_DATA_REGNO (i
) != INVALID_REGNUM
; ++i
)
5179 ehrd_size
= i
* UNITS_PER_WORD
;
5184 /* Determine various sizes */
5185 info_ptr
->reg_size
= reg_size
;
5186 info_ptr
->fixed_size
= RS6000_SAVE_AREA
;
5187 info_ptr
->varargs_size
= RS6000_VARARGS_AREA
;
5188 info_ptr
->vars_size
= RS6000_ALIGN (get_frame_size (), 8);
5189 info_ptr
->parm_size
= RS6000_ALIGN (current_function_outgoing_args_size
, 8);
5190 info_ptr
->save_size
= RS6000_ALIGN (info_ptr
->fp_size
5195 + info_ptr
->toc_size
, 8);
5196 if (DEFAULT_ABI
== ABI_DARWIN
)
5197 info_ptr
->save_size
= RS6000_ALIGN (info_ptr
->save_size
, 16);
5199 /* Calculate the offsets */
5207 case ABI_AIX_NODESC
:
5209 info_ptr
->fp_save_offset
= - info_ptr
->fp_size
;
5210 info_ptr
->gp_save_offset
= info_ptr
->fp_save_offset
- info_ptr
->gp_size
;
5211 info_ptr
->ehrd_offset
= info_ptr
->gp_save_offset
- ehrd_size
;
5212 info_ptr
->cr_save_offset
= reg_size
; /* first word when 64-bit. */
5213 info_ptr
->lr_save_offset
= 2*reg_size
;
5218 info_ptr
->fp_save_offset
= - info_ptr
->fp_size
;
5219 info_ptr
->gp_save_offset
= info_ptr
->fp_save_offset
- info_ptr
->gp_size
;
5220 info_ptr
->cr_save_offset
= info_ptr
->gp_save_offset
- info_ptr
->cr_size
;
5221 info_ptr
->toc_save_offset
= info_ptr
->cr_save_offset
- info_ptr
->toc_size
;
5222 info_ptr
->ehrd_offset
= info_ptr
->toc_save_offset
- ehrd_size
;
5223 info_ptr
->lr_save_offset
= reg_size
;
5227 total_raw_size
= (info_ptr
->vars_size
5228 + info_ptr
->parm_size
5229 + info_ptr
->save_size
5230 + info_ptr
->varargs_size
5231 + info_ptr
->fixed_size
);
5233 info_ptr
->total_size
= RS6000_ALIGN (total_raw_size
, ABI_STACK_BOUNDARY
/ BITS_PER_UNIT
);
5235 /* Determine if we need to allocate any stack frame:
5237 For AIX we need to push the stack if a frame pointer is needed (because
5238 the stack might be dynamically adjusted), if we are debugging, if we
5239 make calls, or if the sum of fp_save, gp_save, and local variables
5240 are more than the space needed to save all non-volatile registers:
5241 32-bit: 18*8 + 19*4 = 220 or 64-bit: 18*8 + 18*8 = 288 (GPR13 reserved).
5243 For V.4 we don't have the stack cushion that AIX uses, but assume that
5244 the debugger can handle stackless frames. */
5246 if (info_ptr
->calls_p
)
5247 info_ptr
->push_p
= 1;
5249 else if (abi
== ABI_V4
|| abi
== ABI_SOLARIS
)
5250 info_ptr
->push_p
= (total_raw_size
> info_ptr
->fixed_size
5251 || info_ptr
->calls_p
);
5254 info_ptr
->push_p
= (frame_pointer_needed
5255 || (abi
!= ABI_DARWIN
&& write_symbols
!= NO_DEBUG
)
5256 || ((total_raw_size
- info_ptr
->fixed_size
)
5257 > (TARGET_32BIT
? 220 : 288)));
5259 /* Zero offsets if we're not saving those registers */
5260 if (info_ptr
->fp_size
== 0)
5261 info_ptr
->fp_save_offset
= 0;
5263 if (info_ptr
->gp_size
== 0)
5264 info_ptr
->gp_save_offset
= 0;
5266 if (! info_ptr
->lr_save_p
)
5267 info_ptr
->lr_save_offset
= 0;
5269 if (! info_ptr
->cr_save_p
)
5270 info_ptr
->cr_save_offset
= 0;
5272 if (! info_ptr
->toc_save_p
)
5273 info_ptr
->toc_save_offset
= 0;
5279 debug_stack_info (info
)
5280 rs6000_stack_t
*info
;
5282 const char *abi_string
;
5285 info
= rs6000_stack_info ();
5287 fprintf (stderr
, "\nStack information for function %s:\n",
5288 ((current_function_decl
&& DECL_NAME (current_function_decl
))
5289 ? IDENTIFIER_POINTER (DECL_NAME (current_function_decl
))
5294 default: abi_string
= "Unknown"; break;
5295 case ABI_NONE
: abi_string
= "NONE"; break;
5296 case ABI_AIX
: abi_string
= "AIX"; break;
5297 case ABI_AIX_NODESC
: abi_string
= "AIX"; break;
5298 case ABI_DARWIN
: abi_string
= "Darwin"; break;
5299 case ABI_V4
: abi_string
= "V.4"; break;
5300 case ABI_SOLARIS
: abi_string
= "Solaris"; break;
5303 fprintf (stderr
, "\tABI = %5s\n", abi_string
);
5305 if (info
->first_gp_reg_save
!= 32)
5306 fprintf (stderr
, "\tfirst_gp_reg_save = %5d\n", info
->first_gp_reg_save
);
5308 if (info
->first_fp_reg_save
!= 64)
5309 fprintf (stderr
, "\tfirst_fp_reg_save = %5d\n", info
->first_fp_reg_save
);
5311 if (info
->lr_save_p
)
5312 fprintf (stderr
, "\tlr_save_p = %5d\n", info
->lr_save_p
);
5314 if (info
->cr_save_p
)
5315 fprintf (stderr
, "\tcr_save_p = %5d\n", info
->cr_save_p
);
5317 if (info
->toc_save_p
)
5318 fprintf (stderr
, "\ttoc_save_p = %5d\n", info
->toc_save_p
);
5321 fprintf (stderr
, "\tpush_p = %5d\n", info
->push_p
);
5324 fprintf (stderr
, "\tcalls_p = %5d\n", info
->calls_p
);
5326 if (info
->gp_save_offset
)
5327 fprintf (stderr
, "\tgp_save_offset = %5d\n", info
->gp_save_offset
);
5329 if (info
->fp_save_offset
)
5330 fprintf (stderr
, "\tfp_save_offset = %5d\n", info
->fp_save_offset
);
5332 if (info
->lr_save_offset
)
5333 fprintf (stderr
, "\tlr_save_offset = %5d\n", info
->lr_save_offset
);
5335 if (info
->cr_save_offset
)
5336 fprintf (stderr
, "\tcr_save_offset = %5d\n", info
->cr_save_offset
);
5338 if (info
->toc_save_offset
)
5339 fprintf (stderr
, "\ttoc_save_offset = %5d\n", info
->toc_save_offset
);
5341 if (info
->varargs_save_offset
)
5342 fprintf (stderr
, "\tvarargs_save_offset = %5d\n", info
->varargs_save_offset
);
5344 if (info
->total_size
)
5345 fprintf (stderr
, "\ttotal_size = %5d\n", info
->total_size
);
5347 if (info
->varargs_size
)
5348 fprintf (stderr
, "\tvarargs_size = %5d\n", info
->varargs_size
);
5350 if (info
->vars_size
)
5351 fprintf (stderr
, "\tvars_size = %5d\n", info
->vars_size
);
5353 if (info
->parm_size
)
5354 fprintf (stderr
, "\tparm_size = %5d\n", info
->parm_size
);
5356 if (info
->fixed_size
)
5357 fprintf (stderr
, "\tfixed_size = %5d\n", info
->fixed_size
);
5360 fprintf (stderr
, "\tgp_size = %5d\n", info
->gp_size
);
5363 fprintf (stderr
, "\tfp_size = %5d\n", info
->fp_size
);
5366 fprintf (stderr
, "\tlr_size = %5d\n", info
->cr_size
);
5369 fprintf (stderr
, "\tcr_size = %5d\n", info
->cr_size
);
5372 fprintf (stderr
, "\ttoc_size = %5d\n", info
->toc_size
);
5374 if (info
->save_size
)
5375 fprintf (stderr
, "\tsave_size = %5d\n", info
->save_size
);
5377 if (info
->reg_size
!= 4)
5378 fprintf (stderr
, "\treg_size = %5d\n", info
->reg_size
);
5380 fprintf (stderr
, "\n");
5384 rs6000_return_addr (count
, frame
)
5388 /* Currently we don't optimize very well between prolog and body code and
5389 for PIC code the code can be actually quite bad, so don't try to be
5393 || DEFAULT_ABI
== ABI_AIX
5394 || DEFAULT_ABI
== ABI_AIX_NODESC
)
5396 cfun
->machine
->ra_needs_full_frame
= 1;
5399 memory_address (Pmode
,
5400 plus_constant (copy_to_reg (gen_rtx_MEM (Pmode
,
5401 memory_address (Pmode
, frame
))),
5402 RETURN_ADDRESS_OFFSET
)));
5405 return get_hard_reg_initial_val (Pmode
, LINK_REGISTER_REGNUM
);
5409 rs6000_ra_ever_killed ()
5413 #ifdef ASM_OUTPUT_MI_THUNK
5414 if (current_function_is_thunk
)
5417 if (!has_hard_reg_initial_val (Pmode
, LINK_REGISTER_REGNUM
)
5418 || cfun
->machine
->ra_needs_full_frame
)
5419 return regs_ever_live
[LINK_REGISTER_REGNUM
];
5421 push_topmost_sequence ();
5423 pop_topmost_sequence ();
5425 return reg_set_between_p (gen_rtx_REG (Pmode
, LINK_REGISTER_REGNUM
),
5429 /* Add a REG_MAYBE_DEAD note to the insn. */
5431 rs6000_maybe_dead (insn
)
5434 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD
,
5439 /* Emit instructions needed to load the TOC register.
5440 This is only needed when TARGET_TOC, TARGET_MINIMAL_TOC, and there is
5441 a constant pool; or for SVR4 -fpic. */
5444 rs6000_emit_load_toc_table (fromprolog
)
5448 dest
= gen_rtx_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5452 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
5455 rtx temp
= (fromprolog
5456 ? gen_rtx_REG (Pmode
, LINK_REGISTER_REGNUM
)
5457 : gen_reg_rtx (Pmode
));
5459 rs6000_maybe_dead (emit_insn (gen_load_toc_v4_pic_si (temp
)));
5461 rs6000_maybe_dead (emit_insn (gen_load_toc_v4_pic_di (temp
)));
5462 rs6000_maybe_dead (emit_move_insn (dest
, temp
));
5464 else if (flag_pic
== 2)
5467 rtx tempLR
= (fromprolog
5468 ? gen_rtx_REG (Pmode
, LINK_REGISTER_REGNUM
)
5469 : gen_reg_rtx (Pmode
));
5470 rtx temp0
= (fromprolog
5471 ? gen_rtx_REG (Pmode
, 0)
5472 : gen_reg_rtx (Pmode
));
5475 /* possibly create the toc section */
5476 if (! toc_initialized
)
5479 function_section (current_function_decl
);
5486 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCF", rs6000_pic_labelno
);
5487 symF
= gen_rtx_SYMBOL_REF (Pmode
, ggc_strdup (buf
));
5489 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCL", rs6000_pic_labelno
);
5490 symL
= gen_rtx_SYMBOL_REF (Pmode
, ggc_strdup (buf
));
5492 rs6000_maybe_dead (emit_insn (gen_load_toc_v4_PIC_1 (tempLR
,
5494 rs6000_maybe_dead (emit_move_insn (dest
, tempLR
));
5495 rs6000_maybe_dead (emit_insn (gen_load_toc_v4_PIC_2 (temp0
, dest
,
5502 static int reload_toc_labelno
= 0;
5504 tocsym
= gen_rtx_SYMBOL_REF (Pmode
, ggc_strdup (toc_label_name
));
5506 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCG", reload_toc_labelno
++);
5507 symF
= gen_rtx_SYMBOL_REF (Pmode
, ggc_strdup (buf
));
5509 rs6000_maybe_dead (emit_insn (gen_load_toc_v4_PIC_1b (tempLR
,
5512 rs6000_maybe_dead (emit_move_insn (dest
, tempLR
));
5513 rs6000_maybe_dead (emit_move_insn (temp0
,
5514 gen_rtx_MEM (Pmode
, dest
)));
5516 rs6000_maybe_dead (emit_insn (gen_addsi3 (dest
, temp0
, dest
)));
5518 else if (flag_pic
== 0 && TARGET_MINIMAL_TOC
)
5520 /* This is for AIX code running in non-PIC ELF. */
5523 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCTOC", 1);
5524 realsym
= gen_rtx_SYMBOL_REF (Pmode
, ggc_strdup (buf
));
5526 rs6000_maybe_dead (emit_insn (gen_elf_high (dest
, realsym
)));
5527 rs6000_maybe_dead (emit_insn (gen_elf_low (dest
, dest
, realsym
)));
5535 rs6000_maybe_dead (emit_insn (gen_load_toc_aix_si (dest
)));
5537 rs6000_maybe_dead (emit_insn (gen_load_toc_aix_di (dest
)));
5542 get_TOC_alias_set ()
5544 static int set
= -1;
5546 set
= new_alias_set ();
5550 /* This retuns nonzero if the current function uses the TOC. This is
5551 determined by the presence of (unspec ... 7), which is generated by
5552 the various load_toc_* patterns. */
5558 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
5561 rtx pat
= PATTERN (insn
);
5564 if (GET_CODE (pat
) == PARALLEL
)
5565 for (i
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
5566 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == UNSPEC
5567 && XINT (XVECEXP (PATTERN (insn
), 0, i
), 1) == 7)
5574 create_TOC_reference(symbol
)
5577 return gen_rtx_PLUS (Pmode
,
5578 gen_rtx_REG (Pmode
, TOC_REGISTER
),
5579 gen_rtx_CONST (Pmode
,
5580 gen_rtx_MINUS (Pmode
, symbol
,
5581 gen_rtx_SYMBOL_REF (Pmode
, ggc_strdup (toc_label_name
)))));
5585 /* __throw will restore its own return address to be the same as the
5586 return address of the function that the throw is being made to.
5587 This is unfortunate, because we want to check the original
5588 return address to see if we need to restore the TOC.
5589 So we have to squirrel it away here.
5590 This is used only in compiling __throw and __rethrow.
5592 Most of this code should be removed by CSE. */
5593 static rtx insn_after_throw
;
5595 /* This does the saving... */
5597 rs6000_aix_emit_builtin_unwind_init ()
5600 rtx stack_top
= gen_reg_rtx (Pmode
);
5601 rtx opcode_addr
= gen_reg_rtx (Pmode
);
5603 insn_after_throw
= gen_reg_rtx (SImode
);
5605 mem
= gen_rtx_MEM (Pmode
, hard_frame_pointer_rtx
);
5606 emit_move_insn (stack_top
, mem
);
5608 mem
= gen_rtx_MEM (Pmode
,
5609 gen_rtx_PLUS (Pmode
, stack_top
,
5610 GEN_INT (2 * GET_MODE_SIZE (Pmode
))));
5611 emit_move_insn (opcode_addr
, mem
);
5612 emit_move_insn (insn_after_throw
, gen_rtx_MEM (SImode
, opcode_addr
));
5615 /* Emit insns to _restore_ the TOC register, at runtime (specifically in _eh.o).
5618 The idea is that on AIX, function calls look like this:
5619 bl somefunction-trampoline
5623 somefunction-trampoline:
5625 ... load function address in the count register ...
5627 or like this, if the linker determines that this is not a cross-module call
5628 and so the TOC need not be restored:
5631 or like this, if the compiler could determine that this is not a
5634 now, the tricky bit here is that register 2 is saved and restored
5635 by the _linker_, so we can't readily generate debugging information
5636 for it. So we need to go back up the call chain looking at the
5637 insns at return addresses to see which calls saved the TOC register
5638 and so see where it gets restored from.
5640 Oh, and all this gets done in RTL inside the eh_epilogue pattern,
5641 just before the actual epilogue.
5643 On the bright side, this incurs no space or time overhead unless an
5644 exception is thrown, except for the extra code in libgcc.a.
5646 The parameter STACKSIZE is a register containing (at runtime)
5647 the amount to be popped off the stack in addition to the stack frame
5648 of this routine (which will be __throw or __rethrow, and so is
5649 guaranteed to have a stack frame). */
5651 rs6000_emit_eh_toc_restore (stacksize
)
5655 rtx bottom_of_stack
= gen_reg_rtx (Pmode
);
5656 rtx tocompare
= gen_reg_rtx (SImode
);
5657 rtx opcode
= gen_reg_rtx (SImode
);
5658 rtx opcode_addr
= gen_reg_rtx (Pmode
);
5660 rtx loop_start
= gen_label_rtx ();
5661 rtx no_toc_restore_needed
= gen_label_rtx ();
5662 rtx loop_exit
= gen_label_rtx ();
5664 mem
= gen_rtx_MEM (Pmode
, hard_frame_pointer_rtx
);
5665 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
5666 emit_move_insn (bottom_of_stack
, mem
);
5668 top_of_stack
= expand_binop (Pmode
, add_optab
,
5669 bottom_of_stack
, stacksize
,
5670 NULL_RTX
, 1, OPTAB_WIDEN
);
5672 emit_move_insn (tocompare
,
5673 GEN_INT (trunc_int_for_mode (TARGET_32BIT
5675 : 0xE8410028, SImode
)));
5677 if (insn_after_throw
== NULL_RTX
)
5679 emit_move_insn (opcode
, insn_after_throw
);
5681 emit_note (NULL
, NOTE_INSN_LOOP_BEG
);
5682 emit_label (loop_start
);
5684 do_compare_rtx_and_jump (opcode
, tocompare
, NE
, 1,
5685 SImode
, NULL_RTX
, 0, NULL_RTX
,
5686 no_toc_restore_needed
);
5688 mem
= gen_rtx_MEM (Pmode
,
5689 gen_rtx_PLUS (Pmode
, bottom_of_stack
,
5690 GEN_INT (5 * GET_MODE_SIZE (Pmode
))));
5691 emit_move_insn (gen_rtx_REG (Pmode
, 2), mem
);
5693 emit_label (no_toc_restore_needed
);
5694 do_compare_rtx_and_jump (top_of_stack
, bottom_of_stack
, EQ
, 1,
5695 Pmode
, NULL_RTX
, 0, NULL_RTX
,
5698 mem
= gen_rtx_MEM (Pmode
, bottom_of_stack
);
5699 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
5700 emit_move_insn (bottom_of_stack
, mem
);
5702 mem
= gen_rtx_MEM (Pmode
,
5703 gen_rtx_PLUS (Pmode
, bottom_of_stack
,
5704 GEN_INT (2 * GET_MODE_SIZE (Pmode
))));
5705 emit_move_insn (opcode_addr
, mem
);
5706 emit_move_insn (opcode
, gen_rtx_MEM (SImode
, opcode_addr
));
5708 emit_note (NULL
, NOTE_INSN_LOOP_CONT
);
5709 emit_jump (loop_start
);
5710 emit_note (NULL
, NOTE_INSN_LOOP_END
);
5711 emit_label (loop_exit
);
5713 #endif /* TARGET_AIX */
5715 /* This ties together stack memory
5716 (MEM with an alias set of rs6000_sr_alias_set)
5717 and the change to the stack pointer. */
5719 rs6000_emit_stack_tie ()
5722 mem
= gen_rtx_MEM (BLKmode
, gen_rtx_REG (Pmode
, STACK_POINTER_REGNUM
));
5723 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
5724 emit_insn (gen_stack_tie (mem
));
5727 /* Emit the correct code for allocating stack space, as insns.
5728 If COPY_R12, make sure a copy of the old frame is left in r12.
5729 The generated code may use hard register 0 as a temporary. */
5732 rs6000_emit_allocate_stack (size
, copy_r12
)
5737 rtx stack_reg
= gen_rtx_REG (Pmode
, STACK_POINTER_REGNUM
);
5738 rtx tmp_reg
= gen_rtx_REG (Pmode
, 0);
5739 rtx todec
= GEN_INT (-size
);
5741 if (current_function_limit_stack
)
5743 if (REG_P (stack_limit_rtx
)
5744 && REGNO (stack_limit_rtx
) > 1
5745 && REGNO (stack_limit_rtx
) <= 31)
5747 emit_insn (Pmode
== SImode
5748 ? gen_addsi3 (tmp_reg
,
5751 : gen_adddi3 (tmp_reg
,
5755 emit_insn (gen_cond_trap (LTU
, stack_reg
, tmp_reg
,
5758 else if (GET_CODE (stack_limit_rtx
) == SYMBOL_REF
5760 && (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
))
5762 rtx toload
= gen_rtx_CONST (VOIDmode
,
5763 gen_rtx_PLUS (Pmode
,
5767 emit_insn (gen_elf_high (tmp_reg
, toload
));
5768 emit_insn (gen_elf_low (tmp_reg
, tmp_reg
, toload
));
5769 emit_insn (gen_cond_trap (LTU
, stack_reg
, tmp_reg
,
5773 warning ("stack limit expression is not supported");
5776 if (copy_r12
|| ! TARGET_UPDATE
)
5777 emit_move_insn (gen_rtx_REG (Pmode
, 12), stack_reg
);
5783 /* Need a note here so that try_split doesn't get confused. */
5784 if (get_last_insn() == NULL_RTX
)
5785 emit_note (0, NOTE_INSN_DELETED
);
5786 insn
= emit_move_insn (tmp_reg
, todec
);
5787 try_split (PATTERN (insn
), insn
, 0);
5791 if (Pmode
== SImode
)
5792 insn
= emit_insn (gen_movsi_update (stack_reg
, stack_reg
,
5795 insn
= emit_insn (gen_movdi_update (stack_reg
, stack_reg
,
5800 if (Pmode
== SImode
)
5801 insn
= emit_insn (gen_addsi3 (stack_reg
, stack_reg
, todec
));
5803 insn
= emit_insn (gen_adddi3 (stack_reg
, stack_reg
, todec
));
5804 emit_move_insn (gen_rtx_MEM (Pmode
, stack_reg
),
5805 gen_rtx_REG (Pmode
, 12));
5808 RTX_FRAME_RELATED_P (insn
) = 1;
5810 gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR
,
5811 gen_rtx_SET (VOIDmode
, stack_reg
,
5812 gen_rtx_PLUS (Pmode
, stack_reg
,
5817 /* Add to 'insn' a note which is PATTERN (INSN) but with REG replaced with
5818 (plus:P (reg 1) VAL), and with REG2 replaced with RREG if REG2 is not
5820 It would be nice if dwarf2out_frame_debug_expr could deduce these
5821 equivalences by itself so it wasn't necessary to hold its hand so much. */
5824 rs6000_frame_related (insn
, reg
, val
, reg2
, rreg
)
5833 real
= copy_rtx (PATTERN (insn
));
5835 real
= replace_rtx (real
, reg
,
5836 gen_rtx_PLUS (Pmode
, gen_rtx_REG (Pmode
,
5837 STACK_POINTER_REGNUM
),
5840 /* We expect that 'real' is either a SET or a PARALLEL containing
5841 SETs (and possibly other stuff). In a PARALLEL, all the SETs
5842 are important so they all have to be marked RTX_FRAME_RELATED_P. */
5844 if (GET_CODE (real
) == SET
)
5848 temp
= simplify_rtx (SET_SRC (set
));
5850 SET_SRC (set
) = temp
;
5851 temp
= simplify_rtx (SET_DEST (set
));
5853 SET_DEST (set
) = temp
;
5854 if (GET_CODE (SET_DEST (set
)) == MEM
)
5856 temp
= simplify_rtx (XEXP (SET_DEST (set
), 0));
5858 XEXP (SET_DEST (set
), 0) = temp
;
5861 else if (GET_CODE (real
) == PARALLEL
)
5864 for (i
= 0; i
< XVECLEN (real
, 0); i
++)
5865 if (GET_CODE (XVECEXP (real
, 0, i
)) == SET
)
5867 rtx set
= XVECEXP (real
, 0, i
);
5869 temp
= simplify_rtx (SET_SRC (set
));
5871 SET_SRC (set
) = temp
;
5872 temp
= simplify_rtx (SET_DEST (set
));
5874 SET_DEST (set
) = temp
;
5875 if (GET_CODE (SET_DEST (set
)) == MEM
)
5877 temp
= simplify_rtx (XEXP (SET_DEST (set
), 0));
5879 XEXP (SET_DEST (set
), 0) = temp
;
5881 RTX_FRAME_RELATED_P (set
) = 1;
5887 if (reg2
!= NULL_RTX
)
5888 real
= replace_rtx (real
, reg2
, rreg
);
5890 RTX_FRAME_RELATED_P (insn
) = 1;
5891 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR
,
5896 /* Emit function prologue as insns. */
5899 rs6000_emit_prologue ()
5901 rs6000_stack_t
*info
= rs6000_stack_info ();
5902 enum machine_mode reg_mode
= TARGET_POWERPC64
? DImode
: SImode
;
5903 int reg_size
= TARGET_POWERPC64
? 8 : 4;
5904 rtx sp_reg_rtx
= gen_rtx_REG (Pmode
, STACK_POINTER_REGNUM
);
5905 rtx frame_ptr_rtx
= gen_rtx_REG (Pmode
, 12);
5906 rtx frame_reg_rtx
= sp_reg_rtx
;
5907 rtx cr_save_rtx
= NULL
;
5909 int saving_FPRs_inline
;
5910 int using_store_multiple
;
5911 HOST_WIDE_INT sp_offset
= 0;
5913 using_store_multiple
= (TARGET_MULTIPLE
&& ! TARGET_POWERPC64
5914 && info
->first_gp_reg_save
< 31);
5915 saving_FPRs_inline
= (info
->first_fp_reg_save
== 64
5916 || FP_SAVE_INLINE (info
->first_fp_reg_save
));
5918 /* For V.4, update stack before we do any saving and set back pointer. */
5919 if (info
->push_p
&& (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
))
5921 if (info
->total_size
< 32767)
5922 sp_offset
= info
->total_size
;
5924 frame_reg_rtx
= frame_ptr_rtx
;
5925 rs6000_emit_allocate_stack (info
->total_size
,
5926 (frame_reg_rtx
!= sp_reg_rtx
5929 || info
->first_fp_reg_save
< 64
5930 || info
->first_gp_reg_save
< 32
5932 if (frame_reg_rtx
!= sp_reg_rtx
)
5933 rs6000_emit_stack_tie ();
5936 /* If we use the link register, get it into r0. */
5937 if (info
->lr_save_p
)
5938 emit_move_insn (gen_rtx_REG (Pmode
, 0),
5939 gen_rtx_REG (Pmode
, LINK_REGISTER_REGNUM
));
5941 /* If we need to save CR, put it into r12. */
5942 if (info
->cr_save_p
&& frame_reg_rtx
!= frame_ptr_rtx
)
5944 cr_save_rtx
= gen_rtx_REG (SImode
, 12);
5945 emit_insn (gen_movesi_from_cr (cr_save_rtx
));
5948 /* Do any required saving of fpr's. If only one or two to save, do it
5949 ourself. Otherwise, call function. */
5950 if (saving_FPRs_inline
)
5953 for (i
= 0; i
< 64 - info
->first_fp_reg_save
; i
++)
5954 if ((regs_ever_live
[info
->first_fp_reg_save
+i
]
5955 && ! call_used_regs
[info
->first_fp_reg_save
+i
]))
5958 reg
= gen_rtx_REG (DFmode
, info
->first_fp_reg_save
+ i
);
5959 addr
= gen_rtx_PLUS (Pmode
, frame_reg_rtx
,
5960 GEN_INT (info
->fp_save_offset
5963 mem
= gen_rtx_MEM (DFmode
, addr
);
5964 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
5966 insn
= emit_move_insn (mem
, reg
);
5967 rs6000_frame_related (insn
, frame_ptr_rtx
, info
->total_size
,
5968 NULL_RTX
, NULL_RTX
);
5971 else if (info
->first_fp_reg_save
!= 64)
5975 const char *alloc_rname
;
5977 p
= rtvec_alloc (2 + 64 - info
->first_fp_reg_save
);
5979 RTVEC_ELT (p
, 0) = gen_rtx_CLOBBER (VOIDmode
,
5981 LINK_REGISTER_REGNUM
));
5982 sprintf (rname
, "%s%d%s", SAVE_FP_PREFIX
,
5983 info
->first_fp_reg_save
- 32, SAVE_FP_SUFFIX
);
5984 alloc_rname
= ggc_strdup (rname
);
5985 RTVEC_ELT (p
, 1) = gen_rtx_USE (VOIDmode
,
5986 gen_rtx_SYMBOL_REF (Pmode
,
5988 for (i
= 0; i
< 64 - info
->first_fp_reg_save
; i
++)
5991 reg
= gen_rtx_REG (DFmode
, info
->first_fp_reg_save
+ i
);
5992 addr
= gen_rtx_PLUS (Pmode
, frame_reg_rtx
,
5993 GEN_INT (info
->fp_save_offset
5994 + sp_offset
+ 8*i
));
5995 mem
= gen_rtx_MEM (DFmode
, addr
);
5996 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
5998 RTVEC_ELT (p
, i
+ 2) = gen_rtx_SET (VOIDmode
, mem
, reg
);
6000 insn
= emit_insn (gen_rtx_PARALLEL (VOIDmode
, p
));
6001 rs6000_frame_related (insn
, frame_ptr_rtx
, info
->total_size
,
6002 NULL_RTX
, NULL_RTX
);
6005 /* Save GPRs. This is done as a PARALLEL if we are using
6006 the store-multiple instructions. */
6007 if (using_store_multiple
)
6011 p
= rtvec_alloc (32 - info
->first_gp_reg_save
);
6012 dwarfp
= rtvec_alloc (32 - info
->first_gp_reg_save
);
6013 for (i
= 0; i
< 32 - info
->first_gp_reg_save
; i
++)
6016 reg
= gen_rtx_REG (reg_mode
, info
->first_gp_reg_save
+ i
);
6017 addr
= gen_rtx_PLUS (Pmode
, frame_reg_rtx
,
6018 GEN_INT (info
->gp_save_offset
6021 mem
= gen_rtx_MEM (reg_mode
, addr
);
6022 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
6024 RTVEC_ELT (p
, i
) = gen_rtx_SET (VOIDmode
, mem
, reg
);
6026 insn
= emit_insn (gen_rtx_PARALLEL (VOIDmode
, p
));
6027 rs6000_frame_related (insn
, frame_ptr_rtx
, info
->total_size
,
6028 NULL_RTX
, NULL_RTX
);
6033 for (i
= 0; i
< 32 - info
->first_gp_reg_save
; i
++)
6034 if ((regs_ever_live
[info
->first_gp_reg_save
+i
]
6035 && ! call_used_regs
[info
->first_gp_reg_save
+i
])
6036 || (i
+info
->first_gp_reg_save
== PIC_OFFSET_TABLE_REGNUM
6037 && (((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
6039 || (DEFAULT_ABI
== ABI_DARWIN
6043 reg
= gen_rtx_REG (reg_mode
, info
->first_gp_reg_save
+ i
);
6044 addr
= gen_rtx_PLUS (Pmode
, frame_reg_rtx
,
6045 GEN_INT (info
->gp_save_offset
6048 mem
= gen_rtx_MEM (reg_mode
, addr
);
6049 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
6051 insn
= emit_move_insn (mem
, reg
);
6052 rs6000_frame_related (insn
, frame_ptr_rtx
, info
->total_size
,
6053 NULL_RTX
, NULL_RTX
);
6057 /* ??? There's no need to emit actual instructions here, but it's the
6058 easiest way to get the frame unwind information emitted. */
6059 if (current_function_calls_eh_return
)
6061 unsigned int i
, regno
;
6067 regno
= EH_RETURN_DATA_REGNO (i
);
6068 if (regno
== INVALID_REGNUM
)
6071 reg
= gen_rtx_REG (reg_mode
, regno
);
6072 addr
= plus_constant (frame_reg_rtx
,
6073 info
->ehrd_offset
+ sp_offset
6074 + reg_size
* (int) i
);
6075 mem
= gen_rtx_MEM (reg_mode
, addr
);
6076 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
6078 insn
= emit_move_insn (mem
, reg
);
6079 rs6000_frame_related (insn
, frame_ptr_rtx
, info
->total_size
,
6080 NULL_RTX
, NULL_RTX
);
6084 /* Save lr if we used it. */
6085 if (info
->lr_save_p
)
6087 rtx addr
= gen_rtx_PLUS (Pmode
, frame_reg_rtx
,
6088 GEN_INT (info
->lr_save_offset
+ sp_offset
));
6089 rtx reg
= gen_rtx_REG (Pmode
, 0);
6090 rtx mem
= gen_rtx_MEM (Pmode
, addr
);
6091 /* This should not be of rs6000_sr_alias_set, because of
6092 __builtin_return_address. */
6094 insn
= emit_move_insn (mem
, reg
);
6095 rs6000_frame_related (insn
, frame_ptr_rtx
, info
->total_size
,
6096 reg
, gen_rtx_REG (Pmode
, LINK_REGISTER_REGNUM
));
6099 /* Save CR if we use any that must be preserved. */
6100 if (info
->cr_save_p
)
6102 rtx addr
= gen_rtx_PLUS (Pmode
, frame_reg_rtx
,
6103 GEN_INT (info
->cr_save_offset
+ sp_offset
));
6104 rtx mem
= gen_rtx_MEM (SImode
, addr
);
6105 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
6107 /* If r12 was used to hold the original sp, copy cr into r0 now
6109 if (REGNO (frame_reg_rtx
) == 12)
6111 cr_save_rtx
= gen_rtx_REG (SImode
, 0);
6112 emit_insn (gen_movesi_from_cr (cr_save_rtx
));
6114 insn
= emit_move_insn (mem
, cr_save_rtx
);
6116 /* Now, there's no way that dwarf2out_frame_debug_expr is going
6117 to understand '(unspec:SI [(reg:CC 68) ...] 19)'. But that's
6118 OK. All we have to do is specify that _one_ condition code
6119 register is saved in this stack slot. The thrower's epilogue
6120 will then restore all the call-saved registers. */
6121 rs6000_frame_related (insn
, frame_ptr_rtx
, info
->total_size
,
6122 cr_save_rtx
, gen_rtx_REG (SImode
, CR0_REGNO
));
6125 /* Update stack and set back pointer unless this is V.4,
6126 for which it was done previously. */
6127 if (info
->push_p
&& DEFAULT_ABI
!= ABI_V4
&& DEFAULT_ABI
!= ABI_SOLARIS
)
6128 rs6000_emit_allocate_stack (info
->total_size
, FALSE
);
6130 /* Set frame pointer, if needed. */
6131 if (frame_pointer_needed
)
6133 insn
= emit_move_insn (gen_rtx_REG (reg_mode
, FRAME_POINTER_REGNUM
),
6135 RTX_FRAME_RELATED_P (insn
) = 1;
6138 /* If we are using PIC_OFFSET_TABLE_REGNUM, we need to set it up. */
6139 if ((TARGET_TOC
&& TARGET_MINIMAL_TOC
&& get_pool_size () != 0)
6140 || ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
6141 && flag_pic
== 1 && regs_ever_live
[PIC_OFFSET_TABLE_REGNUM
]))
6143 /* If emit_load_toc_table will use the link register, we need to save
6144 it. We use R11 for this purpose because emit_load_toc_table
6145 can use register 0. This allows us to use a plain 'blr' to return
6146 from the procedure more often. */
6147 int save_LR_around_toc_setup
= (TARGET_ELF
&& flag_pic
!= 0
6148 && ! info
->lr_save_p
6149 && EXIT_BLOCK_PTR
->pred
!= NULL
);
6150 if (save_LR_around_toc_setup
)
6151 emit_move_insn (gen_rtx_REG (Pmode
, 11),
6152 gen_rtx_REG (Pmode
, LINK_REGISTER_REGNUM
));
6154 rs6000_emit_load_toc_table (TRUE
);
6156 if (save_LR_around_toc_setup
)
6157 emit_move_insn (gen_rtx_REG (Pmode
, LINK_REGISTER_REGNUM
),
6158 gen_rtx_REG (Pmode
, 11));
6161 if (DEFAULT_ABI
== ABI_DARWIN
6162 && flag_pic
&& current_function_uses_pic_offset_table
)
6164 rtx dest
= gen_rtx_REG (Pmode
, LINK_REGISTER_REGNUM
);
6166 rs6000_maybe_dead (emit_insn (gen_load_macho_picbase (dest
)));
6169 emit_move_insn (gen_rtx_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
),
6170 gen_rtx_REG (Pmode
, LINK_REGISTER_REGNUM
)));
6175 /* Write function prologue. */
6177 output_prolog (file
, size
)
6179 int size ATTRIBUTE_UNUSED
;
6181 rs6000_stack_t
*info
= rs6000_stack_info ();
6183 if (TARGET_DEBUG_STACK
)
6184 debug_stack_info (info
);
6186 /* Write .extern for any function we will call to save and restore fp
6188 if (info
->first_fp_reg_save
< 64 && !FP_SAVE_INLINE (info
->first_fp_reg_save
))
6189 fprintf (file
, "\t.extern %s%d%s\n\t.extern %s%d%s\n",
6190 SAVE_FP_PREFIX
, info
->first_fp_reg_save
- 32, SAVE_FP_SUFFIX
,
6191 RESTORE_FP_PREFIX
, info
->first_fp_reg_save
- 32, RESTORE_FP_SUFFIX
);
6193 /* Write .extern for AIX common mode routines, if needed. */
6194 if (! TARGET_POWER
&& ! TARGET_POWERPC
&& ! common_mode_defined
)
6196 fputs ("\t.extern __mulh\n", file
);
6197 fputs ("\t.extern __mull\n", file
);
6198 fputs ("\t.extern __divss\n", file
);
6199 fputs ("\t.extern __divus\n", file
);
6200 fputs ("\t.extern __quoss\n", file
);
6201 fputs ("\t.extern __quous\n", file
);
6202 common_mode_defined
= 1;
6205 if (! HAVE_prologue
)
6209 /* A NOTE_INSN_DELETED is supposed to be at the start
6210 and end of the "toplevel" insn chain. */
6211 emit_note (0, NOTE_INSN_DELETED
);
6212 rs6000_emit_prologue ();
6213 emit_note (0, NOTE_INSN_DELETED
);
6215 if (TARGET_DEBUG_STACK
)
6216 debug_rtx_list (get_insns(), 100);
6217 final (get_insns(), file
, FALSE
, FALSE
);
6221 rs6000_pic_labelno
++;
6224 /* Emit function epilogue as insns.
6226 At present, dwarf2out_frame_debug_expr doesn't understand
6227 register restores, so we don't bother setting RTX_FRAME_RELATED_P
6228 anywhere in the epilogue. Most of the insns below would in any case
6229 need special notes to explain where r11 is in relation to the stack. */
6232 rs6000_emit_epilogue (sibcall
)
6235 rs6000_stack_t
*info
;
6236 int restoring_FPRs_inline
;
6237 int using_load_multiple
;
6238 int using_mfcr_multiple
;
6239 int use_backchain_to_restore_sp
;
6241 rtx sp_reg_rtx
= gen_rtx_REG (Pmode
, 1);
6242 rtx frame_reg_rtx
= sp_reg_rtx
;
6243 enum machine_mode reg_mode
= TARGET_POWERPC64
? DImode
: SImode
;
6244 int reg_size
= TARGET_POWERPC64
? 8 : 4;
6247 info
= rs6000_stack_info ();
6248 using_load_multiple
= (TARGET_MULTIPLE
&& ! TARGET_POWERPC64
6249 && info
->first_gp_reg_save
< 31);
6250 restoring_FPRs_inline
= (sibcall
6251 || current_function_calls_eh_return
6252 || info
->first_fp_reg_save
== 64
6253 || FP_SAVE_INLINE (info
->first_fp_reg_save
));
6254 use_backchain_to_restore_sp
= (frame_pointer_needed
6255 || current_function_calls_alloca
6256 || info
->total_size
> 32767);
6257 using_mfcr_multiple
= (rs6000_cpu
== PROCESSOR_PPC601
6258 || rs6000_cpu
== PROCESSOR_PPC603
6259 || rs6000_cpu
== PROCESSOR_PPC750
6262 /* If we have a frame pointer, a call to alloca, or a large stack
6263 frame, restore the old stack pointer using the backchain. Otherwise,
6264 we know what size to update it with. */
6265 if (use_backchain_to_restore_sp
)
6267 /* Under V.4, don't reset the stack pointer until after we're done
6268 loading the saved registers. */
6269 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
6270 frame_reg_rtx
= gen_rtx_REG (Pmode
, 11);
6272 emit_move_insn (frame_reg_rtx
,
6273 gen_rtx_MEM (Pmode
, sp_reg_rtx
));
6276 else if (info
->push_p
)
6278 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
6279 sp_offset
= info
->total_size
;
6282 emit_insn (TARGET_32BIT
6283 ? gen_addsi3 (sp_reg_rtx
, sp_reg_rtx
,
6284 GEN_INT (info
->total_size
))
6285 : gen_adddi3 (sp_reg_rtx
, sp_reg_rtx
,
6286 GEN_INT (info
->total_size
)));
6290 /* Get the old lr if we saved it. */
6291 if (info
->lr_save_p
)
6293 rtx addr
= gen_rtx_PLUS (Pmode
, frame_reg_rtx
,
6294 GEN_INT (info
->lr_save_offset
+ sp_offset
));
6295 rtx mem
= gen_rtx_MEM (Pmode
, addr
);
6296 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
6298 emit_move_insn (gen_rtx_REG (Pmode
, 0), mem
);
6301 /* Get the old cr if we saved it. */
6302 if (info
->cr_save_p
)
6304 rtx addr
= gen_rtx_PLUS (Pmode
, frame_reg_rtx
,
6305 GEN_INT (info
->cr_save_offset
+ sp_offset
));
6306 rtx mem
= gen_rtx_MEM (SImode
, addr
);
6307 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
6309 emit_move_insn (gen_rtx_REG (SImode
, 12), mem
);
6312 /* Set LR here to try to overlap restores below. */
6313 if (info
->lr_save_p
)
6314 emit_move_insn (gen_rtx_REG (Pmode
, LINK_REGISTER_REGNUM
),
6315 gen_rtx_REG (Pmode
, 0));
6317 /* Load exception handler data registers, if needed. */
6318 if (current_function_calls_eh_return
)
6320 unsigned int i
, regno
;
6326 regno
= EH_RETURN_DATA_REGNO (i
);
6327 if (regno
== INVALID_REGNUM
)
6330 addr
= plus_constant (frame_reg_rtx
,
6331 info
->ehrd_offset
+ sp_offset
6332 + reg_size
* (int) i
);
6333 mem
= gen_rtx_MEM (reg_mode
, addr
);
6334 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
6336 emit_move_insn (gen_rtx_REG (reg_mode
, regno
), mem
);
6340 /* Restore GPRs. This is done as a PARALLEL if we are using
6341 the load-multiple instructions. */
6342 if (using_load_multiple
)
6345 p
= rtvec_alloc (32 - info
->first_gp_reg_save
);
6346 for (i
= 0; i
< 32 - info
->first_gp_reg_save
; i
++)
6348 rtx addr
= gen_rtx_PLUS (Pmode
, frame_reg_rtx
,
6349 GEN_INT (info
->gp_save_offset
6352 rtx mem
= gen_rtx_MEM (reg_mode
, addr
);
6353 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
6356 gen_rtx_SET (VOIDmode
,
6357 gen_rtx_REG (reg_mode
, info
->first_gp_reg_save
+ i
),
6360 emit_insn (gen_rtx_PARALLEL (VOIDmode
, p
));
6363 for (i
= 0; i
< 32 - info
->first_gp_reg_save
; i
++)
6364 if ((regs_ever_live
[info
->first_gp_reg_save
+i
]
6365 && ! call_used_regs
[info
->first_gp_reg_save
+i
])
6366 || (i
+info
->first_gp_reg_save
== PIC_OFFSET_TABLE_REGNUM
6367 && (((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
6369 || (DEFAULT_ABI
== ABI_DARWIN
6372 rtx addr
= gen_rtx_PLUS (Pmode
, frame_reg_rtx
,
6373 GEN_INT (info
->gp_save_offset
6376 rtx mem
= gen_rtx_MEM (reg_mode
, addr
);
6377 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
6379 emit_move_insn (gen_rtx_REG (reg_mode
,
6380 info
->first_gp_reg_save
+ i
),
6384 /* Restore fpr's if we need to do it without calling a function. */
6385 if (restoring_FPRs_inline
)
6386 for (i
= 0; i
< 64 - info
->first_fp_reg_save
; i
++)
6387 if ((regs_ever_live
[info
->first_fp_reg_save
+i
]
6388 && ! call_used_regs
[info
->first_fp_reg_save
+i
]))
6391 addr
= gen_rtx_PLUS (Pmode
, frame_reg_rtx
,
6392 GEN_INT (info
->fp_save_offset
6395 mem
= gen_rtx_MEM (DFmode
, addr
);
6396 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
6398 emit_move_insn (gen_rtx_REG (DFmode
,
6399 info
->first_fp_reg_save
+ i
),
6403 /* If we saved cr, restore it here. Just those that were used. */
6404 if (info
->cr_save_p
)
6406 rtx r12_rtx
= gen_rtx_REG (SImode
, 12);
6409 if (using_mfcr_multiple
)
6411 for (i
= 0; i
< 8; i
++)
6412 if (regs_ever_live
[CR0_REGNO
+i
] && ! call_used_regs
[CR0_REGNO
+i
])
6418 if (using_mfcr_multiple
&& count
> 1)
6423 p
= rtvec_alloc (count
);
6426 for (i
= 0; i
< 8; i
++)
6427 if (regs_ever_live
[CR0_REGNO
+i
] && ! call_used_regs
[CR0_REGNO
+i
])
6429 rtvec r
= rtvec_alloc (2);
6430 RTVEC_ELT (r
, 0) = r12_rtx
;
6431 RTVEC_ELT (r
, 1) = GEN_INT (1 << (7-i
));
6432 RTVEC_ELT (p
, ndx
) =
6433 gen_rtx_SET (VOIDmode
, gen_rtx_REG (CCmode
, CR0_REGNO
+i
),
6434 gen_rtx_UNSPEC (CCmode
, r
, 20));
6437 emit_insn (gen_rtx_PARALLEL (VOIDmode
, p
));
6442 for (i
= 0; i
< 8; i
++)
6443 if (regs_ever_live
[CR0_REGNO
+i
] && ! call_used_regs
[CR0_REGNO
+i
])
6445 emit_insn (gen_movsi_to_cr_one (gen_rtx_REG (CCmode
,
6451 /* If this is V.4, unwind the stack pointer after all of the loads
6452 have been done. We need to emit a block here so that sched
6453 doesn't decide to move the sp change before the register restores
6454 (which may not have any obvious dependency on the stack). This
6455 doesn't hurt performance, because there is no scheduling that can
6456 be done after this point. */
6457 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
6459 if (frame_reg_rtx
!= sp_reg_rtx
)
6460 rs6000_emit_stack_tie ();
6462 if (use_backchain_to_restore_sp
)
6464 emit_move_insn (sp_reg_rtx
, frame_reg_rtx
);
6466 else if (sp_offset
!= 0)
6468 emit_insn (Pmode
== SImode
6469 ? gen_addsi3 (sp_reg_rtx
, sp_reg_rtx
,
6470 GEN_INT (sp_offset
))
6471 : gen_adddi3 (sp_reg_rtx
, sp_reg_rtx
,
6472 GEN_INT (sp_offset
)));
6476 if (current_function_calls_eh_return
)
6478 rtx sa
= EH_RETURN_STACKADJ_RTX
;
6479 emit_insn (Pmode
== SImode
6480 ? gen_addsi3 (sp_reg_rtx
, sp_reg_rtx
, sa
)
6481 : gen_adddi3 (sp_reg_rtx
, sp_reg_rtx
, sa
));
6487 if (! restoring_FPRs_inline
)
6488 p
= rtvec_alloc (3 + 64 - info
->first_fp_reg_save
);
6490 p
= rtvec_alloc (2);
6492 RTVEC_ELT (p
, 0) = gen_rtx_RETURN (VOIDmode
);
6493 RTVEC_ELT (p
, 1) = gen_rtx_USE (VOIDmode
,
6495 LINK_REGISTER_REGNUM
));
6497 /* If we have to restore more than two FP registers, branch to the
6498 restore function. It will return to our caller. */
6499 if (! restoring_FPRs_inline
)
6503 const char *alloc_rname
;
6505 sprintf (rname
, "%s%d%s", RESTORE_FP_PREFIX
,
6506 info
->first_fp_reg_save
- 32, RESTORE_FP_SUFFIX
);
6507 alloc_rname
= ggc_strdup (rname
);
6508 RTVEC_ELT (p
, 2) = gen_rtx_USE (VOIDmode
,
6509 gen_rtx_SYMBOL_REF (Pmode
,
6512 for (i
= 0; i
< 64 - info
->first_fp_reg_save
; i
++)
6515 addr
= gen_rtx_PLUS (Pmode
, sp_reg_rtx
,
6516 GEN_INT (info
->fp_save_offset
+ 8*i
));
6517 mem
= gen_rtx_MEM (DFmode
, addr
);
6518 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
6520 RTVEC_ELT (p
, i
+3) =
6521 gen_rtx_SET (VOIDmode
,
6522 gen_rtx_REG (DFmode
, info
->first_fp_reg_save
+ i
),
6527 emit_jump_insn (gen_rtx_PARALLEL (VOIDmode
, p
));
6531 /* Write function epilogue. */
6534 output_epilog (file
, size
)
6536 int size ATTRIBUTE_UNUSED
;
6538 rs6000_stack_t
*info
= rs6000_stack_info ();
6540 if (! HAVE_epilogue
)
6542 rtx insn
= get_last_insn ();
6543 /* If the last insn was a BARRIER, we don't have to write anything except
6545 if (GET_CODE (insn
) == NOTE
)
6546 insn
= prev_nonnote_insn (insn
);
6547 if (insn
== 0 || GET_CODE (insn
) != BARRIER
)
6549 /* This is slightly ugly, but at least we don't have two
6550 copies of the epilogue-emitting code. */
6553 /* A NOTE_INSN_DELETED is supposed to be at the start
6554 and end of the "toplevel" insn chain. */
6555 emit_note (0, NOTE_INSN_DELETED
);
6556 rs6000_emit_epilogue (FALSE
);
6557 emit_note (0, NOTE_INSN_DELETED
);
6559 if (TARGET_DEBUG_STACK
)
6560 debug_rtx_list (get_insns(), 100);
6561 final (get_insns(), file
, FALSE
, FALSE
);
6566 /* Output a traceback table here. See /usr/include/sys/debug.h for info
6569 We don't output a traceback table if -finhibit-size-directive was
6570 used. The documentation for -finhibit-size-directive reads
6571 ``don't output a @code{.size} assembler directive, or anything
6572 else that would cause trouble if the function is split in the
6573 middle, and the two halves are placed at locations far apart in
6574 memory.'' The traceback table has this property, since it
6575 includes the offset from the start of the function to the
6576 traceback table itself.
6578 System V.4 Powerpc's (and the embedded ABI derived from it) use a
6579 different traceback table. */
6580 if (DEFAULT_ABI
== ABI_AIX
&& ! flag_inhibit_size_directive
)
6582 const char *fname
= XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0);
6583 int fixed_parms
, float_parms
, parm_info
;
6586 while (*fname
== '.') /* V.4 encodes . in the name */
6589 /* Need label immediately before tbtab, so we can compute its offset
6590 from the function start. */
6593 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LT");
6594 ASM_OUTPUT_LABEL (file
, fname
);
6596 /* The .tbtab pseudo-op can only be used for the first eight
6597 expressions, since it can't handle the possibly variable
6598 length fields that follow. However, if you omit the optional
6599 fields, the assembler outputs zeros for all optional fields
6600 anyways, giving each variable length field is minimum length
6601 (as defined in sys/debug.h). Thus we can not use the .tbtab
6602 pseudo-op at all. */
6604 /* An all-zero word flags the start of the tbtab, for debuggers
6605 that have to find it by searching forward from the entry
6606 point or from the current pc. */
6607 fputs ("\t.long 0\n", file
);
6609 /* Tbtab format type. Use format type 0. */
6610 fputs ("\t.byte 0,", file
);
6612 /* Language type. Unfortunately, there doesn't seem to be any
6613 official way to get this info, so we use language_string. C
6614 is 0. C++ is 9. No number defined for Obj-C, so use the
6615 value for C for now. There is no official value for Java,
6616 although IBM appears to be using 13. There is no official value
6617 for Chill, so we've choosen 44 pseudo-randomly. */
6618 if (! strcmp (language_string
, "GNU C")
6619 || ! strcmp (language_string
, "GNU Objective-C"))
6621 else if (! strcmp (language_string
, "GNU F77"))
6623 else if (! strcmp (language_string
, "GNU Ada"))
6625 else if (! strcmp (language_string
, "GNU Pascal"))
6627 else if (! strcmp (language_string
, "GNU C++"))
6629 else if (! strcmp (language_string
, "GNU Java"))
6631 else if (! strcmp (language_string
, "GNU CHILL"))
6635 fprintf (file
, "%d,", i
);
6637 /* 8 single bit fields: global linkage (not set for C extern linkage,
6638 apparently a PL/I convention?), out-of-line epilogue/prologue, offset
6639 from start of procedure stored in tbtab, internal function, function
6640 has controlled storage, function has no toc, function uses fp,
6641 function logs/aborts fp operations. */
6642 /* Assume that fp operations are used if any fp reg must be saved. */
6643 fprintf (file
, "%d,", (1 << 5) | ((info
->first_fp_reg_save
!= 64) << 1));
6645 /* 6 bitfields: function is interrupt handler, name present in
6646 proc table, function calls alloca, on condition directives
6647 (controls stack walks, 3 bits), saves condition reg, saves
6649 /* The `function calls alloca' bit seems to be set whenever reg 31 is
6650 set up as a frame pointer, even when there is no alloca call. */
6651 fprintf (file
, "%d,",
6652 ((1 << 6) | (frame_pointer_needed
<< 5)
6653 | (info
->cr_save_p
<< 1) | (info
->lr_save_p
)));
6655 /* 3 bitfields: saves backchain, spare bit, number of fpr saved
6657 fprintf (file
, "%d,",
6658 (info
->push_p
<< 7) | (64 - info
->first_fp_reg_save
));
6660 /* 2 bitfields: spare bits (2 bits), number of gpr saved (6 bits). */
6661 fprintf (file
, "%d,", (32 - first_reg_to_save ()));
6664 /* Compute the parameter info from the function decl argument
6667 int next_parm_info_bit
;
6669 next_parm_info_bit
= 31;
6674 for (decl
= DECL_ARGUMENTS (current_function_decl
);
6675 decl
; decl
= TREE_CHAIN (decl
))
6677 rtx parameter
= DECL_INCOMING_RTL (decl
);
6678 enum machine_mode mode
= GET_MODE (parameter
);
6680 if (GET_CODE (parameter
) == REG
)
6682 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
6690 else if (mode
== DFmode
)
6695 /* If only one bit will fit, don't or in this entry. */
6696 if (next_parm_info_bit
> 0)
6697 parm_info
|= (bits
<< (next_parm_info_bit
- 1));
6698 next_parm_info_bit
-= 2;
6702 fixed_parms
+= ((GET_MODE_SIZE (mode
)
6703 + (UNITS_PER_WORD
- 1))
6705 next_parm_info_bit
-= 1;
6711 /* Number of fixed point parameters. */
6712 /* This is actually the number of words of fixed point parameters; thus
6713 an 8 byte struct counts as 2; and thus the maximum value is 8. */
6714 fprintf (file
, "%d,", fixed_parms
);
6716 /* 2 bitfields: number of floating point parameters (7 bits), parameters
6718 /* This is actually the number of fp registers that hold parameters;
6719 and thus the maximum value is 13. */
6720 /* Set parameters on stack bit if parameters are not in their original
6721 registers, regardless of whether they are on the stack? Xlc
6722 seems to set the bit when not optimizing. */
6723 fprintf (file
, "%d\n", ((float_parms
<< 1) | (! optimize
)));
6725 /* Optional fields follow. Some are variable length. */
6727 /* Parameter types, left adjusted bit fields: 0 fixed, 10 single float,
6729 /* There is an entry for each parameter in a register, in the order that
6730 they occur in the parameter list. Any intervening arguments on the
6731 stack are ignored. If the list overflows a long (max possible length
6732 34 bits) then completely leave off all elements that don't fit. */
6733 /* Only emit this long if there was at least one parameter. */
6734 if (fixed_parms
|| float_parms
)
6735 fprintf (file
, "\t.long %d\n", parm_info
);
6737 /* Offset from start of code to tb table. */
6738 fputs ("\t.long ", file
);
6739 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LT");
6741 RS6000_OUTPUT_BASENAME (file
, fname
);
6743 assemble_name (file
, fname
);
6747 RS6000_OUTPUT_BASENAME (file
, fname
);
6749 assemble_name (file
, fname
);
6753 /* Interrupt handler mask. */
6754 /* Omit this long, since we never set the interrupt handler bit
6757 /* Number of CTL (controlled storage) anchors. */
6758 /* Omit this long, since the has_ctl bit is never set above. */
6760 /* Displacement into stack of each CTL anchor. */
6761 /* Omit this list of longs, because there are no CTL anchors. */
6763 /* Length of function name. */
6764 fprintf (file
, "\t.short %d\n", (int) strlen (fname
));
6766 /* Function name. */
6767 assemble_string (fname
, strlen (fname
));
6769 /* Register for alloca automatic storage; this is always reg 31.
6770 Only emit this if the alloca bit was set above. */
6771 if (frame_pointer_needed
)
6772 fputs ("\t.byte 31\n", file
);
6776 /* A C compound statement that outputs the assembler code for a thunk function,
6777 used to implement C++ virtual function calls with multiple inheritance. The
6778 thunk acts as a wrapper around a virtual function, adjusting the implicit
6779 object parameter before handing control off to the real function.
6781 First, emit code to add the integer DELTA to the location that contains the
6782 incoming first argument. Assume that this argument contains a pointer, and
6783 is the one used to pass the `this' pointer in C++. This is the incoming
6784 argument *before* the function prologue, e.g. `%o0' on a sparc. The
6785 addition must preserve the values of all other incoming arguments.
6787 After the addition, emit code to jump to FUNCTION, which is a
6788 `FUNCTION_DECL'. This is a direct pure jump, not a call, and does not touch
6789 the return address. Hence returning from FUNCTION will return to whoever
6790 called the current `thunk'.
6792 The effect must be as if FUNCTION had been called directly with the adjusted
6793 first argument. This macro is responsible for emitting all of the code for
6794 a thunk function; `FUNCTION_PROLOGUE' and `FUNCTION_EPILOGUE' are not
6797 The THUNK_FNDECL is redundant. (DELTA and FUNCTION have already been
6798 extracted from it.) It might possibly be useful on some targets, but
6801 If you do not define this macro, the target-independent code in the C++
6802 frontend will generate a less efficient heavyweight thunk that calls
6803 FUNCTION instead of jumping to it. The generic approach does not support
6807 output_mi_thunk (file
, thunk_fndecl
, delta
, function
)
6809 tree thunk_fndecl ATTRIBUTE_UNUSED
;
6813 const char *this_reg
= reg_names
[ aggregate_value_p (TREE_TYPE (TREE_TYPE (function
))) ? 4 : 3 ];
6816 const char *r0
= reg_names
[0];
6817 const char *toc
= reg_names
[2];
6818 const char *schain
= reg_names
[11];
6819 const char *r12
= reg_names
[12];
6821 static int labelno
= 0;
6823 /* Small constants that can be done by one add instruction */
6824 if (delta
>= -32768 && delta
<= 32767)
6826 if (! TARGET_NEW_MNEMONICS
)
6827 fprintf (file
, "\tcal %s,%d(%s)\n", this_reg
, delta
, this_reg
);
6829 fprintf (file
, "\taddi %s,%s,%d\n", this_reg
, this_reg
, delta
);
6832 /* Large constants that can be done by one addis instruction */
6833 else if ((delta
& 0xffff) == 0 && num_insns_constant_wide (delta
) == 1)
6834 asm_fprintf (file
, "\t{cau|addis} %s,%s,%d\n", this_reg
, this_reg
,
6837 /* 32-bit constants that can be done by an add and addis instruction. */
6838 else if (TARGET_32BIT
|| num_insns_constant_wide (delta
) == 1)
6840 /* Break into two pieces, propagating the sign bit from the low word to
6842 int delta_high
= delta
>> 16;
6843 int delta_low
= delta
& 0xffff;
6844 if ((delta_low
& 0x8000) != 0)
6847 delta_low
= (delta_low
^ 0x8000) - 0x8000; /* sign extend */
6850 asm_fprintf (file
, "\t{cau|addis} %s,%s,%d\n", this_reg
, this_reg
,
6853 if (! TARGET_NEW_MNEMONICS
)
6854 fprintf (file
, "\tcal %s,%d(%s)\n", this_reg
, delta_low
, this_reg
);
6856 fprintf (file
, "\taddi %s,%s,%d\n", this_reg
, this_reg
, delta_low
);
6859 /* 64-bit constants, fixme */
6863 /* Get the prefix in front of the names. */
6864 switch (DEFAULT_ABI
)
6874 case ABI_AIX_NODESC
:
6880 /* If the function is compiled in this module, jump to it directly.
6881 Otherwise, load up its address and jump to it. */
6883 fname
= XSTR (XEXP (DECL_RTL (function
), 0), 0);
6885 if (current_file_function_operand (XEXP (DECL_RTL (function
), 0), VOIDmode
)
6886 && ! lookup_attribute ("longcall",
6887 TYPE_ATTRIBUTES (TREE_TYPE (function
))))
6889 fprintf (file
, "\tb %s", prefix
);
6890 assemble_name (file
, fname
);
6891 if (DEFAULT_ABI
== ABI_V4
&& flag_pic
) fputs ("@local", file
);
6897 switch (DEFAULT_ABI
)
6903 /* Set up a TOC entry for the function. */
6904 ASM_GENERATE_INTERNAL_LABEL (buf
, "Lthunk", labelno
);
6906 ASM_OUTPUT_INTERNAL_LABEL (file
, "Lthunk", labelno
);
6909 /* Note, MINIMAL_TOC doesn't make sense in the case of a thunk, since
6910 there will be only one TOC entry for this function. */
6911 fputs ("\t.tc\t", file
);
6912 assemble_name (file
, buf
);
6913 fputs ("[TC],", file
);
6914 assemble_name (file
, buf
);
6917 asm_fprintf (file
, (TARGET_32BIT
) ? "\t{l|lwz} %s," : "\tld %s", r12
);
6918 assemble_name (file
, buf
);
6919 asm_fprintf (file
, "(%s)\n", reg_names
[2]);
6921 (TARGET_32BIT
) ? "\t{l|lwz} %s,0(%s)\n" : "\tld %s,0(%s)\n",
6925 (TARGET_32BIT
) ? "\t{l|lwz} %s,4(%s)\n" : "\tld %s,8(%s)\n",
6928 asm_fprintf (file
, "\tmtctr %s\n", r0
);
6930 (TARGET_32BIT
) ? "\t{l|lwz} %s,8(%s)\n" : "\tld %s,16(%s)\n",
6933 asm_fprintf (file
, "\tbctr\n");
6936 case ABI_AIX_NODESC
:
6939 fprintf (file
, "\tb %s", prefix
);
6940 assemble_name (file
, fname
);
6941 if (flag_pic
) fputs ("@plt", file
);
6947 fprintf (file
, "\tb %s", prefix
);
6948 if (flag_pic
&& !machopic_name_defined_p (fname
))
6949 assemble_name (file
, machopic_stub_name (fname
));
6951 assemble_name (file
, fname
);
6960 /* A quick summary of the various types of 'constant-pool tables'
6963 Target Flags Name One table per
6964 AIX (none) AIX TOC object file
6965 AIX -mfull-toc AIX TOC object file
6966 AIX -mminimal-toc AIX minimal TOC translation unit
6967 SVR4/EABI (none) SVR4 SDATA object file
6968 SVR4/EABI -fpic SVR4 pic object file
6969 SVR4/EABI -fPIC SVR4 PIC translation unit
6970 SVR4/EABI -mrelocatable EABI TOC function
6971 SVR4/EABI -maix AIX TOC object file
6972 SVR4/EABI -maix -mminimal-toc
6973 AIX minimal TOC translation unit
6975 Name Reg. Set by entries contains:
6976 made by addrs? fp? sum?
6978 AIX TOC 2 crt0 as Y option option
6979 AIX minimal TOC 30 prolog gcc Y Y option
6980 SVR4 SDATA 13 crt0 gcc N Y N
6981 SVR4 pic 30 prolog ld Y not yet N
6982 SVR4 PIC 30 prolog gcc Y option option
6983 EABI TOC 30 prolog gcc Y option option
6987 /* Hash table stuff for keeping track of TOC entries. */
6989 struct toc_hash_struct
6991 /* `key' will satisfy CONSTANT_P; in fact, it will satisfy
6992 ASM_OUTPUT_SPECIAL_POOL_ENTRY_P. */
6994 enum machine_mode key_mode
;
6998 static htab_t toc_hash_table
;
7000 /* Hash functions for the hash table. */
7003 rs6000_hash_constant (k
)
7006 unsigned result
= (GET_CODE (k
) << 3) ^ GET_MODE (k
);
7007 const char *format
= GET_RTX_FORMAT (GET_CODE (k
));
7008 int flen
= strlen (format
);
7011 if (GET_CODE (k
) == LABEL_REF
)
7012 return result
* 1231 + X0INT (XEXP (k
, 0), 3);
7014 if (GET_CODE (k
) == CONST_DOUBLE
)
7016 else if (GET_CODE (k
) == CODE_LABEL
)
7021 for (; fidx
< flen
; fidx
++)
7022 switch (format
[fidx
])
7027 const char *str
= XSTR (k
, fidx
);
7029 result
= result
* 613 + len
;
7030 for (i
= 0; i
< len
; i
++)
7031 result
= result
* 613 + (unsigned) str
[i
];
7036 result
= result
* 1231 + rs6000_hash_constant (XEXP (k
, fidx
));
7040 result
= result
* 613 + (unsigned) XINT (k
, fidx
);
7043 if (sizeof (unsigned) >= sizeof (HOST_WIDE_INT
))
7044 result
= result
* 613 + (unsigned) XWINT (k
, fidx
);
7048 for (i
= 0; i
< sizeof(HOST_WIDE_INT
)/sizeof(unsigned); i
++)
7049 result
= result
* 613 + (unsigned) (XWINT (k
, fidx
)
7060 toc_hash_function (hash_entry
)
7061 const void * hash_entry
;
7063 const struct toc_hash_struct
*thc
=
7064 (const struct toc_hash_struct
*) hash_entry
;
7065 return rs6000_hash_constant (thc
->key
) ^ thc
->key_mode
;
7068 /* Compare H1 and H2 for equivalence. */
7071 toc_hash_eq (h1
, h2
)
7075 rtx r1
= ((const struct toc_hash_struct
*) h1
)->key
;
7076 rtx r2
= ((const struct toc_hash_struct
*) h2
)->key
;
7078 if (((const struct toc_hash_struct
*) h1
)->key_mode
7079 != ((const struct toc_hash_struct
*) h2
)->key_mode
)
7082 /* Gotcha: One of these const_doubles will be in memory.
7083 The other may be on the constant-pool chain.
7084 So rtx_equal_p will think they are different... */
7087 if (GET_CODE (r1
) != GET_CODE (r2
)
7088 || GET_MODE (r1
) != GET_MODE (r2
))
7090 if (GET_CODE (r1
) == CONST_DOUBLE
)
7092 int format_len
= strlen (GET_RTX_FORMAT (CONST_DOUBLE
));
7094 for (i
= 2; i
< format_len
; i
++)
7095 if (XWINT (r1
, i
) != XWINT (r2
, i
))
7100 else if (GET_CODE (r1
) == LABEL_REF
)
7101 return (CODE_LABEL_NUMBER (XEXP (r1
, 0))
7102 == CODE_LABEL_NUMBER (XEXP (r2
, 0)));
7104 return rtx_equal_p (r1
, r2
);
7107 /* Mark the hash table-entry HASH_ENTRY. */
7110 toc_hash_mark_entry (hash_slot
, unused
)
7112 void * unused ATTRIBUTE_UNUSED
;
7114 const struct toc_hash_struct
* hash_entry
=
7115 *(const struct toc_hash_struct
**) hash_slot
;
7116 rtx r
= hash_entry
->key
;
7117 ggc_set_mark (hash_entry
);
7118 /* For CODE_LABELS, we don't want to drag in the whole insn chain... */
7119 if (GET_CODE (r
) == LABEL_REF
)
7122 ggc_set_mark (XEXP (r
, 0));
7129 /* Mark all the elements of the TOC hash-table *HT. */
7132 toc_hash_mark_table (vht
)
7137 htab_traverse (*ht
, toc_hash_mark_entry
, (void *)0);
7140 /* These are the names given by the C++ front-end to vtables, and
7141 vtable-like objects. Ideally, this logic should not be here;
7142 instead, there should be some programmatic way of inquiring as
7143 to whether or not an object is a vtable. */
7145 #define VTABLE_NAME_P(NAME) \
7146 (strncmp ("_vt.", name, strlen("_vt.")) == 0 \
7147 || strncmp ("_ZTV", name, strlen ("_ZTV")) == 0 \
7148 || strncmp ("_ZTT", name, strlen ("_ZTT")) == 0 \
7149 || strncmp ("_ZTC", name, strlen ("_ZTC")) == 0)
7152 rs6000_output_symbol_ref (file
, x
)
7156 /* Currently C++ toc references to vtables can be emitted before it
7157 is decided whether the vtable is public or private. If this is
7158 the case, then the linker will eventually complain that there is
7159 a reference to an unknown section. Thus, for vtables only,
7160 we emit the TOC reference to reference the symbol and not the
7162 const char *name
= XSTR (x
, 0);
7164 if (VTABLE_NAME_P (name
))
7166 RS6000_OUTPUT_BASENAME (file
, name
);
7169 assemble_name (file
, name
);
7172 /* Output a TOC entry. We derive the entry name from what is
7176 output_toc (file
, x
, labelno
, mode
)
7180 enum machine_mode mode
;
7183 const char *name
= buf
;
7184 const char *real_name
;
7191 /* When the linker won't eliminate them, don't output duplicate
7192 TOC entries (this happens on AIX if there is any kind of TOC,
7193 and on SVR4 under -fPIC or -mrelocatable). */
7196 struct toc_hash_struct
*h
;
7199 h
= ggc_alloc (sizeof (*h
));
7202 h
->labelno
= labelno
;
7204 found
= htab_find_slot (toc_hash_table
, h
, 1);
7207 else /* This is indeed a duplicate.
7208 Set this label equal to that label. */
7210 fputs ("\t.set ", file
);
7211 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LC");
7212 fprintf (file
, "%d,", labelno
);
7213 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LC");
7214 fprintf (file
, "%d\n", ((*(const struct toc_hash_struct
**)
7220 /* If we're going to put a double constant in the TOC, make sure it's
7221 aligned properly when strict alignment is on. */
7222 if (GET_CODE (x
) == CONST_DOUBLE
7224 && GET_MODE_BITSIZE (mode
) >= 64
7225 && ! (TARGET_NO_FP_IN_TOC
&& ! TARGET_MINIMAL_TOC
)) {
7226 ASM_OUTPUT_ALIGN (file
, 3);
7229 ASM_OUTPUT_INTERNAL_LABEL (file
, "LC", labelno
);
7231 /* Handle FP constants specially. Note that if we have a minimal
7232 TOC, things we put here aren't actually in the TOC, so we can allow
7234 if (GET_CODE (x
) == CONST_DOUBLE
&& GET_MODE (x
) == DFmode
)
7239 REAL_VALUE_FROM_CONST_DOUBLE (rv
, x
);
7240 REAL_VALUE_TO_TARGET_DOUBLE (rv
, k
);
7244 if (TARGET_MINIMAL_TOC
)
7245 fprintf (file
, "\t.llong 0x%lx%08lx\n", k
[0], k
[1]);
7247 fprintf (file
, "\t.tc FD_%lx_%lx[TC],0x%lx%08lx\n",
7248 k
[0], k
[1], k
[0] & 0xffffffff, k
[1] & 0xffffffff);
7253 if (TARGET_MINIMAL_TOC
)
7254 fprintf (file
, "\t.long 0x%lx\n\t.long 0x%lx\n", k
[0], k
[1]);
7256 fprintf (file
, "\t.tc FD_%lx_%lx[TC],0x%lx,0x%lx\n",
7257 k
[0], k
[1], k
[0], k
[1]);
7261 else if (GET_CODE (x
) == CONST_DOUBLE
&& GET_MODE (x
) == SFmode
)
7266 REAL_VALUE_FROM_CONST_DOUBLE (rv
, x
);
7267 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
7271 if (TARGET_MINIMAL_TOC
)
7272 fprintf (file
, "\t.llong 0x%lx00000000\n", l
);
7274 fprintf (file
, "\t.tc FS_%lx[TC],0x%lx00000000\n", l
, l
);
7279 if (TARGET_MINIMAL_TOC
)
7280 fprintf (file
, "\t.long 0x%lx\n", l
);
7282 fprintf (file
, "\t.tc FS_%lx[TC],0x%lx\n", l
, l
);
7286 else if (GET_MODE (x
) == VOIDmode
7287 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
))
7289 unsigned HOST_WIDE_INT low
;
7292 if (GET_CODE (x
) == CONST_DOUBLE
)
7294 low
= CONST_DOUBLE_LOW (x
);
7295 high
= CONST_DOUBLE_HIGH (x
);
7298 #if HOST_BITS_PER_WIDE_INT == 32
7301 high
= (low
& 0x80000000) ? ~0 : 0;
7305 low
= INTVAL (x
) & 0xffffffff;
7306 high
= (HOST_WIDE_INT
) INTVAL (x
) >> 32;
7310 /* TOC entries are always Pmode-sized, but since this
7311 is a bigendian machine then if we're putting smaller
7312 integer constants in the TOC we have to pad them.
7313 (This is still a win over putting the constants in
7314 a separate constant pool, because then we'd have
7315 to have both a TOC entry _and_ the actual constant.)
7317 For a 32-bit target, CONST_INT values are loaded and shifted
7318 entirely within `low' and can be stored in one TOC entry. */
7320 if (TARGET_64BIT
&& POINTER_SIZE
< GET_MODE_BITSIZE (mode
))
7321 abort ();/* It would be easy to make this work, but it doesn't now. */
7323 if (POINTER_SIZE
> GET_MODE_BITSIZE (mode
))
7324 lshift_double (low
, high
, POINTER_SIZE
- GET_MODE_BITSIZE (mode
),
7325 POINTER_SIZE
, &low
, &high
, 0);
7329 if (TARGET_MINIMAL_TOC
)
7330 fprintf (file
, "\t.llong 0x%lx%08lx\n", (long)high
, (long)low
);
7332 fprintf (file
, "\t.tc ID_%lx_%lx[TC],0x%lx%08lx\n",
7333 (long)high
, (long)low
, (long)high
, (long)low
);
7338 if (POINTER_SIZE
< GET_MODE_BITSIZE (mode
))
7340 if (TARGET_MINIMAL_TOC
)
7341 fprintf (file
, "\t.long 0x%lx\n\t.long 0x%lx\n",
7342 (long)high
, (long)low
);
7344 fprintf (file
, "\t.tc ID_%lx_%lx[TC],0x%lx,0x%lx\n",
7345 (long)high
, (long)low
, (long)high
, (long)low
);
7349 if (TARGET_MINIMAL_TOC
)
7350 fprintf (file
, "\t.long 0x%lx\n",
7353 fprintf (file
, "\t.tc IS_%lx[TC],0x%lx\n",
7354 (long)low
, (long)low
);
7360 if (GET_CODE (x
) == CONST
)
7362 base
= XEXP (XEXP (x
, 0), 0);
7363 offset
= INTVAL (XEXP (XEXP (x
, 0), 1));
7366 if (GET_CODE (base
) == SYMBOL_REF
)
7367 name
= XSTR (base
, 0);
7368 else if (GET_CODE (base
) == LABEL_REF
)
7369 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (XEXP (base
, 0)));
7370 else if (GET_CODE (base
) == CODE_LABEL
)
7371 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (base
));
7375 STRIP_NAME_ENCODING (real_name
, name
);
7376 if (TARGET_MINIMAL_TOC
)
7377 fputs (TARGET_32BIT
? "\t.long " : "\t.llong ", file
);
7380 fprintf (file
, "\t.tc %s", real_name
);
7383 fprintf (file
, ".N%d", - offset
);
7385 fprintf (file
, ".P%d", offset
);
7387 fputs ("[TC],", file
);
7390 /* Currently C++ toc references to vtables can be emitted before it
7391 is decided whether the vtable is public or private. If this is
7392 the case, then the linker will eventually complain that there is
7393 a TOC reference to an unknown section. Thus, for vtables only,
7394 we emit the TOC reference to reference the symbol and not the
7396 if (VTABLE_NAME_P (name
))
7398 RS6000_OUTPUT_BASENAME (file
, name
);
7400 fprintf (file
, "%d", offset
);
7401 else if (offset
> 0)
7402 fprintf (file
, "+%d", offset
);
7405 output_addr_const (file
, x
);
7409 /* Output an assembler pseudo-op to write an ASCII string of N characters
7410 starting at P to FILE.
7412 On the RS/6000, we have to do this using the .byte operation and
7413 write out special characters outside the quoted string.
7414 Also, the assembler is broken; very long strings are truncated,
7415 so we must artificially break them up early. */
7418 output_ascii (file
, p
, n
)
7424 int i
, count_string
;
7425 const char *for_string
= "\t.byte \"";
7426 const char *for_decimal
= "\t.byte ";
7427 const char *to_close
= NULL
;
7430 for (i
= 0; i
< n
; i
++)
7433 if (c
>= ' ' && c
< 0177)
7436 fputs (for_string
, file
);
7439 /* Write two quotes to get one. */
7447 for_decimal
= "\"\n\t.byte ";
7451 if (count_string
>= 512)
7453 fputs (to_close
, file
);
7455 for_string
= "\t.byte \"";
7456 for_decimal
= "\t.byte ";
7464 fputs (for_decimal
, file
);
7465 fprintf (file
, "%d", c
);
7467 for_string
= "\n\t.byte \"";
7474 /* Now close the string if we have written one. Then end the line. */
7476 fputs (to_close
, file
);
7479 /* Generate a unique section name for FILENAME for a section type
7480 represented by SECTION_DESC. Output goes into BUF.
7482 SECTION_DESC can be any string, as long as it is different for each
7483 possible section type.
7485 We name the section in the same manner as xlc. The name begins with an
7486 underscore followed by the filename (after stripping any leading directory
7487 names) with the last period replaced by the string SECTION_DESC. If
7488 FILENAME does not contain a period, SECTION_DESC is appended to the end of
7492 rs6000_gen_section_name (buf
, filename
, section_desc
)
7494 const char *filename
;
7495 const char *section_desc
;
7497 const char *q
, *after_last_slash
, *last_period
= 0;
7501 after_last_slash
= filename
;
7502 for (q
= filename
; *q
; q
++)
7505 after_last_slash
= q
+ 1;
7510 len
= strlen (after_last_slash
) + strlen (section_desc
) + 2;
7511 *buf
= (char *) permalloc (len
);
7516 for (q
= after_last_slash
; *q
; q
++)
7518 if (q
== last_period
)
7520 strcpy (p
, section_desc
);
7521 p
+= strlen (section_desc
);
7524 else if (ISALNUM (*q
))
7528 if (last_period
== 0)
7529 strcpy (p
, section_desc
);
7535 /* Emit profile function. */
7537 output_profile_hook (labelno
)
7540 if (DEFAULT_ABI
== ABI_AIX
)
7548 ASM_GENERATE_INTERNAL_LABEL (buf
, "LP", labelno
);
7549 STRIP_NAME_ENCODING (label_name
, ggc_strdup (buf
));
7550 fun
= gen_rtx_SYMBOL_REF (Pmode
, label_name
);
7552 emit_library_call (init_one_libfunc (RS6000_MCOUNT
), 0, VOIDmode
, 1,
7555 else if (DEFAULT_ABI
== ABI_DARWIN
)
7557 const char *mcount_name
= RS6000_MCOUNT
;
7558 int caller_addr_regno
= LINK_REGISTER_REGNUM
;
7560 /* Be conservative and always set this, at least for now. */
7561 current_function_uses_pic_offset_table
= 1;
7564 /* For PIC code, set up a stub and collect the caller's address
7565 from r0, which is where the prologue puts it. */
7568 mcount_name
= machopic_stub_name (mcount_name
);
7569 if (current_function_uses_pic_offset_table
)
7570 caller_addr_regno
= 0;
7573 emit_library_call (gen_rtx_SYMBOL_REF (Pmode
, mcount_name
),
7575 gen_rtx_REG (Pmode
, caller_addr_regno
), Pmode
);
7579 /* Write function profiler code. */
7582 output_function_profiler (file
, labelno
)
7588 ASM_GENERATE_INTERNAL_LABEL (buf
, "LP", labelno
);
7589 switch (DEFAULT_ABI
)
7596 case ABI_AIX_NODESC
:
7597 fprintf (file
, "\tmflr %s\n", reg_names
[0]);
7600 fputs ("\tbl _GLOBAL_OFFSET_TABLE_@local-4\n", file
);
7601 asm_fprintf (file
, "\t{st|stw} %s,4(%s)\n",
7602 reg_names
[0], reg_names
[1]);
7603 asm_fprintf (file
, "\tmflr %s\n", reg_names
[12]);
7604 asm_fprintf (file
, "\t{l|lwz} %s,", reg_names
[0]);
7605 assemble_name (file
, buf
);
7606 asm_fprintf (file
, "@got(%s)\n", reg_names
[12]);
7608 else if (flag_pic
> 1)
7610 asm_fprintf (file
, "\t{st|stw} %s,4(%s)\n",
7611 reg_names
[0], reg_names
[1]);
7612 /* Now, we need to get the address of the label. */
7613 fputs ("\tbl 1f\n\t.long ", file
);
7614 assemble_name (file
, buf
);
7615 fputs ("-.\n1:", file
);
7616 asm_fprintf (file
, "\tmflr %s\n", reg_names
[11]);
7617 asm_fprintf (file
, "\t{l|lwz} %s,0(%s)\n",
7618 reg_names
[0], reg_names
[11]);
7619 asm_fprintf (file
, "\t{cax|add} %s,%s,%s\n",
7620 reg_names
[0], reg_names
[0], reg_names
[11]);
7624 asm_fprintf (file
, "\t{liu|lis} %s,", reg_names
[12]);
7625 assemble_name (file
, buf
);
7626 fputs ("@ha\n", file
);
7627 asm_fprintf (file
, "\t{st|stw} %s,4(%s)\n",
7628 reg_names
[0], reg_names
[1]);
7629 asm_fprintf (file
, "\t{cal|la} %s,", reg_names
[0]);
7630 assemble_name (file
, buf
);
7631 asm_fprintf (file
, "@l(%s)\n", reg_names
[12]);
7634 if (current_function_needs_context
)
7635 asm_fprintf (file
, "\tmr %s,%s\n",
7636 reg_names
[30], reg_names
[STATIC_CHAIN_REGNUM
]);
7637 fprintf (file
, "\tbl %s\n", RS6000_MCOUNT
);
7638 if (current_function_needs_context
)
7639 asm_fprintf (file
, "\tmr %s,%s\n",
7640 reg_names
[STATIC_CHAIN_REGNUM
], reg_names
[30]);
7645 /* Don't do anything, done in output_profile_hook (). */
7651 /* Adjust the cost of a scheduling dependency. Return the new cost of
7652 a dependency LINK or INSN on DEP_INSN. COST is the current cost. */
7655 rs6000_adjust_cost (insn
, link
, dep_insn
, cost
)
7658 rtx dep_insn ATTRIBUTE_UNUSED
;
7661 if (! recog_memoized (insn
))
7664 if (REG_NOTE_KIND (link
) != 0)
7667 if (REG_NOTE_KIND (link
) == 0)
7669 /* Data dependency; DEP_INSN writes a register that INSN reads some
7672 /* Tell the first scheduling pass about the latency between a mtctr
7673 and bctr (and mtlr and br/blr). The first scheduling pass will not
7674 know about this latency since the mtctr instruction, which has the
7675 latency associated to it, will be generated by reload. */
7676 if (get_attr_type (insn
) == TYPE_JMPREG
)
7677 return TARGET_POWER
? 5 : 4;
7679 /* Fall out to return default cost. */
7685 /* A C statement (sans semicolon) to update the integer scheduling priority
7686 INSN_PRIORITY (INSN). Reduce the priority to execute the INSN earlier,
7687 increase the priority to execute INSN later. Do not define this macro if
7688 you do not need to adjust the scheduling priorities of insns. */
7691 rs6000_adjust_priority (insn
, priority
)
7692 rtx insn ATTRIBUTE_UNUSED
;
7695 /* On machines (like the 750) which have asymetric integer units, where one
7696 integer unit can do multiply and divides and the other can't, reduce the
7697 priority of multiply/divide so it is scheduled before other integer
7701 if (! INSN_P (insn
))
7704 if (GET_CODE (PATTERN (insn
)) == USE
)
7707 switch (rs6000_cpu_attr
) {
7709 switch (get_attr_type (insn
))
7716 fprintf (stderr
, "priority was %#x (%d) before adjustment\n",
7717 priority
, priority
);
7718 if (priority
>= 0 && priority
< 0x01000000)
7728 /* Return how many instructions the machine can issue per cycle */
7729 int get_issue_rate()
7731 switch (rs6000_cpu_attr
) {
7732 case CPU_RIOS1
: /* ? */
7734 case CPU_PPC601
: /* ? */
7751 /* Length in units of the trampoline for entering a nested function. */
7754 rs6000_trampoline_size ()
7758 switch (DEFAULT_ABI
)
7764 ret
= (TARGET_32BIT
) ? 12 : 24;
7769 case ABI_AIX_NODESC
:
7770 ret
= (TARGET_32BIT
) ? 40 : 48;
7777 /* Emit RTL insns to initialize the variable parts of a trampoline.
7778 FNADDR is an RTX for the address of the function's pure code.
7779 CXT is an RTX for the static chain value for the function. */
7782 rs6000_initialize_trampoline (addr
, fnaddr
, cxt
)
7787 enum machine_mode pmode
= Pmode
;
7788 int regsize
= (TARGET_32BIT
) ? 4 : 8;
7789 rtx ctx_reg
= force_reg (pmode
, cxt
);
7791 switch (DEFAULT_ABI
)
7796 /* Macros to shorten the code expansions below. */
7797 #define MEM_DEREF(addr) gen_rtx_MEM (pmode, memory_address (pmode, addr))
7798 #define MEM_PLUS(addr,offset) \
7799 gen_rtx_MEM (pmode, memory_address (pmode, plus_constant (addr, offset)))
7801 /* Under AIX, just build the 3 word function descriptor */
7804 rtx fn_reg
= gen_reg_rtx (pmode
);
7805 rtx toc_reg
= gen_reg_rtx (pmode
);
7806 emit_move_insn (fn_reg
, MEM_DEREF (fnaddr
));
7807 emit_move_insn (toc_reg
, MEM_PLUS (fnaddr
, 4));
7808 emit_move_insn (MEM_DEREF (addr
), fn_reg
);
7809 emit_move_insn (MEM_PLUS (addr
, regsize
), toc_reg
);
7810 emit_move_insn (MEM_PLUS (addr
, 2*regsize
), ctx_reg
);
7814 /* Under V.4/eabi, call __trampoline_setup to do the real work. */
7817 case ABI_AIX_NODESC
:
7818 emit_library_call (gen_rtx_SYMBOL_REF (SImode
, "__trampoline_setup"),
7821 GEN_INT (rs6000_trampoline_size ()), SImode
,
7831 /* If defined, a C expression whose value is nonzero if IDENTIFIER
7832 with arguments ARGS is a valid machine specific attribute for TYPE.
7833 The attributes in ATTRIBUTES have previously been assigned to TYPE. */
7836 rs6000_valid_type_attribute_p (type
, attributes
, identifier
, args
)
7838 tree attributes ATTRIBUTE_UNUSED
;
7842 if (TREE_CODE (type
) != FUNCTION_TYPE
7843 && TREE_CODE (type
) != FIELD_DECL
7844 && TREE_CODE (type
) != TYPE_DECL
)
7847 /* Longcall attribute says that the function is not within 2**26 bytes
7848 of the current function, and to do an indirect call. */
7849 if (is_attribute_p ("longcall", identifier
))
7850 return (args
== NULL_TREE
);
7855 /* Return a reference suitable for calling a function with the
7856 longcall attribute. */
7858 rs6000_longcall_ref (call_ref
)
7861 const char *call_name
;
7864 if (GET_CODE (call_ref
) != SYMBOL_REF
)
7867 /* System V adds '.' to the internal name, so skip them. */
7868 call_name
= XSTR (call_ref
, 0);
7869 if (*call_name
== '.')
7871 while (*call_name
== '.')
7874 node
= get_identifier (call_name
);
7875 call_ref
= gen_rtx_SYMBOL_REF (VOIDmode
, IDENTIFIER_POINTER (node
));
7878 return force_reg (Pmode
, call_ref
);
7882 /* A C statement or statements to switch to the appropriate section
7883 for output of RTX in mode MODE. You can assume that RTX is some
7884 kind of constant in RTL. The argument MODE is redundant except in
7885 the case of a `const_int' rtx. Select the section by calling
7886 `text_section' or one of the alternatives for other sections.
7888 Do not define this macro if you put all constants in the read-only
7894 rs6000_select_rtx_section (mode
, x
)
7895 enum machine_mode mode
;
7898 if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (x
, mode
))
7904 /* A C statement or statements to switch to the appropriate
7905 section for output of DECL. DECL is either a `VAR_DECL' node
7906 or a constant of some sort. RELOC indicates whether forming
7907 the initial value of DECL requires link-time relocations. */
7910 rs6000_select_section (decl
, reloc
)
7914 int size
= int_size_in_bytes (TREE_TYPE (decl
));
7917 static void (* const sec_funcs
[4]) PARAMS ((void)) = {
7924 needs_sdata
= (size
> 0
7925 && size
<= g_switch_value
7926 && rs6000_sdata
!= SDATA_NONE
7927 && (rs6000_sdata
!= SDATA_DATA
|| TREE_PUBLIC (decl
)));
7929 if (TREE_CODE (decl
) == STRING_CST
)
7930 readonly
= ! flag_writable_strings
;
7931 else if (TREE_CODE (decl
) == VAR_DECL
)
7932 readonly
= (! (flag_pic
&& reloc
)
7933 && TREE_READONLY (decl
)
7934 && ! TREE_SIDE_EFFECTS (decl
)
7935 && DECL_INITIAL (decl
)
7936 && DECL_INITIAL (decl
) != error_mark_node
7937 && TREE_CONSTANT (DECL_INITIAL (decl
)));
7940 if (needs_sdata
&& rs6000_sdata
!= SDATA_EABI
)
7943 (*sec_funcs
[(readonly
? 0 : 2) + (needs_sdata
? 1 : 0)])();
7946 /* A C statement to build up a unique section name, expressed as a
7947 STRING_CST node, and assign it to DECL_SECTION_NAME (decl).
7948 RELOC indicates whether the initial value of EXP requires
7949 link-time relocations. If you do not define this macro, GCC will use
7950 the symbol name prefixed by `.' as the section name. Note - this
7951 macro can now be called for unitialised data items as well as
7952 initialised data and functions. */
7955 rs6000_unique_section (decl
, reloc
)
7959 int size
= int_size_in_bytes (TREE_TYPE (decl
));
7968 static const char *const prefixes
[7][2] =
7970 { ".text.", ".gnu.linkonce.t." },
7971 { ".rodata.", ".gnu.linkonce.r." },
7972 { ".sdata2.", ".gnu.linkonce.s2." },
7973 { ".data.", ".gnu.linkonce.d." },
7974 { ".sdata.", ".gnu.linkonce.s." },
7975 { ".bss.", ".gnu.linkonce.b." },
7976 { ".sbss.", ".gnu.linkonce.sb." }
7979 needs_sdata
= (TREE_CODE (decl
) != FUNCTION_DECL
7981 && size
<= g_switch_value
7982 && rs6000_sdata
!= SDATA_NONE
7983 && (rs6000_sdata
!= SDATA_DATA
|| TREE_PUBLIC (decl
)));
7985 if (TREE_CODE (decl
) == STRING_CST
)
7986 readonly
= ! flag_writable_strings
;
7987 else if (TREE_CODE (decl
) == VAR_DECL
)
7988 readonly
= (! (flag_pic
&& reloc
)
7989 && TREE_READONLY (decl
)
7990 && ! TREE_SIDE_EFFECTS (decl
)
7991 && DECL_INITIAL (decl
)
7992 && DECL_INITIAL (decl
) != error_mark_node
7993 && TREE_CONSTANT (DECL_INITIAL (decl
)));
7996 if (needs_sdata
&& rs6000_sdata
!= SDATA_EABI
)
7999 sec
= ((TREE_CODE (decl
) == FUNCTION_DECL
? 0 : 1)
8000 + (readonly
? 0 : 2)
8001 + (needs_sdata
? 1 : 0)
8002 + (DECL_INITIAL (decl
) == 0
8003 || DECL_INITIAL (decl
) == error_mark_node
) ? 4 : 0);
8005 STRIP_NAME_ENCODING (name
, IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (decl
)));
8006 prefix
= prefixes
[sec
][DECL_ONE_ONLY (decl
)];
8007 len
= strlen (name
) + strlen (prefix
);
8008 string
= alloca (len
+ 1);
8010 sprintf (string
, "%s%s", prefix
, name
);
8012 DECL_SECTION_NAME (decl
) = build_string (len
, string
);
8016 /* If we are referencing a function that is static or is known to be
8017 in this file, make the SYMBOL_REF special. We can use this to indicate
8018 that we can branch to this function without emitting a no-op after the
8019 call. For real AIX calling sequences, we also replace the
8020 function name with the real name (1 or 2 leading .'s), rather than
8021 the function descriptor name. This saves a lot of overriding code
8022 to read the prefixes. */
8025 rs6000_encode_section_info (decl
)
8028 if (TREE_CODE (decl
) == FUNCTION_DECL
)
8030 rtx sym_ref
= XEXP (DECL_RTL (decl
), 0);
8031 if ((TREE_ASM_WRITTEN (decl
) || ! TREE_PUBLIC (decl
))
8032 && ! DECL_WEAK (decl
))
8033 SYMBOL_REF_FLAG (sym_ref
) = 1;
8035 if (DEFAULT_ABI
== ABI_AIX
)
8037 size_t len1
= (DEFAULT_ABI
== ABI_AIX
) ? 1 : 2;
8038 size_t len2
= strlen (XSTR (sym_ref
, 0));
8039 char *str
= alloca (len1
+ len2
+ 1);
8042 memcpy (str
+ len1
, XSTR (sym_ref
, 0), len2
+ 1);
8044 XSTR (sym_ref
, 0) = ggc_alloc_string (str
, len1
+ len2
);
8047 else if (rs6000_sdata
!= SDATA_NONE
8048 && (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
8049 && TREE_CODE (decl
) == VAR_DECL
)
8051 int size
= int_size_in_bytes (TREE_TYPE (decl
));
8052 tree section_name
= DECL_SECTION_NAME (decl
);
8053 const char *name
= (char *)0;
8058 if (TREE_CODE (section_name
) == STRING_CST
)
8060 name
= TREE_STRING_POINTER (section_name
);
8061 len
= TREE_STRING_LENGTH (section_name
);
8067 if ((size
> 0 && size
<= g_switch_value
)
8069 && ((len
== sizeof (".sdata") - 1
8070 && strcmp (name
, ".sdata") == 0)
8071 || (len
== sizeof (".sdata2") - 1
8072 && strcmp (name
, ".sdata2") == 0)
8073 || (len
== sizeof (".sbss") - 1
8074 && strcmp (name
, ".sbss") == 0)
8075 || (len
== sizeof (".sbss2") - 1
8076 && strcmp (name
, ".sbss2") == 0)
8077 || (len
== sizeof (".PPC.EMB.sdata0") - 1
8078 && strcmp (name
, ".PPC.EMB.sdata0") == 0)
8079 || (len
== sizeof (".PPC.EMB.sbss0") - 1
8080 && strcmp (name
, ".PPC.EMB.sbss0") == 0))))
8082 rtx sym_ref
= XEXP (DECL_RTL (decl
), 0);
8083 size_t len
= strlen (XSTR (sym_ref
, 0));
8084 char *str
= alloca (len
+ 2);
8087 memcpy (str
+ 1, XSTR (sym_ref
, 0), len
+ 1);
8088 XSTR (sym_ref
, 0) = ggc_alloc_string (str
, len
+ 1);
8093 #endif /* USING_SVR4_H */
8096 /* Return a REG that occurs in ADDR with coefficient 1.
8097 ADDR can be effectively incremented by incrementing REG.
8099 r0 is special and we must not select it as an address
8100 register by this routine since our caller will try to
8101 increment the returned register via an "la" instruction. */
8104 find_addr_reg (addr
)
8107 while (GET_CODE (addr
) == PLUS
)
8109 if (GET_CODE (XEXP (addr
, 0)) == REG
8110 && REGNO (XEXP (addr
, 0)) != 0)
8111 addr
= XEXP (addr
, 0);
8112 else if (GET_CODE (XEXP (addr
, 1)) == REG
8113 && REGNO (XEXP (addr
, 1)) != 0)
8114 addr
= XEXP (addr
, 1);
8115 else if (CONSTANT_P (XEXP (addr
, 0)))
8116 addr
= XEXP (addr
, 1);
8117 else if (CONSTANT_P (XEXP (addr
, 1)))
8118 addr
= XEXP (addr
, 0);
8122 if (GET_CODE (addr
) == REG
&& REGNO (addr
) != 0)
8128 rs6000_fatal_bad_address (op
)
8131 fatal_insn ("bad address", op
);
8134 /* Called to register all of our global variables with the garbage
8138 rs6000_add_gc_roots ()
8140 ggc_add_rtx_root (&rs6000_compare_op0
, 1);
8141 ggc_add_rtx_root (&rs6000_compare_op1
, 1);
8143 toc_hash_table
= htab_create (1021, toc_hash_function
, toc_hash_eq
, NULL
);
8144 ggc_add_root (&toc_hash_table
, 1, sizeof (toc_hash_table
),
8145 toc_hash_mark_table
);
8148 machopic_add_gc_roots ();
8155 /* Returns 1 if OP is either a symbol reference or a sum of a symbol
8156 reference and a constant. */
8159 symbolic_operand (op
)
8162 switch (GET_CODE (op
))
8169 return (GET_CODE (op
) == SYMBOL_REF
||
8170 (GET_CODE (XEXP (op
, 0)) == SYMBOL_REF
8171 || GET_CODE (XEXP (op
, 0)) == LABEL_REF
)
8172 && GET_CODE (XEXP (op
, 1)) == CONST_INT
);
8179 #ifdef RS6000_LONG_BRANCH
8181 static tree stub_list
= 0;
8183 /* ADD_COMPILER_STUB adds the compiler generated stub for handling
8184 procedure calls to the linked list. */
8187 add_compiler_stub (label_name
, function_name
, line_number
)
8192 tree stub
= build_tree_list (function_name
, label_name
);
8193 TREE_TYPE (stub
) = build_int_2 (line_number
, 0);
8194 TREE_CHAIN (stub
) = stub_list
;
8198 #define STUB_LABEL_NAME(STUB) TREE_VALUE (STUB)
8199 #define STUB_FUNCTION_NAME(STUB) TREE_PURPOSE (STUB)
8200 #define STUB_LINE_NUMBER(STUB) TREE_INT_CST_LOW (TREE_TYPE (STUB))
8202 /* OUTPUT_COMPILER_STUB outputs the compiler generated stub for handling
8203 procedure calls from the linked list and initializes the linked list. */
8205 void output_compiler_stub ()
8208 char label_buf
[256];
8210 tree tmp_stub
, stub
;
8213 for (stub
= stub_list
; stub
; stub
= TREE_CHAIN (stub
))
8215 fprintf (asm_out_file
,
8216 "%s:\n", IDENTIFIER_POINTER(STUB_LABEL_NAME(stub
)));
8218 #if defined (DBX_DEBUGGING_INFO) || defined (XCOFF_DEBUGGING_INFO)
8219 if (write_symbols
== DBX_DEBUG
|| write_symbols
== XCOFF_DEBUG
)
8220 fprintf (asm_out_file
, "\t.stabd 68,0,%d\n", STUB_LINE_NUMBER(stub
));
8221 #endif /* DBX_DEBUGGING_INFO || XCOFF_DEBUGGING_INFO */
8223 if (IDENTIFIER_POINTER (STUB_FUNCTION_NAME (stub
))[0] == '*')
8225 IDENTIFIER_POINTER (STUB_FUNCTION_NAME (stub
))+1);
8229 strcpy (label_buf
+1,
8230 IDENTIFIER_POINTER (STUB_FUNCTION_NAME (stub
)));
8233 strcpy (tmp_buf
, "lis r12,hi16(");
8234 strcat (tmp_buf
, label_buf
);
8235 strcat (tmp_buf
, ")\n\tori r12,r12,lo16(");
8236 strcat (tmp_buf
, label_buf
);
8237 strcat (tmp_buf
, ")\n\tmtctr r12\n\tbctr");
8238 output_asm_insn (tmp_buf
, 0);
8240 #if defined (DBX_DEBUGGING_INFO) || defined (XCOFF_DEBUGGING_INFO)
8241 if (write_symbols
== DBX_DEBUG
|| write_symbols
== XCOFF_DEBUG
)
8242 fprintf(asm_out_file
, "\t.stabd 68,0,%d\n", STUB_LINE_NUMBER (stub
));
8243 #endif /* DBX_DEBUGGING_INFO || XCOFF_DEBUGGING_INFO */
8249 /* NO_PREVIOUS_DEF checks in the link list whether the function name is
8250 already there or not. */
8252 int no_previous_def (function_name
)
8256 for (stub
= stub_list
; stub
; stub
= TREE_CHAIN (stub
))
8257 if (function_name
== STUB_FUNCTION_NAME (stub
))
8262 /* GET_PREV_LABEL gets the label name from the previous definition of
8265 tree
get_prev_label (function_name
)
8269 for (stub
= stub_list
; stub
; stub
= TREE_CHAIN (stub
))
8270 if (function_name
== STUB_FUNCTION_NAME (stub
))
8271 return STUB_LABEL_NAME (stub
);
8275 /* INSN is either a function call or a millicode call. It may have an
8276 unconditional jump in its delay slot.
8278 CALL_DEST is the routine we are calling. */
8281 output_call (insn
, call_dest
, operand_number
)
8286 static char buf
[256];
8287 if (GET_CODE (call_dest
) == SYMBOL_REF
&& TARGET_LONG_BRANCH
&& !flag_pic
)
8290 tree funname
= get_identifier (XSTR (call_dest
, 0));
8292 if (no_previous_def (funname
))
8295 rtx label_rtx
= gen_label_rtx ();
8296 char *label_buf
, temp_buf
[256];
8297 ASM_GENERATE_INTERNAL_LABEL (temp_buf
, "L",
8298 CODE_LABEL_NUMBER (label_rtx
));
8299 label_buf
= temp_buf
[0] == '*' ? temp_buf
+ 1 : temp_buf
;
8300 labelname
= get_identifier (label_buf
);
8301 for (; insn
&& GET_CODE (insn
) != NOTE
; insn
= PREV_INSN (insn
));
8303 line_number
= NOTE_LINE_NUMBER (insn
);
8304 add_compiler_stub (labelname
, funname
, line_number
);
8307 labelname
= get_prev_label (funname
);
8309 sprintf (buf
, "jbsr %%z%d,%.246s",
8310 operand_number
, IDENTIFIER_POINTER (labelname
));
8315 sprintf (buf
, "bl %%z%d", operand_number
);
8320 #endif /* RS6000_LONG_BRANCH */
8322 #define GEN_LOCAL_LABEL_FOR_SYMBOL(BUF,SYMBOL,LENGTH,N) \
8324 const char *symbol_ = (SYMBOL); \
8325 char *buffer_ = (BUF); \
8326 if (symbol_[0] == '"') \
8328 sprintf(buffer_, "\"L%d$%s", (N), symbol_+1); \
8330 else if (name_needs_quotes(symbol_)) \
8332 sprintf(buffer_, "\"L%d$%s\"", (N), symbol_); \
8336 sprintf(buffer_, "L%d$%s", (N), symbol_); \
8341 /* Generate PIC and indirect symbol stubs. */
8344 machopic_output_stub (file
, symb
, stub
)
8346 const char *symb
, *stub
;
8348 unsigned int length
;
8349 char *binder_name
, *symbol_name
, *lazy_ptr_name
;
8350 char *local_label_0
, *local_label_1
, *local_label_2
;
8351 static int label
= 0;
8353 /* Lose our funky encoding stuff so it doesn't contaminate the stub. */
8354 STRIP_NAME_ENCODING (symb
, symb
);
8358 length
= strlen (stub
);
8359 binder_name
= alloca (length
+ 32);
8360 GEN_BINDER_NAME_FOR_STUB (binder_name
, stub
, length
);
8362 length
= strlen (symb
);
8363 symbol_name
= alloca (length
+ 32);
8364 GEN_SYMBOL_NAME_FOR_SYMBOL (symbol_name
, symb
, length
);
8366 lazy_ptr_name
= alloca (length
+ 32);
8367 GEN_LAZY_PTR_NAME_FOR_SYMBOL (lazy_ptr_name
, symb
, length
);
8369 local_label_0
= alloca (length
+ 32);
8370 GEN_LOCAL_LABEL_FOR_SYMBOL (local_label_0
, symb
, length
, 0);
8372 local_label_1
= alloca (length
+ 32);
8373 GEN_LOCAL_LABEL_FOR_SYMBOL (local_label_1
, symb
, length
, 1);
8375 local_label_2
= alloca (length
+ 32);
8376 GEN_LOCAL_LABEL_FOR_SYMBOL (local_label_2
, symb
, length
, 2);
8379 machopic_picsymbol_stub_section ();
8381 machopic_symbol_stub_section ();
8383 fprintf (file
, "%s:\n", stub
);
8384 fprintf (file
, "\t.indirect_symbol %s\n", symbol_name
);
8388 fprintf (file
, "\tmflr r0\n");
8389 fprintf (file
, "\tbcl 20,31,%s\n", local_label_0
);
8390 fprintf (file
, "%s:\n\tmflr r11\n", local_label_0
);
8391 fprintf (file
, "\taddis r11,r11,ha16(%s-%s)\n",
8392 lazy_ptr_name
, local_label_0
);
8393 fprintf (file
, "\tmtlr r0\n");
8394 fprintf (file
, "\tlwz r12,lo16(%s-%s)(r11)\n",
8395 lazy_ptr_name
, local_label_0
);
8396 fprintf (file
, "\tmtctr r12\n");
8397 fprintf (file
, "\taddi r11,r11,lo16(%s-%s)\n",
8398 lazy_ptr_name
, local_label_0
);
8399 fprintf (file
, "\tbctr\n");
8402 fprintf (file
, "non-pure not supported\n");
8404 machopic_lazy_symbol_ptr_section ();
8405 fprintf (file
, "%s:\n", lazy_ptr_name
);
8406 fprintf (file
, "\t.indirect_symbol %s\n", symbol_name
);
8407 fprintf (file
, "\t.long dyld_stub_binding_helper\n");
8410 /* Legitimize PIC addresses. If the address is already
8411 position-independent, we return ORIG. Newly generated
8412 position-independent addresses go into a reg. This is REG if non
8413 zero, otherwise we allocate register(s) as necessary. */
8415 #define SMALL_INT(X) ((unsigned) (INTVAL(X) + 0x4000) < 0x8000)
8418 rs6000_machopic_legitimize_pic_address (orig
, mode
, reg
)
8420 enum machine_mode mode
;
8425 if (reg
== NULL
&& ! reload_in_progress
&& ! reload_completed
)
8426 reg
= gen_reg_rtx (Pmode
);
8428 if (GET_CODE (orig
) == CONST
)
8430 if (GET_CODE (XEXP (orig
, 0)) == PLUS
8431 && XEXP (XEXP (orig
, 0), 0) == pic_offset_table_rtx
)
8434 if (GET_CODE (XEXP (orig
, 0)) == PLUS
)
8436 base
= rs6000_machopic_legitimize_pic_address (XEXP (XEXP (orig
, 0), 0),
8438 offset
= rs6000_machopic_legitimize_pic_address (XEXP (XEXP (orig
, 0), 1),
8444 if (GET_CODE (offset
) == CONST_INT
)
8446 if (SMALL_INT (offset
))
8447 return plus_constant (base
, INTVAL (offset
));
8448 else if (! reload_in_progress
&& ! reload_completed
)
8449 offset
= force_reg (Pmode
, offset
);
8453 return gen_rtx (PLUS
, Pmode
, base
, offset
);
8456 /* Fall back on generic machopic code. */
8457 return machopic_legitimize_pic_address (orig
, mode
, reg
);
8460 /* This is just a placeholder to make linking work without having to
8461 add this to the generic Darwin EXTRA_SECTIONS. If -mcall-aix is
8462 ever needed for Darwin (not too likely!) this would have to get a
8470 #endif /* TARGET_MACHO */