gcc/config/rx/rx.opt

   1 ; Command line options for the Renesas RX port of GCC.
   2 ; Copyright (C) 2008-2020 Free Software Foundation, Inc.
   3 ; Contributed by Red Hat.
   4 ;
   5 ; This file is part of GCC.
   6 ;
   7 ; GCC is free software; you can redistribute it and/or modify it under
   8 ; the terms of the GNU General Public License as published by the Free
   9 ; Software Foundation; either version 3, or (at your option) any later
  10 ; version.
  11 ;
  12 ; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
  13 ; WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14 ; FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  15 ; for more details.
  16 ;
  17 ; You should have received a copy of the GNU General Public License
  18 ; along with GCC; see the file COPYING3.  If not see
  19 ; <http://www.gnu.org/licenses/>.
  20 ;---------------------------------------------------
  21
  22 HeaderInclude
  23 config/rx/rx-opts.h
  24
  25 ; The default is -fpu -m32bit-doubles.
  26
  27 m64bit-doubles
  28 Target RejectNegative Mask(64BIT_DOUBLES) Report
  29 Store doubles in 64 bits.
  30
  31 m32bit-doubles
  32 Target RejectNegative InverseMask(64BIT_DOUBLES) Report
  33 Stores doubles in 32 bits.  This is the default.
  34
  35 nofpu
  36 Target RejectNegative Alias(mnofpu)
  37 Disable the use of RX FPU instructions.
  38
  39 mnofpu
  40 Target RejectNegative Mask(NO_USE_FPU) Report Undocumented
  41
  42 fpu
  43 Target RejectNegative InverseMask(NO_USE_FPU) Report
  44 Enable the use of RX FPU instructions.  This is the default.
  45
  46 ;---------------------------------------------------
  47
  48 mcpu=
  49 Target RejectNegative Joined Var(rx_cpu_type) Report ToLower Enum(rx_cpu_types) Init(RX600)
  50 Specify the target RX cpu type.
  51
  52 Enum
  53 Name(rx_cpu_types) Type(enum rx_cpu_types)
  54
  55 EnumValue
  56 Enum(rx_cpu_types) String(rx610) Value(RX610)
  57
  58 EnumValue
  59 Enum(rx_cpu_types) String(rx200) Value(RX200)
  60
  61 EnumValue
  62 Enum(rx_cpu_types) String(rx600) Value(RX600)
  63
  64 EnumValue
  65 Enum(rx_cpu_types) String(rx100) Value(RX100)
  66
  67 ;---------------------------------------------------
  68
  69 mbig-endian-data
  70 Target RejectNegative Mask(BIG_ENDIAN_DATA) Report
  71 Data is stored in big-endian format.
  72
  73 mlittle-endian-data
  74 Target RejectNegative InverseMask(BIG_ENDIAN_DATA) Report
  75 Data is stored in little-endian format.  (Default).
  76
  77 ;---------------------------------------------------
  78
  79 msmall-data-limit=
  80 Target RejectNegative Joined UInteger Var(rx_small_data_limit) Init(0)
  81 Maximum size of global and static variables which can be placed into the small data area.
  82
  83 ;---------------------------------------------------
  84
  85 mrelax
  86 Target
  87 Enable linker relaxation.
  88
  89 ;---------------------------------------------------
  90
  91 mmax-constant-size=
  92 Target RejectNegative Joined UInteger Var(rx_max_constant_size) Init(0)
  93 Maximum size in bytes of constant values allowed as operands.
  94
  95 ;---------------------------------------------------
  96
  97 mint-register=
  98 Target RejectNegative Joined UInteger Var(rx_deferred_options) Defer
  99 Specifies the number of registers to reserve for interrupt handlers.
 100
 101 ;---------------------------------------------------
 102
 103 msave-acc-in-interrupts
 104 Target Mask(SAVE_ACC_REGISTER)
 105 Specifies whether interrupt functions should save and restore the accumulator register.
 106
 107 ;---------------------------------------------------
 108
 109 mpid
 110 Target Mask(PID)
 111 Enables Position-Independent-Data (PID) mode.
 112
 113 ;---------------------------------------------------
 114
 115 mwarn-multiple-fast-interrupts
 116 Target Report Var(rx_warn_multiple_fast_interrupts) Init(1) Warning
 117 Warn when multiple, different, fast interrupt handlers are in the compilation unit.
 118
 119 ;---------------------------------------------------
 120
 121 mgcc-abi
 122 Target RejectNegative Report Mask(GCC_ABI)
 123 Enable the use of the old, broken, ABI where all stacked function arguments are aligned to 32-bits.
 124
 125 mrx-abi
 126 Target RejectNegative Report InverseMask(GCC_ABI)
 127 Enable the use the standard RX ABI where all stacked function arguments are naturally aligned.  This is the default.
 128
 129 ;---------------------------------------------------
 130
 131 mlra
 132 Target Report Mask(ENABLE_LRA)
 133 Enable the use of the LRA register allocator.
 134
 135 ;---------------------------------------------------
 136
 137 mallow-string-insns
 138 Target Report Var(rx_allow_string_insns) Init(1)
 139 Enables or disables the use of the SMOVF, SMOVB, SMOVU, SUNTIL, SWHILE and RMPA instructions.  Enabled by default.
 140
 141 ;---------------------------------------------------
 142
 143 mjsr
 144 Target Report Mask(JSR)
 145 Always use JSR, never BSR, for calls.