gcc/config/s390/predicates.md

   1 ;; Predicate definitions for S/390 and zSeries.
   2 ;; Copyright (C) 2005-2015 Free Software Foundation, Inc.
   3 ;; Contributed by Hartmut Penner (hpenner@de.ibm.com) and
   4 ;;                Ulrich Weigand (uweigand@de.ibm.com).
   5 ;;
   6 ;; This file is part of GCC.
   7 ;;
   8 ;; GCC is free software; you can redistribute it and/or modify
   9 ;; it under the terms of the GNU General Public License as published by
  10 ;; the Free Software Foundation; either version 3, or (at your option)
  11 ;; any later version.
  12 ;;
  13 ;; GCC is distributed in the hope that it will be useful,
  14 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16 ;; GNU General Public License for more details.
  17 ;;
  18 ;; You should have received a copy of the GNU General Public License
  19 ;; along with GCC; see the file COPYING3.  If not see
  20 ;; <http://www.gnu.org/licenses/>.
  21
  22 ;; OP is the current operation.
  23 ;; MODE is the current operation mode.
  24
  25 ;; operands --------------------------------------------------------------
  26
  27 ;; Return true if OP a const 0 operand (int/float/vector).
  28 (define_predicate "const0_operand"
  29   (and (match_code "const_int,const_double,const_vector")
  30        (match_test "op == CONST0_RTX (mode)")))
  31
  32 ;; Return true if OP an all ones operand (int/float/vector).
  33 (define_predicate "constm1_operand"
  34   (and (match_code "const_int, const_double,const_vector")
  35        (match_test "op == CONSTM1_RTX (mode)")))
  36
  37 ;; Return true if OP is constant.
  38
  39 (define_special_predicate "consttable_operand"
  40   (and (match_code "symbol_ref, label_ref, const, const_int, const_double, const_vector")
  41        (match_test "CONSTANT_P (op)")))
  42
  43 ;; Return true if OP is a valid S-type operand.
  44
  45 (define_predicate "s_operand"
  46   (and (match_code "subreg, mem")
  47        (match_operand 0 "general_operand"))
  48 {
  49   /* Just like memory_operand, allow (subreg (mem ...))
  50      after reload.  */
  51   if (reload_completed
  52       && GET_CODE (op) == SUBREG
  53       && GET_CODE (SUBREG_REG (op)) == MEM)
  54     op = SUBREG_REG (op);
  55
  56   if (GET_CODE (op) != MEM)
  57     return false;
  58   if (!s390_legitimate_address_without_index_p (op))
  59     return false;
  60
  61   return true;
  62 })
  63
  64 ;; Return true if OP is a valid operand for the BRAS instruction.
  65 ;; Allow SYMBOL_REFs and @PLT stubs.
  66
  67 (define_special_predicate "bras_sym_operand"
  68   (ior (and (match_code "symbol_ref")
  69             (match_test "!flag_pic || SYMBOL_REF_LOCAL_P (op)"))
  70        (and (match_code "const")
  71             (and (match_test "GET_CODE (XEXP (op, 0)) == UNSPEC")
  72                  (match_test "XINT (XEXP (op, 0), 1) == UNSPEC_PLT")))))
  73
  74 ;; Return true if OP is a PLUS that is not a legitimate
  75 ;; operand for the LA instruction.
  76
  77 (define_predicate "s390_plus_operand"
  78   (and (match_code "plus")
  79        (and (match_test "mode == Pmode")
  80             (match_test "!legitimate_la_operand_p (op)"))))
  81
  82 ;; Return true if OP is a valid operand as scalar shift count or setmem.
  83
  84 (define_predicate "shift_count_or_setmem_operand"
  85   (match_code "reg, subreg, plus, const_int")
  86 {
  87   HOST_WIDE_INT offset;
  88   rtx base;
  89
  90   if (GET_MODE (op) != VOIDmode
  91       && GET_MODE_CLASS (GET_MODE (op)) != MODE_INT)
  92     return false;
  93
  94   /* Extract base register and offset.  */
  95   if (!s390_decompose_shift_count (op, &base, &offset))
  96     return false;
  97
  98   /* Don't allow any non-base hard registers.  Doing so without
  99      confusing reload and/or regrename would be tricky, and doesn't
 100      buy us much anyway.  */
 101   if (base && REGNO (base) < FIRST_PSEUDO_REGISTER && !ADDR_REG_P (base))
 102     return false;
 103
 104   /* Unfortunately we have to reject constants that are invalid
 105      for an address, or else reload will get confused.  */
 106   if (!DISP_IN_RANGE (offset))
 107     return false;
 108
 109   return true;
 110 })
 111
 112 (define_predicate "nonzero_shift_count_operand"
 113   (and (match_code "const_int")
 114        (match_test "IN_RANGE (INTVAL (op), 1, GET_MODE_BITSIZE (mode) - 1)")))
 115
 116 ;;  Return true if OP a valid operand for the LARL instruction.
 117
 118 (define_predicate "larl_operand"
 119   (match_code "label_ref, symbol_ref, const, const_int, const_double")
 120 {
 121   /* Allow labels and local symbols.  */
 122   if (GET_CODE (op) == LABEL_REF)
 123     return true;
 124   if (GET_CODE (op) == SYMBOL_REF)
 125     return (!SYMBOL_REF_ALIGN1_P (op)
 126             && SYMBOL_REF_TLS_MODEL (op) == 0
 127             && (!flag_pic || SYMBOL_REF_LOCAL_P (op)));
 128
 129   /* Everything else must have a CONST, so strip it.  */
 130   if (GET_CODE (op) != CONST)
 131     return false;
 132   op = XEXP (op, 0);
 133
 134   /* Allow adding *even* in-range constants.  */
 135   if (GET_CODE (op) == PLUS)
 136     {
 137       if (GET_CODE (XEXP (op, 1)) != CONST_INT
 138           || (INTVAL (XEXP (op, 1)) & 1) != 0)
 139         return false;
 140       if (INTVAL (XEXP (op, 1)) >= (HOST_WIDE_INT)1 << 31
 141           || INTVAL (XEXP (op, 1)) < -((HOST_WIDE_INT)1 << 31))
 142         return false;
 143       op = XEXP (op, 0);
 144     }
 145
 146   /* Labels and local symbols allowed here as well.  */
 147   if (GET_CODE (op) == LABEL_REF)
 148     return true;
 149   if (GET_CODE (op) == SYMBOL_REF)
 150     return ((SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_ALIGN1) == 0
 151             && SYMBOL_REF_TLS_MODEL (op) == 0
 152             && (!flag_pic || SYMBOL_REF_LOCAL_P (op)));
 153
 154   /* Now we must have a @GOTENT offset or @PLT stub
 155      or an @INDNTPOFF TLS offset.  */
 156   if (GET_CODE (op) == UNSPEC
 157       && XINT (op, 1) == UNSPEC_GOTENT)
 158     return true;
 159   if (GET_CODE (op) == UNSPEC
 160       && XINT (op, 1) == UNSPEC_PLT)
 161     return true;
 162   if (GET_CODE (op) == UNSPEC
 163       && XINT (op, 1) == UNSPEC_INDNTPOFF)
 164     return true;
 165
 166   return false;
 167 })
 168
 169 (define_predicate "contiguous_bitmask_operand"
 170   (match_code "const_int")
 171 {
 172   return s390_contiguous_bitmask_p (INTVAL (op), GET_MODE_BITSIZE (mode), NULL, NULL);
 173 })
 174
 175 ;; operators --------------------------------------------------------------
 176
 177 ;; Return nonzero if OP is a valid comparison operator
 178 ;; for a branch condition.
 179
 180 (define_predicate "s390_comparison"
 181   (match_code "eq, ne, lt, gt, le, ge, ltu, gtu, leu, geu,
 182                uneq, unlt, ungt, unle, unge, ltgt,
 183                unordered, ordered")
 184 {
 185   if (GET_CODE (XEXP (op, 0)) != REG
 186       || REGNO (XEXP (op, 0)) != CC_REGNUM
 187       || (XEXP (op, 1) != const0_rtx
 188           && !(CONST_INT_P (XEXP (op, 1))
 189                && GET_MODE (XEXP (op, 0)) == CCRAWmode
 190                && INTVAL (XEXP (op, 1)) >= 0
 191                && INTVAL (XEXP (op, 1)) <= 15)))
 192     return false;
 193
 194   return (s390_branch_condition_mask (op) >= 0);
 195 })
 196
 197 ;; Return true if op is the cc register.
 198 (define_predicate "cc_reg_operand"
 199   (and (match_code "reg")
 200        (match_test "REGNO (op) == CC_REGNUM")))
 201
 202 (define_predicate "s390_signed_integer_comparison"
 203   (match_code "eq, ne, lt, gt, le, ge")
 204 {
 205   return (s390_compare_and_branch_condition_mask (op) >= 0);
 206 })
 207
 208 (define_predicate "s390_unsigned_integer_comparison"
 209   (match_code "eq, ne, ltu, gtu, leu, geu")
 210 {
 211   return (s390_compare_and_branch_condition_mask (op) >= 0);
 212 })
 213
 214 ;; Return nonzero if OP is a valid comparison operator for the
 215 ;; cstore expanders -- respectively cstorecc4 and integer cstore.
 216 (define_predicate "s390_eqne_operator"
 217   (match_code "eq, ne"))
 218
 219 (define_predicate "s390_scond_operator"
 220   (match_code "ltu, gtu, leu, geu"))
 221
 222 (define_predicate "s390_brx_operator"
 223   (match_code "le, gt"))
 224
 225 ;; Return nonzero if OP is a valid comparison operator
 226 ;; for an ALC condition.
 227
 228 (define_predicate "s390_alc_comparison"
 229   (match_code "zero_extend, sign_extend, ltu, gtu, leu, geu")
 230 {
 231   while (GET_CODE (op) == ZERO_EXTEND || GET_CODE (op) == SIGN_EXTEND)
 232     op = XEXP (op, 0);
 233
 234   if (!COMPARISON_P (op))
 235     return false;
 236
 237   if (GET_CODE (XEXP (op, 0)) != REG
 238       || REGNO (XEXP (op, 0)) != CC_REGNUM
 239       || (XEXP (op, 1) != const0_rtx
 240           && !(CONST_INT_P (XEXP (op, 1))
 241                && GET_MODE (XEXP (op, 0)) == CCRAWmode
 242                && INTVAL (XEXP (op, 1)) >= 0
 243                && INTVAL (XEXP (op, 1)) <= 15)))
 244     return false;
 245
 246   switch (GET_MODE (XEXP (op, 0)))
 247     {
 248     case CCL1mode:
 249       return GET_CODE (op) == LTU;
 250
 251     case CCL2mode:
 252       return GET_CODE (op) == LEU;
 253
 254     case CCL3mode:
 255       return GET_CODE (op) == GEU;
 256
 257     case CCUmode:
 258       return GET_CODE (op) == GTU;
 259
 260     case CCURmode:
 261       return GET_CODE (op) == LTU;
 262
 263     case CCSmode:
 264       return GET_CODE (op) == UNGT;
 265
 266     case CCSRmode:
 267       return GET_CODE (op) == UNLT;
 268
 269     default:
 270       return false;
 271     }
 272 })
 273
 274 ;; Return nonzero if OP is a valid comparison operator
 275 ;; for an SLB condition.
 276
 277 (define_predicate "s390_slb_comparison"
 278   (match_code "zero_extend, sign_extend, ltu, gtu, leu, geu")
 279 {
 280   while (GET_CODE (op) == ZERO_EXTEND || GET_CODE (op) == SIGN_EXTEND)
 281     op = XEXP (op, 0);
 282
 283   if (!COMPARISON_P (op))
 284     return false;
 285
 286   if (GET_CODE (XEXP (op, 0)) != REG
 287       || REGNO (XEXP (op, 0)) != CC_REGNUM
 288       || XEXP (op, 1) != const0_rtx)
 289     return false;
 290
 291   switch (GET_MODE (XEXP (op, 0)))
 292     {
 293     case CCL1mode:
 294       return GET_CODE (op) == GEU;
 295
 296     case CCL2mode:
 297       return GET_CODE (op) == GTU;
 298
 299     case CCL3mode:
 300       return GET_CODE (op) == LTU;
 301
 302     case CCUmode:
 303       return GET_CODE (op) == LEU;
 304
 305     case CCURmode:
 306       return GET_CODE (op) == GEU;
 307
 308     case CCSmode:
 309       return GET_CODE (op) == LE;
 310
 311     case CCSRmode:
 312       return GET_CODE (op) == GE;
 313
 314     default:
 315       return false;
 316     }
 317 })
 318
 319 ;; Return true if OP is a load multiple operation.  It is known to be a
 320 ;; PARALLEL and the first section will be tested.
 321
 322 (define_special_predicate "load_multiple_operation"
 323   (match_code "parallel")
 324 {
 325   machine_mode elt_mode;
 326   int count = XVECLEN (op, 0);
 327   unsigned int dest_regno;
 328   rtx src_addr;
 329   int i, off;
 330
 331   /* Perform a quick check so we don't blow up below.  */
 332   if (count <= 1
 333       || GET_CODE (XVECEXP (op, 0, 0)) != SET
 334       || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG
 335       || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM)
 336     return false;
 337
 338   dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0)));
 339   src_addr = XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0);
 340   elt_mode = GET_MODE (SET_DEST (XVECEXP (op, 0, 0)));
 341
 342   /* Check, is base, or base + displacement.  */
 343
 344   if (GET_CODE (src_addr) == REG)
 345     off = 0;
 346   else if (GET_CODE (src_addr) == PLUS
 347            && GET_CODE (XEXP (src_addr, 0)) == REG
 348            && GET_CODE (XEXP (src_addr, 1)) == CONST_INT)
 349     {
 350       off = INTVAL (XEXP (src_addr, 1));
 351       src_addr = XEXP (src_addr, 0);
 352     }
 353   else
 354     return false;
 355
 356   for (i = 1; i < count; i++)
 357     {
 358       rtx elt = XVECEXP (op, 0, i);
 359
 360       if (GET_CODE (elt) != SET
 361           || GET_CODE (SET_DEST (elt)) != REG
 362           || GET_MODE (SET_DEST (elt)) != elt_mode
 363           || REGNO (SET_DEST (elt)) != dest_regno + i
 364           || GET_CODE (SET_SRC (elt)) != MEM
 365           || GET_MODE (SET_SRC (elt)) != elt_mode
 366           || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS
 367           || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr)
 368           || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT
 369           || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1))
 370              != off + i * GET_MODE_SIZE (elt_mode))
 371         return false;
 372     }
 373
 374   return true;
 375 })
 376
 377 ;; For an execute pattern the target instruction is embedded into the
 378 ;; RTX but will not get checked for validity by recog automatically.
 379 ;; The execute_operation predicate extracts the target RTX and invokes
 380 ;; recog.
 381 (define_special_predicate "execute_operation"
 382   (match_code "parallel")
 383 {
 384   rtx pattern = op;
 385   rtx_insn *insn;
 386   int icode;
 387
 388   /* This is redundant but since this predicate is evaluated
 389      first when recognizing the insn we can prevent the more
 390      expensive code below from being executed for many cases.  */
 391   if (GET_CODE (XVECEXP (pattern, 0, 0)) != UNSPEC
 392       || XINT (XVECEXP (pattern, 0, 0), 1) != UNSPEC_EXECUTE)
 393     return false;
 394
 395   /* Keep in sync with s390_execute_target.  */
 396   if (XVECLEN (pattern, 0) == 2)
 397     {
 398       pattern = copy_rtx (XVECEXP (pattern, 0, 1));
 399     }
 400   else
 401     {
 402       rtvec vec = rtvec_alloc (XVECLEN (pattern, 0) - 1);
 403       int i;
 404
 405       for (i = 0; i < XVECLEN (pattern, 0) - 1; i++)
 406         RTVEC_ELT (vec, i) = copy_rtx (XVECEXP (pattern, 0, i + 1));
 407
 408       pattern = gen_rtx_PARALLEL (VOIDmode, vec);
 409     }
 410
 411   /* Since we do not have the wrapping insn here we have to build one.  */
 412   insn = make_insn_raw (pattern);
 413   icode = recog_memoized (insn);
 414   if (icode < 0)
 415     return false;
 416
 417   extract_constrain_insn (insn);
 418
 419   return which_alternative >= 0;
 420 })
 421
 422 ;; Return true if OP is a store multiple operation.  It is known to be a
 423 ;; PARALLEL and the first section will be tested.
 424
 425 (define_special_predicate "store_multiple_operation"
 426   (match_code "parallel")
 427 {
 428   machine_mode elt_mode;
 429   int count = XVECLEN (op, 0);
 430   unsigned int src_regno;
 431   rtx dest_addr;
 432   int i, off;
 433
 434   /* Perform a quick check so we don't blow up below.  */
 435   if (count <= 1
 436       || GET_CODE (XVECEXP (op, 0, 0)) != SET
 437       || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM
 438       || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG)
 439     return false;
 440
 441   src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0)));
 442   dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0);
 443   elt_mode = GET_MODE (SET_SRC (XVECEXP (op, 0, 0)));
 444
 445   /* Check, is base, or base + displacement.  */
 446
 447   if (GET_CODE (dest_addr) == REG)
 448     off = 0;
 449   else if (GET_CODE (dest_addr) == PLUS
 450            && GET_CODE (XEXP (dest_addr, 0)) == REG
 451            && GET_CODE (XEXP (dest_addr, 1)) == CONST_INT)
 452     {
 453       off = INTVAL (XEXP (dest_addr, 1));
 454       dest_addr = XEXP (dest_addr, 0);
 455     }
 456   else
 457     return false;
 458
 459   for (i = 1; i < count; i++)
 460     {
 461       rtx elt = XVECEXP (op, 0, i);
 462
 463       if (GET_CODE (elt) != SET
 464           || GET_CODE (SET_SRC (elt)) != REG
 465           || GET_MODE (SET_SRC (elt)) != elt_mode
 466           || REGNO (SET_SRC (elt)) != src_regno + i
 467           || GET_CODE (SET_DEST (elt)) != MEM
 468           || GET_MODE (SET_DEST (elt)) != elt_mode
 469           || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS
 470           || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr)
 471           || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT
 472           || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1))
 473              != off + i * GET_MODE_SIZE (elt_mode))
 474         return false;
 475     }
 476   return true;
 477 })