gcc/config/s390/s390-modes.def

   1 /* Definitions of target machine for GNU compiler, for IBM S/390
   2    Copyright (C) 2002, 2003, 2004 Free Software Foundation, Inc.
   3    Contributed by Hartmut Penner (hpenner@de.ibm.com) and
   4                   Ulrich Weigand (uweigand@de.ibm.com).
   5
   6 This file is part of GCC.
   7
   8 GCC is free software; you can redistribute it and/or modify it under
   9 the terms of the GNU General Public License as published by the Free
  10 Software Foundation; either version 2, or (at your option) any later
  11 version.
  12
  13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
  14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
  15 FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  16 for more details.
  17
  18 You should have received a copy of the GNU General Public License
  19 along with GCC; see the file COPYING.  If not, write to the Free
  20 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
  21 02111-1307, USA.  */
  22
  23 /* 256-bit integer mode is needed for STACK_SAVEAREA_MODE.  */
  24 INT_MODE (OI, 32);
  25
  26 /* Add any extra modes needed to represent the condition code.  */
  27
  28 /*
  29
  30 Condition Codes
  31
  32 Check for zero
  33
  34 CCZ:  EQ          NE           NE          NE
  35
  36 Unsigned compares
  37
  38 CCU:  EQ          LTU          GTU         NE         (CLG/R, CL/R/Y, CLM/Y, CLI/Y)
  39 CCUR: EQ          GTU          LTU         NE         (CLGF/R)
  40
  41 Signed compares
  42
  43 CCS:  EQ          LT           GT          UNORDERED  (LTGFR, LTGR, LTR, ICM/Y,
  44                                                        LTDBR, LTDR, LTEBR, LTER,
  45                                                        CG/R, C/R/Y, CGHI, CHI,
  46                                                        CDB/R, CD/R, CEB/R, CE/R,
  47                                                        ADB/R, AEB/R, SDB/R, SEB/R,
  48                                                        SRAG, SRA, SRDA)
  49 CCSR: EQ          GT           LT          UNORDERED  (CGF/R, CH/Y)
  50
  51 Condition codes resulting from add with overflow
  52
  53 CCA:  EQ          LT           GT          Overflow
  54 CCAP: EQ          LT           GT          LT         (AGHI, AHI)
  55 CCAN: EQ          LT           GT          GT         (AGHI, AHI)
  56
  57 Condition codes of unsigned adds and subs
  58
  59 CCL:  EQ          NE           EQ          NE         (ALGF/R, ALG/R, AL/R/Y,
  60                                                        ALCG/R, ALC/R,
  61                                                        SLGF/R, SLG/R, SL/R/Y,
  62                                                        SLBG/R, SLB/R)
  63 CCL1: GEU         GEU          LTU         LTU        (ALG/R, AL/R/Y)
  64 CCL2: GTU         GTU          LEU         LEU        (SLG/R, SL/R/Y)
  65 CCL3: EQ          LTU          EQ          GTU        (SLG/R, SL/R/Y)
  66
  67 Test under mask checks
  68
  69 CCT:  EQ          NE           NE          NE         (ICM/Y, TML, CG/R, CGHI,
  70                                                        C/R/Y, CHI, NG/R, N/R/Y,
  71                                                        OG/R, O/R/Y, XG/R, X/R/Y)
  72 CCT1: NE          EQ           NE          NE         (TMH, TML)
  73 CCT2: NE          NE           EQ          NE         (TMH, TML)
  74 CCT3: NE          NE           NE          EQ         (TMH, TML)
  75
  76 CCA and CCT modes are request only modes. These modes are never returned by
  77 s390_select_cc_mode. They are only intended to match other modes.
  78
  79 Requested mode            -> Destination CC register mode
  80
  81 CCS, CCU, CCT, CCSR, CCUR -> CCZ
  82 CCA                       -> CCAP, CCAN
  83
  84
  85 *** Comments ***
  86
  87 CCAP, CCAN
  88
  89 The CC obtained from add instruction usually can't be used for comparisons
  90 because its coupling with overflow flag. In case of an overflow the
  91 less than/greater than data are lost. Nevertheless a comparison can be done
  92 whenever immediate values are involved because they are known at compile time.
  93 If you know whether the used constant is positive or negative you can predict
  94 the sign of the result even in case of an overflow.
  95
  96
  97 CCT, CCT1, CCT2, CCT3
  98
  99 If bits of an integer masked with an AND instruction are checked, the test under
 100 mask instructions turn out to be very handy for a set of special cases.
 101 The simple cases are checks whether all masked bits are zero or ones:
 102
 103   int a;
 104   if ((a & (16 + 128)) == 0)          -> CCT/CCZ
 105   if ((a & (16 + 128)) == 16 + 128)   -> CCT3
 106
 107 Using two extra modes makes it possible to do complete checks on two bits of an
 108 integer (This is possible on register operands only. TM does not provide the
 109 information necessary for CCT1 and CCT2 modes.):
 110
 111   int a;
 112   if ((a & (16 + 128)) == 16)         -> CCT1
 113   if ((a & (16 + 128)) == 128)        -> CCT2
 114
 115
 116 CCSR, CCUR
 117
 118 There are several instructions comparing 32 bit with 64 bit unsigned/signed
 119 values. Such instructions can be considered to have a builtin zero/sign_extend.
 120 The problem is that in the RTL (to be canonical) the zero/sign extended operand
 121 has to be the first one but the machine instructions like it the other way
 122 around. The following both modes can be considered as CCS and CCU modes with
 123 exchanged operands.
 124
 125
 126 CCL1, CCL2
 127
 128 These modes represent the result of overflow checks.
 129
 130 if (a + b < a) -> CCL1 state of the carry bit   (CC2 | CC3)
 131 if (a - b > a) -> CCL2 state of the borrow bit  (CC0 | CC1)
 132
 133 They are used when multi word numbers are computed dealing one SImode part after
 134 another or whenever manual overflow checks like the examples above are
 135 compiled.
 136
 137
 138 CCL3
 139
 140 A logical subtract instruction sets the borrow bit in case of an overflow.
 141 The resulting condition code of those instructions is represented by the
 142 CCL3 mode. Together with the CCU mode this mode is used for jumpless
 143 implementations of several if-constructs - see s390_expand_addcc for more
 144 details.
 145
 146 */
 147
 148
 149 CC_MODE (CCZ);
 150 CC_MODE (CCA);
 151 CC_MODE (CCAP);
 152 CC_MODE (CCAN);
 153 CC_MODE (CCL);
 154 CC_MODE (CCL1);
 155 CC_MODE (CCL2);
 156 CC_MODE (CCL3);
 157 CC_MODE (CCU);
 158 CC_MODE (CCUR);
 159 CC_MODE (CCS);
 160 CC_MODE (CCSR);
 161 CC_MODE (CCT);
 162 CC_MODE (CCT1);
 163 CC_MODE (CCT2);
 164 CC_MODE (CCT3);