gcc/config/sh/constraints.md

   1 ;; Constraint definitions for Renesas / SuperH SH.
   2 ;; Copyright (C) 2007, 2008, 2011, 2012 Free Software Foundation, Inc.
   3 ;;
   4 ;; This file is part of GCC.
   5 ;;
   6 ;; GCC is free software; you can redistribute it and/or modify
   7 ;; it under the terms of the GNU General Public License as published by
   8 ;; the Free Software Foundation; either version 3, or (at your option)
   9 ;; any later version.
  10 ;;
  11 ;; GCC is distributed in the hope that it will be useful,
  12 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14 ;; GNU General Public License for more details.
  15 ;;
  16 ;; You should have received a copy of the GNU General Public License
  17 ;; along with GCC; see the file COPYING3.  If not see
  18 ;; <http://www.gnu.org/licenses/>.
  19
  20 ;; Overview of uppercase letter constraints:
  21 ;; Bxx: miscellaneous constraints
  22 ;;  Bsc: SCRATCH - for the scratch register in movsi_ie in the
  23 ;;       fldi0 / fldi0 cases
  24 ;; Cxx: Constants other than only CONST_INT
  25 ;;  Css: signed 16-bit constant, literal or symbolic
  26 ;;  Csu: unsigned 16-bit constant, literal or symbolic
  27 ;;  Csy: label or symbol
  28 ;;  Cpg: non-explicit constants that can be directly loaded into a general
  29 ;;       purpose register in PIC code.  like 's' except we don't allow
  30 ;;       PIC_ADDR_P
  31 ;; IJKLMNOP: CONT_INT constants
  32 ;;  Ixx: signed xx bit
  33 ;;  J16: 0xffffffff00000000 | 0x00000000ffffffff
  34 ;;  Kxx: unsigned xx bit
  35 ;;  M: 1
  36 ;;  N: 0
  37 ;;  P27: 1 | 2 | 8 | 16
  38 ;;  Pso: 1 | 2 | 4 | 8 | 16 | 32 | 64 | 128
  39 ;;  Psz: ~1 | ~2 | ~4 | ~8 | ~16 | ~32 | ~64 | ~128
  40 ;; G: Floating point 0
  41 ;; H: Floating point 1
  42 ;; Q: pc relative load operand
  43 ;; Rxx: reserved for exotic register classes.
  44 ;; Sxx: extra memory constraints
  45 ;;  Sua: unaligned memory address
  46 ;;  Sbv: QImode address without displacement
  47 ;;  Sbw: QImode address with 12 bit displacement
  48 ;;  Snd: address without displacement
  49 ;;  Sdd: address with displacement
  50 ;; W: vector
  51 ;; Z: zero in any mode
  52 ;;
  53 ;; unused CONST_INT constraint letters: LO
  54 ;; unused EXTRA_CONSTRAINT letters: D T U Y
  55
  56 ;; Register constraints
  57 (define_register_constraint "a" "ALL_REGS"
  58   "@internal")
  59
  60 (define_register_constraint "b" "TARGET_REGS"
  61   "Branch target registers.")
  62
  63 (define_register_constraint "c" "FPSCR_REGS"
  64   "Floating-point status register.")
  65
  66 (define_register_constraint "d" "DF_REGS"
  67   "Double precision floating-point register.")
  68
  69 (define_register_constraint "e" "TARGET_FMOVD ? NO_REGS : FP_REGS"
  70   "Floating-point register.")
  71
  72 (define_register_constraint "f" "FP_REGS"
  73   "Floating-point register.")
  74
  75 (define_register_constraint "k" "SIBCALL_REGS"
  76   "@internal")
  77
  78 (define_register_constraint "l" "PR_REGS"
  79   "PR register.")
  80
  81 (define_register_constraint "t" "T_REGS"
  82   "T register.")
  83
  84 (define_register_constraint "u" "NON_SP_REGS"
  85   "Non-stack-pointer register.")
  86
  87 (define_register_constraint "w" "FP0_REGS"
  88   "Floating-point register 0.")
  89
  90 (define_register_constraint "x" "MAC_REGS"
  91   "MACH and MACL registers.")
  92
  93 (define_register_constraint "y" "FPUL_REGS"
  94   "FPUL register.")
  95
  96 (define_register_constraint "z" "R0_REGS"
  97   "R0 register.")
  98
  99 ;; Integer constraints
 100 (define_constraint "I06"
 101   "A signed 6-bit constant, as used in SHmedia beqi, bnei and xori."
 102   (and (match_code "const_int")
 103        (match_test "ival >= -32 && ival <= 31")))
 104
 105 (define_constraint "I08"
 106   "A signed 8-bit constant, as used in add, sub, etc."
 107   (and (match_code "const_int")
 108        (match_test "ival >= -128 && ival <= 127")))
 109
 110 (define_constraint "I10"
 111   "A signed 10-bit constant, as used in SHmedia andi, ori."
 112   (and (match_code "const_int")
 113        (match_test "ival >= -512 && ival <= 511")))
 114
 115 (define_constraint "I16"
 116   "A signed 16-bit constant, as used in SHmedia movi."
 117   (and (match_code "const_int")
 118        (match_test "ival >= -32768 && ival <= 32767")))
 119
 120 (define_constraint "I20"
 121   "A signed 20-bit constant, as used in SH2A movi20."
 122   (and (match_code "const_int")
 123        (match_test "ival >= -524288 && ival <= 524287")
 124        (match_test "TARGET_SH2A")))
 125
 126 (define_constraint "I28"
 127   "A signed 28-bit constant, as used in SH2A movi20s."
 128   (and (match_code "const_int")
 129        (match_test "ival >=  -134217728 && ival <= 134217727")
 130        (match_test "(ival & 255) == 0")
 131        (match_test "TARGET_SH2A")))
 132
 133 (define_constraint "J16"
 134   "0xffffffff00000000 or 0x00000000ffffffff."
 135   (and (match_code "const_int")
 136        (match_test "CONST_OK_FOR_J16 (ival)")))
 137
 138 (define_constraint "K03"
 139   "An unsigned 3-bit constant, as used in SH2A bclr, bset, etc."
 140   (and (match_code "const_int")
 141        (match_test "ival >= 0 && ival <= 7")))
 142
 143 (define_constraint "K04"
 144   "An unsigned 4-bit constant, as used in mov.b displacement addressing."
 145   (and (match_code "const_int")
 146        (match_test "ival >= 0 && ival <= 15")))
 147
 148 (define_constraint "K05"
 149   "An unsigned 5-bit constant, as used in mov.w displacement addressing."
 150   (and (match_code "const_int")
 151        (match_test "ival >= 0 && ival <= 31")))
 152
 153 (define_constraint "K08"
 154   "An unsigned 8-bit constant, as used in and, or, etc."
 155   (and (match_code "const_int")
 156        (match_test "ival >= 0 && ival <= 255")))
 157
 158 (define_constraint "K12"
 159   "An unsigned 12-bit constant, as used in SH2A 12-bit mov.b displacement
 160    addressing."
 161   (and (match_code "const_int")
 162        (match_test "ival >= 0 && ival <= 4095")))
 163
 164 (define_constraint "K13"
 165   "An unsigned 13-bit constant, as used in SH2A 12-bit mov.w displacement
 166    addressing."
 167   (and (match_code "const_int")
 168        (match_test "ival >= 0 && ival <= 8191")))
 169
 170 (define_constraint "K16"
 171   "An unsigned 16-bit constant, as used in SHmedia shori."
 172   (and (match_code "const_int")
 173        (match_test "ival >= 0 && ival <= 65535")))
 174
 175 (define_constraint "P27"
 176   "A constant for shift operand 1,2,8 or 16."
 177   (and (match_code "const_int")
 178        (match_test "ival == 1 || ival == 2 || ival == 8 || ival == 16")))
 179
 180 (define_constraint "M"
 181   "Integer constant 1."
 182   (and (match_code "const_int")
 183        (match_test "ival == 1")))
 184
 185 (define_constraint "N"
 186   "Integer constant 0."
 187   (and (match_code "const_int")
 188        (match_test "ival == 0")))
 189
 190 ;; Floating-point constraints
 191 (define_constraint "G"
 192   "Double constant 0."
 193   (and (match_code "const_double")
 194        (match_test "fp_zero_operand (op) && fldi_ok ()")))
 195
 196 (define_constraint "H"
 197   "Double constant 1."
 198   (and (match_code "const_double")
 199        (match_test "fp_one_operand (op) && fldi_ok ()")))
 200
 201 ;; Extra constraints
 202 (define_constraint "Q"
 203   "A pc relative load operand."
 204   (and (match_code "mem")
 205        (match_test "IS_PC_RELATIVE_LOAD_ADDR_P (XEXP (op, 0))")))
 206
 207 (define_constraint "Bsc"
 208   "Constraint for selecting FLDI0 or FLDI1 instruction.  If the clobber
 209    operand is not SCRATCH (i.e. REG) then R0 is probably being used,
 210    hence mova is being used, hence do not select this pattern."
 211   (match_code "scratch"))
 212
 213 (define_constraint "Css"
 214   "A signed 16-bit constant, literal or symbolic."
 215   (and (match_code "const")
 216        (match_test "GET_CODE (XEXP (op, 0)) == UNSPEC")
 217        (match_test "XINT (XEXP (op, 0), 1) == UNSPEC_EXTRACT_S16")))
 218
 219 (define_constraint "Csu"
 220   "An unsigned 16-bit constant, literal or symbolic."
 221   (and (match_code "const")
 222        (match_test "GET_CODE (XEXP (op, 0)) == UNSPEC")
 223        (match_test "XINT (XEXP (op, 0), 1) == UNSPEC_EXTRACT_U16")))
 224
 225 (define_constraint "Csy"
 226   "A label or a symbol."
 227   (ior (match_test "NON_PIC_REFERENCE_P (op)")
 228        (match_test "PIC_ADDR_P (op)")))
 229
 230 (define_constraint "Z"
 231   "A zero in any shape or form."
 232   (match_test "op == CONST0_RTX (GET_MODE (op))"))
 233
 234 (define_constraint "W"
 235   "Any vector constant we can handle."
 236   (and (match_code "const_vector")
 237        (ior (match_test "sh_rep_vec (op, VOIDmode)")
 238             (match_test "HOST_BITS_PER_WIDE_INT >= 64
 239                          ? sh_const_vec (op, VOIDmode)
 240                          : sh_1el_vec (op, VOIDmode)"))))
 241
 242 (define_constraint "Cpg"
 243   "A non-explicit constant that can be loaded directly into a general
 244    purpose register.  This is like 's' except we don't allow
 245    PIC_ADDR_P."
 246   (match_test "IS_NON_EXPLICIT_CONSTANT_P (op)"))
 247
 248 (define_constraint "Pso"
 249   "Integer constant with a single bit set in its lower 8-bit."
 250   (and (match_code "const_int")
 251        (ior (match_test "ival == 1")
 252             (match_test "ival == 2")
 253             (match_test "ival == 4")
 254             (match_test "ival == 8")
 255             (match_test "ival == 16")
 256             (match_test "ival == 32")
 257             (match_test "ival == 64")
 258             (match_test "ival == 128"))))
 259
 260 (define_constraint "Psz"
 261   "Integer constant with a single zero bit in the lower 8-bit."
 262   (and (match_code "const_int")
 263        (ior (match_test "~ival == 1")
 264             (match_test "~ival == 2")
 265             (match_test "~ival == 4")
 266             (match_test "~ival == 8")
 267             (match_test "~ival == 16")
 268             (match_test "~ival == 32")
 269             (match_test "~ival == 64")
 270             (match_test "~ival == 128"))))
 271
 272 (define_memory_constraint "Sua"
 273   "@internal"
 274   (and (match_test "memory_operand (op, GET_MODE (op))")
 275        (match_test "GET_CODE (XEXP (op, 0)) != PLUS")))
 276
 277 (define_memory_constraint "Sdd"
 278   "A memory reference that uses displacement addressing."
 279   (and (match_test "MEM_P (op) && GET_CODE (XEXP (op, 0)) == PLUS")
 280        (match_test "REG_P (XEXP (XEXP (op, 0), 0))")
 281        (match_test "CONST_INT_P (XEXP (XEXP (op, 0), 1))")))
 282
 283 (define_memory_constraint "Snd"
 284   "A memory reference that excludes displacement addressing."
 285   (match_test "! satisfies_constraint_Sdd (op)"))
 286
 287 (define_memory_constraint "Sbv"
 288   "A memory reference, as used in SH2A bclr.b, bset.b, etc."
 289   (and (match_test "MEM_P (op) && GET_MODE (op) == QImode")
 290        (match_test "REG_P (XEXP (op, 0))")))
 291
 292 (define_memory_constraint "Sbw"
 293   "A memory reference, as used in SH2A bclr.b, bset.b, etc."
 294   (and (match_test "satisfies_constraint_Sdd (op)")
 295        (match_test "GET_MODE (op) == QImode")
 296        (match_test "satisfies_constraint_K12 (XEXP (XEXP (op, 0), 1))")))
 297