gcc/config/sh/constraints.md

   1 ;; Constraint definitions for Renesas / SuperH SH.
   2 ;; Copyright (C) 2007-2013 Free Software Foundation, Inc.
   3 ;;
   4 ;; This file is part of GCC.
   5 ;;
   6 ;; GCC is free software; you can redistribute it and/or modify
   7 ;; it under the terms of the GNU General Public License as published by
   8 ;; the Free Software Foundation; either version 3, or (at your option)
   9 ;; any later version.
  10 ;;
  11 ;; GCC is distributed in the hope that it will be useful,
  12 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14 ;; GNU General Public License for more details.
  15 ;;
  16 ;; You should have received a copy of the GNU General Public License
  17 ;; along with GCC; see the file COPYING3.  If not see
  18 ;; <http://www.gnu.org/licenses/>.
  19
  20 ;; Overview of uppercase letter constraints:
  21 ;; Bxx: miscellaneous constraints
  22 ;;  Bsc: SCRATCH - for the scratch register in movsi_ie in the
  23 ;;       fldi0 / fldi0 cases
  24 ;; Cxx: Constants other than only CONST_INT
  25 ;;  Css: signed 16-bit constant, literal or symbolic
  26 ;;  Csu: unsigned 16-bit constant, literal or symbolic
  27 ;;  Csy: label or symbol
  28 ;;  Cpg: non-explicit constants that can be directly loaded into a general
  29 ;;       purpose register in PIC code.  Like 's' except we don't allow
  30 ;;       PIC_ADDR_P
  31 ;; IJKLMNOP: CONT_INT constants
  32 ;;  Ixx: signed xx bit
  33 ;;  J16: 0xffffffff00000000 | 0x00000000ffffffff
  34 ;;  Jmb: 0x000000FF
  35 ;;  Jmw: 0x0000FFFF
  36 ;;  Jhb: 0x80000000
  37 ;;  Kxx: unsigned xx bit
  38 ;;  M: 1
  39 ;;  N: 0
  40 ;;  P27: 1 | 2 | 8 | 16
  41 ;;  Pso: 1 | 2 | 4 | 8 | 16 | 32 | 64 | 128
  42 ;;  Psz: ~1 | ~2 | ~4 | ~8 | ~16 | ~32 | ~64 | ~128
  43 ;; G: Floating point 0
  44 ;; H: Floating point 1
  45 ;; Q: pc relative load operand
  46 ;; Rxx: reserved for exotic register classes.
  47 ;; Sxx: extra memory constraints
  48 ;;  Sua: unaligned memory address
  49 ;;  Sbv: QImode address without displacement
  50 ;;  Sbw: QImode address with 12 bit displacement
  51 ;;  Snd: address without displacement
  52 ;;  Sdd: address with displacement
  53 ;;  Sra: simple register address
  54 ;; W: vector
  55 ;; Z: zero in any mode
  56 ;;
  57 ;; unused CONST_INT constraint letters: LO
  58 ;; unused EXTRA_CONSTRAINT letters: D T U Y
  59
  60 ;; Register constraints
  61 (define_register_constraint "a" "ALL_REGS"
  62   "@internal")
  63
  64 (define_register_constraint "b" "TARGET_REGS"
  65   "Branch target registers.")
  66
  67 (define_register_constraint "c" "FPSCR_REGS"
  68   "Floating-point status register.")
  69
  70 (define_register_constraint "d" "DF_REGS"
  71   "Double precision floating-point register.")
  72
  73 (define_register_constraint "e" "TARGET_FMOVD ? NO_REGS : FP_REGS"
  74   "Floating-point register.")
  75
  76 (define_register_constraint "f" "FP_REGS"
  77   "Floating-point register.")
  78
  79 (define_register_constraint "k" "SIBCALL_REGS"
  80   "@internal")
  81
  82 (define_register_constraint "l" "PR_REGS"
  83   "PR register.")
  84
  85 (define_register_constraint "t" "T_REGS"
  86   "T register.")
  87
  88 (define_register_constraint "u" "NON_SP_REGS"
  89   "Non-stack-pointer register.")
  90
  91 (define_register_constraint "w" "FP0_REGS"
  92   "Floating-point register 0.")
  93
  94 (define_register_constraint "x" "MAC_REGS"
  95   "MACH and MACL registers.")
  96
  97 (define_register_constraint "y" "FPUL_REGS"
  98   "FPUL register.")
  99
 100 (define_register_constraint "z" "R0_REGS"
 101   "R0 register.")
 102
 103 ;; Integer constraints
 104 (define_constraint "I06"
 105   "A signed 6-bit constant, as used in SHmedia beqi, bnei and xori."
 106   (and (match_code "const_int")
 107        (match_test "ival >= -32 && ival <= 31")))
 108
 109 (define_constraint "I08"
 110   "A signed 8-bit constant, as used in add, sub, etc."
 111   (and (match_code "const_int")
 112        (match_test "ival >= -128 && ival <= 127")))
 113
 114 (define_constraint "I10"
 115   "A signed 10-bit constant, as used in SHmedia andi, ori."
 116   (and (match_code "const_int")
 117        (match_test "ival >= -512 && ival <= 511")))
 118
 119 (define_constraint "I16"
 120   "A signed 16-bit constant, as used in SHmedia movi."
 121   (and (match_code "const_int")
 122        (match_test "ival >= -32768 && ival <= 32767")))
 123
 124 (define_constraint "I20"
 125   "A signed 20-bit constant, as used in SH2A movi20."
 126   (and (match_code "const_int")
 127        (match_test "ival >= -524288 && ival <= 524287")
 128        (match_test "TARGET_SH2A")))
 129
 130 (define_constraint "I28"
 131   "A signed 28-bit constant, as used in SH2A movi20s."
 132   (and (match_code "const_int")
 133        (match_test "ival >=  -134217728 && ival <= 134217727")
 134        (match_test "(ival & 255) == 0")
 135        (match_test "TARGET_SH2A")))
 136
 137 (define_constraint "J16"
 138   "0xffffffff00000000 or 0x00000000ffffffff."
 139   (and (match_code "const_int")
 140        (match_test "CONST_OK_FOR_J16 (ival)")))
 141
 142 (define_constraint "Jmb"
 143   "Low byte mask constant 0x000000FF"
 144   (and (match_code "const_int")
 145        (match_test "ival == 0xFF")))
 146
 147 (define_constraint "Jmw"
 148   "Low word mask constant 0x0000FFFF"
 149   (and (match_code "const_int")
 150        (match_test "ival == 0xFFFF")))
 151
 152 (define_constraint "Jhb"
 153   "Highest bit constant"
 154   (and (match_code "const_int")
 155        (match_test "(ival & 0xFFFFFFFF) == 0x80000000")))
 156
 157 (define_constraint "K03"
 158   "An unsigned 3-bit constant, as used in SH2A bclr, bset, etc."
 159   (and (match_code "const_int")
 160        (match_test "ival >= 0 && ival <= 7")))
 161
 162 (define_constraint "K04"
 163   "An unsigned 4-bit constant, as used in mov.b displacement addressing."
 164   (and (match_code "const_int")
 165        (match_test "ival >= 0 && ival <= 15")))
 166
 167 (define_constraint "K05"
 168   "An unsigned 5-bit constant, as used in mov.w displacement addressing."
 169   (and (match_code "const_int")
 170        (match_test "ival >= 0 && ival <= 31")))
 171
 172 (define_constraint "K08"
 173   "An unsigned 8-bit constant, as used in and, or, etc."
 174   (and (match_code "const_int")
 175        (match_test "ival >= 0 && ival <= 255")))
 176
 177 (define_constraint "K12"
 178   "An unsigned 12-bit constant, as used in SH2A 12-bit mov.b displacement
 179    addressing."
 180   (and (match_code "const_int")
 181        (match_test "ival >= 0 && ival <= 4095")))
 182
 183 (define_constraint "K13"
 184   "An unsigned 13-bit constant, as used in SH2A 12-bit mov.w displacement
 185    addressing."
 186   (and (match_code "const_int")
 187        (match_test "ival >= 0 && ival <= 8191")))
 188
 189 (define_constraint "K16"
 190   "An unsigned 16-bit constant, as used in SHmedia shori."
 191   (and (match_code "const_int")
 192        (match_test "ival >= 0 && ival <= 65535")))
 193
 194 (define_constraint "P27"
 195   "A constant for shift operand 1,2,8 or 16."
 196   (and (match_code "const_int")
 197        (match_test "ival == 1 || ival == 2 || ival == 8 || ival == 16")))
 198
 199 (define_constraint "M"
 200   "Integer constant 1."
 201   (and (match_code "const_int")
 202        (match_test "ival == 1")))
 203
 204 (define_constraint "N"
 205   "Integer constant 0."
 206   (and (match_code "const_int")
 207        (match_test "ival == 0")))
 208
 209 ;; Floating-point constraints
 210 (define_constraint "G"
 211   "Double constant 0."
 212   (and (match_code "const_double")
 213        (match_test "fp_zero_operand (op) && fldi_ok ()")))
 214
 215 (define_constraint "H"
 216   "Double constant 1."
 217   (and (match_code "const_double")
 218        (match_test "fp_one_operand (op) && fldi_ok ()")))
 219
 220 ;; Extra constraints
 221 (define_constraint "Q"
 222   "A pc relative load operand."
 223   (and (match_code "mem")
 224        (match_test "IS_PC_RELATIVE_LOAD_ADDR_P (XEXP (op, 0))")))
 225
 226 (define_constraint "Bsc"
 227   "Constraint for selecting FLDI0 or FLDI1 instruction.  If the clobber
 228    operand is not SCRATCH (i.e. REG) then R0 is probably being used,
 229    hence mova is being used, hence do not select this pattern."
 230   (match_code "scratch"))
 231
 232 (define_constraint "Css"
 233   "A signed 16-bit constant, literal or symbolic."
 234   (and (match_code "const")
 235        (match_test "GET_CODE (XEXP (op, 0)) == UNSPEC")
 236        (match_test "XINT (XEXP (op, 0), 1) == UNSPEC_EXTRACT_S16")))
 237
 238 (define_constraint "Csu"
 239   "An unsigned 16-bit constant, literal or symbolic."
 240   (and (match_code "const")
 241        (match_test "GET_CODE (XEXP (op, 0)) == UNSPEC")
 242        (match_test "XINT (XEXP (op, 0), 1) == UNSPEC_EXTRACT_U16")))
 243
 244 (define_constraint "Csy"
 245   "A label or a symbol."
 246   (ior (match_test "NON_PIC_REFERENCE_P (op)")
 247        (match_test "PIC_ADDR_P (op)")))
 248
 249 (define_constraint "Z"
 250   "A zero in any shape or form."
 251   (match_test "op == CONST0_RTX (GET_MODE (op))"))
 252
 253 (define_constraint "W"
 254   "Any vector constant we can handle."
 255   (and (match_code "const_vector")
 256        (ior (match_test "sh_rep_vec (op, VOIDmode)")
 257             (match_test "HOST_BITS_PER_WIDE_INT >= 64
 258                          ? sh_const_vec (op, VOIDmode)
 259                          : sh_1el_vec (op, VOIDmode)"))))
 260
 261 (define_constraint "Cpg"
 262   "A non-explicit constant that can be loaded directly into a general
 263    purpose register.  This is like 's' except we don't allow
 264    PIC_ADDR_P."
 265   (match_test "IS_NON_EXPLICIT_CONSTANT_P (op)"))
 266
 267 (define_constraint "Pso"
 268   "Integer constant with a single bit set in its lower 8-bit."
 269   (and (match_code "const_int")
 270        (ior (match_test "ival == 1")
 271             (match_test "ival == 2")
 272             (match_test "ival == 4")
 273             (match_test "ival == 8")
 274             (match_test "ival == 16")
 275             (match_test "ival == 32")
 276             (match_test "ival == 64")
 277             (match_test "ival == 128"))))
 278
 279 (define_constraint "Psz"
 280   "Integer constant with a single zero bit in the lower 8-bit."
 281   (and (match_code "const_int")
 282        (ior (match_test "~ival == 1")
 283             (match_test "~ival == 2")
 284             (match_test "~ival == 4")
 285             (match_test "~ival == 8")
 286             (match_test "~ival == 16")
 287             (match_test "~ival == 32")
 288             (match_test "~ival == 64")
 289             (match_test "~ival == 128"))))
 290
 291 (define_memory_constraint "Sua"
 292   "@internal"
 293   (and (match_test "memory_operand (op, GET_MODE (op))")
 294        (match_test "GET_CODE (XEXP (op, 0)) != PLUS")))
 295
 296 (define_memory_constraint "Sdd"
 297   "A memory reference that uses displacement addressing."
 298   (and (match_test "MEM_P (op) && GET_CODE (XEXP (op, 0)) == PLUS")
 299        (match_test "REG_P (XEXP (XEXP (op, 0), 0))")
 300        (match_test "CONST_INT_P (XEXP (XEXP (op, 0), 1))")))
 301
 302 (define_memory_constraint "Snd"
 303   "A memory reference that excludes displacement addressing."
 304   (match_test "! satisfies_constraint_Sdd (op)"))
 305
 306 (define_memory_constraint "Sbv"
 307   "A memory reference, as used in SH2A bclr.b, bset.b, etc."
 308   (and (match_test "MEM_P (op) && GET_MODE (op) == QImode")
 309        (match_test "REG_P (XEXP (op, 0))")))
 310
 311 (define_memory_constraint "Sbw"
 312   "A memory reference, as used in SH2A bclr.b, bset.b, etc."
 313   (and (match_test "satisfies_constraint_Sdd (op)")
 314        (match_test "GET_MODE (op) == QImode")
 315        (match_test "satisfies_constraint_K12 (XEXP (XEXP (op, 0), 1))")))
 316
 317 (define_memory_constraint "Sra"
 318   "A memory reference that uses simple register addressing."
 319   (and (match_test "MEM_P (op)")
 320        (match_test "REG_P (XEXP (op, 0))")))
 321