gcc/config/sh/constraints.md

   1 ;; Constraint definitions for Renesas / SuperH SH.
   2 ;; Copyright (C) 2007 Free Software Foundation, Inc.
   3 ;;
   4 ;; This file is part of GCC.
   5 ;;
   6 ;; GCC is free software; you can redistribute it and/or modify
   7 ;; it under the terms of the GNU General Public License as published by
   8 ;; the Free Software Foundation; either version 2, or (at your option)
   9 ;; any later version.
  10 ;;
  11 ;; GCC is distributed in the hope that it will be useful,
  12 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14 ;; GNU General Public License for more details.
  15 ;;
  16 ;; You should have received a copy of the GNU General Public License
  17 ;; along with GCC; see the file COPYING.  If not, write to
  18 ;; the Free Software Foundation, 51 Franklin Street, Fifth Floor,
  19 ;; Boston, MA 02110-1301, USA.
  20
  21 ;; Overview of uppercase letter constraints:
  22 ;; Bxx: miscellaneous constraints
  23 ;;  Bsc: SCRATCH - for the scratch register in movsi_ie in the
  24 ;;       fldi0 / fldi0 cases
  25 ;; Cxx: Constants other than only CONST_INT
  26 ;;  Css: signed 16-bit constant, literal or symbolic
  27 ;;  Csu: unsigned 16-bit constant, literal or symbolic
  28 ;;  Csy: label or symbol
  29 ;;  Cpg: non-explicit constants that can be directly loaded into a general
  30 ;;       purpose register in PIC code.  like 's' except we don't allow
  31 ;;       PIC_DIRECT_ADDR_P
  32 ;; IJKLMNOP: CONT_INT constants
  33 ;;  Ixx: signed xx bit
  34 ;;  J16: 0xffffffff00000000 | 0x00000000ffffffff
  35 ;;  Kxx: unsigned xx bit
  36 ;;  M: 1
  37 ;;  N: 0
  38 ;;  P27: 1 | 2 | 8 | 16
  39 ;; Q: pc relative load operand
  40 ;; Rxx: reserved for exotic register classes.
  41 ;; Sxx: extra memory (storage) constraints
  42 ;;  Sua: unaligned memory operations
  43 ;; W: vector
  44 ;; Z: zero in any mode
  45 ;;
  46 ;; unused CONST_INT constraint letters: LO
  47 ;; unused EXTRA_CONSTRAINT letters: D T U Y
  48
  49 ;; Register constraints
  50 (define_register_constraint "a" "ALL_REGS"
  51   "@internal")
  52
  53 (define_register_constraint "b" "TARGET_REGS"
  54   "Branch target registers.")
  55
  56 (define_register_constraint "c" "FPSCR_REGS"
  57   "Floating-point status register.")
  58
  59 (define_register_constraint "d" "DF_REGS"
  60   "Double precision floating-point register.")
  61
  62 (define_register_constraint "e" "TARGET_FMOVD ? NO_REGS : FP_REGS"
  63   "Floating-point register.")
  64
  65 (define_register_constraint "f" "FP_REGS"
  66   "Floating-point register.")
  67
  68 (define_register_constraint "k" "SIBCALL_REGS"
  69   "@internal")
  70
  71 (define_register_constraint "l" "PR_REGS"
  72   "PR register.")
  73
  74 (define_register_constraint "t" "T_REGS"
  75   "T register.")
  76
  77 (define_register_constraint "w" "FP0_REGS"
  78   "Floating-point register 0.")
  79
  80 (define_register_constraint "x" "MAC_REGS"
  81   "MACH and MACL registers.")
  82
  83 (define_register_constraint "y" "FPUL_REGS"
  84   "FPUL register.")
  85
  86 (define_register_constraint "z" "R0_REGS"
  87   "R0 register.")
  88
  89 ;; Integer constraints
  90 (define_constraint "I06"
  91   "A signed 6-bit constant, as used in SHmedia beqi, bnei and xori."
  92   (and (match_code "const_int")
  93        (match_test "ival >= -32 && ival <= 31")))
  94
  95 (define_constraint "I08"
  96   "A signed 8-bit constant, as used in add, sub, etc."
  97   (and (match_code "const_int")
  98        (match_test "ival >= -128 && ival <= 127")))
  99
 100 (define_constraint "I10"
 101   "A signed 10-bit constant, as used in in SHmedia andi, ori."
 102   (and (match_code "const_int")
 103        (match_test "ival >= -512 && ival <= 511")))
 104
 105 (define_constraint "I16"
 106   "A signed 16-bit constant, as used in SHmedia movi."
 107   (and (match_code "const_int")
 108        (match_test "ival >= -32768 && ival <= 32767")))
 109
 110 (define_constraint "I20"
 111   "A signed 20-bit constant, as used in SH2A movi20."
 112   (and (match_code "const_int")
 113        (match_test "ival >= -524288 && ival <= 524287")
 114        (match_test "TARGET_SH2A")))
 115
 116 (define_constraint "J16"
 117   "0xffffffff00000000 or 0x00000000ffffffff."
 118   (and (match_code "const_int")
 119        (match_test "CONST_OK_FOR_J16 (ival)")))
 120
 121 (define_constraint "K08"
 122   "An unsigned 8-bit constant, as used in and, or, etc."
 123   (and (match_code "const_int")
 124        (match_test "ival >= 0 && ival <= 255")))
 125
 126 (define_constraint "K16"
 127   "An unsigned 16-bit constant, as used in SHmedia shori."
 128   (and (match_code "const_int")
 129        (match_test "ival >= 0 && ival <= 65535")))
 130
 131 (define_constraint "P27"
 132   "A constant for shift operand 1,2,8 or 16."
 133   (and (match_code "const_int")
 134        (match_test "ival == 1 || ival == 2 || ival == 8 || ival == 16")))
 135
 136 (define_constraint "M"
 137   "Integer constant 1."
 138   (and (match_code "const_int")
 139        (match_test "ival == 1")))
 140
 141 (define_constraint "N"
 142   "Integer constant 0."
 143   (and (match_code "const_int")
 144        (match_test "ival == 0")))
 145
 146 ;; Floating-point constraints
 147 (define_constraint "G"
 148   "Double constant 0."
 149   (and (match_code "const_double")
 150        (match_test "fp_zero_operand (op) && fldi_ok ()")))
 151
 152 (define_constraint "H"
 153   "Double constant 1."
 154   (and (match_code "const_double")
 155        (match_test "fp_one_operand (op) && fldi_ok ()")))
 156
 157 ;; Extra constraints
 158 (define_constraint "Q"
 159   "A pc relative load operand."
 160   (and (match_code "mem")
 161        (match_test "IS_PC_RELATIVE_LOAD_ADDR_P (XEXP (op, 0))")))
 162
 163 (define_constraint "Bsc"
 164   "Constraint for selecting FLDI0 or FLDI1 instruction.  If the clobber
 165    operand is not SCRATCH (i.e. REG) then R0 is probably being used,
 166    hence mova is being used, hence do not select this pattern."
 167   (match_code "scratch"))
 168
 169 (define_constraint "Css"
 170   "A signed 16-bit constant, literal or symbolic."
 171   (and (match_code "const")
 172        (match_test "IS_LITERAL_OR_SYMBOLIC_S16_P (XEXP (op, 0))")))
 173
 174 (define_constraint "Csu"
 175   "An unsigned 16-bit constant, literal or symbolic."
 176   (and (match_code "const")
 177        (match_test "IS_LITERAL_OR_SYMBOLIC_U16_P (XEXP (op, 0))")))
 178
 179 (define_constraint "Csy"
 180   "A label or a symbol."
 181   (ior (match_test "NON_PIC_REFERENCE_P (op)")
 182        (match_test "PIC_DIRECT_ADDR_P (op)")))
 183
 184 (define_constraint "Z"
 185   "A zero in any shape or form."
 186   (match_test "op == CONST0_RTX (GET_MODE (op))"))
 187
 188 (define_constraint "W"
 189   "Any vector constant we can handle."
 190   (and (match_code "const_vector")
 191        (ior (match_test "sh_rep_vec (op, VOIDmode)")
 192             (match_test "HOST_BITS_PER_WIDE_INT >= 64
 193                          ? sh_const_vec (op, VOIDmode)
 194                          : sh_1el_vec (op, VOIDmode)"))))
 195
 196 (define_constraint "Cpg"
 197   "A non-explicit constant that can be loaded directly into a general
 198    purpose register.  This is like 's' except we don't allow
 199    PIC_DIRECT_ADDR_P."
 200   (match_test "IS_NON_EXPLICIT_CONSTANT_P (op)"))
 201
 202 (define_memory_constraint "Sr0"
 203   "@internal"
 204   (and (match_test "memory_operand (op, GET_MODE (op))")
 205        (match_test "!refers_to_regno_p (R0_REG, R0_REG + 1, op, (rtx *) 0)")))
 206
 207 (define_memory_constraint "Sua"
 208   "@internal"
 209   (and (match_test "memory_operand (op, GET_MODE (op))")
 210        (match_test "GET_CODE (XEXP (op, 0)) != PLUS")))