gcc/config/sparc/predicates.md

   1 ;; Predicate definitions for SPARC.
   2 ;; Copyright (C) 2005, 2007, 2008, 2010 Free Software Foundation, Inc.
   3 ;;
   4 ;; This file is part of GCC.
   5 ;;
   6 ;; GCC is free software; you can redistribute it and/or modify
   7 ;; it under the terms of the GNU General Public License as published by
   8 ;; the Free Software Foundation; either version 3, or (at your option)
   9 ;; any later version.
  10 ;;
  11 ;; GCC is distributed in the hope that it will be useful,
  12 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14 ;; GNU General Public License for more details.
  15 ;;
  16 ;; You should have received a copy of the GNU General Public License
  17 ;; along with GCC; see the file COPYING3.  If not see
  18 ;; <http://www.gnu.org/licenses/>.
  19
  20 ;; Predicates for numerical constants.
  21
  22 ;; Return true if OP is the zero constant for MODE.
  23 (define_predicate "const_zero_operand"
  24   (and (match_code "const_int,const_double,const_vector")
  25        (match_test "op == CONST0_RTX (mode)")))
  26
  27 ;; Return true if the integer representation of OP is
  28 ;; all-ones.
  29 (define_predicate "const_all_ones_operand"
  30   (match_code "const_int,const_double,const_vector")
  31 {
  32   if (GET_CODE (op) == CONST_INT && INTVAL (op) == -1)
  33     return true;
  34 #if HOST_BITS_PER_WIDE_INT == 32
  35   if (GET_CODE (op) == CONST_DOUBLE
  36       && GET_MODE (op) == VOIDmode
  37       && CONST_DOUBLE_HIGH (op) == ~(HOST_WIDE_INT)0
  38       && CONST_DOUBLE_LOW (op) == ~(HOST_WIDE_INT)0)
  39     return true;
  40 #endif
  41   if (GET_CODE (op) == CONST_VECTOR)
  42     {
  43       int i, num_elem = CONST_VECTOR_NUNITS (op);
  44
  45       for (i = 0; i < num_elem; i++)
  46         {
  47           rtx n = CONST_VECTOR_ELT (op, i);
  48           if (! const_all_ones_operand (n, mode))
  49             return false;
  50         }
  51       return true;
  52     }
  53   return false;
  54 })
  55
  56 ;; Return true if OP is the integer constant 4096.
  57 (define_predicate "const_4096_operand"
  58   (and (match_code "const_int")
  59        (match_test "INTVAL (op) == 4096")))
  60
  61 ;; Return true if OP is a constant that is representable by a 13-bit
  62 ;; signed field.  This is an acceptable immediate operand for most
  63 ;; 3-address instructions.
  64 (define_predicate "small_int_operand"
  65   (and (match_code "const_int")
  66        (match_test "SPARC_SIMM13_P (INTVAL (op))")))
  67
  68 ;; Return true if OP is a constant operand for the umul instruction.  That
  69 ;; instruction sign-extends immediate values just like all other SPARC
  70 ;; instructions, but interprets the extended result as an unsigned number.
  71 (define_predicate "uns_small_int_operand"
  72   (match_code "const_int,const_double")
  73 {
  74 #if HOST_BITS_PER_WIDE_INT == 32
  75   return ((GET_CODE (op) == CONST_INT && (unsigned) INTVAL (op) < 0x1000)
  76           || (GET_CODE (op) == CONST_DOUBLE
  77               && CONST_DOUBLE_HIGH (op) == 0
  78               && (unsigned) CONST_DOUBLE_LOW (op) - 0xFFFFF000 < 0x1000));
  79 #else
  80   return (GET_CODE (op) == CONST_INT
  81           && ((INTVAL (op) >= 0 && INTVAL (op) < 0x1000)
  82               || (INTVAL (op) >= 0xFFFFF000
  83                   && INTVAL (op) <= 0xFFFFFFFF)));
  84 #endif
  85 })
  86
  87 ;; Return true if OP is a constant that can be loaded by the sethi instruction.
  88 ;; The first test avoids emitting sethi to load zero for example.
  89 (define_predicate "const_high_operand"
  90   (and (match_code "const_int")
  91        (and (not (match_operand 0 "small_int_operand"))
  92             (match_test "SPARC_SETHI_P (INTVAL (op) & GET_MODE_MASK (mode))"))))
  93
  94 ;; Return true if OP is a constant whose 1's complement can be loaded by the
  95 ;; sethi instruction.
  96 (define_predicate "const_compl_high_operand"
  97   (and (match_code "const_int")
  98        (and (not (match_operand 0 "small_int_operand"))
  99             (match_test "SPARC_SETHI_P (~INTVAL (op) & GET_MODE_MASK (mode))"))))
 100
 101 ;; Return true if OP is a FP constant that needs to be loaded by the sethi/losum
 102 ;; pair of instructions.
 103 (define_predicate "fp_const_high_losum_operand"
 104   (match_operand 0 "const_double_operand")
 105 {
 106   gcc_assert (mode == SFmode);
 107   return fp_high_losum_p (op);
 108 })
 109
 110 ;; Return true if OP is a const_double or const_vector.
 111 (define_predicate "const_double_or_vector_operand"
 112   (match_code "const_double,const_vector"))
 113
 114 ;; Return true if OP is Zero, or if the target is V7.
 115 (define_predicate "zero_or_v7_operand"
 116   (ior (match_test "op == const0_rtx")
 117        (match_test "!TARGET_V8 && !TARGET_V9")))
 118
 119 ;; Predicates for symbolic constants.
 120
 121 ;; Return true if OP is either a symbol reference or a sum of a symbol
 122 ;; reference and a constant.
 123 (define_predicate "symbolic_operand"
 124   (match_code "symbol_ref,label_ref,const")
 125 {
 126   enum machine_mode omode = GET_MODE (op);
 127
 128   if (omode != mode && omode != VOIDmode && mode != VOIDmode)
 129     return false;
 130
 131   switch (GET_CODE (op))
 132     {
 133     case SYMBOL_REF:
 134       return !SYMBOL_REF_TLS_MODEL (op);
 135
 136     case LABEL_REF:
 137       return true;
 138
 139     case CONST:
 140       op = XEXP (op, 0);
 141       return (((GET_CODE (XEXP (op, 0)) == SYMBOL_REF
 142                 && !SYMBOL_REF_TLS_MODEL (XEXP (op, 0)))
 143                || GET_CODE (XEXP (op, 0)) == LABEL_REF)
 144               && GET_CODE (XEXP (op, 1)) == CONST_INT);
 145
 146     default:
 147       gcc_unreachable ();
 148     }
 149 })
 150
 151 ;; Return true if OP is a symbolic operand for the TLS Global Dynamic model.
 152 (define_predicate "tgd_symbolic_operand"
 153   (and (match_code "symbol_ref")
 154        (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_GLOBAL_DYNAMIC")))
 155
 156 ;; Return true if OP is a symbolic operand for the TLS Local Dynamic model.
 157 (define_predicate "tld_symbolic_operand"
 158   (and (match_code "symbol_ref")
 159        (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_LOCAL_DYNAMIC")))
 160
 161 ;; Return true if OP is a symbolic operand for the TLS Initial Exec model.
 162 (define_predicate "tie_symbolic_operand"
 163   (and (match_code "symbol_ref")
 164        (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_INITIAL_EXEC")))
 165
 166 ;; Return true if OP is a symbolic operand for the TLS Local Exec model.
 167 (define_predicate "tle_symbolic_operand"
 168   (and (match_code "symbol_ref")
 169        (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_LOCAL_EXEC")))
 170
 171 ;; Return true if the operand is an argument used in generating PIC references
 172 ;; in either the medium/low or embedded medium/anywhere code models on V9.
 173 ;; Check for (const (minus (symbol_ref:GOT)
 174 ;;                         (const (minus (label) (pc)))))
 175 (define_predicate "medium_pic_operand"
 176   (match_code "const")
 177 {
 178   /* Check for (const (minus (symbol_ref:GOT)
 179                              (const (minus (label) (pc))))).  */
 180   op = XEXP (op, 0);
 181   return GET_CODE (op) == MINUS
 182          && GET_CODE (XEXP (op, 0)) == SYMBOL_REF
 183          && GET_CODE (XEXP (op, 1)) == CONST
 184          && GET_CODE (XEXP (XEXP (op, 1), 0)) == MINUS;
 185 })
 186
 187 ;; Return true if OP is a LABEL_REF of mode MODE.
 188 (define_predicate "label_ref_operand"
 189   (and (match_code "label_ref")
 190        (match_test "GET_MODE (op) == mode")))
 191
 192 ;; Return true if OP is a data segment reference.  This includes the readonly
 193 ;; data segment or, in other words, anything but the text segment.
 194 ;; This is needed in the embedded medium/anywhere code model on V9.  These
 195 ;; values are accessed with EMBMEDANY_BASE_REG.  */
 196 (define_predicate "data_segment_operand"
 197   (match_code "symbol_ref,plus,const")
 198 {
 199   switch (GET_CODE (op))
 200     {
 201     case SYMBOL_REF :
 202       return ! SYMBOL_REF_FUNCTION_P (op);
 203     case PLUS :
 204       /* Assume canonical format of symbol + constant.
 205          Fall through.  */
 206     case CONST :
 207       return data_segment_operand (XEXP (op, 0), VOIDmode);
 208     default :
 209       gcc_unreachable ();
 210     }
 211 })
 212
 213 ;; Return true if OP is a text segment reference.
 214 ;; This is needed in the embedded medium/anywhere code model on V9.
 215 (define_predicate "text_segment_operand"
 216   (match_code "label_ref,symbol_ref,plus,const")
 217 {
 218   switch (GET_CODE (op))
 219     {
 220     case LABEL_REF :
 221       return true;
 222     case SYMBOL_REF :
 223       return SYMBOL_REF_FUNCTION_P (op);
 224     case PLUS :
 225       /* Assume canonical format of symbol + constant.
 226          Fall through.  */
 227     case CONST :
 228       return text_segment_operand (XEXP (op, 0), VOIDmode);
 229     default :
 230       gcc_unreachable ();
 231     }
 232 })
 233
 234
 235 ;; Predicates for registers.
 236
 237 ;; Return true if OP is either the zero constant or a register.
 238 (define_predicate "register_or_zero_operand"
 239   (ior (match_operand 0 "register_operand")
 240        (match_operand 0 "const_zero_operand")))
 241
 242 (define_predicate "register_or_v9_zero_operand"
 243   (ior (match_operand 0 "register_operand")
 244        (and (match_test "TARGET_V9")
 245             (match_operand 0 "const_zero_operand"))))
 246
 247 ;; Return true if OP is either the zero constant, the all-ones
 248 ;; constant, or a register.
 249 (define_predicate "register_or_zero_or_all_ones_operand"
 250   (ior (match_operand 0 "register_or_zero_operand")
 251        (match_operand 0 "const_all_ones_operand")))
 252
 253 ;; Return true if OP is a register operand in a floating point register.
 254 (define_predicate "fp_register_operand"
 255   (match_operand 0 "register_operand")
 256 {
 257   if (GET_CODE (op) == SUBREG)
 258     op = SUBREG_REG (op); /* Possibly a MEM */
 259   return REG_P (op) && SPARC_FP_REG_P (REGNO (op));
 260 })
 261
 262 ;; Return true if OP is an integer register.
 263 (define_special_predicate "int_register_operand"
 264   (ior (match_test "register_operand (op, SImode)")
 265        (match_test "TARGET_ARCH64 && register_operand (op, DImode)")))
 266
 267 ;; Return true if OP is a floating point condition code register.
 268 (define_predicate "fcc_register_operand"
 269   (match_code "reg")
 270 {
 271   if (mode != VOIDmode && mode != GET_MODE (op))
 272     return false;
 273   if (mode == VOIDmode
 274       && (GET_MODE (op) != CCFPmode && GET_MODE (op) != CCFPEmode))
 275     return false;
 276
 277 #if 0 /* ??? 1 when %fcc0-3 are pseudos first.  See gen_compare_reg().  */
 278   if (reg_renumber == 0)
 279     return REGNO (op) >= FIRST_PSEUDO_REGISTER;
 280   return REGNO_OK_FOR_CCFP_P (REGNO (op));
 281 #else
 282   return ((unsigned) REGNO (op) - SPARC_FIRST_V9_FCC_REG) < 4;
 283 #endif
 284 })
 285
 286 ;; Return true if OP is the floating point condition code register fcc0.
 287 (define_predicate "fcc0_register_operand"
 288   (match_code "reg")
 289 {
 290   if (mode != VOIDmode && mode != GET_MODE (op))
 291     return false;
 292   if (mode == VOIDmode
 293       && (GET_MODE (op) != CCFPmode && GET_MODE (op) != CCFPEmode))
 294     return false;
 295
 296   return REGNO (op) == SPARC_FCC_REG;
 297 })
 298
 299 ;; Return true if OP is an integer or floating point condition code register.
 300 (define_predicate "icc_or_fcc_register_operand"
 301   (match_code "reg")
 302 {
 303   if (REGNO (op) == SPARC_ICC_REG)
 304     {
 305       if (mode != VOIDmode && mode != GET_MODE (op))
 306         return false;
 307       if (mode == VOIDmode
 308           && GET_MODE (op) != CCmode && GET_MODE (op) != CCXmode)
 309         return false;
 310
 311       return true;
 312     }
 313
 314   return fcc_register_operand (op, mode);
 315 })
 316
 317
 318 ;; Predicates for arithmetic instructions.
 319
 320 ;; Return true if OP is a register, or is a constant that is representable
 321 ;; by a 13-bit signed field.  This is an acceptable operand for most
 322 ;; 3-address instructions.
 323 (define_predicate "arith_operand"
 324   (ior (match_operand 0 "register_operand")
 325        (match_operand 0 "small_int_operand")))
 326
 327 ;; 64-bit: Same as above.
 328 ;; 32-bit: Return true if OP is a register, or is a constant that is
 329 ;; representable by a couple of 13-bit signed fields.  This is an
 330 ;; acceptable operand for most 3-address splitters.
 331 (define_predicate "arith_double_operand"
 332   (match_code "const_int,const_double,reg,subreg")
 333 {
 334   bool arith_simple_operand = arith_operand (op, mode);
 335   HOST_WIDE_INT m1, m2;
 336
 337   if (TARGET_ARCH64 || arith_simple_operand)
 338     return arith_simple_operand;
 339
 340 #if HOST_BITS_PER_WIDE_INT == 32
 341   if (GET_CODE (op) != CONST_DOUBLE)
 342     return false;
 343   m1 = CONST_DOUBLE_LOW (op);
 344   m2 = CONST_DOUBLE_HIGH (op);
 345 #else
 346   if (GET_CODE (op) != CONST_INT)
 347     return false;
 348   m1 = trunc_int_for_mode (INTVAL (op), SImode);
 349   m2 = trunc_int_for_mode (INTVAL (op) >> 32, SImode);
 350 #endif
 351
 352   return SPARC_SIMM13_P (m1) && SPARC_SIMM13_P (m2);
 353 })
 354
 355 ;; Return true if OP is suitable as second operand for add/sub.
 356 (define_predicate "arith_add_operand"
 357   (ior (match_operand 0 "arith_operand")
 358        (match_operand 0 "const_4096_operand")))
 359
 360 ;; Return true if OP is suitable as second double operand for add/sub.
 361 (define_predicate "arith_double_add_operand"
 362   (match_code "const_int,const_double,reg,subreg")
 363 {
 364   bool _arith_double_operand = arith_double_operand (op, mode);
 365
 366   if (_arith_double_operand)
 367     return true;
 368
 369   return TARGET_ARCH64 && const_4096_operand (op, mode);
 370 })
 371
 372 ;; Return true if OP is a register, or is a CONST_INT that can fit in a
 373 ;; signed 10-bit immediate field.  This is an acceptable SImode operand for
 374 ;; the movrcc instructions.
 375 (define_predicate "arith10_operand"
 376   (ior (match_operand 0 "register_operand")
 377        (and (match_code "const_int")
 378             (match_test "SPARC_SIMM10_P (INTVAL (op))"))))
 379
 380 ;; Return true if OP is a register, or is a CONST_INT that can fit in a
 381 ;; signed 11-bit immediate field.  This is an acceptable SImode operand for
 382 ;; the movcc instructions.
 383 (define_predicate "arith11_operand"
 384   (ior (match_operand 0 "register_operand")
 385        (and (match_code "const_int")
 386             (match_test "SPARC_SIMM11_P (INTVAL (op))"))))
 387
 388 ;; Return true if OP is a register or a constant for the umul instruction.
 389 (define_predicate "uns_arith_operand"
 390   (ior (match_operand 0 "register_operand")
 391        (match_operand 0 "uns_small_int_operand")))
 392
 393
 394 ;; Predicates for miscellaneous instructions.
 395
 396 ;; Return true if OP is valid for the lhs of a comparison insn.
 397 (define_predicate "compare_operand"
 398   (match_code "reg,subreg,zero_extract")
 399 {
 400   if (GET_CODE (op) == ZERO_EXTRACT)
 401     return (register_operand (XEXP (op, 0), mode)
 402             && small_int_operand (XEXP (op, 1), mode)
 403             && small_int_operand (XEXP (op, 2), mode)
 404             /* This matches cmp_zero_extract.  */
 405             && ((mode == SImode
 406                  && INTVAL (XEXP (op, 2)) > 19)
 407                 /* This matches cmp_zero_extract_sp64.  */
 408                 || (TARGET_ARCH64
 409                     && mode == DImode
 410                     && INTVAL (XEXP (op, 2)) > 51)));
 411   else
 412     return register_operand (op, mode);
 413 })
 414
 415 ;; Return true if OP is a valid operand for the source of a move insn.
 416 (define_predicate "input_operand"
 417   (match_code "const_int,const_double,const_vector,reg,subreg,mem")
 418 {
 419   enum mode_class mclass;
 420
 421   /* If both modes are non-void they must be the same.  */
 422   if (mode != VOIDmode && GET_MODE (op) != VOIDmode && mode != GET_MODE (op))
 423     return false;
 424
 425   mclass = GET_MODE_CLASS (mode);
 426
 427   /* Allow any 1-instruction integer constant.  */
 428   if (mclass == MODE_INT
 429       && (small_int_operand (op, mode) || const_high_operand (op, mode)))
 430     return true;
 431
 432   /* If 32-bit mode and this is a DImode constant, allow it
 433      so that the splits can be generated.  */
 434   if (TARGET_ARCH32
 435       && mode == DImode
 436       && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
 437     return true;
 438
 439   if (mclass == MODE_FLOAT && GET_CODE (op) == CONST_DOUBLE)
 440     return true;
 441
 442   if (mclass == MODE_VECTOR_INT && GET_CODE (op) == CONST_VECTOR
 443       && (const_zero_operand (op, mode)
 444           || const_all_ones_operand (op, mode)))
 445     return true;
 446
 447   if (register_operand (op, mode))
 448     return true;
 449
 450   /* If this is a SUBREG, look inside so that we handle paradoxical ones.  */
 451   if (GET_CODE (op) == SUBREG)
 452     op = SUBREG_REG (op);
 453
 454   /* Check for valid MEM forms.  */
 455   if (GET_CODE (op) == MEM)
 456     return memory_address_p (mode, XEXP (op, 0));
 457
 458   return false;
 459 })
 460
 461 ;; Return true if OP is an address suitable for a call insn.
 462 ;; Call insn on SPARC can take a PC-relative constant address
 463 ;; or any regular memory address.
 464 (define_predicate "call_address_operand"
 465   (ior (match_operand 0 "symbolic_operand")
 466        (match_test "memory_address_p (Pmode, op)")))
 467
 468 ;; Return true if OP is an operand suitable for a call insn.
 469 (define_predicate "call_operand"
 470   (and (match_code "mem")
 471        (match_test "call_address_operand (XEXP (op, 0), mode)")))
 472
 473
 474 ;; Predicates for operators.
 475
 476 ;; Return true if OP is a comparison operator.  This allows the use of
 477 ;; MATCH_OPERATOR to recognize all the branch insns.
 478 (define_predicate "noov_compare_operator"
 479   (match_code "ne,eq,ge,gt,le,lt,geu,gtu,leu,ltu")
 480 {
 481   enum rtx_code code = GET_CODE (op);
 482   if (GET_MODE (XEXP (op, 0)) == CC_NOOVmode
 483       || GET_MODE (XEXP (op, 0)) == CCX_NOOVmode)
 484     /* These are the only branches which work with CC_NOOVmode.  */
 485     return (code == EQ || code == NE || code == GE || code == LT);
 486   return true;
 487 })
 488
 489 ;; Return true if OP is a 64-bit comparison operator.  This allows the use of
 490 ;; MATCH_OPERATOR to recognize all the branch insns.
 491 (define_predicate "noov_compare64_operator"
 492   (and (match_code "ne,eq,ge,gt,le,lt,geu,gtu,leu,ltu")
 493        (match_test "TARGET_V9"))
 494 {
 495   enum rtx_code code = GET_CODE (op);
 496   if (GET_MODE (XEXP (op, 0)) == CCX_NOOVmode)
 497     /* These are the only branches which work with CCX_NOOVmode.  */
 498     return (code == EQ || code == NE || code == GE || code == LT);
 499   return (GET_MODE (XEXP (op, 0)) == CCXmode);
 500 })
 501
 502 ;; Return true if OP is a comparison operator suitable for use in V9
 503 ;; conditional move or branch on register contents instructions.
 504 (define_predicate "v9_register_compare_operator"
 505   (match_code "eq,ne,ge,lt,le,gt"))
 506
 507 ;; Return true if OP is an operator which can set the condition codes
 508 ;; explicitly.  We do not include PLUS and MINUS because these
 509 ;; require CC_NOOVmode, which we handle explicitly.
 510 (define_predicate "cc_arith_operator"
 511   (match_code "and,ior,xor"))
 512
 513 ;; Return true if OP is an operator which can bitwise complement its
 514 ;; second operand and set the condition codes explicitly.
 515 ;; XOR is not here because combine canonicalizes (xor (not ...) ...)
 516 ;; and (xor ... (not ...)) to (not (xor ...)).  */
 517 (define_predicate "cc_arith_not_operator"
 518   (match_code "and,ior"))