gcc/config/sparc/predicates.md

   1 ;; Predicate definitions for SPARC.
   2 ;; Copyright (C) 2005, 2007 Free Software Foundation, Inc.
   3 ;;
   4 ;; This file is part of GCC.
   5 ;;
   6 ;; GCC is free software; you can redistribute it and/or modify
   7 ;; it under the terms of the GNU General Public License as published by
   8 ;; the Free Software Foundation; either version 3, or (at your option)
   9 ;; any later version.
  10 ;;
  11 ;; GCC is distributed in the hope that it will be useful,
  12 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14 ;; GNU General Public License for more details.
  15 ;;
  16 ;; You should have received a copy of the GNU General Public License
  17 ;; along with GCC; see the file COPYING3.  If not see
  18 ;; <http://www.gnu.org/licenses/>.
  19
  20 ;; Predicates for numerical constants.
  21
  22 ;; Return true if OP is the zero constant for MODE.
  23 (define_predicate "const_zero_operand"
  24   (and (match_code "const_int,const_double,const_vector")
  25        (match_test "op == CONST0_RTX (mode)")))
  26
  27 ;; Return true if OP is the one constant for MODE.
  28 (define_predicate "const_one_operand"
  29   (and (match_code "const_int,const_double,const_vector")
  30        (match_test "op == CONST1_RTX (mode)")))
  31
  32 ;; Return true if OP is the integer constant 4096.
  33 (define_predicate "const_4096_operand"
  34   (and (match_code "const_int")
  35        (match_test "INTVAL (op) == 4096")))
  36
  37 ;; Return true if OP is a constant that is representable by a 13-bit
  38 ;; signed field.  This is an acceptable immediate operand for most
  39 ;; 3-address instructions.
  40 (define_predicate "small_int_operand"
  41   (and (match_code "const_int")
  42        (match_test "SPARC_SIMM13_P (INTVAL (op))")))
  43
  44 ;; Return true if OP is a constant operand for the umul instruction.  That
  45 ;; instruction sign-extends immediate values just like all other SPARC
  46 ;; instructions, but interprets the extended result as an unsigned number.
  47 (define_predicate "uns_small_int_operand"
  48   (match_code "const_int,const_double")
  49 {
  50 #if HOST_BITS_PER_WIDE_INT == 32
  51   return ((GET_CODE (op) == CONST_INT && (unsigned) INTVAL (op) < 0x1000)
  52           || (GET_CODE (op) == CONST_DOUBLE
  53               && CONST_DOUBLE_HIGH (op) == 0
  54               && (unsigned) CONST_DOUBLE_LOW (op) - 0xFFFFF000 < 0x1000));
  55 #else
  56   return (GET_CODE (op) == CONST_INT
  57           && ((INTVAL (op) >= 0 && INTVAL (op) < 0x1000)
  58               || (INTVAL (op) >= 0xFFFFF000
  59                   && INTVAL (op) <= 0xFFFFFFFF)));
  60 #endif
  61 })
  62
  63 ;; Return true if OP is a constant that can be loaded by the sethi instruction.
  64 ;; The first test avoids emitting sethi to load zero for example.
  65 (define_predicate "const_high_operand"
  66   (and (match_code "const_int")
  67        (and (not (match_operand 0 "small_int_operand"))
  68             (match_test "SPARC_SETHI_P (INTVAL (op) & GET_MODE_MASK (mode))"))))
  69
  70 ;; Return true if OP is a constant whose 1's complement can be loaded by the
  71 ;; sethi instruction.
  72 (define_predicate "const_compl_high_operand"
  73   (and (match_code "const_int")
  74        (and (not (match_operand 0 "small_int_operand"))
  75             (match_test "SPARC_SETHI_P (~INTVAL (op) & GET_MODE_MASK (mode))"))))
  76
  77 ;; Return true if OP is a FP constant that needs to be loaded by the sethi/losum
  78 ;; pair of instructions.
  79 (define_predicate "fp_const_high_losum_operand"
  80   (match_operand 0 "const_double_operand")
  81 {
  82   gcc_assert (mode == SFmode);
  83   return fp_high_losum_p (op);
  84 })
  85
  86
  87 ;; Predicates for symbolic constants.
  88
  89 ;; Return true if OP is either a symbol reference or a sum of a symbol
  90 ;; reference and a constant.
  91 (define_predicate "symbolic_operand"
  92   (match_code "symbol_ref,label_ref,const")
  93 {
  94   enum machine_mode omode = GET_MODE (op);
  95
  96   if (omode != mode && omode != VOIDmode && mode != VOIDmode)
  97     return false;
  98
  99   switch (GET_CODE (op))
 100     {
 101     case SYMBOL_REF:
 102       return !SYMBOL_REF_TLS_MODEL (op);
 103
 104     case LABEL_REF:
 105       return true;
 106
 107     case CONST:
 108       op = XEXP (op, 0);
 109       return (((GET_CODE (XEXP (op, 0)) == SYMBOL_REF
 110                 && !SYMBOL_REF_TLS_MODEL (XEXP (op, 0)))
 111                || GET_CODE (XEXP (op, 0)) == LABEL_REF)
 112               && GET_CODE (XEXP (op, 1)) == CONST_INT);
 113
 114     default:
 115       gcc_unreachable ();
 116     }
 117 })
 118
 119 ;; Return true if OP is a symbolic operand for the TLS Global Dynamic model.
 120 (define_predicate "tgd_symbolic_operand"
 121   (and (match_code "symbol_ref")
 122        (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_GLOBAL_DYNAMIC")))
 123
 124 ;; Return true if OP is a symbolic operand for the TLS Local Dynamic model.
 125 (define_predicate "tld_symbolic_operand"
 126   (and (match_code "symbol_ref")
 127        (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_LOCAL_DYNAMIC")))
 128
 129 ;; Return true if OP is a symbolic operand for the TLS Initial Exec model.
 130 (define_predicate "tie_symbolic_operand"
 131   (and (match_code "symbol_ref")
 132        (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_INITIAL_EXEC")))
 133
 134 ;; Return true if OP is a symbolic operand for the TLS Local Exec model.
 135 (define_predicate "tle_symbolic_operand"
 136   (and (match_code "symbol_ref")
 137        (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_LOCAL_EXEC")))
 138
 139 ;; Return true if the operand is an argument used in generating PIC references
 140 ;; in either the medium/low or embedded medium/anywhere code models on V9.
 141 ;; Check for (const (minus (symbol_ref:GOT)
 142 ;;                         (const (minus (label) (pc)))))
 143 (define_predicate "medium_pic_operand"
 144   (match_code "const")
 145 {
 146   /* Check for (const (minus (symbol_ref:GOT)
 147                              (const (minus (label) (pc))))).  */
 148   op = XEXP (op, 0);
 149   return GET_CODE (op) == MINUS
 150          && GET_CODE (XEXP (op, 0)) == SYMBOL_REF
 151          && GET_CODE (XEXP (op, 1)) == CONST
 152          && GET_CODE (XEXP (XEXP (op, 1), 0)) == MINUS;
 153 })
 154
 155 ;; Return true if OP is a LABEL_REF of mode MODE.
 156 (define_predicate "label_ref_operand"
 157   (and (match_code "label_ref")
 158        (match_test "GET_MODE (op) == mode")))
 159
 160 ;; Return true if OP is a data segment reference.  This includes the readonly
 161 ;; data segment or, in other words, anything but the text segment.
 162 ;; This is needed in the embedded medium/anywhere code model on V9.  These
 163 ;; values are accessed with EMBMEDANY_BASE_REG.  */
 164 (define_predicate "data_segment_operand"
 165   (match_code "symbol_ref,plus,const")
 166 {
 167   switch (GET_CODE (op))
 168     {
 169     case SYMBOL_REF :
 170       return ! SYMBOL_REF_FUNCTION_P (op);
 171     case PLUS :
 172       /* Assume canonical format of symbol + constant.
 173          Fall through.  */
 174     case CONST :
 175       return data_segment_operand (XEXP (op, 0), VOIDmode);
 176     default :
 177       gcc_unreachable ();
 178     }
 179 })
 180
 181 ;; Return true if OP is a text segment reference.
 182 ;; This is needed in the embedded medium/anywhere code model on V9.
 183 (define_predicate "text_segment_operand"
 184   (match_code "label_ref,symbol_ref,plus,const")
 185 {
 186   switch (GET_CODE (op))
 187     {
 188     case LABEL_REF :
 189       return true;
 190     case SYMBOL_REF :
 191       return SYMBOL_REF_FUNCTION_P (op);
 192     case PLUS :
 193       /* Assume canonical format of symbol + constant.
 194          Fall through.  */
 195     case CONST :
 196       return text_segment_operand (XEXP (op, 0), VOIDmode);
 197     default :
 198       gcc_unreachable ();
 199     }
 200 })
 201
 202
 203 ;; Predicates for registers.
 204
 205 ;; Return true if OP is either the zero constant or a register.
 206 (define_predicate "register_or_zero_operand"
 207   (ior (match_operand 0 "register_operand")
 208        (match_operand 0 "const_zero_operand")))
 209
 210 ;; Return true if OP is a register operand in a floating point register.
 211 (define_predicate "fp_register_operand"
 212   (match_operand 0 "register_operand")
 213 {
 214   if (GET_CODE (op) == SUBREG)
 215     op = SUBREG_REG (op); /* Possibly a MEM */
 216   return REG_P (op) && SPARC_FP_REG_P (REGNO (op));
 217 })
 218
 219 ;; Return true if OP is an integer register.
 220 (define_special_predicate "int_register_operand"
 221   (ior (match_test "register_operand (op, SImode)")
 222        (match_test "TARGET_ARCH64 && register_operand (op, DImode)")))
 223
 224 ;; Return true if OP is a floating point condition code register.
 225 (define_predicate "fcc_register_operand"
 226   (match_code "reg")
 227 {
 228   if (mode != VOIDmode && mode != GET_MODE (op))
 229     return false;
 230   if (mode == VOIDmode
 231       && (GET_MODE (op) != CCFPmode && GET_MODE (op) != CCFPEmode))
 232     return false;
 233
 234 #if 0 /* ??? 1 when %fcc0-3 are pseudos first.  See gen_compare_reg().  */
 235   if (reg_renumber == 0)
 236     return REGNO (op) >= FIRST_PSEUDO_REGISTER;
 237   return REGNO_OK_FOR_CCFP_P (REGNO (op));
 238 #else
 239   return ((unsigned) REGNO (op) - SPARC_FIRST_V9_FCC_REG) < 4;
 240 #endif
 241 })
 242
 243 ;; Return true if OP is the floating point condition code register fcc0.
 244 (define_predicate "fcc0_register_operand"
 245   (match_code "reg")
 246 {
 247   if (mode != VOIDmode && mode != GET_MODE (op))
 248     return false;
 249   if (mode == VOIDmode
 250       && (GET_MODE (op) != CCFPmode && GET_MODE (op) != CCFPEmode))
 251     return false;
 252
 253   return REGNO (op) == SPARC_FCC_REG;
 254 })
 255
 256 ;; Return true if OP is an integer or floating point condition code register.
 257 (define_predicate "icc_or_fcc_register_operand"
 258   (match_code "reg")
 259 {
 260   if (REGNO (op) == SPARC_ICC_REG)
 261     {
 262       if (mode != VOIDmode && mode != GET_MODE (op))
 263         return false;
 264       if (mode == VOIDmode
 265           && GET_MODE (op) != CCmode && GET_MODE (op) != CCXmode)
 266         return false;
 267
 268       return true;
 269     }
 270
 271   return fcc_register_operand (op, mode);
 272 })
 273
 274
 275 ;; Predicates for arithmetic instructions.
 276
 277 ;; Return true if OP is a register, or is a constant that is representable
 278 ;; by a 13-bit signed field.  This is an acceptable operand for most
 279 ;; 3-address instructions.
 280 (define_predicate "arith_operand"
 281   (ior (match_operand 0 "register_operand")
 282        (match_operand 0 "small_int_operand")))
 283
 284 ;; 64-bit: Same as above.
 285 ;; 32-bit: Return true if OP is a register, or is a constant that is
 286 ;; representable by a couple of 13-bit signed fields.  This is an
 287 ;; acceptable operand for most 3-address splitters.
 288 (define_predicate "arith_double_operand"
 289   (match_code "const_int,const_double,reg,subreg")
 290 {
 291   bool arith_simple_operand = arith_operand (op, mode);
 292   HOST_WIDE_INT m1, m2;
 293
 294   if (TARGET_ARCH64 || arith_simple_operand)
 295     return arith_simple_operand;
 296
 297 #if HOST_BITS_PER_WIDE_INT == 32
 298   if (GET_CODE (op) != CONST_DOUBLE)
 299     return false;
 300   m1 = CONST_DOUBLE_LOW (op);
 301   m2 = CONST_DOUBLE_HIGH (op);
 302 #else
 303   if (GET_CODE (op) != CONST_INT)
 304     return false;
 305   m1 = trunc_int_for_mode (INTVAL (op), SImode);
 306   m2 = trunc_int_for_mode (INTVAL (op) >> 32, SImode);
 307 #endif
 308
 309   return SPARC_SIMM13_P (m1) && SPARC_SIMM13_P (m2);
 310 })
 311
 312 ;; Return true if OP is suitable as second operand for add/sub.
 313 (define_predicate "arith_add_operand"
 314   (ior (match_operand 0 "arith_operand")
 315        (match_operand 0 "const_4096_operand")))
 316
 317 ;; Return true if OP is suitable as second double operand for add/sub.
 318 (define_predicate "arith_double_add_operand"
 319   (match_code "const_int,const_double,reg,subreg")
 320 {
 321   bool _arith_double_operand = arith_double_operand (op, mode);
 322
 323   if (_arith_double_operand)
 324     return true;
 325
 326   return TARGET_ARCH64 && const_4096_operand (op, mode);
 327 })
 328
 329 ;; Return true if OP is a register, or is a CONST_INT that can fit in a
 330 ;; signed 10-bit immediate field.  This is an acceptable SImode operand for
 331 ;; the movrcc instructions.
 332 (define_predicate "arith10_operand"
 333   (ior (match_operand 0 "register_operand")
 334        (and (match_code "const_int")
 335             (match_test "SPARC_SIMM10_P (INTVAL (op))"))))
 336
 337 ;; Return true if OP is a register, or is a CONST_INT that can fit in a
 338 ;; signed 11-bit immediate field.  This is an acceptable SImode operand for
 339 ;; the movcc instructions.
 340 (define_predicate "arith11_operand"
 341   (ior (match_operand 0 "register_operand")
 342        (and (match_code "const_int")
 343             (match_test "SPARC_SIMM11_P (INTVAL (op))"))))
 344
 345 ;; Return true if OP is a register or a constant for the umul instruction.
 346 (define_predicate "uns_arith_operand"
 347   (ior (match_operand 0 "register_operand")
 348        (match_operand 0 "uns_small_int_operand")))
 349
 350
 351 ;; Predicates for miscellaneous instructions.
 352
 353 ;; Return true if OP is valid for the lhs of a comparison insn.
 354 (define_predicate "compare_operand"
 355   (match_code "reg,subreg,zero_extract")
 356 {
 357   if (GET_CODE (op) == ZERO_EXTRACT)
 358     return (register_operand (XEXP (op, 0), mode)
 359             && small_int_operand (XEXP (op, 1), mode)
 360             && small_int_operand (XEXP (op, 2), mode)
 361             /* This matches cmp_zero_extract.  */
 362             && ((mode == SImode
 363                  && INTVAL (XEXP (op, 2)) > 19)
 364                 /* This matches cmp_zero_extract_sp64.  */
 365                 || (TARGET_ARCH64
 366                     && mode == DImode
 367                     && INTVAL (XEXP (op, 2)) > 51)));
 368   else
 369     return register_operand (op, mode);
 370 })
 371
 372 ;; Return true if OP is a valid operand for the source of a move insn.
 373 (define_predicate "input_operand"
 374   (match_code "const_int,const_double,const_vector,reg,subreg,mem")
 375 {
 376   enum mode_class mclass;
 377
 378   /* If both modes are non-void they must be the same.  */
 379   if (mode != VOIDmode && GET_MODE (op) != VOIDmode && mode != GET_MODE (op))
 380     return false;
 381
 382   mclass = GET_MODE_CLASS (mode);
 383
 384   /* Allow any 1-instruction integer constant.  */
 385   if (mclass == MODE_INT
 386       && (small_int_operand (op, mode) || const_high_operand (op, mode)))
 387     return true;
 388
 389   /* If 32-bit mode and this is a DImode constant, allow it
 390      so that the splits can be generated.  */
 391   if (TARGET_ARCH32
 392       && mode == DImode
 393       && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
 394     return true;
 395
 396   if ((mclass == MODE_FLOAT && GET_CODE (op) == CONST_DOUBLE)
 397       || (mclass == MODE_VECTOR_INT && GET_CODE (op) == CONST_VECTOR))
 398     return true;
 399
 400   if (register_operand (op, mode))
 401     return true;
 402
 403   /* If this is a SUBREG, look inside so that we handle paradoxical ones.  */
 404   if (GET_CODE (op) == SUBREG)
 405     op = SUBREG_REG (op);
 406
 407   /* Check for valid MEM forms.  */
 408   if (GET_CODE (op) == MEM)
 409     return memory_address_p (mode, XEXP (op, 0));
 410
 411   return false;
 412 })
 413
 414 ;; Return true if OP is an address suitable for a call insn.
 415 ;; Call insn on SPARC can take a PC-relative constant address
 416 ;; or any regular memory address.
 417 (define_predicate "call_address_operand"
 418   (ior (match_operand 0 "symbolic_operand")
 419        (match_test "memory_address_p (Pmode, op)")))
 420
 421 ;; Return true if OP is an operand suitable for a call insn.
 422 (define_predicate "call_operand"
 423   (and (match_code "mem")
 424        (match_test "call_address_operand (XEXP (op, 0), mode)")))
 425
 426
 427 ;; Predicates for operators.
 428
 429 ;; Return true if OP is a comparison operator.  This allows the use of
 430 ;; MATCH_OPERATOR to recognize all the branch insns.
 431 (define_predicate "noov_compare_operator"
 432   (match_code "ne,eq,ge,gt,le,lt,geu,gtu,leu,ltu")
 433 {
 434   enum rtx_code code = GET_CODE (op);
 435   if (GET_MODE (XEXP (op, 0)) == CC_NOOVmode
 436       || GET_MODE (XEXP (op, 0)) == CCX_NOOVmode)
 437     /* These are the only branches which work with CC_NOOVmode.  */
 438     return (code == EQ || code == NE || code == GE || code == LT);
 439   return true;
 440 })
 441
 442 ;; Return true if OP is a 64-bit comparison operator.  This allows the use of
 443 ;; MATCH_OPERATOR to recognize all the branch insns.
 444 (define_predicate "noov_compare64_operator"
 445   (and (match_code "ne,eq,ge,gt,le,lt,geu,gtu,leu,ltu")
 446        (match_test "TARGET_V9"))
 447 {
 448   enum rtx_code code = GET_CODE (op);
 449   if (GET_MODE (XEXP (op, 0)) == CCX_NOOVmode)
 450     /* These are the only branches which work with CCX_NOOVmode.  */
 451     return (code == EQ || code == NE || code == GE || code == LT);
 452   return (GET_MODE (XEXP (op, 0)) == CCXmode);
 453 })
 454
 455 ;; Return true if OP is a comparison operator suitable for use in V9
 456 ;; conditional move or branch on register contents instructions.
 457 (define_predicate "v9_register_compare_operator"
 458   (match_code "eq,ne,ge,lt,le,gt"))
 459
 460 ;; Return true if OP is an operator which can set the condition codes
 461 ;; explicitly.  We do not include PLUS and MINUS because these
 462 ;; require CC_NOOVmode, which we handle explicitly.
 463 (define_predicate "cc_arith_operator"
 464   (match_code "and,ior,xor"))
 465
 466 ;; Return true if OP is an operator which can bitwise complement its
 467 ;; second operand and set the condition codes explicitly.
 468 ;; XOR is not here because combine canonicalizes (xor (not ...) ...)
 469 ;; and (xor ... (not ...)) to (not (xor ...)).  */
 470 (define_predicate "cc_arith_not_operator"
 471   (match_code "and,ior"))
 472
 473 ;; Return true if OP is memory operand with just [%reg] addressing mode.
 474 (define_predicate "memory_reg_operand"
 475   (and (match_code "mem")
 476        (and (match_operand 0 "memory_operand")
 477             (match_test "REG_P (XEXP (op, 0))"))))