gcc/config/sparc/sparc.opt

   1 ; Options for the SPARC port of the compiler
   2 ;
   3 ; Copyright (C) 2005, 2007, 2010, 2011 Free Software Foundation, Inc.
   4 ;
   5 ; This file is part of GCC.
   6 ;
   7 ; GCC is free software; you can redistribute it and/or modify it under
   8 ; the terms of the GNU General Public License as published by the Free
   9 ; Software Foundation; either version 3, or (at your option) any later
  10 ; version.
  11 ;
  12 ; GCC is distributed in the hope that it will be useful, but WITHOUT
  13 ; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  14 ; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  15 ; License for more details.
  16 ;
  17 ; You should have received a copy of the GNU General Public License
  18 ; along with GCC; see the file COPYING3.  If not see
  19 ; <http://www.gnu.org/licenses/>.
  20
  21 HeaderInclude
  22 config/sparc/sparc-opts.h
  23
  24 mfpu
  25 Target Report Mask(FPU)
  26 Use hardware FP
  27
  28 mhard-float
  29 Target RejectNegative Mask(FPU) MaskExists
  30 Use hardware FP
  31
  32 msoft-float
  33 Target RejectNegative InverseMask(FPU)
  34 Do not use hardware FP
  35
  36 mflat
  37 Target Report Mask(FLAT)
  38 Use flat register window model
  39
  40 munaligned-doubles
  41 Target Report Mask(UNALIGNED_DOUBLES)
  42 Assume possible double misalignment
  43
  44 mapp-regs
  45 Target Report Mask(APP_REGS)
  46 Use ABI reserved registers
  47
  48 mhard-quad-float
  49 Target Report RejectNegative Mask(HARD_QUAD)
  50 Use hardware quad FP instructions
  51
  52 msoft-quad-float
  53 Target Report RejectNegative InverseMask(HARD_QUAD)
  54 Do not use hardware quad fp instructions
  55
  56 mv8plus
  57 Target Report Mask(V8PLUS)
  58 Compile for V8+ ABI
  59
  60 mvis
  61 Target Report Mask(VIS)
  62 Use UltraSPARC Visual Instruction Set version 1.0 extensions
  63
  64 mvis2
  65 Target Report Mask(VIS2)
  66 Use UltraSPARC Visual Instruction Set version 2.0 extensions
  67
  68 mvis3
  69 Target Report Mask(VIS3)
  70 Use UltraSPARC Visual Instruction Set version 3.0 extensions
  71
  72 mfmaf
  73 Target Report Mask(FMAF)
  74 Use UltraSPARC Fused Multiply-Add extensions
  75
  76 mpopc
  77 Target Report Mask(POPC)
  78 Use UltraSPARC Population-Count instruction
  79
  80 mptr64
  81 Target Report RejectNegative Mask(PTR64)
  82 Pointers are 64-bit
  83
  84 mptr32
  85 Target Report RejectNegative InverseMask(PTR64)
  86 Pointers are 32-bit
  87
  88 m64
  89 Target Report RejectNegative Mask(64BIT)
  90 Use 64-bit ABI
  91
  92 m32
  93 Target Report RejectNegative InverseMask(64BIT)
  94 Use 32-bit ABI
  95
  96 mstack-bias
  97 Target Report Mask(STACK_BIAS)
  98 Use stack bias
  99
 100 mfaster-structs
 101 Target Report Mask(FASTER_STRUCTS)
 102 Use structs on stronger alignment for double-word copies
 103
 104 mrelax
 105 Target
 106 Optimize tail call instructions in assembler and linker
 107
 108 mcpu=
 109 Target RejectNegative Joined Var(sparc_cpu_and_features) Enum(sparc_processor_type) Init(PROCESSOR_V7)
 110 Use features of and schedule code for given CPU
 111
 112 mtune=
 113 Target RejectNegative Joined Var(sparc_cpu) Enum(sparc_processor_type) Init(PROCESSOR_V7)
 114 Schedule code for given CPU
 115
 116 Enum
 117 Name(sparc_processor_type) Type(enum processor_type)
 118
 119 EnumValue
 120 Enum(sparc_processor_type) String(native) Value(PROCESSOR_NATIVE) DriverOnly
 121
 122 EnumValue
 123 Enum(sparc_processor_type) String(v7) Value(PROCESSOR_V7)
 124
 125 EnumValue
 126 Enum(sparc_processor_type) String(cypress) Value(PROCESSOR_CYPRESS)
 127
 128 EnumValue
 129 Enum(sparc_processor_type) String(v8) Value(PROCESSOR_V8)
 130
 131 EnumValue
 132 Enum(sparc_processor_type) String(supersparc) Value(PROCESSOR_SUPERSPARC)
 133
 134 EnumValue
 135 Enum(sparc_processor_type) String(hypersparc) Value(PROCESSOR_HYPERSPARC)
 136
 137 EnumValue
 138 Enum(sparc_processor_type) String(leon) Value(PROCESSOR_LEON)
 139
 140 EnumValue
 141 Enum(sparc_processor_type) String(sparclite) Value(PROCESSOR_SPARCLITE)
 142
 143 EnumValue
 144 Enum(sparc_processor_type) String(f930) Value(PROCESSOR_F930)
 145
 146 EnumValue
 147 Enum(sparc_processor_type) String(f934) Value(PROCESSOR_F934)
 148
 149 EnumValue
 150 Enum(sparc_processor_type) String(sparclite86x) Value(PROCESSOR_SPARCLITE86X)
 151
 152 EnumValue
 153 Enum(sparc_processor_type) String(sparclet) Value(PROCESSOR_SPARCLET)
 154
 155 EnumValue
 156 Enum(sparc_processor_type) String(tsc701) Value(PROCESSOR_TSC701)
 157
 158 EnumValue
 159 Enum(sparc_processor_type) String(v9) Value(PROCESSOR_V9)
 160
 161 EnumValue
 162 Enum(sparc_processor_type) String(ultrasparc) Value(PROCESSOR_ULTRASPARC)
 163
 164 EnumValue
 165 Enum(sparc_processor_type) String(ultrasparc3) Value(PROCESSOR_ULTRASPARC3)
 166
 167 EnumValue
 168 Enum(sparc_processor_type) String(niagara) Value(PROCESSOR_NIAGARA)
 169
 170 EnumValue
 171 Enum(sparc_processor_type) String(niagara2) Value(PROCESSOR_NIAGARA2)
 172
 173 EnumValue
 174 Enum(sparc_processor_type) String(niagara3) Value(PROCESSOR_NIAGARA3)
 175
 176 EnumValue
 177 Enum(sparc_processor_type) String(niagara4) Value(PROCESSOR_NIAGARA4)
 178
 179 mcmodel=
 180 Target RejectNegative Joined Var(sparc_cmodel_string)
 181 Use given SPARC-V9 code model
 182
 183 mstd-struct-return
 184 Target Report RejectNegative Var(sparc_std_struct_return)
 185 Enable strict 32-bit psABI struct return checking.
 186
 187 mfix-at697f
 188 Target Report RejectNegative Var(sparc_fix_at697f)
 189 Enable workaround for single erratum of AT697F processor
 190 (corresponding to erratum #13 of AT697E processor)
 191
 192 Mask(LITTLE_ENDIAN)
 193 ;; Generate code for little-endian
 194
 195 Mask(LONG_DOUBLE_128)
 196 ;; Use 128-bit long double
 197
 198 Mask(SPARCLITE)
 199 ;; Generate code for SPARClite
 200
 201 Mask(SPARCLET)
 202 ;; Generate code for SPARClet
 203
 204 Mask(V8)
 205 ;; Generate code for SPARC-V8
 206
 207 Mask(V9)
 208 ;; Generate code for SPARC-V9
 209
 210 Mask(DEPRECATED_V8_INSNS)
 211 ;; Generate code that uses the V8 instructions deprecated
 212 ;; in the V9 architecture.