gcc/config/sparc/sparc.opt

   1 ; Options for the SPARC port of the compiler
   2 ;
   3 ; Copyright (C) 2005-2013 Free Software Foundation, Inc.
   4 ;
   5 ; This file is part of GCC.
   6 ;
   7 ; GCC is free software; you can redistribute it and/or modify it under
   8 ; the terms of the GNU General Public License as published by the Free
   9 ; Software Foundation; either version 3, or (at your option) any later
  10 ; version.
  11 ;
  12 ; GCC is distributed in the hope that it will be useful, but WITHOUT
  13 ; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  14 ; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  15 ; License for more details.
  16 ;
  17 ; You should have received a copy of the GNU General Public License
  18 ; along with GCC; see the file COPYING3.  If not see
  19 ; <http://www.gnu.org/licenses/>.
  20
  21 HeaderInclude
  22 config/sparc/sparc-opts.h
  23
  24 ;; Debug flags
  25 TargetVariable
  26 unsigned int sparc_debug
  27
  28 mfpu
  29 Target Report Mask(FPU)
  30 Use hardware FP
  31
  32 mhard-float
  33 Target RejectNegative Mask(FPU)
  34 Use hardware FP
  35
  36 msoft-float
  37 Target RejectNegative InverseMask(FPU)
  38 Do not use hardware FP
  39
  40 mflat
  41 Target Report Mask(FLAT)
  42 Use flat register window model
  43
  44 munaligned-doubles
  45 Target Report Mask(UNALIGNED_DOUBLES)
  46 Assume possible double misalignment
  47
  48 mapp-regs
  49 Target Report Mask(APP_REGS)
  50 Use ABI reserved registers
  51
  52 mhard-quad-float
  53 Target Report RejectNegative Mask(HARD_QUAD)
  54 Use hardware quad FP instructions
  55
  56 msoft-quad-float
  57 Target Report RejectNegative InverseMask(HARD_QUAD)
  58 Do not use hardware quad fp instructions
  59
  60 mv8plus
  61 Target Report Mask(V8PLUS)
  62 Compile for V8+ ABI
  63
  64 mvis
  65 Target Report Mask(VIS)
  66 Use UltraSPARC Visual Instruction Set version 1.0 extensions
  67
  68 mvis2
  69 Target Report Mask(VIS2)
  70 Use UltraSPARC Visual Instruction Set version 2.0 extensions
  71
  72 mvis3
  73 Target Report Mask(VIS3)
  74 Use UltraSPARC Visual Instruction Set version 3.0 extensions
  75
  76 mcbcond
  77 Target Report Mask(CBCOND)
  78 Use UltraSPARC Compare-and-Branch extensions
  79
  80 mfmaf
  81 Target Report Mask(FMAF)
  82 Use UltraSPARC Fused Multiply-Add extensions
  83
  84 mpopc
  85 Target Report Mask(POPC)
  86 Use UltraSPARC Population-Count instruction
  87
  88 mptr64
  89 Target Report RejectNegative Mask(PTR64)
  90 Pointers are 64-bit
  91
  92 mptr32
  93 Target Report RejectNegative InverseMask(PTR64)
  94 Pointers are 32-bit
  95
  96 m64
  97 Target Report RejectNegative Mask(64BIT)
  98 Use 64-bit ABI
  99
 100 m32
 101 Target Report RejectNegative InverseMask(64BIT)
 102 Use 32-bit ABI
 103
 104 mstack-bias
 105 Target Report Mask(STACK_BIAS)
 106 Use stack bias
 107
 108 mfaster-structs
 109 Target Report Mask(FASTER_STRUCTS)
 110 Use structs on stronger alignment for double-word copies
 111
 112 mrelax
 113 Target
 114 Optimize tail call instructions in assembler and linker
 115
 116 mcpu=
 117 Target RejectNegative Joined Var(sparc_cpu_and_features) Enum(sparc_processor_type) Init(PROCESSOR_V7)
 118 Use features of and schedule code for given CPU
 119
 120 mtune=
 121 Target RejectNegative Joined Var(sparc_cpu) Enum(sparc_processor_type) Init(PROCESSOR_V7)
 122 Schedule code for given CPU
 123
 124 Enum
 125 Name(sparc_processor_type) Type(enum processor_type)
 126
 127 EnumValue
 128 Enum(sparc_processor_type) String(native) Value(PROCESSOR_NATIVE) DriverOnly
 129
 130 EnumValue
 131 Enum(sparc_processor_type) String(v7) Value(PROCESSOR_V7)
 132
 133 EnumValue
 134 Enum(sparc_processor_type) String(cypress) Value(PROCESSOR_CYPRESS)
 135
 136 EnumValue
 137 Enum(sparc_processor_type) String(v8) Value(PROCESSOR_V8)
 138
 139 EnumValue
 140 Enum(sparc_processor_type) String(supersparc) Value(PROCESSOR_SUPERSPARC)
 141
 142 EnumValue
 143 Enum(sparc_processor_type) String(hypersparc) Value(PROCESSOR_HYPERSPARC)
 144
 145 EnumValue
 146 Enum(sparc_processor_type) String(leon) Value(PROCESSOR_LEON)
 147
 148 EnumValue
 149 Enum(sparc_processor_type) String(sparclite) Value(PROCESSOR_SPARCLITE)
 150
 151 EnumValue
 152 Enum(sparc_processor_type) String(f930) Value(PROCESSOR_F930)
 153
 154 EnumValue
 155 Enum(sparc_processor_type) String(f934) Value(PROCESSOR_F934)
 156
 157 EnumValue
 158 Enum(sparc_processor_type) String(sparclite86x) Value(PROCESSOR_SPARCLITE86X)
 159
 160 EnumValue
 161 Enum(sparc_processor_type) String(sparclet) Value(PROCESSOR_SPARCLET)
 162
 163 EnumValue
 164 Enum(sparc_processor_type) String(tsc701) Value(PROCESSOR_TSC701)
 165
 166 EnumValue
 167 Enum(sparc_processor_type) String(v9) Value(PROCESSOR_V9)
 168
 169 EnumValue
 170 Enum(sparc_processor_type) String(ultrasparc) Value(PROCESSOR_ULTRASPARC)
 171
 172 EnumValue
 173 Enum(sparc_processor_type) String(ultrasparc3) Value(PROCESSOR_ULTRASPARC3)
 174
 175 EnumValue
 176 Enum(sparc_processor_type) String(niagara) Value(PROCESSOR_NIAGARA)
 177
 178 EnumValue
 179 Enum(sparc_processor_type) String(niagara2) Value(PROCESSOR_NIAGARA2)
 180
 181 EnumValue
 182 Enum(sparc_processor_type) String(niagara3) Value(PROCESSOR_NIAGARA3)
 183
 184 EnumValue
 185 Enum(sparc_processor_type) String(niagara4) Value(PROCESSOR_NIAGARA4)
 186
 187 mcmodel=
 188 Target RejectNegative Joined Var(sparc_cmodel_string)
 189 Use given SPARC-V9 code model
 190
 191 mdebug=
 192 Target RejectNegative Joined Var(sparc_debug_string)
 193 Enable debug output
 194
 195 mstd-struct-return
 196 Target Report RejectNegative Var(sparc_std_struct_return)
 197 Enable strict 32-bit psABI struct return checking.
 198
 199 mfix-at697f
 200 Target Report RejectNegative Var(sparc_fix_at697f)
 201 Enable workaround for single erratum of AT697F processor
 202 (corresponding to erratum #13 of AT697E processor)
 203
 204 Mask(LONG_DOUBLE_128)
 205 ;; Use 128-bit long double
 206
 207 Mask(SPARCLITE)
 208 ;; Generate code for SPARClite
 209
 210 Mask(SPARCLET)
 211 ;; Generate code for SPARClet
 212
 213 Mask(V8)
 214 ;; Generate code for SPARC-V8
 215
 216 Mask(V9)
 217 ;; Generate code for SPARC-V9
 218
 219 Mask(DEPRECATED_V8_INSNS)
 220 ;; Generate code that uses the V8 instructions deprecated
 221 ;; in the V9 architecture.
 222
 223 mmemory-model=
 224 Target RejectNegative Joined Var(sparc_memory_model) Enum(sparc_memory_model) Init(SMM_DEFAULT)
 225 Specify the memory model in effect for the program.
 226
 227 Enum
 228 Name(sparc_memory_model) Type(enum sparc_memory_model_type)
 229
 230 EnumValue
 231 Enum(sparc_memory_model) String(default) Value(SMM_DEFAULT)
 232
 233 EnumValue
 234 Enum(sparc_memory_model) String(rmo) Value(SMM_RMO)
 235
 236 EnumValue
 237 Enum(sparc_memory_model) String(pso) Value(SMM_PSO)
 238
 239 EnumValue
 240 Enum(sparc_memory_model) String(tso) Value(SMM_TSO)
 241
 242 EnumValue
 243 Enum(sparc_memory_model) String(sc) Value(SMM_SC)