gcc/config/sparc/sparc.opt

   1 ; Options for the SPARC port of the compiler
   2 ;
   3 ; Copyright (C) 2005-2014 Free Software Foundation, Inc.
   4 ;
   5 ; This file is part of GCC.
   6 ;
   7 ; GCC is free software; you can redistribute it and/or modify it under
   8 ; the terms of the GNU General Public License as published by the Free
   9 ; Software Foundation; either version 3, or (at your option) any later
  10 ; version.
  11 ;
  12 ; GCC is distributed in the hope that it will be useful, but WITHOUT
  13 ; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  14 ; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  15 ; License for more details.
  16 ;
  17 ; You should have received a copy of the GNU General Public License
  18 ; along with GCC; see the file COPYING3.  If not see
  19 ; <http://www.gnu.org/licenses/>.
  20
  21 HeaderInclude
  22 config/sparc/sparc-opts.h
  23
  24 ;; Debug flags
  25 TargetVariable
  26 unsigned int sparc_debug
  27
  28 mfpu
  29 Target Report Mask(FPU)
  30 Use hardware FP
  31
  32 mhard-float
  33 Target RejectNegative Mask(FPU)
  34 Use hardware FP
  35
  36 msoft-float
  37 Target RejectNegative InverseMask(FPU)
  38 Do not use hardware FP
  39
  40 mflat
  41 Target Report Mask(FLAT)
  42 Use flat register window model
  43
  44 munaligned-doubles
  45 Target Report Mask(UNALIGNED_DOUBLES)
  46 Assume possible double misalignment
  47
  48 mapp-regs
  49 Target Report Mask(APP_REGS)
  50 Use ABI reserved registers
  51
  52 mhard-quad-float
  53 Target Report RejectNegative Mask(HARD_QUAD)
  54 Use hardware quad FP instructions
  55
  56 msoft-quad-float
  57 Target Report RejectNegative InverseMask(HARD_QUAD)
  58 Do not use hardware quad fp instructions
  59
  60 mv8plus
  61 Target Report Mask(V8PLUS)
  62 Compile for V8+ ABI
  63
  64 mvis
  65 Target Report Mask(VIS)
  66 Use UltraSPARC Visual Instruction Set version 1.0 extensions
  67
  68 mvis2
  69 Target Report Mask(VIS2)
  70 Use UltraSPARC Visual Instruction Set version 2.0 extensions
  71
  72 mvis3
  73 Target Report Mask(VIS3)
  74 Use UltraSPARC Visual Instruction Set version 3.0 extensions
  75
  76 mcbcond
  77 Target Report Mask(CBCOND)
  78 Use UltraSPARC Compare-and-Branch extensions
  79
  80 mfmaf
  81 Target Report Mask(FMAF)
  82 Use UltraSPARC Fused Multiply-Add extensions
  83
  84 mpopc
  85 Target Report Mask(POPC)
  86 Use UltraSPARC Population-Count instruction
  87
  88 mptr64
  89 Target Report RejectNegative Mask(PTR64)
  90 Pointers are 64-bit
  91
  92 mptr32
  93 Target Report RejectNegative InverseMask(PTR64)
  94 Pointers are 32-bit
  95
  96 m64
  97 Target Report RejectNegative Mask(64BIT)
  98 Use 64-bit ABI
  99
 100 m32
 101 Target Report RejectNegative InverseMask(64BIT)
 102 Use 32-bit ABI
 103
 104 mstack-bias
 105 Target Report Mask(STACK_BIAS)
 106 Use stack bias
 107
 108 mfaster-structs
 109 Target Report Mask(FASTER_STRUCTS)
 110 Use structs on stronger alignment for double-word copies
 111
 112 mrelax
 113 Target
 114 Optimize tail call instructions in assembler and linker
 115
 116 muser-mode
 117 Target Report Mask(USER_MODE)
 118 Do not generate code that can only run in supervisor mode
 119
 120 mcpu=
 121 Target RejectNegative Joined Var(sparc_cpu_and_features) Enum(sparc_processor_type) Init(PROCESSOR_V7)
 122 Use features of and schedule code for given CPU
 123
 124 mtune=
 125 Target RejectNegative Joined Var(sparc_cpu) Enum(sparc_processor_type) Init(PROCESSOR_V7)
 126 Schedule code for given CPU
 127
 128 Enum
 129 Name(sparc_processor_type) Type(enum processor_type)
 130
 131 EnumValue
 132 Enum(sparc_processor_type) String(native) Value(PROCESSOR_NATIVE) DriverOnly
 133
 134 EnumValue
 135 Enum(sparc_processor_type) String(v7) Value(PROCESSOR_V7)
 136
 137 EnumValue
 138 Enum(sparc_processor_type) String(cypress) Value(PROCESSOR_CYPRESS)
 139
 140 EnumValue
 141 Enum(sparc_processor_type) String(v8) Value(PROCESSOR_V8)
 142
 143 EnumValue
 144 Enum(sparc_processor_type) String(supersparc) Value(PROCESSOR_SUPERSPARC)
 145
 146 EnumValue
 147 Enum(sparc_processor_type) String(hypersparc) Value(PROCESSOR_HYPERSPARC)
 148
 149 EnumValue
 150 Enum(sparc_processor_type) String(leon) Value(PROCESSOR_LEON)
 151
 152 EnumValue
 153 Enum(sparc_processor_type) String(leon3) Value(PROCESSOR_LEON3)
 154
 155 EnumValue
 156 Enum(sparc_processor_type) String(leon3v7) Value(PROCESSOR_LEON3V7)
 157
 158 EnumValue
 159 Enum(sparc_processor_type) String(sparclite) Value(PROCESSOR_SPARCLITE)
 160
 161 EnumValue
 162 Enum(sparc_processor_type) String(f930) Value(PROCESSOR_F930)
 163
 164 EnumValue
 165 Enum(sparc_processor_type) String(f934) Value(PROCESSOR_F934)
 166
 167 EnumValue
 168 Enum(sparc_processor_type) String(sparclite86x) Value(PROCESSOR_SPARCLITE86X)
 169
 170 EnumValue
 171 Enum(sparc_processor_type) String(sparclet) Value(PROCESSOR_SPARCLET)
 172
 173 EnumValue
 174 Enum(sparc_processor_type) String(tsc701) Value(PROCESSOR_TSC701)
 175
 176 EnumValue
 177 Enum(sparc_processor_type) String(v9) Value(PROCESSOR_V9)
 178
 179 EnumValue
 180 Enum(sparc_processor_type) String(ultrasparc) Value(PROCESSOR_ULTRASPARC)
 181
 182 EnumValue
 183 Enum(sparc_processor_type) String(ultrasparc3) Value(PROCESSOR_ULTRASPARC3)
 184
 185 EnumValue
 186 Enum(sparc_processor_type) String(niagara) Value(PROCESSOR_NIAGARA)
 187
 188 EnumValue
 189 Enum(sparc_processor_type) String(niagara2) Value(PROCESSOR_NIAGARA2)
 190
 191 EnumValue
 192 Enum(sparc_processor_type) String(niagara3) Value(PROCESSOR_NIAGARA3)
 193
 194 EnumValue
 195 Enum(sparc_processor_type) String(niagara4) Value(PROCESSOR_NIAGARA4)
 196
 197 mcmodel=
 198 Target RejectNegative Joined Var(sparc_cmodel_string)
 199 Use given SPARC-V9 code model
 200
 201 mdebug=
 202 Target RejectNegative Joined Var(sparc_debug_string)
 203 Enable debug output
 204
 205 mstd-struct-return
 206 Target Report RejectNegative Var(sparc_std_struct_return)
 207 Enable strict 32-bit psABI struct return checking.
 208
 209 mfix-at697f
 210 Target Report RejectNegative Var(sparc_fix_at697f)
 211 Enable workaround for single erratum of AT697F processor
 212 (corresponding to erratum #13 of AT697E processor)
 213
 214 mfix-ut699
 215 Target Report RejectNegative Var(sparc_fix_ut699)
 216 Enable workarounds for the errata of the UT699 processor
 217
 218 Mask(LONG_DOUBLE_128)
 219 ;; Use 128-bit long double
 220
 221 Mask(LEON)
 222 ;; Generate code for LEON
 223
 224 Mask(LEON3)
 225 ;; Generate code for LEON3
 226
 227 Mask(SPARCLITE)
 228 ;; Generate code for SPARClite
 229
 230 Mask(SPARCLET)
 231 ;; Generate code for SPARClet
 232
 233 Mask(V8)
 234 ;; Generate code for SPARC-V8
 235
 236 Mask(V9)
 237 ;; Generate code for SPARC-V9
 238
 239 Mask(DEPRECATED_V8_INSNS)
 240 ;; Generate code that uses the V8 instructions deprecated
 241 ;; in the V9 architecture.
 242
 243 mmemory-model=
 244 Target RejectNegative Joined Var(sparc_memory_model) Enum(sparc_memory_model) Init(SMM_DEFAULT)
 245 Specify the memory model in effect for the program.
 246
 247 Enum
 248 Name(sparc_memory_model) Type(enum sparc_memory_model_type)
 249
 250 EnumValue
 251 Enum(sparc_memory_model) String(default) Value(SMM_DEFAULT)
 252
 253 EnumValue
 254 Enum(sparc_memory_model) String(rmo) Value(SMM_RMO)
 255
 256 EnumValue
 257 Enum(sparc_memory_model) String(pso) Value(SMM_PSO)
 258
 259 EnumValue
 260 Enum(sparc_memory_model) String(tso) Value(SMM_TSO)
 261
 262 EnumValue
 263 Enum(sparc_memory_model) String(sc) Value(SMM_SC)