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1 ;; GCC machine description for NEC V850
2 ;; Copyright (C) 1996, 1997 Free Software Foundation, Inc.
3
4 ;; Contributed by Jeff Law (law@cygnus.com).
5
6 ;; This file is part of GNU CC.
7
8 ;; GNU CC is free software; you can redistribute it and/or modify
9 ;; it under the terms of the GNU General Public License as published by
10 ;; the Free Software Foundation; either version 2, or (at your option)
11 ;; any later version.
12
13 ;; GNU CC is distributed in the hope that it will be useful,
14 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
15 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 ;; GNU General Public License for more details.
17
18 ;; You should have received a copy of the GNU General Public License
19 ;; along with GNU CC; see the file COPYING. If not, write to
20 ;; the Free Software Foundation, 59 Temple Place - Suite 330,
21 ;; Boston, MA 02111-1307, USA.
22
23 ;; The original PO technology requires these to be ordered by speed,
24 ;; so that assigner will pick the fastest.
25
26 ;; See file "rtl.def" for documentation on define_insn, match_*, et. al.
27
28 ;; The V851 manual states that the instruction address space is 16M;
29 ;; the various branch/call instructions only have a 22bit offset (4M range).
30 ;;
31 ;; One day we'll probably need to handle calls to targets more than 4M
32 ;; away.
33
34 ;; The size of instructions in bytes.
35
36 (define_attr "length" ""
37 (const_int 200))
38
39 ;; Types of instructions (for scheduling purposes).
40
41 (define_attr "type" "load,mult,other"
42 (const_string "other"))
43
44 ;; Condition code settings.
45 ;; none - insn does not affect cc
46 ;; none_0hit - insn does not affect cc but it does modify operand 0
47 ;; This attribute is used to keep track of when operand 0 changes.
48 ;; See the description of NOTICE_UPDATE_CC for more info.
49 ;; set_znv - sets z,n,v to useable values; c is unknown.
50 ;; set_zn - sets z,n to usable values; v,c is unknown.
51 ;; compare - compare instruction
52 ;; clobber - value of cc is unknown
53 (define_attr "cc" "none,none_0hit,set_zn,set_znv,compare,clobber"
54 (const_string "clobber"))
55 \f
56 ;; Function units for the V850. As best as I can tell, there's
57 ;; a traditional memory load/use stall as well as a stall if
58 ;; the result of a multiply is used too early.
59 ;;
60 (define_function_unit "memory" 1 0 (eq_attr "type" "load") 2 0)
61 (define_function_unit "mult" 1 0 (eq_attr "type" "mult") 2 0)
62
63 \f
64 ;; ----------------------------------------------------------------------
65 ;; MOVE INSTRUCTIONS
66 ;; ----------------------------------------------------------------------
67
68 ;; movqi
69
70 (define_expand "movqi"
71 [(set (match_operand:QI 0 "general_operand" "")
72 (match_operand:QI 1 "general_operand" ""))]
73 ""
74 "
75 {
76 /* One of the ops has to be in a register or 0 */
77 if (!register_operand (operand0, QImode)
78 && !reg_or_0_operand (operand1, QImode))
79 operands[1] = copy_to_mode_reg (QImode, operand1);
80 }")
81
82 (define_insn "*movqi_internal"
83 [(set (match_operand:QI 0 "general_operand" "=r,r,r,Q,r,m,m")
84 (match_operand:QI 1 "general_operand" "Jr,n,Q,Ir,m,r,I"))]
85 "register_operand (operands[0], QImode)
86 || reg_or_0_operand (operands[1], QImode)"
87 "* return output_move_single (operands);"
88 [(set_attr "length" "2,4,2,2,4,4,4")
89 (set_attr "cc" "none_0hit,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit")
90 (set_attr "type" "other,other,load,other,load,other,other")])
91
92 ;; movhi
93
94 (define_expand "movhi"
95 [(set (match_operand:HI 0 "general_operand" "")
96 (match_operand:HI 1 "general_operand" ""))]
97 ""
98 "
99 {
100 /* One of the ops has to be in a register or 0 */
101 if (!register_operand (operand0, HImode)
102 && !reg_or_0_operand (operand1, HImode))
103 operands[1] = copy_to_mode_reg (HImode, operand1);
104 }")
105
106 (define_insn "*movhi_internal"
107 [(set (match_operand:HI 0 "general_operand" "=r,r,r,Q,r,m,m")
108 (match_operand:HI 1 "general_operand" "Jr,n,Q,Ir,m,r,I"))]
109 "register_operand (operands[0], HImode)
110 || reg_or_0_operand (operands[1], HImode)"
111 "* return output_move_single (operands);"
112 [(set_attr "length" "2,4,2,2,4,4,4")
113 (set_attr "cc" "none_0hit,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit")
114 (set_attr "type" "other,other,load,other,load,other,other")])
115
116 ;; movsi and helpers
117
118 (define_insn "*movsi_high"
119 [(set (match_operand:SI 0 "register_operand" "=r")
120 (high:SI (match_operand 1 "" "")))]
121 ""
122 "movhi hi(%1),%.,%0"
123 [(set_attr "length" "4")
124 (set_attr "cc" "none_0hit")
125 (set_attr "type" "other")])
126
127 (define_insn "*movsi_lo"
128 [(set (match_operand:SI 0 "register_operand" "=r")
129 (lo_sum:SI (match_operand:SI 1 "register_operand" "r")
130 (match_operand:SI 2 "immediate_operand" "i")))]
131 ""
132 "movea lo(%2),%1,%0"
133 [(set_attr "length" "4")
134 (set_attr "cc" "none_0hit")
135 (set_attr "type" "other")])
136
137 (define_expand "movsi"
138 [(set (match_operand:SI 0 "general_operand" "")
139 (match_operand:SI 1 "general_operand" ""))]
140 ""
141 "
142 {
143 /* One of the ops has to be in a register or 0 */
144 if (!register_operand (operand0, SImode)
145 && !reg_or_0_operand (operand1, SImode))
146 operands[1] = copy_to_mode_reg (SImode, operand1);
147
148 /* Some constants, as well as symbolic operands
149 must be done with HIGH & LO_SUM patterns. */
150 if (CONSTANT_P (operands[1])
151 && GET_CODE (operands[1]) != HIGH
152 && !special_symbolref_operand (operands[1], VOIDmode)
153 && !(GET_CODE (operands[1]) == CONST_INT
154 && (CONST_OK_FOR_J (INTVAL (operands[1]))
155 || CONST_OK_FOR_K (INTVAL (operands[1]))
156 || CONST_OK_FOR_L (INTVAL (operands[1])))))
157 {
158 rtx high;
159 rtx temp;
160
161 if (reload_in_progress || reload_completed)
162 temp = operands[0];
163 else
164 temp = gen_reg_rtx (SImode);
165
166 emit_insn (gen_rtx (SET, SImode, temp,
167 gen_rtx (HIGH, SImode, operand1)));
168 emit_insn (gen_rtx (SET, SImode, operand0,
169 gen_rtx (LO_SUM, SImode, temp, operand1)));
170 DONE;
171 }
172 }")
173
174 (define_insn "*movsi_internal"
175 [(set (match_operand:SI 0 "general_operand" "=r,r,r,r,Q,r,r,m,m")
176 (match_operand:SI 1 "movsi_source_operand" "Jr,K,L,Q,Ir,m,R,r,I"))]
177 "register_operand (operands[0], SImode)
178 || reg_or_0_operand (operands[1], SImode)"
179 "* return output_move_single (operands);"
180 [(set_attr "length" "2,4,4,2,2,4,4,4,4")
181 (set_attr "cc" "none_0hit,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit")
182 (set_attr "type" "other,other,other,load,other,load,other,other,other")])
183
184 (define_expand "movdi"
185 [(set (match_operand:DI 0 "general_operand" "")
186 (match_operand:DI 1 "general_operand" ""))]
187 ""
188 "
189 {
190 /* One of the ops has to be in a register or 0 */
191 if (!register_operand (operand0, DImode)
192 && !reg_or_0_operand (operand1, DImode))
193 operands[1] = copy_to_mode_reg (DImode, operand1);
194 }")
195
196 (define_insn "*movdi_internal"
197 [(set (match_operand:DI 0 "general_operand" "=r,r,r,r,r,m,m,r")
198 (match_operand:DI 1 "general_operand" "Jr,K,L,i,m,r,IG,iF"))]
199 "register_operand (operands[0], DImode)
200 || reg_or_0_operand (operands[1], DImode)"
201 "* return output_move_double (operands);"
202 [(set_attr "length" "4,8,8,16,8,8,8,16")
203 (set_attr "cc" "none_0hit,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit")
204 (set_attr "type" "other,other,other,other,load,other,other,other")])
205
206 (define_expand "movsf"
207 [(set (match_operand:SF 0 "general_operand" "")
208 (match_operand:SF 1 "general_operand" ""))]
209 ""
210 "
211 {
212 /* One of the ops has to be in a register or 0 */
213 if (!register_operand (operand0, SFmode)
214 && !reg_or_0_operand (operand1, SFmode))
215 operands[1] = copy_to_mode_reg (SFmode, operand1);
216 }")
217
218 (define_insn "*movsf_internal"
219 [(set (match_operand:SF 0 "general_operand" "=r,r,r,r,r,Q,r,m,m,r")
220 (match_operand:SF 1 "general_operand" "Jr,K,L,n,Q,Ir,m,r,IG,iF"))]
221 "register_operand (operands[0], SFmode)
222 || reg_or_0_operand (operands[1], SFmode)"
223 "* return output_move_single (operands);"
224 [(set_attr "length" "2,4,4,8,2,2,4,4,4,8")
225 (set_attr "cc" "none_0hit,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit")
226 (set_attr "type" "other,other,other,other,load,other,load,other,other,other")])
227
228 (define_expand "movdf"
229 [(set (match_operand:DF 0 "general_operand" "")
230 (match_operand:DF 1 "general_operand" ""))]
231 ""
232 "
233 {
234 /* One of the ops has to be in a register or 0 */
235 if (!register_operand (operand0, DFmode)
236 && !reg_or_0_operand (operand1, DFmode))
237 operands[1] = copy_to_mode_reg (DFmode, operand1);
238 }")
239
240 (define_insn "*movdf_internal"
241 [(set (match_operand:DF 0 "general_operand" "=r,r,r,r,r,m,m,r")
242 (match_operand:DF 1 "general_operand" "Jr,K,L,i,m,r,IG,iF"))]
243 "register_operand (operands[0], DFmode)
244 || reg_or_0_operand (operands[1], DFmode)"
245 "* return output_move_double (operands);"
246 [(set_attr "length" "4,8,8,16,8,8,8,16")
247 (set_attr "cc" "none_0hit,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit")
248 (set_attr "type" "other,other,other,other,load,other,other,other")])
249
250 \f
251 ;; ----------------------------------------------------------------------
252 ;; TEST INSTRUCTIONS
253 ;; ----------------------------------------------------------------------
254
255 (define_insn "*v850_tst1"
256 [(set (cc0) (zero_extract:SI (match_operand:QI 0 "memory_operand" "m")
257 (const_int 1)
258 (match_operand:QI 1 "const_int_operand" "n")))]
259 ""
260 "tst1 %1,%0"
261 [(set_attr "length" "4")
262 (set_attr "cc" "clobber")])
263
264 (define_insn "tstsi"
265 [(set (cc0) (match_operand:SI 0 "register_operand" "r"))]
266 ""
267 "cmp %.,%0"
268 [(set_attr "length" "2")
269 (set_attr "cc" "set_znv")])
270
271 (define_insn "cmpsi"
272 [(set (cc0)
273 (compare:SI (match_operand:SI 0 "register_operand" "r,r")
274 (match_operand:SI 1 "reg_or_int5_operand" "r,J")))]
275 ""
276 "@
277 cmp %1,%0
278 cmp %1,%0"
279 [(set_attr "length" "2,2")
280 (set_attr "cc" "compare")])
281 \f
282 ;; ----------------------------------------------------------------------
283 ;; ADD INSTRUCTIONS
284 ;; ----------------------------------------------------------------------
285
286 (define_insn "addsi3"
287 [(set (match_operand:SI 0 "register_operand" "=r,r,&r")
288 (plus:SI (match_operand:SI 1 "register_operand" "%0,r,r")
289 (match_operand:SI 2 "nonmemory_operand" "rJ,K,r")))]
290 ""
291 "@
292 add %2,%0
293 addi %2,%1,%0
294 mov %1,%0\;add %2,%0"
295 [(set_attr "length" "2,4,6")
296 (set_attr "cc" "set_zn")])
297
298 ;; ----------------------------------------------------------------------
299 ;; SUBTRACT INSTRUCTIONS
300 ;; ----------------------------------------------------------------------
301
302 (define_insn "subsi3"
303 [(set (match_operand:SI 0 "register_operand" "=r,r")
304 (minus:SI (match_operand:SI 1 "register_operand" "0,r")
305 (match_operand:SI 2 "register_operand" "r,0")))]
306 ""
307 "@
308 sub %2,%0
309 subr %1,%0"
310 [(set_attr "length" "2,2")
311 (set_attr "cc" "set_zn")])
312
313 (define_insn "negsi2"
314 [(set (match_operand:SI 0 "register_operand" "=r")
315 (neg:SI (match_operand:SI 1 "register_operand" "0")))]
316 ""
317 "subr %.,%0"
318 [(set_attr "length" "2")
319 (set_attr "cc" "set_zn")])
320
321 ;; ----------------------------------------------------------------------
322 ;; MULTIPLY INSTRUCTIONS
323 ;; ----------------------------------------------------------------------
324
325 (define_expand "mulhisi3"
326 [(set (match_operand:SI 0 "register_operand" "")
327 (mult:SI
328 (sign_extend:SI (match_operand:HI 1 "register_operand" ""))
329 (sign_extend:SI (match_operand:HI 2 "nonmemory_operand" ""))))]
330 ""
331 "")
332
333 (define_insn "*mulhisi3_internal1"
334 [(set (match_operand:SI 0 "register_operand" "=r")
335 (mult:SI
336 (sign_extend:SI (match_operand:HI 1 "register_operand" "%0"))
337 (sign_extend:SI (match_operand:HI 2 "register_operand" "r"))))]
338 ""
339 "mulh %2,%0"
340 [(set_attr "length" "2")
341 (set_attr "cc" "none_0hit")
342 (set_attr "type" "mult")])
343
344 (define_insn "*mulhisi3_internal2"
345 [(set (match_operand:SI 0 "register_operand" "=r,r")
346 (mult:SI
347 (sign_extend:SI (match_operand:HI 1 "register_operand" "%0,r"))
348 (sign_extend:SI (match_operand 2 "const_int_operand" "J,K"))))]
349 ""
350 "@
351 mulh %2,%0
352 mulhi %2,%1,%0"
353 [(set_attr "length" "2,4")
354 (set_attr "cc" "none_0hit,none_0hit")
355 (set_attr "type" "mult")])
356
357 \f
358 ;; ----------------------------------------------------------------------
359 ;; AND INSTRUCTIONS
360 ;; ----------------------------------------------------------------------
361
362 (define_insn "*v850_clr1_1"
363 [(set (match_operand:QI 0 "memory_operand" "=m")
364 (subreg:QI
365 (and:SI (subreg:SI (match_dup 0) 0)
366 (match_operand:QI 1 "not_power_of_two_operand" "")) 0))]
367 ""
368 "*
369 {
370 rtx xoperands[2];
371 xoperands[0] = operands[0];
372 xoperands[1] = GEN_INT (~INTVAL (operands[1]) & 0xff);
373 output_asm_insn (\"clr1 %M1,%0\", xoperands);
374 return \"\";
375 }"
376 [(set_attr "length" "4")
377 (set_attr "cc" "clobber")])
378
379 (define_insn "*v850_clr1_2"
380 [(set (match_operand:HI 0 "memory_operand" "=m")
381 (subreg:HI
382 (and:SI (subreg:SI (match_dup 0) 0)
383 (match_operand:HI 1 "not_power_of_two_operand" "")) 0))]
384 ""
385 "*
386 {
387 int log2 = exact_log2 (~INTVAL (operands[1]) & 0xffff);
388
389 rtx xoperands[2];
390 xoperands[0] = gen_rtx (MEM, QImode,
391 plus_constant (XEXP (operands[0], 0), log2 / 8));
392 xoperands[1] = GEN_INT (log2 % 8);
393 output_asm_insn (\"clr1 %1,%0\", xoperands);
394 return \"\";
395 }"
396 [(set_attr "length" "4")
397 (set_attr "cc" "clobber")])
398
399 (define_insn "*v850_clr1_3"
400 [(set (match_operand:SI 0 "memory_operand" "=m")
401 (and:SI (match_dup 0)
402 (match_operand:SI 1 "not_power_of_two_operand" "")))]
403 ""
404 "*
405 {
406 int log2 = exact_log2 (~INTVAL (operands[1]) & 0xffffffff);
407
408 rtx xoperands[2];
409 xoperands[0] = gen_rtx (MEM, QImode,
410 plus_constant (XEXP (operands[0], 0), log2 / 8));
411 xoperands[1] = GEN_INT (log2 % 8);
412 output_asm_insn (\"clr1 %1,%0\", xoperands);
413 return \"\";
414 }"
415 [(set_attr "length" "4")
416 (set_attr "cc" "clobber")])
417
418 (define_insn "andsi3"
419 [(set (match_operand:SI 0 "register_operand" "=r,r,r")
420 (and:SI (match_operand:SI 1 "register_operand" "%0,0,r")
421 (match_operand:SI 2 "nonmemory_operand" "r,I,M")))]
422 ""
423 "@
424 and %2,%0
425 and %.,%0
426 andi %2,%1,%0"
427 [(set_attr "length" "2,2,4")
428 (set_attr "cc" "set_znv")])
429
430 ;; ----------------------------------------------------------------------
431 ;; OR INSTRUCTIONS
432 ;; ----------------------------------------------------------------------
433
434 (define_insn "*v850_set1_1"
435 [(set (match_operand:QI 0 "memory_operand" "=m")
436 (subreg:QI (ior:SI (subreg:SI (match_dup 0) 0)
437 (match_operand 1 "power_of_two_operand" "")) 0))]
438 ""
439 "set1 %M1,%0"
440 [(set_attr "length" "4")
441 (set_attr "cc" "clobber")])
442
443 (define_insn "*v850_set1_2"
444 [(set (match_operand:HI 0 "memory_operand" "=m")
445 (subreg:HI (ior:SI (subreg:SI (match_dup 0) 0)
446 (match_operand 1 "power_of_two_operand" "")) 0))]
447 ""
448 "*
449 {
450 int log2 = exact_log2 (INTVAL (operands[1]));
451
452 if (log2 < 8)
453 return \"set1 %M1,%0\";
454 else
455 {
456 rtx xoperands[2];
457 xoperands[0] = gen_rtx (MEM, QImode,
458 plus_constant (XEXP (operands[0], 0), log2 / 8));
459 xoperands[1] = GEN_INT (log2 % 8);
460 output_asm_insn (\"set1 %1,%0\", xoperands);
461 }
462 return \"\";
463 }"
464 [(set_attr "length" "4")
465 (set_attr "cc" "clobber")])
466
467 (define_insn "*v850_set1_3"
468 [(set (match_operand:SI 0 "memory_operand" "=m")
469 (ior:SI (match_dup 0)
470 (match_operand 1 "power_of_two_operand" "")))]
471 ""
472 "*
473 {
474 int log2 = exact_log2 (INTVAL (operands[1]));
475
476 if (log2 < 8)
477 return \"set1 %M1,%0\";
478 else
479 {
480 rtx xoperands[2];
481 xoperands[0] = gen_rtx (MEM, QImode,
482 plus_constant (XEXP (operands[0], 0), log2 / 8));
483 xoperands[1] = GEN_INT (log2 % 8);
484 output_asm_insn (\"set1 %1,%0\", xoperands);
485 }
486 return \"\";
487 }"
488 [(set_attr "length" "4")
489 (set_attr "cc" "clobber")])
490
491 (define_insn "iorsi3"
492 [(set (match_operand:SI 0 "register_operand" "=r,r,r")
493 (ior:SI (match_operand:SI 1 "register_operand" "%0,0,r")
494 (match_operand:SI 2 "nonmemory_operand" "r,I,M")))]
495 ""
496 "@
497 or %2,%0
498 or %.,%0
499 ori %2,%1,%0"
500 [(set_attr "length" "2,2,4")
501 (set_attr "cc" "set_znv")])
502
503 ;; ----------------------------------------------------------------------
504 ;; XOR INSTRUCTIONS
505 ;; ----------------------------------------------------------------------
506
507 (define_insn "*v850_not1_1"
508 [(set (match_operand:QI 0 "memory_operand" "=m")
509 (subreg:QI (xor:SI (subreg:SI (match_dup 0) 0)
510 (match_operand 1 "power_of_two_operand" "")) 0))]
511 ""
512 "not1 %M1,%0"
513 [(set_attr "length" "4")
514 (set_attr "cc" "clobber")])
515
516 (define_insn "*v850_not1_2"
517 [(set (match_operand:HI 0 "memory_operand" "=m")
518 (subreg:HI (xor:SI (subreg:SI (match_dup 0) 0)
519 (match_operand 1 "power_of_two_operand" "")) 0))]
520 ""
521 "*
522 {
523 int log2 = exact_log2 (INTVAL (operands[1]));
524
525 if (log2 < 8)
526 return \"not1 %M1,%0\";
527 else
528 {
529 rtx xoperands[2];
530 xoperands[0] = gen_rtx (MEM, QImode,
531 plus_constant (XEXP (operands[0], 0), log2 / 8));
532 xoperands[1] = GEN_INT (log2 % 8);
533 output_asm_insn (\"not1 %1,%0\", xoperands);
534 }
535 return \"\";
536 }"
537 [(set_attr "length" "4")
538 (set_attr "cc" "clobber")])
539
540 (define_insn "*v850_not1_3"
541 [(set (match_operand:SI 0 "memory_operand" "=m")
542 (xor:SI (match_dup 0)
543 (match_operand 1 "power_of_two_operand" "")))]
544 ""
545 "*
546 {
547 int log2 = exact_log2 (INTVAL (operands[1]));
548
549 if (log2 < 8)
550 return \"not1 %M1,%0\";
551 else
552 {
553 rtx xoperands[2];
554 xoperands[0] = gen_rtx (MEM, QImode,
555 plus_constant (XEXP (operands[0], 0), log2 / 8));
556 xoperands[1] = GEN_INT (log2 % 8);
557 output_asm_insn (\"not1 %1,%0\", xoperands);
558 }
559 return \"\";
560 }"
561 [(set_attr "length" "4")
562 (set_attr "cc" "clobber")])
563
564 (define_insn "xorsi3"
565 [(set (match_operand:SI 0 "register_operand" "=r,r,r")
566 (xor:SI (match_operand:SI 1 "register_operand" "%0,0,r")
567 (match_operand:SI 2 "nonmemory_operand" "r,I,M")))]
568 ""
569 "@
570 xor %2,%0
571 xor %.,%0
572 xori %2,%1,%0"
573 [(set_attr "length" "2,2,4")
574 (set_attr "cc" "set_znv")])
575 \f
576 ;; ----------------------------------------------------------------------
577 ;; NOT INSTRUCTIONS
578 ;; ----------------------------------------------------------------------
579
580 (define_insn "one_cmplsi2"
581 [(set (match_operand:SI 0 "register_operand" "=r")
582 (not:SI (match_operand:SI 1 "register_operand" "r")))]
583 ""
584 "not %1,%0"
585 [(set_attr "length" "2")
586 (set_attr "cc" "set_znv")])
587 \f
588 ;; -----------------------------------------------------------------
589 ;; BIT FIELDS
590 ;; -----------------------------------------------------------------
591 ;; Is it worth defining insv and extv for the V850 series?!?
592
593 ;; -----------------------------------------------------------------
594 ;; Scc INSTRUCTIONS
595 ;; -----------------------------------------------------------------
596
597 (define_insn "sle"
598 [(set (match_operand:SI 0 "register_operand" "=r")
599 (le:SI (cc0) (const_int 0)))]
600 ""
601 "*
602 {
603 if ((cc_status.flags & CC_OVERFLOW_UNUSABLE) != 0)
604 return 0;
605
606 return \"setf le,%0\";
607 }"
608 [(set_attr "length" "4")
609 (set_attr "cc" "none_0hit")])
610
611 (define_insn "sleu"
612 [(set (match_operand:SI 0 "register_operand" "=r")
613 (leu:SI (cc0) (const_int 0)))]
614 ""
615 "setf nh,%0"
616 [(set_attr "length" "4")
617 (set_attr "cc" "none_0hit")])
618
619 (define_insn "sge"
620 [(set (match_operand:SI 0 "register_operand" "=r")
621 (ge:SI (cc0) (const_int 0)))]
622 ""
623 "*
624 {
625 if ((cc_status.flags & CC_OVERFLOW_UNUSABLE) != 0)
626 return 0;
627
628 return \"setf ge,%0\";
629 }"
630 [(set_attr "length" "4")
631 (set_attr "cc" "none_0hit")])
632
633 (define_insn "sgeu"
634 [(set (match_operand:SI 0 "register_operand" "=r")
635 (geu:SI (cc0) (const_int 0)))]
636 ""
637 "setf nl,%0"
638 [(set_attr "length" "4")
639 (set_attr "cc" "none_0hit")])
640
641 (define_insn "slt"
642 [(set (match_operand:SI 0 "register_operand" "=r")
643 (lt:SI (cc0) (const_int 0)))]
644 ""
645 "*
646 {
647 if ((cc_status.flags & CC_OVERFLOW_UNUSABLE) != 0)
648 return 0;
649
650 return \"setf lt,%0\";
651 }"
652 [(set_attr "length" "4")
653 (set_attr "cc" "none_0hit")])
654
655 (define_insn "sltu"
656 [(set (match_operand:SI 0 "register_operand" "=r")
657 (ltu:SI (cc0) (const_int 0)))]
658 ""
659 "setf l,%0"
660 [(set_attr "length" "4")
661 (set_attr "cc" "none_0hit")])
662
663 (define_insn "sgt"
664 [(set (match_operand:SI 0 "register_operand" "=r")
665 (gt:SI (cc0) (const_int 0)))]
666 ""
667 "*
668 {
669 if ((cc_status.flags & CC_OVERFLOW_UNUSABLE) != 0)
670 return 0;
671
672 return \"setf gt,%0\";
673 }"
674 [(set_attr "length" "4")
675 (set_attr "cc" "none_0hit")])
676
677 (define_insn "sgtu"
678 [(set (match_operand:SI 0 "register_operand" "=r")
679 (gtu:SI (cc0) (const_int 0)))]
680 ""
681 "setf h,%0"
682 [(set_attr "length" "4")
683 (set_attr "cc" "none_0hit")])
684
685 (define_insn "seq"
686 [(set (match_operand:SI 0 "register_operand" "=r")
687 (eq:SI (cc0) (const_int 0)))]
688 ""
689 "setf z,%0"
690 [(set_attr "length" "4")
691 (set_attr "cc" "none_0hit")])
692
693 (define_insn "sne"
694 [(set (match_operand:SI 0 "register_operand" "=r")
695 (ne:SI (cc0) (const_int 0)))]
696 ""
697 "setf nz,%0"
698 [(set_attr "length" "4")
699 (set_attr "cc" "none_0hit")])
700
701 \f
702 ;; ----------------------------------------------------------------------
703 ;; JUMP INSTRUCTIONS
704 ;; ----------------------------------------------------------------------
705
706 ;; Conditional jump instructions
707
708 (define_expand "ble"
709 [(set (pc)
710 (if_then_else (le (cc0)
711 (const_int 0))
712 (label_ref (match_operand 0 "" ""))
713 (pc)))]
714 ""
715 "")
716
717 (define_expand "bleu"
718 [(set (pc)
719 (if_then_else (leu (cc0)
720 (const_int 0))
721 (label_ref (match_operand 0 "" ""))
722 (pc)))]
723 ""
724 "")
725
726 (define_expand "bge"
727 [(set (pc)
728 (if_then_else (ge (cc0)
729 (const_int 0))
730 (label_ref (match_operand 0 "" ""))
731 (pc)))]
732 ""
733 "")
734
735 (define_expand "bgeu"
736 [(set (pc)
737 (if_then_else (geu (cc0)
738 (const_int 0))
739 (label_ref (match_operand 0 "" ""))
740 (pc)))]
741 ""
742 "")
743
744 (define_expand "blt"
745 [(set (pc)
746 (if_then_else (lt (cc0)
747 (const_int 0))
748 (label_ref (match_operand 0 "" ""))
749 (pc)))]
750 ""
751 "")
752
753 (define_expand "bltu"
754 [(set (pc)
755 (if_then_else (ltu (cc0)
756 (const_int 0))
757 (label_ref (match_operand 0 "" ""))
758 (pc)))]
759 ""
760 "")
761
762 (define_expand "bgt"
763 [(set (pc)
764 (if_then_else (gt (cc0)
765 (const_int 0))
766 (label_ref (match_operand 0 "" ""))
767 (pc)))]
768 ""
769 "")
770
771 (define_expand "bgtu"
772 [(set (pc)
773 (if_then_else (gtu (cc0)
774 (const_int 0))
775 (label_ref (match_operand 0 "" ""))
776 (pc)))]
777 ""
778 "")
779
780 (define_expand "beq"
781 [(set (pc)
782 (if_then_else (eq (cc0)
783 (const_int 0))
784 (label_ref (match_operand 0 "" ""))
785 (pc)))]
786 ""
787 "")
788
789 (define_expand "bne"
790 [(set (pc)
791 (if_then_else (ne (cc0)
792 (const_int 0))
793 (label_ref (match_operand 0 "" ""))
794 (pc)))]
795 ""
796 "")
797
798 (define_insn "*branch_normal"
799 [(set (pc)
800 (if_then_else (match_operator 1 "comparison_operator"
801 [(cc0) (const_int 0)])
802 (label_ref (match_operand 0 "" ""))
803 (pc)))]
804 ""
805 "*
806 {
807 if ((cc_status.flags & CC_OVERFLOW_UNUSABLE) != 0
808 && (GET_CODE (operands[1]) == GT
809 || GET_CODE (operands[1]) == GE
810 || GET_CODE (operands[1]) == LE
811 || GET_CODE (operands[1]) == LT))
812 return 0;
813
814 if (get_attr_length (insn) == 2)
815 return \"%b1 %l0\";
816 else
817 return \"%B1 .+6\;jr %l0\";
818 }"
819 [(set (attr "length")
820 (if_then_else (lt (abs (minus (match_dup 0) (pc)))
821 (const_int 256))
822 (const_int 2)
823 (const_int 6)))
824 (set_attr "cc" "none")])
825
826 (define_insn "*branch_invert"
827 [(set (pc)
828 (if_then_else (match_operator 1 "comparison_operator"
829 [(cc0) (const_int 0)])
830 (pc)
831 (label_ref (match_operand 0 "" ""))))]
832 ""
833 "*
834 {
835 if ((cc_status.flags & CC_OVERFLOW_UNUSABLE) != 0
836 && (GET_CODE (operands[1]) == GT
837 || GET_CODE (operands[1]) == GE
838 || GET_CODE (operands[1]) == LE
839 || GET_CODE (operands[1]) == LT))
840 return 0;
841 if (get_attr_length (insn) == 2)
842 return \"%B1 %l0\";
843 else
844 return \"%b1 .+6\;jr %l0\";
845 }"
846 [(set (attr "length")
847 (if_then_else (lt (abs (minus (match_dup 0) (pc)))
848 (const_int 256))
849 (const_int 2)
850 (const_int 6)))
851 (set_attr "cc" "none")])
852
853 ;; Unconditional and other jump instructions.
854
855 (define_insn "jump"
856 [(set (pc)
857 (label_ref (match_operand 0 "" "")))]
858 ""
859 "*
860 {
861 if (get_attr_length (insn) == 2)
862 return \"br %0\";
863 else
864 return \"jr %0\";
865 }"
866 [(set (attr "length")
867 (if_then_else (lt (abs (minus (match_dup 0) (pc)))
868 (const_int 256))
869 (const_int 2)
870 (const_int 4)))
871 (set_attr "cc" "none")])
872
873 (define_insn "indirect_jump"
874 [(set (pc) (match_operand:SI 0 "register_operand" "r"))]
875 ""
876 "jmp %0"
877 [(set_attr "length" "2")
878 (set_attr "cc" "none")])
879
880 (define_insn "tablejump"
881 [(set (pc) (match_operand:SI 0 "register_operand" "r"))
882 (use (label_ref (match_operand 1 "" "")))]
883 ""
884 "jmp %0"
885 [(set_attr "length" "2")
886 (set_attr "cc" "none")])
887
888 ;; Call subroutine with no return value.
889
890 (define_expand "call"
891 [(call (match_operand:QI 0 "general_operand" "")
892 (match_operand:SI 1 "general_operand" ""))]
893 ""
894 "
895 {
896 if (! call_address_operand (XEXP (operands[0], 0))
897 || TARGET_LONG_CALLS)
898 XEXP (operands[0], 0) = force_reg (SImode, XEXP (operands[0], 0));
899 emit_call_insn (gen_call_internal (XEXP (operands[0], 0), operands[1]));
900 DONE;
901 }")
902
903 (define_insn "call_internal"
904 [(call (mem:QI (match_operand:SI 0 "call_address_operand" "S,r"))
905 (match_operand:SI 1 "general_operand" "g,g"))
906 (clobber (reg:SI 31))]
907 ""
908 "@
909 jarl %0,r31
910 jarl .+4,r31\\n\\tadd 4,r31\\n\\tjmp %0"
911 [(set_attr "length" "4,8")])
912
913 ;; Call subroutine, returning value in operand 0
914 ;; (which must be a hard register).
915
916 (define_expand "call_value"
917 [(set (match_operand 0 "" "")
918 (call (match_operand:QI 1 "general_operand" "")
919 (match_operand:SI 2 "general_operand" "")))]
920 ""
921 "
922 {
923 if (! call_address_operand (XEXP (operands[1], 0))
924 || TARGET_LONG_CALLS)
925 XEXP (operands[1], 0) = force_reg (SImode, XEXP (operands[1], 0));
926 emit_call_insn (gen_call_value_internal (operands[0],
927 XEXP (operands[1], 0),
928 operands[2]));
929 DONE;
930 }")
931
932 (define_insn "call_value_internal"
933 [(set (match_operand 0 "" "=r,r")
934 (call (mem:QI (match_operand:SI 1 "call_address_operand" "S,r"))
935 (match_operand:SI 2 "general_operand" "g,g")))
936 (clobber (reg:SI 31))]
937 ""
938 "@
939 jarl %1,r31
940 jarl .+4,r31\\n\\tadd 4,r31\\n\\tjmp %1"
941 [(set_attr "length" "4,8")])
942
943 (define_insn "nop"
944 [(const_int 0)]
945 ""
946 "nop"
947 [(set_attr "length" "2")
948 (set_attr "cc" "none")])
949 \f
950 ;; ----------------------------------------------------------------------
951 ;; EXTEND INSTRUCTIONS
952 ;; ----------------------------------------------------------------------
953
954
955 (define_insn "zero_extendhisi2"
956 [(set (match_operand:SI 0 "register_operand" "=r")
957 (zero_extend:SI
958 (match_operand:HI 1 "register_operand" "r")))]
959 ""
960 "andi 65535,%1,%0"
961 [(set_attr "length" "4")
962 (set_attr "cc" "set_znv")])
963
964 (define_insn "zero_extendqisi2"
965 [(set (match_operand:SI 0 "register_operand" "=r")
966 (zero_extend:SI
967 (match_operand:QI 1 "register_operand" "r")))]
968 ""
969 "andi 255,%1,%0"
970 [(set_attr "length" "4")
971 (set_attr "cc" "set_znv")])
972
973 ;;- sign extension instructions
974
975 (define_expand "extendhisi2"
976 [(set (match_dup 2)
977 (ashift:SI (match_operand:HI 1 "register_operand" "")
978 (const_int 16)))
979 (set (match_operand:SI 0 "register_operand" "")
980 (ashiftrt:SI (match_dup 2)
981 (const_int 16)))]
982 ""
983 "
984 {
985 operands[1] = gen_lowpart (SImode, operands[1]);
986 operands[2] = gen_reg_rtx (SImode);
987 }")
988
989 (define_expand "extendqisi2"
990 [(set (match_dup 2)
991 (ashift:SI (match_operand:QI 1 "register_operand" "")
992 (const_int 24)))
993 (set (match_operand:SI 0 "register_operand" "")
994 (ashiftrt:SI (match_dup 2)
995 (const_int 24)))]
996 ""
997 "
998 {
999 operands[1] = gen_lowpart (SImode, operands[1]);
1000 operands[2] = gen_reg_rtx (SImode);
1001 }")
1002 \f
1003 ;; ----------------------------------------------------------------------
1004 ;; SHIFTS
1005 ;; ----------------------------------------------------------------------
1006
1007 (define_insn "ashlsi3"
1008 [(set (match_operand:SI 0 "register_operand" "=r,r")
1009 (ashift:SI
1010 (match_operand:SI 1 "register_operand" "0,0")
1011 (match_operand:QI 2 "nonmemory_operand" "r,N")))]
1012 ""
1013 "@
1014 shl %2,%0
1015 shl %2,%0"
1016 [(set_attr "length" "4,2")
1017 (set_attr "cc" "set_znv")])
1018
1019 (define_insn "lshrsi3"
1020 [(set (match_operand:SI 0 "register_operand" "=r,r")
1021 (lshiftrt:SI
1022 (match_operand:SI 1 "register_operand" "0,0")
1023 (match_operand:QI 2 "nonmemory_operand" "r,J")))]
1024 ""
1025 "@
1026 shr %2,%0
1027 shr %2,%0"
1028 [(set_attr "length" "4,2")
1029 (set_attr "cc" "set_znv")])
1030
1031 (define_insn "ashrsi3"
1032 [(set (match_operand:SI 0 "register_operand" "=r,r")
1033 (ashiftrt:SI
1034 (match_operand:SI 1 "register_operand" "0,0")
1035 (match_operand:SI 2 "nonmemory_operand" "r,N")))]
1036 ""
1037 "@
1038 sar %2,%0
1039 sar %2,%0"
1040 [(set_attr "length" "4,2")
1041 (set_attr "cc" "set_znv")])
1042
1043 ;; ----------------------------------------------------------------------
1044 ;; PROLOGUE/EPILOGUE
1045 ;; ----------------------------------------------------------------------
1046 (define_expand "prologue"
1047 [(const_int 0)]
1048 ""
1049 "expand_prologue (); DONE;")
1050
1051 (define_expand "epilogue"
1052 [(return)]
1053 ""
1054 "
1055 {
1056 /* Try to use the trivial return first. Else use the
1057 full epilogue. */
1058 if (0)
1059 emit_jump_insn (gen_return ());
1060 else
1061 expand_epilogue ();
1062 DONE;
1063 }")
1064
1065 (define_insn "return"
1066 [(return)]
1067 "reload_completed && compute_frame_size (get_frame_size (), (long *)0) == 0"
1068 "jmp [r31]"
1069 [(set_attr "length" "2")
1070 (set_attr "cc" "none")])
1071
1072 (define_insn "return_internal"
1073 [(return)
1074 (use (reg:SI 31))]
1075 ""
1076 "jmp [r31]"
1077 [(set_attr "length" "2")
1078 (set_attr "cc" "none")])
1079
1080
1081 \f
1082 ;; ----------------------------------------------------------------------
1083 ;; HELPER INSTRUCTIONS for saving the prologue and epilog registers
1084 ;; ----------------------------------------------------------------------
1085
1086 ;; Save r2, r20-r29, r31, and create 16 byte register call area
1087 (define_insn "save_r2_r31"
1088 [(set (reg:SI 3) (plus:SI (reg:SI 3) (const_int -64)))
1089 (set (mem:SI (plus:SI (reg:SI 3) (const_int -16))) (reg:SI 2))
1090 (set (mem:SI (plus:SI (reg:SI 3) (const_int -20))) (reg:SI 20))
1091 (set (mem:SI (plus:SI (reg:SI 3) (const_int -24))) (reg:SI 21))
1092 (set (mem:SI (plus:SI (reg:SI 3) (const_int -28))) (reg:SI 22))
1093 (set (mem:SI (plus:SI (reg:SI 3) (const_int -32))) (reg:SI 23))
1094 (set (mem:SI (plus:SI (reg:SI 3) (const_int -36))) (reg:SI 24))
1095 (set (mem:SI (plus:SI (reg:SI 3) (const_int -40))) (reg:SI 25))
1096 (set (mem:SI (plus:SI (reg:SI 3) (const_int -44))) (reg:SI 26))
1097 (set (mem:SI (plus:SI (reg:SI 3) (const_int -48))) (reg:SI 27))
1098 (set (mem:SI (plus:SI (reg:SI 3) (const_int -52))) (reg:SI 28))
1099 (set (mem:SI (plus:SI (reg:SI 3) (const_int -56))) (reg:SI 29))
1100 (set (mem:SI (plus:SI (reg:SI 3) (const_int -60))) (reg:SI 31))
1101 (clobber (reg:SI 10))]
1102 "TARGET_PROLOG_FUNCTION"
1103 "jarl __save_r2_r31,r10"
1104 [(set_attr "length" "4")
1105 (set_attr "cc" "clobber")])
1106
1107 ;; Save r20-r29, r31, and create 16 byte register call area
1108 (define_insn "save_r20_r31"
1109 [(set (reg:SI 3) (plus:SI (reg:SI 3) (const_int -60)))
1110 (set (mem:SI (plus:SI (reg:SI 3) (const_int -16))) (reg:SI 20))
1111 (set (mem:SI (plus:SI (reg:SI 3) (const_int -20))) (reg:SI 21))
1112 (set (mem:SI (plus:SI (reg:SI 3) (const_int -24))) (reg:SI 22))
1113 (set (mem:SI (plus:SI (reg:SI 3) (const_int -28))) (reg:SI 23))
1114 (set (mem:SI (plus:SI (reg:SI 3) (const_int -32))) (reg:SI 24))
1115 (set (mem:SI (plus:SI (reg:SI 3) (const_int -36))) (reg:SI 25))
1116 (set (mem:SI (plus:SI (reg:SI 3) (const_int -40))) (reg:SI 26))
1117 (set (mem:SI (plus:SI (reg:SI 3) (const_int -44))) (reg:SI 27))
1118 (set (mem:SI (plus:SI (reg:SI 3) (const_int -48))) (reg:SI 28))
1119 (set (mem:SI (plus:SI (reg:SI 3) (const_int -52))) (reg:SI 29))
1120 (set (mem:SI (plus:SI (reg:SI 3) (const_int -56))) (reg:SI 31))
1121 (clobber (reg:SI 10))]
1122 "TARGET_PROLOG_FUNCTION"
1123 "jarl __save_r20_r31,r10"
1124 [(set_attr "length" "4")
1125 (set_attr "cc" "clobber")])
1126
1127 ;; Save r21-r29, r31, and create 16 byte register call area
1128 (define_insn "save_r21_r31"
1129 [(set (reg:SI 3) (plus:SI (reg:SI 3) (const_int -56)))
1130 (set (mem:SI (plus:SI (reg:SI 3) (const_int -16))) (reg:SI 21))
1131 (set (mem:SI (plus:SI (reg:SI 3) (const_int -20))) (reg:SI 22))
1132 (set (mem:SI (plus:SI (reg:SI 3) (const_int -24))) (reg:SI 23))
1133 (set (mem:SI (plus:SI (reg:SI 3) (const_int -28))) (reg:SI 24))
1134 (set (mem:SI (plus:SI (reg:SI 3) (const_int -32))) (reg:SI 25))
1135 (set (mem:SI (plus:SI (reg:SI 3) (const_int -36))) (reg:SI 26))
1136 (set (mem:SI (plus:SI (reg:SI 3) (const_int -40))) (reg:SI 27))
1137 (set (mem:SI (plus:SI (reg:SI 3) (const_int -44))) (reg:SI 28))
1138 (set (mem:SI (plus:SI (reg:SI 3) (const_int -48))) (reg:SI 29))
1139 (set (mem:SI (plus:SI (reg:SI 3) (const_int -52))) (reg:SI 31))
1140 (clobber (reg:SI 10))]
1141 "TARGET_PROLOG_FUNCTION"
1142 "jarl __save_r21_r31,r10"
1143 [(set_attr "length" "4")
1144 (set_attr "cc" "clobber")])
1145
1146 ;; Save r22-r29, r31, and create 16 byte register call area
1147 (define_insn "save_r22_r31"
1148 [(set (reg:SI 3) (plus:SI (reg:SI 3) (const_int -52)))
1149 (set (mem:SI (plus:SI (reg:SI 3) (const_int -16))) (reg:SI 22))
1150 (set (mem:SI (plus:SI (reg:SI 3) (const_int -20))) (reg:SI 23))
1151 (set (mem:SI (plus:SI (reg:SI 3) (const_int -24))) (reg:SI 24))
1152 (set (mem:SI (plus:SI (reg:SI 3) (const_int -28))) (reg:SI 25))
1153 (set (mem:SI (plus:SI (reg:SI 3) (const_int -32))) (reg:SI 26))
1154 (set (mem:SI (plus:SI (reg:SI 3) (const_int -36))) (reg:SI 27))
1155 (set (mem:SI (plus:SI (reg:SI 3) (const_int -40))) (reg:SI 28))
1156 (set (mem:SI (plus:SI (reg:SI 3) (const_int -44))) (reg:SI 29))
1157 (set (mem:SI (plus:SI (reg:SI 3) (const_int -48))) (reg:SI 31))
1158 (clobber (reg:SI 10))]
1159 "TARGET_PROLOG_FUNCTION"
1160 "jarl __save_r22_r31,r10"
1161 [(set_attr "length" "4")
1162 (set_attr "cc" "clobber")])
1163
1164 ;; Save r23-r29, r31, and create 16 byte register call area
1165 (define_insn "save_r23_r31"
1166 [(set (reg:SI 3) (plus:SI (reg:SI 3) (const_int -48)))
1167 (set (mem:SI (plus:SI (reg:SI 3) (const_int -16))) (reg:SI 23))
1168 (set (mem:SI (plus:SI (reg:SI 3) (const_int -20))) (reg:SI 24))
1169 (set (mem:SI (plus:SI (reg:SI 3) (const_int -24))) (reg:SI 25))
1170 (set (mem:SI (plus:SI (reg:SI 3) (const_int -28))) (reg:SI 26))
1171 (set (mem:SI (plus:SI (reg:SI 3) (const_int -32))) (reg:SI 27))
1172 (set (mem:SI (plus:SI (reg:SI 3) (const_int -36))) (reg:SI 28))
1173 (set (mem:SI (plus:SI (reg:SI 3) (const_int -40))) (reg:SI 29))
1174 (set (mem:SI (plus:SI (reg:SI 3) (const_int -44))) (reg:SI 31))
1175 (clobber (reg:SI 10))]
1176 "TARGET_PROLOG_FUNCTION"
1177 "jarl __save_r23_r31,r10"
1178 [(set_attr "length" "4")
1179 (set_attr "cc" "clobber")])
1180
1181 ;; Save r24-r29, r31, and create 16 byte register call area
1182 (define_insn "save_r24_r31"
1183 [(set (reg:SI 3) (plus:SI (reg:SI 3) (const_int -44)))
1184 (set (mem:SI (plus:SI (reg:SI 3) (const_int -16))) (reg:SI 24))
1185 (set (mem:SI (plus:SI (reg:SI 3) (const_int -20))) (reg:SI 25))
1186 (set (mem:SI (plus:SI (reg:SI 3) (const_int -24))) (reg:SI 26))
1187 (set (mem:SI (plus:SI (reg:SI 3) (const_int -28))) (reg:SI 27))
1188 (set (mem:SI (plus:SI (reg:SI 3) (const_int -32))) (reg:SI 28))
1189 (set (mem:SI (plus:SI (reg:SI 3) (const_int -36))) (reg:SI 29))
1190 (set (mem:SI (plus:SI (reg:SI 3) (const_int -40))) (reg:SI 31))
1191 (clobber (reg:SI 10))]
1192 "TARGET_PROLOG_FUNCTION"
1193 "jarl __save_r24_r31,r10"
1194 [(set_attr "length" "4")
1195 (set_attr "cc" "clobber")])
1196
1197 ;; Save r25-r29, r31, and create 16 byte register call area
1198 (define_insn "save_r25_r31"
1199 [(set (reg:SI 3) (plus:SI (reg:SI 3) (const_int -40)))
1200 (set (mem:SI (plus:SI (reg:SI 3) (const_int -16))) (reg:SI 25))
1201 (set (mem:SI (plus:SI (reg:SI 3) (const_int -20))) (reg:SI 26))
1202 (set (mem:SI (plus:SI (reg:SI 3) (const_int -24))) (reg:SI 27))
1203 (set (mem:SI (plus:SI (reg:SI 3) (const_int -28))) (reg:SI 28))
1204 (set (mem:SI (plus:SI (reg:SI 3) (const_int -32))) (reg:SI 29))
1205 (set (mem:SI (plus:SI (reg:SI 3) (const_int -36))) (reg:SI 31))
1206 (clobber (reg:SI 10))]
1207 "TARGET_PROLOG_FUNCTION"
1208 "jarl __save_r25_r31,r10"
1209 [(set_attr "length" "4")
1210 (set_attr "cc" "clobber")])
1211
1212 ;; Save r26-r29, r31, and create 16 byte register call area
1213 (define_insn "save_r26_r31"
1214 [(set (reg:SI 3) (plus:SI (reg:SI 3) (const_int -36)))
1215 (set (mem:SI (plus:SI (reg:SI 3) (const_int -16))) (reg:SI 26))
1216 (set (mem:SI (plus:SI (reg:SI 3) (const_int -20))) (reg:SI 27))
1217 (set (mem:SI (plus:SI (reg:SI 3) (const_int -24))) (reg:SI 28))
1218 (set (mem:SI (plus:SI (reg:SI 3) (const_int -28))) (reg:SI 29))
1219 (set (mem:SI (plus:SI (reg:SI 3) (const_int -32))) (reg:SI 31))
1220 (clobber (reg:SI 10))]
1221 "TARGET_PROLOG_FUNCTION"
1222 "jarl __save_r26_r31,r10"
1223 [(set_attr "length" "4")
1224 (set_attr "cc" "clobber")])
1225
1226 ;; Save r27-r29, r31, and create 16 byte register call area
1227 (define_insn "save_r27_r31"
1228 [(set (reg:SI 3) (plus:SI (reg:SI 3) (const_int -32)))
1229 (set (mem:SI (plus:SI (reg:SI 3) (const_int -16))) (reg:SI 27))
1230 (set (mem:SI (plus:SI (reg:SI 3) (const_int -20))) (reg:SI 28))
1231 (set (mem:SI (plus:SI (reg:SI 3) (const_int -24))) (reg:SI 29))
1232 (set (mem:SI (plus:SI (reg:SI 3) (const_int -28))) (reg:SI 31))
1233 (clobber (reg:SI 10))]
1234 "TARGET_PROLOG_FUNCTION"
1235 "jarl __save_r27_r31,r10"
1236 [(set_attr "length" "4")
1237 (set_attr "cc" "clobber")])
1238
1239 ;; Save r28-r29, r31, and create 16 byte register call area
1240 (define_insn "save_r28_r31"
1241 [(set (reg:SI 3) (plus:SI (reg:SI 3) (const_int -28)))
1242 (set (mem:SI (plus:SI (reg:SI 3) (const_int -16))) (reg:SI 28))
1243 (set (mem:SI (plus:SI (reg:SI 3) (const_int -20))) (reg:SI 29))
1244 (set (mem:SI (plus:SI (reg:SI 3) (const_int -24))) (reg:SI 31))
1245 (clobber (reg:SI 10))]
1246 "TARGET_PROLOG_FUNCTION"
1247 "jarl __save_r28_r31,r10"
1248 [(set_attr "length" "4")
1249 (set_attr "cc" "clobber")])
1250
1251 ;; Save r29, r31, and create 16 byte register call area
1252 (define_insn "save_r29_r31"
1253 [(set (reg:SI 3) (plus:SI (reg:SI 3) (const_int -24)))
1254 (set (mem:SI (plus:SI (reg:SI 3) (const_int -16))) (reg:SI 29))
1255 (set (mem:SI (plus:SI (reg:SI 3) (const_int -20))) (reg:SI 31))
1256 (clobber (reg:SI 10))]
1257 "TARGET_PROLOG_FUNCTION"
1258 "jarl __save_r29_r31,r10"
1259 [(set_attr "length" "4")
1260 (set_attr "cc" "clobber")])
1261
1262 ;; Save r31, and create 16 byte register call area
1263 (define_insn "save_r31"
1264 [(set (reg:SI 3) (plus:SI (reg:SI 3) (const_int -20)))
1265 (set (mem:SI (plus:SI (reg:SI 3) (const_int -16))) (reg:SI 31))
1266 (clobber (reg:SI 10))]
1267 "TARGET_PROLOG_FUNCTION"
1268 "jarl __save_r31,r10"
1269 [(set_attr "length" "4")
1270 (set_attr "cc" "clobber")])
1271
1272 ;; Save r2, r20-r29
1273 (define_insn "save_r2_r29"
1274 [(set (reg:SI 3) (plus:SI (reg:SI 3) (const_int -44)))
1275 (set (mem:SI (reg:SI 3)) (reg:SI 2))
1276 (set (mem:SI (plus:SI (reg:SI 3) (const_int -4))) (reg:SI 20))
1277 (set (mem:SI (plus:SI (reg:SI 3) (const_int -8))) (reg:SI 21))
1278 (set (mem:SI (plus:SI (reg:SI 3) (const_int -12))) (reg:SI 22))
1279 (set (mem:SI (plus:SI (reg:SI 3) (const_int -16))) (reg:SI 23))
1280 (set (mem:SI (plus:SI (reg:SI 3) (const_int -20))) (reg:SI 24))
1281 (set (mem:SI (plus:SI (reg:SI 3) (const_int -24))) (reg:SI 25))
1282 (set (mem:SI (plus:SI (reg:SI 3) (const_int -28))) (reg:SI 26))
1283 (set (mem:SI (plus:SI (reg:SI 3) (const_int -32))) (reg:SI 27))
1284 (set (mem:SI (plus:SI (reg:SI 3) (const_int -36))) (reg:SI 28))
1285 (set (mem:SI (plus:SI (reg:SI 3) (const_int -40))) (reg:SI 29))
1286 (clobber (reg:SI 10))]
1287 "TARGET_PROLOG_FUNCTION"
1288 "jarl __save_r2_r29,r10"
1289 [(set_attr "length" "4")
1290 (set_attr "cc" "clobber")])
1291
1292 ;; Save r20-r29
1293 (define_insn "save_r20_r29"
1294 [(set (reg:SI 3) (plus:SI (reg:SI 3) (const_int -40)))
1295 (set (mem:SI (reg:SI 3)) (reg:SI 20))
1296 (set (mem:SI (plus:SI (reg:SI 3) (const_int -4))) (reg:SI 21))
1297 (set (mem:SI (plus:SI (reg:SI 3) (const_int -8))) (reg:SI 22))
1298 (set (mem:SI (plus:SI (reg:SI 3) (const_int -12))) (reg:SI 23))
1299 (set (mem:SI (plus:SI (reg:SI 3) (const_int -16))) (reg:SI 24))
1300 (set (mem:SI (plus:SI (reg:SI 3) (const_int -20))) (reg:SI 25))
1301 (set (mem:SI (plus:SI (reg:SI 3) (const_int -24))) (reg:SI 26))
1302 (set (mem:SI (plus:SI (reg:SI 3) (const_int -28))) (reg:SI 27))
1303 (set (mem:SI (plus:SI (reg:SI 3) (const_int -32))) (reg:SI 28))
1304 (set (mem:SI (plus:SI (reg:SI 3) (const_int -36))) (reg:SI 29))
1305 (clobber (reg:SI 10))]
1306 "TARGET_PROLOG_FUNCTION"
1307 "jarl __save_r20_r29,r10"
1308 [(set_attr "length" "4")
1309 (set_attr "cc" "clobber")])
1310
1311 ;; Save r21-r29
1312 (define_insn "save_r21_r29"
1313 [(set (reg:SI 3) (plus:SI (reg:SI 3) (const_int -36)))
1314 (set (mem:SI (reg:SI 3)) (reg:SI 21))
1315 (set (mem:SI (plus:SI (reg:SI 3) (const_int -4))) (reg:SI 22))
1316 (set (mem:SI (plus:SI (reg:SI 3) (const_int -8))) (reg:SI 23))
1317 (set (mem:SI (plus:SI (reg:SI 3) (const_int -12))) (reg:SI 24))
1318 (set (mem:SI (plus:SI (reg:SI 3) (const_int -16))) (reg:SI 25))
1319 (set (mem:SI (plus:SI (reg:SI 3) (const_int -20))) (reg:SI 26))
1320 (set (mem:SI (plus:SI (reg:SI 3) (const_int -24))) (reg:SI 27))
1321 (set (mem:SI (plus:SI (reg:SI 3) (const_int -28))) (reg:SI 28))
1322 (set (mem:SI (plus:SI (reg:SI 3) (const_int -32))) (reg:SI 29))
1323 (clobber (reg:SI 10))]
1324 "TARGET_PROLOG_FUNCTION"
1325 "jarl __save_r21_r29,r10"
1326 [(set_attr "length" "4")
1327 (set_attr "cc" "clobber")])
1328
1329 ;; Save r22-r29
1330 (define_insn "save_r22_r29"
1331 [(set (reg:SI 3) (plus:SI (reg:SI 3) (const_int -32)))
1332 (set (mem:SI (reg:SI 3)) (reg:SI 22))
1333 (set (mem:SI (plus:SI (reg:SI 3) (const_int -4))) (reg:SI 23))
1334 (set (mem:SI (plus:SI (reg:SI 3) (const_int -8))) (reg:SI 24))
1335 (set (mem:SI (plus:SI (reg:SI 3) (const_int -12))) (reg:SI 25))
1336 (set (mem:SI (plus:SI (reg:SI 3) (const_int -16))) (reg:SI 26))
1337 (set (mem:SI (plus:SI (reg:SI 3) (const_int -20))) (reg:SI 27))
1338 (set (mem:SI (plus:SI (reg:SI 3) (const_int -24))) (reg:SI 28))
1339 (set (mem:SI (plus:SI (reg:SI 3) (const_int -28))) (reg:SI 29))
1340 (clobber (reg:SI 10))]
1341 "TARGET_PROLOG_FUNCTION"
1342 "jarl __save_r22_r29,r10"
1343 [(set_attr "length" "4")
1344 (set_attr "cc" "clobber")])
1345
1346 ;; Save r23-r29
1347 (define_insn "save_r23_r29"
1348 [(set (reg:SI 3) (plus:SI (reg:SI 3) (const_int -28)))
1349 (set (mem:SI (reg:SI 3)) (reg:SI 23))
1350 (set (mem:SI (plus:SI (reg:SI 3) (const_int -4))) (reg:SI 24))
1351 (set (mem:SI (plus:SI (reg:SI 3) (const_int -8))) (reg:SI 25))
1352 (set (mem:SI (plus:SI (reg:SI 3) (const_int -12))) (reg:SI 26))
1353 (set (mem:SI (plus:SI (reg:SI 3) (const_int -16))) (reg:SI 27))
1354 (set (mem:SI (plus:SI (reg:SI 3) (const_int -20))) (reg:SI 28))
1355 (set (mem:SI (plus:SI (reg:SI 3) (const_int -24))) (reg:SI 29))
1356 (clobber (reg:SI 10))]
1357 "TARGET_PROLOG_FUNCTION"
1358 "jarl __save_r23_r29,r10"
1359 [(set_attr "length" "4")
1360 (set_attr "cc" "clobber")])
1361
1362 ;; Save r24-r29
1363 (define_insn "save_r24_r29"
1364 [(set (reg:SI 3) (plus:SI (reg:SI 3) (const_int -24)))
1365 (set (mem:SI (reg:SI 3)) (reg:SI 24))
1366 (set (mem:SI (plus:SI (reg:SI 3) (const_int -4))) (reg:SI 25))
1367 (set (mem:SI (plus:SI (reg:SI 3) (const_int -8))) (reg:SI 26))
1368 (set (mem:SI (plus:SI (reg:SI 3) (const_int -12))) (reg:SI 27))
1369 (set (mem:SI (plus:SI (reg:SI 3) (const_int -16))) (reg:SI 28))
1370 (set (mem:SI (plus:SI (reg:SI 3) (const_int -20))) (reg:SI 29))
1371 (clobber (reg:SI 10))]
1372 "TARGET_PROLOG_FUNCTION"
1373 "jarl __save_r24_r29,r10"
1374 [(set_attr "length" "4")
1375 (set_attr "cc" "clobber")])
1376
1377 ;; Save r25-r29
1378 (define_insn "save_r25_r29"
1379 [(set (reg:SI 3) (plus:SI (reg:SI 3) (const_int -20)))
1380 (set (mem:SI (reg:SI 3)) (reg:SI 25))
1381 (set (mem:SI (plus:SI (reg:SI 3) (const_int -4))) (reg:SI 26))
1382 (set (mem:SI (plus:SI (reg:SI 3) (const_int -8))) (reg:SI 27))
1383 (set (mem:SI (plus:SI (reg:SI 3) (const_int -12))) (reg:SI 28))
1384 (set (mem:SI (plus:SI (reg:SI 3) (const_int -16))) (reg:SI 29))
1385 (clobber (reg:SI 10))]
1386 "TARGET_PROLOG_FUNCTION"
1387 "jarl __save_r25_r29,r10"
1388 [(set_attr "length" "4")
1389 (set_attr "cc" "clobber")])
1390
1391 ;; Save r26-r29
1392 (define_insn "save_r26_r29"
1393 [(set (reg:SI 3) (plus:SI (reg:SI 3) (const_int -16)))
1394 (set (mem:SI (reg:SI 3)) (reg:SI 26))
1395 (set (mem:SI (plus:SI (reg:SI 3) (const_int -4))) (reg:SI 27))
1396 (set (mem:SI (plus:SI (reg:SI 3) (const_int -8))) (reg:SI 28))
1397 (set (mem:SI (plus:SI (reg:SI 3) (const_int -12))) (reg:SI 29))
1398 (clobber (reg:SI 10))]
1399 "TARGET_PROLOG_FUNCTION"
1400 "jarl __save_r26_r29,r10"
1401 [(set_attr "length" "4")
1402 (set_attr "cc" "clobber")])
1403
1404 ;; Save r27-r29
1405 (define_insn "save_r27_r29"
1406 [(set (reg:SI 3) (plus:SI (reg:SI 3) (const_int -12)))
1407 (set (mem:SI (reg:SI 3)) (reg:SI 27))
1408 (set (mem:SI (plus:SI (reg:SI 3) (const_int -4))) (reg:SI 28))
1409 (set (mem:SI (plus:SI (reg:SI 3) (const_int -8))) (reg:SI 29))
1410 (clobber (reg:SI 10))]
1411 "TARGET_PROLOG_FUNCTION"
1412 "jarl __save_r27_r29,r10"
1413 [(set_attr "length" "4")
1414 (set_attr "cc" "clobber")])
1415
1416 ;; Save r28-r29
1417 (define_insn "save_r28_r29"
1418 [(set (reg:SI 3) (plus:SI (reg:SI 3) (const_int -8)))
1419 (set (mem:SI (reg:SI 3)) (reg:SI 28))
1420 (set (mem:SI (plus:SI (reg:SI 3) (const_int -4))) (reg:SI 29))
1421 (clobber (reg:SI 10))]
1422 "TARGET_PROLOG_FUNCTION"
1423 "jarl __save_r28_r29,r10"
1424 [(set_attr "length" "4")
1425 (set_attr "cc" "clobber")])
1426
1427 ;; Save r29
1428 (define_insn "save_r29"
1429 [(set (reg:SI 3) (plus:SI (reg:SI 3) (const_int -4)))
1430 (set (mem:SI (reg:SI 3)) (reg:SI 29))
1431 (clobber (reg:SI 10))]
1432 "TARGET_PROLOG_FUNCTION"
1433 "jarl __save_r29,r10"
1434 [(set_attr "length" "4")
1435 (set_attr "cc" "clobber")])
1436
1437 ;; Initialize an interrupt function. Do not depend on TARGET_PROLOG_FUNCTION.
1438 (define_insn "save_interrupt"
1439 [(set (reg:SI 3) (plus:SI (reg:SI 3) (const_int -16)))
1440 (set (mem:SI (reg:SI 3)) (reg:SI 30))
1441 (set (mem:SI (plus:SI (reg:SI 3) (const_int -4))) (reg:SI 10))
1442 (set (mem:SI (plus:SI (reg:SI 3) (const_int -8))) (reg:SI 5))
1443 (set (mem:SI (plus:SI (reg:SI 3) (const_int -12))) (reg:SI 1))]
1444 ""
1445 "add -16,sp\;st.w r10,12[sp]\;jarl __save_interrupt,r10"
1446 [(set_attr "length" "12")
1447 (set_attr "cc" "clobber")])
1448
1449 ;; Save all registers except for the registers saved in save_interrupt when
1450 ;; an interrupt function makes a call.
1451 ;; UNSPEC_VOLATILE is considered to use and clobber all hard registers and
1452 ;; all of memory. This blocks insns from being moved across this point.
1453 ;; This is needed because the rest of the compiler is not reading to handle
1454 ;; insns this compilcated
1455
1456 (define_insn "save_all_interrupt"
1457 [(unspec_volatile [(const_int 0)] 0)]
1458 ""
1459 "jarl __save_all_interrupt,r10"
1460 [(set_attr "length" "4")
1461 (set_attr "cc" "clobber")])
1462
1463 ;; Restore r2, r20-r29, r31, eliminate 16 byte register call area, and return to user
1464 (define_insn "restore_r2_r31"
1465 [(return)
1466 (set (reg:SI 3) (plus:SI (reg:SI 3) (const_int 64)))
1467 (set (reg:SI 2) (mem:SI (plus:SI (reg:SI 3) (const_int 60))))
1468 (set (reg:SI 20) (mem:SI (plus:SI (reg:SI 3) (const_int 56))))
1469 (set (reg:SI 21) (mem:SI (plus:SI (reg:SI 3) (const_int 52))))
1470 (set (reg:SI 22) (mem:SI (plus:SI (reg:SI 3) (const_int 48))))
1471 (set (reg:SI 23) (mem:SI (plus:SI (reg:SI 3) (const_int 44))))
1472 (set (reg:SI 24) (mem:SI (plus:SI (reg:SI 3) (const_int 40))))
1473 (set (reg:SI 25) (mem:SI (plus:SI (reg:SI 3) (const_int 36))))
1474 (set (reg:SI 26) (mem:SI (plus:SI (reg:SI 3) (const_int 32))))
1475 (set (reg:SI 27) (mem:SI (plus:SI (reg:SI 3) (const_int 28))))
1476 (set (reg:SI 28) (mem:SI (plus:SI (reg:SI 3) (const_int 24))))
1477 (set (reg:SI 29) (mem:SI (plus:SI (reg:SI 3) (const_int 20))))
1478 (set (reg:SI 31) (mem:SI (plus:SI (reg:SI 3) (const_int 16))))]
1479 "TARGET_PROLOG_FUNCTION"
1480 "jr __return_r2_r31"
1481 [(set_attr "length" "4")
1482 (set_attr "cc" "clobber")])
1483
1484 ;; Restore r20-r29, r31, eliminate 16 byte register call area, and return to user
1485 (define_insn "restore_r20_r31"
1486 [(return)
1487 (set (reg:SI 3) (plus:SI (reg:SI 3) (const_int 60)))
1488 (set (reg:SI 20) (mem:SI (plus:SI (reg:SI 3) (const_int 56))))
1489 (set (reg:SI 21) (mem:SI (plus:SI (reg:SI 3) (const_int 52))))
1490 (set (reg:SI 22) (mem:SI (plus:SI (reg:SI 3) (const_int 48))))
1491 (set (reg:SI 23) (mem:SI (plus:SI (reg:SI 3) (const_int 44))))
1492 (set (reg:SI 24) (mem:SI (plus:SI (reg:SI 3) (const_int 40))))
1493 (set (reg:SI 25) (mem:SI (plus:SI (reg:SI 3) (const_int 36))))
1494 (set (reg:SI 26) (mem:SI (plus:SI (reg:SI 3) (const_int 32))))
1495 (set (reg:SI 27) (mem:SI (plus:SI (reg:SI 3) (const_int 28))))
1496 (set (reg:SI 28) (mem:SI (plus:SI (reg:SI 3) (const_int 24))))
1497 (set (reg:SI 29) (mem:SI (plus:SI (reg:SI 3) (const_int 20))))
1498 (set (reg:SI 31) (mem:SI (plus:SI (reg:SI 3) (const_int 16))))]
1499 "TARGET_PROLOG_FUNCTION"
1500 "jr __return_r20_r31"
1501 [(set_attr "length" "4")
1502 (set_attr "cc" "clobber")])
1503
1504 ;; Restore r21-r29, r31, eliminate 16 byte register call area, and return to user
1505 (define_insn "restore_r21_r31"
1506 [(return)
1507 (set (reg:SI 3) (plus:SI (reg:SI 3) (const_int 56)))
1508 (set (reg:SI 21) (mem:SI (plus:SI (reg:SI 3) (const_int 52))))
1509 (set (reg:SI 22) (mem:SI (plus:SI (reg:SI 3) (const_int 48))))
1510 (set (reg:SI 23) (mem:SI (plus:SI (reg:SI 3) (const_int 44))))
1511 (set (reg:SI 24) (mem:SI (plus:SI (reg:SI 3) (const_int 40))))
1512 (set (reg:SI 25) (mem:SI (plus:SI (reg:SI 3) (const_int 36))))
1513 (set (reg:SI 26) (mem:SI (plus:SI (reg:SI 3) (const_int 32))))
1514 (set (reg:SI 27) (mem:SI (plus:SI (reg:SI 3) (const_int 28))))
1515 (set (reg:SI 28) (mem:SI (plus:SI (reg:SI 3) (const_int 24))))
1516 (set (reg:SI 29) (mem:SI (plus:SI (reg:SI 3) (const_int 20))))
1517 (set (reg:SI 31) (mem:SI (plus:SI (reg:SI 3) (const_int 16))))]
1518 "TARGET_PROLOG_FUNCTION"
1519 "jr __return_r21_r31"
1520 [(set_attr "length" "4")
1521 (set_attr "cc" "clobber")])
1522
1523 ;; Restore r22-r29, r31, eliminate 16 byte register call area, and return to user
1524 (define_insn "restore_r22_r31"
1525 [(return)
1526 (set (reg:SI 3) (plus:SI (reg:SI 3) (const_int 52)))
1527 (set (reg:SI 22) (mem:SI (plus:SI (reg:SI 3) (const_int 48))))
1528 (set (reg:SI 23) (mem:SI (plus:SI (reg:SI 3) (const_int 44))))
1529 (set (reg:SI 24) (mem:SI (plus:SI (reg:SI 3) (const_int 40))))
1530 (set (reg:SI 25) (mem:SI (plus:SI (reg:SI 3) (const_int 36))))
1531 (set (reg:SI 26) (mem:SI (plus:SI (reg:SI 3) (const_int 32))))
1532 (set (reg:SI 27) (mem:SI (plus:SI (reg:SI 3) (const_int 28))))
1533 (set (reg:SI 28) (mem:SI (plus:SI (reg:SI 3) (const_int 24))))
1534 (set (reg:SI 29) (mem:SI (plus:SI (reg:SI 3) (const_int 20))))
1535 (set (reg:SI 31) (mem:SI (plus:SI (reg:SI 3) (const_int 16))))]
1536 "TARGET_PROLOG_FUNCTION"
1537 "jr __return_r22_r31"
1538 [(set_attr "length" "4")
1539 (set_attr "cc" "clobber")])
1540
1541 ;; Restore r23-r29, r31, eliminate 16 byte register call area, and return to user
1542 (define_insn "restore_r23_r31"
1543 [(return)
1544 (set (reg:SI 3) (plus:SI (reg:SI 3) (const_int 48)))
1545 (set (reg:SI 23) (mem:SI (plus:SI (reg:SI 3) (const_int 44))))
1546 (set (reg:SI 24) (mem:SI (plus:SI (reg:SI 3) (const_int 40))))
1547 (set (reg:SI 25) (mem:SI (plus:SI (reg:SI 3) (const_int 36))))
1548 (set (reg:SI 26) (mem:SI (plus:SI (reg:SI 3) (const_int 32))))
1549 (set (reg:SI 27) (mem:SI (plus:SI (reg:SI 3) (const_int 28))))
1550 (set (reg:SI 28) (mem:SI (plus:SI (reg:SI 3) (const_int 24))))
1551 (set (reg:SI 29) (mem:SI (plus:SI (reg:SI 3) (const_int 20))))
1552 (set (reg:SI 31) (mem:SI (plus:SI (reg:SI 3) (const_int 16))))]
1553 "TARGET_PROLOG_FUNCTION"
1554 "jr __return_r23_r31"
1555 [(set_attr "length" "4")
1556 (set_attr "cc" "clobber")])
1557
1558 ;; Restore r24-r29, r31, eliminate 16 byte register call area, and return to user
1559 (define_insn "restore_r24_r31"
1560 [(return)
1561 (set (reg:SI 3) (plus:SI (reg:SI 3) (const_int 44)))
1562 (set (reg:SI 24) (mem:SI (plus:SI (reg:SI 3) (const_int 40))))
1563 (set (reg:SI 25) (mem:SI (plus:SI (reg:SI 3) (const_int 36))))
1564 (set (reg:SI 26) (mem:SI (plus:SI (reg:SI 3) (const_int 32))))
1565 (set (reg:SI 27) (mem:SI (plus:SI (reg:SI 3) (const_int 28))))
1566 (set (reg:SI 28) (mem:SI (plus:SI (reg:SI 3) (const_int 24))))
1567 (set (reg:SI 29) (mem:SI (plus:SI (reg:SI 3) (const_int 20))))
1568 (set (reg:SI 31) (mem:SI (plus:SI (reg:SI 3) (const_int 16))))]
1569 "TARGET_PROLOG_FUNCTION"
1570 "jr __return_r24_r31"
1571 [(set_attr "length" "4")
1572 (set_attr "cc" "clobber")])
1573
1574 ;; Restore r25-r29, r31, eliminate 16 byte register call area, and return to user
1575 (define_insn "restore_r25_r31"
1576 [(return)
1577 (set (reg:SI 3) (plus:SI (reg:SI 3) (const_int 40)))
1578 (set (reg:SI 25) (mem:SI (plus:SI (reg:SI 3) (const_int 36))))
1579 (set (reg:SI 26) (mem:SI (plus:SI (reg:SI 3) (const_int 32))))
1580 (set (reg:SI 27) (mem:SI (plus:SI (reg:SI 3) (const_int 28))))
1581 (set (reg:SI 28) (mem:SI (plus:SI (reg:SI 3) (const_int 24))))
1582 (set (reg:SI 29) (mem:SI (plus:SI (reg:SI 3) (const_int 20))))
1583 (set (reg:SI 31) (mem:SI (plus:SI (reg:SI 3) (const_int 16))))]
1584 "TARGET_PROLOG_FUNCTION"
1585 "jr __return_r25_r31"
1586 [(set_attr "length" "4")
1587 (set_attr "cc" "clobber")])
1588
1589 ;; Restore r26-r29, r31, eliminate 16 byte register call area, and return to user
1590 (define_insn "restore_r26_r31"
1591 [(return)
1592 (set (reg:SI 3) (plus:SI (reg:SI 3) (const_int 36)))
1593 (set (reg:SI 26) (mem:SI (plus:SI (reg:SI 3) (const_int 32))))
1594 (set (reg:SI 27) (mem:SI (plus:SI (reg:SI 3) (const_int 28))))
1595 (set (reg:SI 28) (mem:SI (plus:SI (reg:SI 3) (const_int 24))))
1596 (set (reg:SI 29) (mem:SI (plus:SI (reg:SI 3) (const_int 20))))
1597 (set (reg:SI 31) (mem:SI (plus:SI (reg:SI 3) (const_int 16))))]
1598 "TARGET_PROLOG_FUNCTION"
1599 "jr __return_r26_r31"
1600 [(set_attr "length" "4")
1601 (set_attr "cc" "clobber")])
1602
1603 ;; Restore r27-r29, r31, eliminate 16 byte register call area, and return to user
1604 (define_insn "restore_r27_r31"
1605 [(return)
1606 (set (reg:SI 3) (plus:SI (reg:SI 3) (const_int 32)))
1607 (set (reg:SI 27) (mem:SI (plus:SI (reg:SI 3) (const_int 28))))
1608 (set (reg:SI 28) (mem:SI (plus:SI (reg:SI 3) (const_int 24))))
1609 (set (reg:SI 29) (mem:SI (plus:SI (reg:SI 3) (const_int 20))))
1610 (set (reg:SI 31) (mem:SI (plus:SI (reg:SI 3) (const_int 16))))]
1611 "TARGET_PROLOG_FUNCTION"
1612 "jr __return_r27_r31"
1613 [(set_attr "length" "4")
1614 (set_attr "cc" "clobber")])
1615
1616 ;; Restore r28-r29, r31, eliminate 16 byte register call area, and return to user
1617 (define_insn "restore_r28_r31"
1618 [(return)
1619 (set (reg:SI 3) (plus:SI (reg:SI 3) (const_int 28)))
1620 (set (reg:SI 28) (mem:SI (plus:SI (reg:SI 3) (const_int 24))))
1621 (set (reg:SI 29) (mem:SI (plus:SI (reg:SI 3) (const_int 20))))
1622 (set (reg:SI 31) (mem:SI (plus:SI (reg:SI 3) (const_int 16))))]
1623 "TARGET_PROLOG_FUNCTION"
1624 "jr __return_r28_r31"
1625 [(set_attr "length" "4")
1626 (set_attr "cc" "clobber")])
1627
1628 ;; Restore r29, r31, eliminate 16 byte register call area, and return to user
1629 (define_insn "restore_r29_r31"
1630 [(return)
1631 (set (reg:SI 3) (plus:SI (reg:SI 3) (const_int 24)))
1632 (set (reg:SI 29) (mem:SI (plus:SI (reg:SI 3) (const_int 20))))
1633 (set (reg:SI 31) (mem:SI (plus:SI (reg:SI 3) (const_int 16))))]
1634 "TARGET_PROLOG_FUNCTION"
1635 "jr __return_r29_r31"
1636 [(set_attr "length" "4")
1637 (set_attr "cc" "clobber")])
1638
1639 ;; Restore r31, eliminate 16 byte register call area, and return to user
1640 (define_insn "restore_r31"
1641 [(return)
1642 (set (reg:SI 3) (plus:SI (reg:SI 3) (const_int 20)))
1643 (set (reg:SI 31) (mem:SI (plus:SI (reg:SI 3) (const_int 16))))]
1644 "TARGET_PROLOG_FUNCTION"
1645 "jr __return_r31"
1646 [(set_attr "length" "4")
1647 (set_attr "cc" "clobber")])
1648
1649 ;; Restore r2, r20-r29, and return to user
1650 (define_insn "restore_r2_r29"
1651 [(return)
1652 (set (reg:SI 3) (plus:SI (reg:SI 3) (const_int 48)))
1653 (set (reg:SI 2) (mem:SI (plus:SI (reg:SI 3) (const_int 44))))
1654 (set (reg:SI 20) (mem:SI (plus:SI (reg:SI 3) (const_int 40))))
1655 (set (reg:SI 21) (mem:SI (plus:SI (reg:SI 3) (const_int 36))))
1656 (set (reg:SI 22) (mem:SI (plus:SI (reg:SI 3) (const_int 32))))
1657 (set (reg:SI 23) (mem:SI (plus:SI (reg:SI 3) (const_int 28))))
1658 (set (reg:SI 24) (mem:SI (plus:SI (reg:SI 3) (const_int 24))))
1659 (set (reg:SI 25) (mem:SI (plus:SI (reg:SI 3) (const_int 20))))
1660 (set (reg:SI 26) (mem:SI (plus:SI (reg:SI 3) (const_int 16))))
1661 (set (reg:SI 27) (mem:SI (plus:SI (reg:SI 3) (const_int 12))))
1662 (set (reg:SI 28) (mem:SI (plus:SI (reg:SI 3) (const_int 8))))
1663 (set (reg:SI 29) (mem:SI (plus:SI (reg:SI 3) (const_int 4))))]
1664 "TARGET_PROLOG_FUNCTION"
1665 "jr __return_r2_r29"
1666 [(set_attr "length" "4")
1667 (set_attr "cc" "clobber")])
1668
1669 ;; Restore r20-r29, and return to user
1670 (define_insn "restore_r20_r29"
1671 [(return)
1672 (set (reg:SI 3) (plus:SI (reg:SI 3) (const_int 44)))
1673 (set (reg:SI 20) (mem:SI (plus:SI (reg:SI 3) (const_int 40))))
1674 (set (reg:SI 21) (mem:SI (plus:SI (reg:SI 3) (const_int 36))))
1675 (set (reg:SI 22) (mem:SI (plus:SI (reg:SI 3) (const_int 32))))
1676 (set (reg:SI 23) (mem:SI (plus:SI (reg:SI 3) (const_int 28))))
1677 (set (reg:SI 24) (mem:SI (plus:SI (reg:SI 3) (const_int 24))))
1678 (set (reg:SI 25) (mem:SI (plus:SI (reg:SI 3) (const_int 20))))
1679 (set (reg:SI 26) (mem:SI (plus:SI (reg:SI 3) (const_int 16))))
1680 (set (reg:SI 27) (mem:SI (plus:SI (reg:SI 3) (const_int 12))))
1681 (set (reg:SI 28) (mem:SI (plus:SI (reg:SI 3) (const_int 8))))
1682 (set (reg:SI 29) (mem:SI (plus:SI (reg:SI 3) (const_int 4))))]
1683 "TARGET_PROLOG_FUNCTION"
1684 "jr __return_r20_r29"
1685 [(set_attr "length" "4")
1686 (set_attr "cc" "clobber")])
1687
1688 ;; Restore r21-r29, and return to user
1689 (define_insn "restore_r21_r29"
1690 [(return)
1691 (set (reg:SI 3) (plus:SI (reg:SI 3) (const_int 40)))
1692 (set (reg:SI 21) (mem:SI (plus:SI (reg:SI 3) (const_int 36))))
1693 (set (reg:SI 22) (mem:SI (plus:SI (reg:SI 3) (const_int 32))))
1694 (set (reg:SI 23) (mem:SI (plus:SI (reg:SI 3) (const_int 28))))
1695 (set (reg:SI 24) (mem:SI (plus:SI (reg:SI 3) (const_int 24))))
1696 (set (reg:SI 25) (mem:SI (plus:SI (reg:SI 3) (const_int 20))))
1697 (set (reg:SI 26) (mem:SI (plus:SI (reg:SI 3) (const_int 16))))
1698 (set (reg:SI 27) (mem:SI (plus:SI (reg:SI 3) (const_int 12))))
1699 (set (reg:SI 28) (mem:SI (plus:SI (reg:SI 3) (const_int 8))))
1700 (set (reg:SI 29) (mem:SI (plus:SI (reg:SI 3) (const_int 4))))]
1701 "TARGET_PROLOG_FUNCTION"
1702 "jr __return_r21_r29"
1703 [(set_attr "length" "4")
1704 (set_attr "cc" "clobber")])
1705
1706 ;; Restore r22-r29, and return to user
1707 (define_insn "restore_r22_r29"
1708 [(return)
1709 (set (reg:SI 3) (plus:SI (reg:SI 3) (const_int 36)))
1710 (set (reg:SI 22) (mem:SI (plus:SI (reg:SI 3) (const_int 32))))
1711 (set (reg:SI 23) (mem:SI (plus:SI (reg:SI 3) (const_int 28))))
1712 (set (reg:SI 24) (mem:SI (plus:SI (reg:SI 3) (const_int 24))))
1713 (set (reg:SI 25) (mem:SI (plus:SI (reg:SI 3) (const_int 20))))
1714 (set (reg:SI 26) (mem:SI (plus:SI (reg:SI 3) (const_int 16))))
1715 (set (reg:SI 27) (mem:SI (plus:SI (reg:SI 3) (const_int 12))))
1716 (set (reg:SI 28) (mem:SI (plus:SI (reg:SI 3) (const_int 8))))
1717 (set (reg:SI 29) (mem:SI (plus:SI (reg:SI 3) (const_int 4))))]
1718 "TARGET_PROLOG_FUNCTION"
1719 "jr __return_r22_r29"
1720 [(set_attr "length" "4")
1721 (set_attr "cc" "clobber")])
1722
1723 ;; Restore r23-r29, and return to user
1724 (define_insn "restore_r23_r29"
1725 [(return)
1726 (set (reg:SI 3) (plus:SI (reg:SI 3) (const_int 32)))
1727 (set (reg:SI 23) (mem:SI (plus:SI (reg:SI 3) (const_int 28))))
1728 (set (reg:SI 24) (mem:SI (plus:SI (reg:SI 3) (const_int 24))))
1729 (set (reg:SI 25) (mem:SI (plus:SI (reg:SI 3) (const_int 20))))
1730 (set (reg:SI 26) (mem:SI (plus:SI (reg:SI 3) (const_int 16))))
1731 (set (reg:SI 27) (mem:SI (plus:SI (reg:SI 3) (const_int 12))))
1732 (set (reg:SI 28) (mem:SI (plus:SI (reg:SI 3) (const_int 8))))
1733 (set (reg:SI 29) (mem:SI (plus:SI (reg:SI 3) (const_int 4))))]
1734 "TARGET_PROLOG_FUNCTION"
1735 "jr __return_r23_r29"
1736 [(set_attr "length" "4")
1737 (set_attr "cc" "clobber")])
1738
1739 ;; Restore r24-r29, and return to user
1740 (define_insn "restore_r24_r29"
1741 [(return)
1742 (set (reg:SI 3) (plus:SI (reg:SI 3) (const_int 28)))
1743 (set (reg:SI 24) (mem:SI (plus:SI (reg:SI 3) (const_int 24))))
1744 (set (reg:SI 25) (mem:SI (plus:SI (reg:SI 3) (const_int 20))))
1745 (set (reg:SI 26) (mem:SI (plus:SI (reg:SI 3) (const_int 16))))
1746 (set (reg:SI 27) (mem:SI (plus:SI (reg:SI 3) (const_int 12))))
1747 (set (reg:SI 28) (mem:SI (plus:SI (reg:SI 3) (const_int 8))))
1748 (set (reg:SI 29) (mem:SI (plus:SI (reg:SI 3) (const_int 4))))]
1749 "TARGET_PROLOG_FUNCTION"
1750 "jr __return_r24_r29"
1751 [(set_attr "length" "4")
1752 (set_attr "cc" "clobber")])
1753
1754 ;; Restore r25-r29, and return to user
1755 (define_insn "restore_r25_r29"
1756 [(return)
1757 (set (reg:SI 3) (plus:SI (reg:SI 3) (const_int 24)))
1758 (set (reg:SI 25) (mem:SI (plus:SI (reg:SI 3) (const_int 20))))
1759 (set (reg:SI 26) (mem:SI (plus:SI (reg:SI 3) (const_int 16))))
1760 (set (reg:SI 27) (mem:SI (plus:SI (reg:SI 3) (const_int 12))))
1761 (set (reg:SI 28) (mem:SI (plus:SI (reg:SI 3) (const_int 8))))
1762 (set (reg:SI 29) (mem:SI (plus:SI (reg:SI 3) (const_int 4))))]
1763 "TARGET_PROLOG_FUNCTION"
1764 "jr __return_r25_r29"
1765 [(set_attr "length" "4")
1766 (set_attr "cc" "clobber")])
1767
1768 ;; Restore r26-r29, and return to user
1769 (define_insn "restore_r26_r29"
1770 [(return)
1771 (set (reg:SI 3) (plus:SI (reg:SI 3) (const_int 20)))
1772 (set (reg:SI 26) (mem:SI (plus:SI (reg:SI 3) (const_int 16))))
1773 (set (reg:SI 27) (mem:SI (plus:SI (reg:SI 3) (const_int 12))))
1774 (set (reg:SI 28) (mem:SI (plus:SI (reg:SI 3) (const_int 8))))
1775 (set (reg:SI 29) (mem:SI (plus:SI (reg:SI 3) (const_int 4))))]
1776 "TARGET_PROLOG_FUNCTION"
1777 "jr __return_r26_r29"
1778 [(set_attr "length" "4")
1779 (set_attr "cc" "clobber")])
1780
1781 ;; Restore r27-r29, and return to user
1782 (define_insn "restore_r27_r29"
1783 [(return)
1784 (set (reg:SI 3) (plus:SI (reg:SI 3) (const_int 16)))
1785 (set (reg:SI 27) (mem:SI (plus:SI (reg:SI 3) (const_int 12))))
1786 (set (reg:SI 28) (mem:SI (plus:SI (reg:SI 3) (const_int 8))))
1787 (set (reg:SI 29) (mem:SI (plus:SI (reg:SI 3) (const_int 4))))]
1788 "TARGET_PROLOG_FUNCTION"
1789 "jr __return_r27_r29"
1790 [(set_attr "length" "4")
1791 (set_attr "cc" "clobber")])
1792
1793 ;; Restore r28-r29, and return to user
1794 (define_insn "restore_r28_r29"
1795 [(return)
1796 (set (reg:SI 3) (plus:SI (reg:SI 3) (const_int 12)))
1797 (set (reg:SI 28) (mem:SI (plus:SI (reg:SI 3) (const_int 8))))
1798 (set (reg:SI 29) (mem:SI (plus:SI (reg:SI 3) (const_int 4))))]
1799 "TARGET_PROLOG_FUNCTION"
1800 "jr __return_r28_r29"
1801 [(set_attr "length" "4")
1802 (set_attr "cc" "clobber")])
1803
1804 ;; Restore r29, and return to user
1805 (define_insn "restore_r29"
1806 [(return)
1807 (set (reg:SI 3) (plus:SI (reg:SI 3) (const_int 8)))
1808 (set (reg:SI 29) (mem:SI (plus:SI (reg:SI 3) (const_int 4))))]
1809 "TARGET_PROLOG_FUNCTION"
1810 "jr __return_r29"
1811 [(set_attr "length" "4")
1812 (set_attr "cc" "clobber")])
1813
1814 ;; Restore r1, r5, r10, and return from the interrupt
1815 (define_insn "restore_interrupt"
1816 [(return)
1817 (set (reg:SI 3) (plus:SI (reg:SI 3) (const_int 16)))
1818 (set (reg:SI 30) (mem:SI (plus:SI (reg:SI 3) (const_int 12))))
1819 (set (reg:SI 10) (mem:SI (plus:SI (reg:SI 3) (const_int 8))))
1820 (set (reg:SI 5) (mem:SI (plus:SI (reg:SI 3) (const_int 4))))
1821 (set (reg:SI 1) (mem:SI (reg:SI 3)))]
1822 ""
1823 "jr __return_interrupt"
1824 [(set_attr "length" "4")
1825 (set_attr "cc" "clobber")])
1826
1827 ;; Restore all registers saved when an interrupt function makes a call.
1828 ;; UNSPEC_VOLATILE is considered to use and clobber all hard registers and
1829 ;; all of memory. This blocks insns from being moved across this point.
1830 ;; This is needed because the rest of the compiler is not reading to handle
1831 ;; insns this compilcated
1832
1833 (define_insn "restore_all_interrupt"
1834 [(unspec_volatile [(const_int 0)] 1)]
1835 ""
1836 "jarl __restore_all_interrupt,r10"
1837 [(set_attr "length" "4")
1838 (set_attr "cc" "clobber")])
1839
1840 ;; Save r6-r9 for a variable argument function
1841 (define_insn "save_r6_r9"
1842 [(set (mem:SI (reg:SI 3)) (reg:SI 6))
1843 (set (mem:SI (plus:SI (reg:SI 3) (const_int 4))) (reg:SI 7))
1844 (set (mem:SI (plus:SI (reg:SI 3) (const_int 8))) (reg:SI 8))
1845 (set (mem:SI (plus:SI (reg:SI 3) (const_int 12))) (reg:SI 9))
1846 (clobber (reg:SI 10))]
1847 "TARGET_PROLOG_FUNCTION"
1848 "jarl __save_r6_r9,r10"
1849 [(set_attr "length" "4")
1850 (set_attr "cc" "clobber")])