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1 /* Definitions of target machine for GNU compiler. VAX version.
2 Copyright (C) 1987, 1988, 1991, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GCC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22
23 /* Target CPU builtins. */
24 #define TARGET_CPU_CPP_BUILTINS() \
25 do \
26 { \
27 builtin_define ("__vax__"); \
28 builtin_assert ("cpu=vax"); \
29 builtin_assert ("machine=vax"); \
30 if (TARGET_G_FLOAT) \
31 { \
32 builtin_define ("__GFLOAT"); \
33 builtin_define ("__GFLOAT__"); \
34 } \
35 } \
36 while (0)
37
38 #define VMS_TARGET 0
39
40 /* Use -J option for long branch support with Unix assembler. */
41
42 #define ASM_SPEC "-J"
43
44 /* Choose proper libraries depending on float format.
45 Note that there are no profiling libraries for g-format.
46 Also use -lg for the sake of dbx. */
47
48 #define LIB_SPEC "%{g:-lg}\
49 %{mg:%{lm:-lmg} -lcg \
50 %{p:%eprofiling not supported with -mg\n}\
51 %{pg:%eprofiling not supported with -mg\n}}\
52 %{!mg:%{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}}"
53
54 /* Print subsidiary information on the compiler version in use. */
55
56 #ifndef TARGET_NAME /* A more specific value might be supplied via -D. */
57 #define TARGET_NAME "vax"
58 #endif
59 #define TARGET_VERSION fprintf (stderr, " (%s)", TARGET_NAME)
60
61 /* Run-time compilation parameters selecting different hardware subsets. */
62
63 extern int target_flags;
64
65 #define MASK_UNIX_ASM 1
66 #define MASK_VAXC_ALIGNMENT 2
67 #define MASK_G_FLOAT 4
68
69
70 /* Macros used in the machine description to test the flags. */
71
72 /* Nonzero if compiling code that Unix assembler can assemble. */
73 #define TARGET_UNIX_ASM (target_flags & MASK_UNIX_ASM)
74
75 /* Nonzero if compiling with VAX-11 "C" style structure alignment */
76 #define TARGET_VAXC_ALIGNMENT (target_flags & MASK_VAXC_ALIGNMENT)
77
78 /* Nonzero if compiling with `G'-format floating point */
79 #define TARGET_G_FLOAT (target_flags & MASK_G_FLOAT)
80
81 /* Nonzero if ELF. Redefined by vax/elf.h. */
82 #define TARGET_ELF 0
83
84 /* Macro to define tables used to set the flags.
85 This is a list in braces of pairs in braces,
86 each pair being { "NAME", VALUE }
87 where VALUE is the bits to set or minus the bits to clear.
88 An empty string NAME is used to identify the default VALUE. */
89
90 #define TARGET_SWITCHES \
91 { {"unix", MASK_UNIX_ASM, \
92 "Generate code for UNIX assembler"}, \
93 {"gnu", -MASK_UNIX_ASM, \
94 "Generate code for GNU assembler (gas)"}, \
95 {"vaxc-alignment", MASK_VAXC_ALIGNMENT, \
96 "Use VAXC structure conventions"}, \
97 {"g", MASK_G_FLOAT, \
98 "Generate GFLOAT double precision code"}, \
99 {"g-float", MASK_G_FLOAT, \
100 "Generate GFLOAT double precision code"}, \
101 {"d", -MASK_G_FLOAT, \
102 "Generate DFLOAT double precision code"}, \
103 {"d-float", -MASK_G_FLOAT, \
104 "Generate DFLOAT double precision code"}, \
105 { "", TARGET_DEFAULT, 0}}
106
107 /* Default target_flags if no switches specified. */
108
109 #ifndef TARGET_DEFAULT
110 #define TARGET_DEFAULT (MASK_UNIX_ASM)
111 #endif
112
113 #define OVERRIDE_OPTIONS override_options ()
114
115 \f
116 /* Target machine storage layout */
117
118 /* Define this if most significant bit is lowest numbered
119 in instructions that operate on numbered bit-fields.
120 This is not true on the VAX. */
121 #define BITS_BIG_ENDIAN 0
122
123 /* Define this if most significant byte of a word is the lowest numbered. */
124 /* That is not true on the VAX. */
125 #define BYTES_BIG_ENDIAN 0
126
127 /* Define this if most significant word of a multiword number is the lowest
128 numbered. */
129 /* This is not true on the VAX. */
130 #define WORDS_BIG_ENDIAN 0
131
132 /* Width of a word, in units (bytes). */
133 #define UNITS_PER_WORD 4
134
135 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
136 #define PARM_BOUNDARY 32
137
138 /* Allocation boundary (in *bits*) for the code of a function. */
139 #define FUNCTION_BOUNDARY 16
140
141 /* Alignment of field after `int : 0' in a structure. */
142 #define EMPTY_FIELD_BOUNDARY (TARGET_VAXC_ALIGNMENT ? 8 : 32)
143
144 /* Every structure's size must be a multiple of this. */
145 #define STRUCTURE_SIZE_BOUNDARY 8
146
147 /* A bit-field declared as `int' forces `int' alignment for the struct. */
148 #define PCC_BITFIELD_TYPE_MATTERS (! TARGET_VAXC_ALIGNMENT)
149
150 /* No data type wants to be aligned rounder than this. */
151 #define BIGGEST_ALIGNMENT 32
152
153 /* No structure field wants to be aligned rounder than this. */
154 #define BIGGEST_FIELD_ALIGNMENT (TARGET_VAXC_ALIGNMENT ? 8 : 32)
155
156 /* Set this nonzero if move instructions will actually fail to work
157 when given unaligned data. */
158 #define STRICT_ALIGNMENT 0
159
160 /* Let's keep the stack somewhat aligned. */
161 #define STACK_BOUNDARY 32
162
163 /* The table of an ADDR_DIFF_VEC must be contiguous with the case
164 opcode, it is part of the case instruction. */
165 #define ADDR_VEC_ALIGN(ADDR_VEC) 0
166 \f
167 /* Standard register usage. */
168
169 /* Number of actual hardware registers.
170 The hardware registers are assigned numbers for the compiler
171 from 0 to just below FIRST_PSEUDO_REGISTER.
172 All registers that the compiler knows about must be given numbers,
173 even those that are not normally considered general registers. */
174 #define FIRST_PSEUDO_REGISTER 16
175
176 /* 1 for registers that have pervasive standard uses
177 and are not available for the register allocator.
178 On the VAX, these are the AP, FP, SP and PC. */
179 #define FIXED_REGISTERS {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1}
180
181 /* 1 for registers not available across function calls.
182 These must include the FIXED_REGISTERS and also any
183 registers that can be used without being saved.
184 The latter must include the registers where values are returned
185 and the register where structure-value addresses are passed.
186 Aside from that, you can include as many other registers as you like. */
187 #define CALL_USED_REGISTERS {1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1}
188
189 /* Return number of consecutive hard regs needed starting at reg REGNO
190 to hold something of mode MODE.
191 This is ordinarily the length in words of a value of mode MODE
192 but can be less for certain modes in special long registers.
193 On the VAX, all registers are one word long. */
194 #define HARD_REGNO_NREGS(REGNO, MODE) \
195 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
196
197 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
198 On the VAX, all registers can hold all modes. */
199 #define HARD_REGNO_MODE_OK(REGNO, MODE) 1
200
201 /* Value is 1 if it is a good idea to tie two pseudo registers
202 when one has mode MODE1 and one has mode MODE2.
203 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
204 for any hard reg, then this must be 0 for correct output. */
205 #define MODES_TIEABLE_P(MODE1, MODE2) 1
206
207 /* Specify the registers used for certain standard purposes.
208 The values of these macros are register numbers. */
209
210 /* VAX pc is overloaded on a register. */
211 #define PC_REGNUM 15
212
213 /* Register to use for pushing function arguments. */
214 #define STACK_POINTER_REGNUM 14
215
216 /* Base register for access to local variables of the function. */
217 #define FRAME_POINTER_REGNUM 13
218
219 /* Value should be nonzero if functions must have frame pointers.
220 Zero means the frame pointer need not be set up (and parms
221 may be accessed via the stack pointer) in functions that seem suitable.
222 This is computed in `reload', in reload1.c. */
223 #define FRAME_POINTER_REQUIRED 1
224
225 /* Base register for access to arguments of the function. */
226 #define ARG_POINTER_REGNUM 12
227
228 /* Register in which static-chain is passed to a function. */
229 #define STATIC_CHAIN_REGNUM 0
230
231 /* Register in which address to store a structure value
232 is passed to a function. */
233 #define VAX_STRUCT_VALUE_REGNUM 1
234 \f
235 /* Define the classes of registers for register constraints in the
236 machine description. Also define ranges of constants.
237
238 One of the classes must always be named ALL_REGS and include all hard regs.
239 If there is more than one class, another class must be named NO_REGS
240 and contain no registers.
241
242 The name GENERAL_REGS must be the name of a class (or an alias for
243 another name such as ALL_REGS). This is the class of registers
244 that is allowed by "g" or "r" in a register constraint.
245 Also, registers outside this class are allocated only when
246 instructions express preferences for them.
247
248 The classes must be numbered in nondecreasing order; that is,
249 a larger-numbered class must never be contained completely
250 in a smaller-numbered class.
251
252 For any two classes, it is very desirable that there be another
253 class that represents their union. */
254
255 /* The VAX has only one kind of registers, so NO_REGS and ALL_REGS
256 are the only classes. */
257
258 enum reg_class { NO_REGS, ALL_REGS, LIM_REG_CLASSES };
259
260 #define N_REG_CLASSES (int) LIM_REG_CLASSES
261
262 /* Since GENERAL_REGS is the same class as ALL_REGS,
263 don't give it a different class number; just make it an alias. */
264
265 #define GENERAL_REGS ALL_REGS
266
267 /* Give names of register classes as strings for dump file. */
268
269 #define REG_CLASS_NAMES \
270 {"NO_REGS", "ALL_REGS" }
271
272 /* Define which registers fit in which classes.
273 This is an initializer for a vector of HARD_REG_SET
274 of length N_REG_CLASSES. */
275
276 #define REG_CLASS_CONTENTS {{0}, {0xffff}}
277
278 /* The same information, inverted:
279 Return the class number of the smallest class containing
280 reg number REGNO. This could be a conditional expression
281 or could index an array. */
282
283 #define REGNO_REG_CLASS(REGNO) ALL_REGS
284
285 /* The class value for index registers, and the one for base regs. */
286
287 #define INDEX_REG_CLASS ALL_REGS
288 #define BASE_REG_CLASS ALL_REGS
289
290 /* Get reg_class from a letter such as appears in the machine description. */
291
292 #define REG_CLASS_FROM_LETTER(C) NO_REGS
293
294 /* The letters I, J, K, L, M, N, and O in a register constraint string
295 can be used to stand for particular ranges of immediate operands.
296 This macro defines what the ranges are.
297 C is the letter, and VALUE is a constant value.
298 Return 1 if VALUE is in the range specified by C.
299
300 `I' is the constant zero.
301 `J' is a value between 0 .. 63 (inclusive)
302 `K' is a value between -128 and 127 (inclusive)
303 'L' is a value between -32768 and 32767 (inclusive)
304 `M' is a value between 0 and 255 (inclusive)
305 'N' is a value between 0 and 65535 (inclusive)
306 `O' is a value between -63 and -1 (inclusive) */
307
308 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
309 ( (C) == 'I' ? (VALUE) == 0 \
310 : (C) == 'J' ? 0 <= (VALUE) && (VALUE) < 64 \
311 : (C) == 'O' ? -63 <= (VALUE) && (VALUE) < 0 \
312 : (C) == 'K' ? -128 <= (VALUE) && (VALUE) < 128 \
313 : (C) == 'M' ? 0 <= (VALUE) && (VALUE) < 256 \
314 : (C) == 'L' ? -32768 <= (VALUE) && (VALUE) < 32768 \
315 : (C) == 'N' ? 0 <= (VALUE) && (VALUE) < 65536 \
316 : 0)
317
318 /* Similar, but for floating constants, and defining letters G and H.
319 Here VALUE is the CONST_DOUBLE rtx itself.
320
321 `G' is a floating-point zero. */
322
323 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
324 ((C) == 'G' ? ((VALUE) == CONST0_RTX (DFmode) \
325 || (VALUE) == CONST0_RTX (SFmode)) \
326 : 0)
327
328 /* Optional extra constraints for this machine.
329
330 For the VAX, `Q' means that OP is a MEM that does not have a mode-dependent
331 address. */
332
333 #define EXTRA_CONSTRAINT(OP, C) \
334 ((C) == 'Q' \
335 ? GET_CODE (OP) == MEM && ! mode_dependent_address_p (XEXP (OP, 0)) \
336 : 0)
337
338 /* Given an rtx X being reloaded into a reg required to be
339 in class CLASS, return the class of reg to actually use.
340 In general this is just CLASS; but on some machines
341 in some cases it is preferable to use a more restrictive class. */
342
343 #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
344
345 /* Return the maximum number of consecutive registers
346 needed to represent mode MODE in a register of class CLASS. */
347 /* On the VAX, this is always the size of MODE in words,
348 since all registers are the same size. */
349 #define CLASS_MAX_NREGS(CLASS, MODE) \
350 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
351 \f
352 /* Stack layout; function entry, exit and calling. */
353
354 /* Define this if pushing a word on the stack
355 makes the stack pointer a smaller address. */
356 #define STACK_GROWS_DOWNWARD
357
358 /* Define this if the nominal address of the stack frame
359 is at the high-address end of the local variables;
360 that is, each additional local variable allocated
361 goes at a more negative offset in the frame. */
362 #define FRAME_GROWS_DOWNWARD
363
364 /* Offset within stack frame to start allocating local variables at.
365 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
366 first local allocated. Otherwise, it is the offset to the BEGINNING
367 of the first local allocated. */
368 #define STARTING_FRAME_OFFSET 0
369
370 /* Given an rtx for the address of a frame,
371 return an rtx for the address of the word in the frame
372 that holds the dynamic chain--the previous frame's address. */
373 #define DYNAMIC_CHAIN_ADDRESS(FRAME) plus_constant ((FRAME), 12)
374
375 /* If we generate an insn to push BYTES bytes,
376 this says how many the stack pointer really advances by.
377 On the VAX, -(sp) pushes only the bytes of the operands. */
378 #define PUSH_ROUNDING(BYTES) (BYTES)
379
380 /* Offset of first parameter from the argument pointer register value. */
381 #define FIRST_PARM_OFFSET(FNDECL) 4
382
383 /* Value is the number of bytes of arguments automatically
384 popped when returning from a subroutine call.
385 FUNDECL is the declaration node of the function (as a tree),
386 FUNTYPE is the data type of the function (as a tree),
387 or for a library call it is an identifier node for the subroutine name.
388 SIZE is the number of bytes of arguments passed on the stack.
389
390 On the VAX, the RET insn pops a maximum of 255 args for any function. */
391
392 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) \
393 ((SIZE) > 255*4 ? 0 : (SIZE))
394
395 /* Define how to find the value returned by a function.
396 VALTYPE is the data type of the value (as a tree).
397 If the precise function being called is known, FUNC is its FUNCTION_DECL;
398 otherwise, FUNC is 0. */
399
400 /* On the VAX the return value is in R0 regardless. */
401
402 #define FUNCTION_VALUE(VALTYPE, FUNC) \
403 gen_rtx_REG (TYPE_MODE (VALTYPE), 0)
404
405 /* Define how to find the value returned by a library function
406 assuming the value has mode MODE. */
407
408 /* On the VAX the return value is in R0 regardless. */
409
410 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 0)
411
412 /* Define this if PCC uses the nonreentrant convention for returning
413 structure and union values. */
414
415 #define PCC_STATIC_STRUCT_RETURN
416
417 /* 1 if N is a possible register number for a function value.
418 On the VAX, R0 is the only register thus used. */
419
420 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0)
421
422 /* 1 if N is a possible register number for function argument passing.
423 On the VAX, no registers are used in this way. */
424
425 #define FUNCTION_ARG_REGNO_P(N) 0
426 \f
427 /* Define a data type for recording info about an argument list
428 during the scan of that argument list. This data type should
429 hold all necessary information about the function itself
430 and about the args processed so far, enough to enable macros
431 such as FUNCTION_ARG to determine where the next arg should go.
432
433 On the VAX, this is a single integer, which is a number of bytes
434 of arguments scanned so far. */
435
436 #define CUMULATIVE_ARGS int
437
438 /* Initialize a variable CUM of type CUMULATIVE_ARGS
439 for a call to a function whose data type is FNTYPE.
440 For a library call, FNTYPE is 0.
441
442 On the VAX, the offset starts at 0. */
443
444 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
445 ((CUM) = 0)
446
447 /* Update the data in CUM to advance over an argument
448 of mode MODE and data type TYPE.
449 (TYPE is null for libcalls where that information may not be available.) */
450
451 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
452 ((CUM) += ((MODE) != BLKmode \
453 ? (GET_MODE_SIZE (MODE) + 3) & ~3 \
454 : (int_size_in_bytes (TYPE) + 3) & ~3))
455
456 /* Define where to put the arguments to a function.
457 Value is zero to push the argument on the stack,
458 or a hard register in which to store the argument.
459
460 MODE is the argument's machine mode.
461 TYPE is the data type of the argument (as a tree).
462 This is null for libcalls where that information may
463 not be available.
464 CUM is a variable of type CUMULATIVE_ARGS which gives info about
465 the preceding args and about the function being called.
466 NAMED is nonzero if this argument is a named parameter
467 (otherwise it is an extra parameter matching an ellipsis). */
468
469 /* On the VAX all args are pushed. */
470
471 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) 0
472
473 /* Output assembler code to FILE to increment profiler label # LABELNO
474 for profiling a function entry. */
475
476 #define VAX_FUNCTION_PROFILER_NAME "mcount"
477 #define FUNCTION_PROFILER(FILE, LABELNO) \
478 do \
479 { \
480 char label[256]; \
481 ASM_GENERATE_INTERNAL_LABEL (label, "LP", (LABELNO)); \
482 fprintf (FILE, "\tmovab "); \
483 assemble_name (FILE, label); \
484 asm_fprintf (FILE, ",%Rr0\n\tjsb %s\n", \
485 VAX_FUNCTION_PROFILER_NAME); \
486 } \
487 while (0)
488
489 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
490 the stack pointer does not matter. The value is tested only in
491 functions that have frame pointers.
492 No definition is equivalent to always zero. */
493
494 #define EXIT_IGNORE_STACK 1
495
496 /* Store in the variable DEPTH the initial difference between the
497 frame pointer reg contents and the stack pointer reg contents,
498 as of the start of the function body. This depends on the layout
499 of the fixed parts of the stack frame and on how registers are saved.
500
501 On the VAX, FRAME_POINTER_REQUIRED is always 1, so the definition of this
502 macro doesn't matter. But it must be defined. */
503
504 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = 0;
505
506 /* Output assembler code for a block containing the constant parts
507 of a trampoline, leaving space for the variable parts. */
508
509 /* On the VAX, the trampoline contains an entry mask and two instructions:
510 .word NN
511 movl $STATIC,r0 (store the functions static chain)
512 jmp *$FUNCTION (jump to function code at address FUNCTION) */
513
514 #define TRAMPOLINE_TEMPLATE(FILE) \
515 { \
516 assemble_aligned_integer (2, const0_rtx); \
517 assemble_aligned_integer (2, GEN_INT (0x8fd0)); \
518 assemble_aligned_integer (4, const0_rtx); \
519 assemble_aligned_integer (1, GEN_INT (0x50 + STATIC_CHAIN_REGNUM)); \
520 assemble_aligned_integer (2, GEN_INT (0x9f17)); \
521 assemble_aligned_integer (4, const0_rtx); \
522 }
523
524 /* Length in units of the trampoline for entering a nested function. */
525
526 #define TRAMPOLINE_SIZE 15
527
528 /* Emit RTL insns to initialize the variable parts of a trampoline.
529 FNADDR is an RTX for the address of the function's pure code.
530 CXT is an RTX for the static chain value for the function. */
531
532 /* We copy the register-mask from the function's pure code
533 to the start of the trampoline. */
534 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
535 { \
536 emit_move_insn (gen_rtx_MEM (HImode, TRAMP), \
537 gen_rtx_MEM (HImode, FNADDR)); \
538 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 4)), CXT); \
539 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 11)), \
540 plus_constant (FNADDR, 2)); \
541 emit_insn (gen_sync_istream ()); \
542 }
543
544 /* Byte offset of return address in a stack frame. The "saved PC" field
545 is in element [4] when treating the frame as an array of longwords. */
546
547 #define RETURN_ADDRESS_OFFSET (4 * UNITS_PER_WORD) /* 16 */
548
549 /* A C expression whose value is RTL representing the value of the return
550 address for the frame COUNT steps up from the current frame.
551 FRAMEADDR is already the frame pointer of the COUNT frame, so we
552 can ignore COUNT. */
553
554 #define RETURN_ADDR_RTX(COUNT, FRAME) \
555 ((COUNT == 0) \
556 ? gen_rtx_MEM (Pmode, plus_constant (FRAME, RETURN_ADDRESS_OFFSET)) \
557 : (rtx) 0)
558
559 \f
560 /* Addressing modes, and classification of registers for them. */
561
562 #define HAVE_POST_INCREMENT 1
563
564 #define HAVE_PRE_DECREMENT 1
565
566 /* Macros to check register numbers against specific register classes. */
567
568 /* These assume that REGNO is a hard or pseudo reg number.
569 They give nonzero only if REGNO is a hard reg of the suitable class
570 or a pseudo reg currently allocated to a suitable hard reg.
571 Since they use reg_renumber, they are safe only once reg_renumber
572 has been allocated, which happens in local-alloc.c. */
573
574 #define REGNO_OK_FOR_INDEX_P(regno) \
575 ((regno) < FIRST_PSEUDO_REGISTER || reg_renumber[regno] >= 0)
576 #define REGNO_OK_FOR_BASE_P(regno) \
577 ((regno) < FIRST_PSEUDO_REGISTER || reg_renumber[regno] >= 0)
578 \f
579 /* Maximum number of registers that can appear in a valid memory address. */
580
581 #define MAX_REGS_PER_ADDRESS 2
582
583 /* 1 if X is an rtx for a constant that is a valid address. */
584
585 #define CONSTANT_ADDRESS_P(X) \
586 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
587 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
588 || GET_CODE (X) == HIGH)
589
590 /* Nonzero if the constant value X is a legitimate general operand.
591 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
592
593 #define LEGITIMATE_CONSTANT_P(X) 1
594
595 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
596 and check its validity for a certain class.
597 We have two alternate definitions for each of them.
598 The usual definition accepts all pseudo regs; the other rejects
599 them unless they have been allocated suitable hard regs.
600 The symbol REG_OK_STRICT causes the latter definition to be used.
601
602 Most source files want to accept pseudo regs in the hope that
603 they will get allocated to the class that the insn wants them to be in.
604 Source files for reload pass need to be strict.
605 After reload, it makes no difference, since pseudo regs have
606 been eliminated by then. */
607
608 #ifndef REG_OK_STRICT
609
610 /* Nonzero if X is a hard reg that can be used as an index
611 or if it is a pseudo reg. */
612 #define REG_OK_FOR_INDEX_P(X) 1
613 /* Nonzero if X is a hard reg that can be used as a base reg
614 or if it is a pseudo reg. */
615 #define REG_OK_FOR_BASE_P(X) 1
616
617 #else
618
619 /* Nonzero if X is a hard reg that can be used as an index. */
620 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
621 /* Nonzero if X is a hard reg that can be used as a base reg. */
622 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
623
624 #endif
625 \f
626 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
627 that is a valid memory address for an instruction.
628 The MODE argument is the machine mode for the MEM expression
629 that wants to use this address.
630
631 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
632 except for CONSTANT_ADDRESS_P which is actually machine-independent. */
633
634 #ifdef NO_EXTERNAL_INDIRECT_ADDRESS
635
636 /* Zero if this contains a (CONST (PLUS (SYMBOL_REF) (...))) and the
637 symbol in the SYMBOL_REF is an external symbol. */
638
639 #define INDIRECTABLE_CONSTANT_P(X) \
640 (! (GET_CODE ((X)) == CONST \
641 && GET_CODE (XEXP ((X), 0)) == PLUS \
642 && GET_CODE (XEXP (XEXP ((X), 0), 0)) == SYMBOL_REF \
643 && SYMBOL_REF_FLAG (XEXP (XEXP ((X), 0), 0))))
644
645 /* Re-definition of CONSTANT_ADDRESS_P, which is true only when there
646 are no SYMBOL_REFs for external symbols present. */
647
648 #define INDIRECTABLE_CONSTANT_ADDRESS_P(X) \
649 (GET_CODE (X) == LABEL_REF \
650 || (GET_CODE (X) == SYMBOL_REF && !SYMBOL_REF_FLAG (X)) \
651 || (GET_CODE (X) == CONST && INDIRECTABLE_CONSTANT_P(X)) \
652 || GET_CODE (X) == CONST_INT)
653
654
655 /* Nonzero if X is an address which can be indirected. External symbols
656 could be in a sharable image library, so we disallow those. */
657
658 #define INDIRECTABLE_ADDRESS_P(X) \
659 (INDIRECTABLE_CONSTANT_ADDRESS_P (X) \
660 || (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
661 || (GET_CODE (X) == PLUS \
662 && GET_CODE (XEXP (X, 0)) == REG \
663 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
664 && INDIRECTABLE_CONSTANT_ADDRESS_P (XEXP (X, 1))))
665
666 #else /* not NO_EXTERNAL_INDIRECT_ADDRESS */
667
668 #define INDIRECTABLE_CONSTANT_ADDRESS_P(X) CONSTANT_ADDRESS_P(X)
669
670 /* Nonzero if X is an address which can be indirected. */
671 #define INDIRECTABLE_ADDRESS_P(X) \
672 (CONSTANT_ADDRESS_P (X) \
673 || (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
674 || (GET_CODE (X) == PLUS \
675 && GET_CODE (XEXP (X, 0)) == REG \
676 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
677 && CONSTANT_ADDRESS_P (XEXP (X, 1))))
678
679 #endif /* not NO_EXTERNAL_INDIRECT_ADDRESS */
680
681 /* Go to ADDR if X is a valid address not using indexing.
682 (This much is the easy part.) */
683 #define GO_IF_NONINDEXED_ADDRESS(X, ADDR) \
684 { register rtx xfoob = (X); \
685 if (GET_CODE (xfoob) == REG) \
686 { \
687 extern rtx *reg_equiv_mem; \
688 if (! reload_in_progress \
689 || reg_equiv_mem[REGNO (xfoob)] == 0 \
690 || INDIRECTABLE_ADDRESS_P (reg_equiv_mem[REGNO (xfoob)])) \
691 goto ADDR; \
692 } \
693 if (CONSTANT_ADDRESS_P (xfoob)) goto ADDR; \
694 if (INDIRECTABLE_ADDRESS_P (xfoob)) goto ADDR; \
695 xfoob = XEXP (X, 0); \
696 if (GET_CODE (X) == MEM && INDIRECTABLE_ADDRESS_P (xfoob)) \
697 goto ADDR; \
698 if ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_INC) \
699 && GET_CODE (xfoob) == REG && REG_OK_FOR_BASE_P (xfoob)) \
700 goto ADDR; }
701
702 /* 1 if PROD is either a reg times size of mode MODE and MODE is less
703 than or equal 8 bytes, or just a reg if MODE is one byte.
704 This macro's expansion uses the temporary variables xfoo0 and xfoo1
705 that must be declared in the surrounding context. */
706 #define INDEX_TERM_P(PROD, MODE) \
707 (GET_MODE_SIZE (MODE) == 1 \
708 ? (GET_CODE (PROD) == REG && REG_OK_FOR_BASE_P (PROD)) \
709 : (GET_CODE (PROD) == MULT && GET_MODE_SIZE (MODE) <= 8 \
710 && \
711 (xfoo0 = XEXP (PROD, 0), xfoo1 = XEXP (PROD, 1), \
712 ((((GET_CODE (xfoo0) == CONST_INT \
713 && GET_CODE (xfoo1) == REG) \
714 && INTVAL (xfoo0) == (int)GET_MODE_SIZE (MODE)) \
715 && REG_OK_FOR_INDEX_P (xfoo1)) \
716 || \
717 (((GET_CODE (xfoo1) == CONST_INT \
718 && GET_CODE (xfoo0) == REG) \
719 && INTVAL (xfoo1) == (int)GET_MODE_SIZE (MODE)) \
720 && REG_OK_FOR_INDEX_P (xfoo0))))))
721
722 /* Go to ADDR if X is the sum of a register
723 and a valid index term for mode MODE. */
724 #define GO_IF_REG_PLUS_INDEX(X, MODE, ADDR) \
725 { register rtx xfooa; \
726 if (GET_CODE (X) == PLUS) \
727 { if (GET_CODE (XEXP (X, 0)) == REG \
728 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
729 && (xfooa = XEXP (X, 1), \
730 INDEX_TERM_P (xfooa, MODE))) \
731 goto ADDR; \
732 if (GET_CODE (XEXP (X, 1)) == REG \
733 && REG_OK_FOR_BASE_P (XEXP (X, 1)) \
734 && (xfooa = XEXP (X, 0), \
735 INDEX_TERM_P (xfooa, MODE))) \
736 goto ADDR; } }
737
738 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
739 { register rtx xfoo, xfoo0, xfoo1; \
740 GO_IF_NONINDEXED_ADDRESS (X, ADDR); \
741 if (GET_CODE (X) == PLUS) \
742 { /* Handle <address>[index] represented with index-sum outermost */\
743 xfoo = XEXP (X, 0); \
744 if (INDEX_TERM_P (xfoo, MODE)) \
745 { GO_IF_NONINDEXED_ADDRESS (XEXP (X, 1), ADDR); } \
746 xfoo = XEXP (X, 1); \
747 if (INDEX_TERM_P (xfoo, MODE)) \
748 { GO_IF_NONINDEXED_ADDRESS (XEXP (X, 0), ADDR); } \
749 /* Handle offset(reg)[index] with offset added outermost */ \
750 if (INDIRECTABLE_CONSTANT_ADDRESS_P (XEXP (X, 0))) \
751 { if (GET_CODE (XEXP (X, 1)) == REG \
752 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
753 goto ADDR; \
754 GO_IF_REG_PLUS_INDEX (XEXP (X, 1), MODE, ADDR); } \
755 if (INDIRECTABLE_CONSTANT_ADDRESS_P (XEXP (X, 1))) \
756 { if (GET_CODE (XEXP (X, 0)) == REG \
757 && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
758 goto ADDR; \
759 GO_IF_REG_PLUS_INDEX (XEXP (X, 0), MODE, ADDR); } } }
760 \f
761 /* Go to LABEL if ADDR (a legitimate address expression)
762 has an effect that depends on the machine mode it is used for.
763 On the VAX, the predecrement and postincrement address depend thus
764 (the amount of decrement or increment being the length of the operand)
765 and all indexed address depend thus (because the index scale factor
766 is the length of the operand). */
767 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
768 { if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == PRE_DEC) \
769 goto LABEL; \
770 if (GET_CODE (ADDR) == PLUS) \
771 { if (CONSTANT_ADDRESS_P (XEXP (ADDR, 0)) \
772 && GET_CODE (XEXP (ADDR, 1)) == REG); \
773 else if (CONSTANT_ADDRESS_P (XEXP (ADDR, 1)) \
774 && GET_CODE (XEXP (ADDR, 0)) == REG); \
775 else goto LABEL; }}
776 \f
777 /* Specify the machine mode that this machine uses
778 for the index in the tablejump instruction. */
779 #define CASE_VECTOR_MODE HImode
780
781 /* Define as C expression which evaluates to nonzero if the tablejump
782 instruction expects the table to contain offsets from the address of the
783 table.
784 Do not define this if the table should contain absolute addresses. */
785 #define CASE_VECTOR_PC_RELATIVE 1
786
787 /* Indicate that jump tables go in the text section. This is
788 necessary when compiling PIC code. */
789 #define JUMP_TABLES_IN_TEXT_SECTION 1
790
791 /* Define this as 1 if `char' should by default be signed; else as 0. */
792 #define DEFAULT_SIGNED_CHAR 1
793
794 /* This flag, if defined, says the same insns that convert to a signed fixnum
795 also convert validly to an unsigned one. */
796 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
797
798 /* Max number of bytes we can move from memory to memory
799 in one reasonably fast instruction. */
800 #define MOVE_MAX 8
801
802 /* Nonzero if access to memory by bytes is slow and undesirable. */
803 #define SLOW_BYTE_ACCESS 0
804
805 /* Define if shifts truncate the shift count
806 which implies one can omit a sign-extension or zero-extension
807 of a shift count. */
808 /* #define SHIFT_COUNT_TRUNCATED */
809
810 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
811 is done just by pretending it is already truncated. */
812 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
813
814 /* Specify the machine mode that pointers have.
815 After generation of rtl, the compiler makes no further distinction
816 between pointers and any other objects of this machine mode. */
817 #define Pmode SImode
818
819 /* A function address in a call instruction
820 is a byte address (for indexing purposes)
821 so give the MEM rtx a byte's mode. */
822 #define FUNCTION_MODE QImode
823
824 /* This machine doesn't use IEEE floats. */
825
826 #define TARGET_FLOAT_FORMAT VAX_FLOAT_FORMAT
827
828 /* Specify the cost of a branch insn; roughly the number of extra insns that
829 should be added to avoid a branch.
830
831 Branches are extremely cheap on the VAX while the shift insns often
832 used to replace branches can be expensive. */
833
834 #define BRANCH_COST 0
835 \f
836 /* Tell final.c how to eliminate redundant test instructions. */
837
838 /* Here we define machine-dependent flags and fields in cc_status
839 (see `conditions.h'). No extra ones are needed for the VAX. */
840
841 /* Store in cc_status the expressions
842 that the condition codes will describe
843 after execution of an instruction whose pattern is EXP.
844 Do not alter them if the instruction would not alter the cc's. */
845
846 #define NOTICE_UPDATE_CC(EXP, INSN) \
847 vax_notice_update_cc ((EXP), (INSN))
848
849 #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
850 { if (cc_status.flags & CC_NO_OVERFLOW) \
851 return NO_OV; \
852 return NORMAL; }
853 \f
854 /* Control the assembler format that we output. */
855
856 /* A C string constant describing how to begin a comment in the target
857 assembler language. The compiler assumes that the comment will end at
858 the end of the line. */
859
860 #define ASM_COMMENT_START "#"
861
862 /* Output to assembler file text saying following lines
863 may contain character constants, extra white space, comments, etc. */
864
865 #define ASM_APP_ON "#APP\n"
866
867 /* Output to assembler file text saying following lines
868 no longer contain unusual constructs. */
869
870 #define ASM_APP_OFF "#NO_APP\n"
871
872 /* Output before read-only data. */
873
874 #define TEXT_SECTION_ASM_OP "\t.text"
875
876 /* Output before writable data. */
877
878 #define DATA_SECTION_ASM_OP "\t.data"
879
880 /* How to refer to registers in assembler output.
881 This sequence is indexed by compiler's hard-register-number (see above).
882 The register names will be prefixed by REGISTER_PREFIX, if any. */
883
884 #define REGISTER_PREFIX ""
885 #define REGISTER_NAMES \
886 {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", \
887 "r9", "r10", "r11", "ap", "fp", "sp", "pc"}
888
889 /* This is BSD, so it wants DBX format. */
890
891 #define DBX_DEBUGGING_INFO 1
892
893 /* Do not break .stabs pseudos into continuations. */
894
895 #define DBX_CONTIN_LENGTH 0
896
897 /* This is the char to use for continuation (in case we need to turn
898 continuation back on). */
899
900 #define DBX_CONTIN_CHAR '?'
901
902 /* Don't use the `xsfoo;' construct in DBX output; this system
903 doesn't support it. */
904
905 #define DBX_NO_XREFS
906
907 /* Output the .stabs for a C `static' variable in the data section. */
908 #define DBX_STATIC_STAB_DATA_SECTION
909
910 /* VAX specific: which type character is used for type double? */
911
912 #define ASM_DOUBLE_CHAR (TARGET_G_FLOAT ? 'g' : 'd')
913
914 /* This is how to output a command to make the user-level label named NAME
915 defined for reference from other files. */
916
917 /* Globalizing directive for a label. */
918 #define GLOBAL_ASM_OP ".globl "
919
920 /* The prefix to add to user-visible assembler symbols. */
921
922 #define USER_LABEL_PREFIX "_"
923
924 /* This is how to store into the string LABEL
925 the symbol_ref name of an internal numbered label where
926 PREFIX is the class of label and NUM is the number within the class.
927 This is suitable for output with `assemble_name'. */
928
929 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
930 sprintf (LABEL, "*%s%ld", PREFIX, (long)(NUM))
931
932 /* This is how to output an insn to push a register on the stack.
933 It need not be very fast code. */
934
935 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
936 fprintf (FILE, "\tpushl %s\n", reg_names[REGNO])
937
938 /* This is how to output an insn to pop a register from the stack.
939 It need not be very fast code. */
940
941 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
942 fprintf (FILE, "\tmovl (%s)+,%s\n", reg_names[STACK_POINTER_REGNUM], \
943 reg_names[REGNO])
944
945 /* This is how to output an element of a case-vector that is absolute.
946 (The VAX does not use such vectors,
947 but we must define this macro anyway.) */
948
949 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
950 do \
951 { \
952 char label[256]; \
953 ASM_GENERATE_INTERNAL_LABEL (label, "L", (VALUE));\
954 fprintf (FILE, "\t.long "); \
955 assemble_name (FILE, label); \
956 fprintf (FILE, "\n"); \
957 } \
958 while (0)
959
960 /* This is how to output an element of a case-vector that is relative. */
961
962 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
963 do \
964 { \
965 char label[256]; \
966 ASM_GENERATE_INTERNAL_LABEL (label, "L", (VALUE)); \
967 fprintf (FILE, "\t.word "); \
968 assemble_name (FILE, label); \
969 ASM_GENERATE_INTERNAL_LABEL (label, "L", (REL)); \
970 fprintf (FILE, "-"); \
971 assemble_name (FILE, label); \
972 fprintf (FILE, "\n"); \
973 } \
974 while (0)
975
976 /* This is how to output an assembler line
977 that says to advance the location counter
978 to a multiple of 2**LOG bytes. */
979
980 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
981 fprintf (FILE, "\t.align %d\n", (LOG))
982
983 /* This is how to output an assembler line
984 that says to advance the location counter by SIZE bytes. */
985
986 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
987 fprintf (FILE, "\t.space %u\n", (int)(SIZE))
988
989 /* This says how to output an assembler line
990 to define a global common symbol. */
991
992 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
993 ( fputs (".comm ", (FILE)), \
994 assemble_name ((FILE), (NAME)), \
995 fprintf ((FILE), ",%u\n", (int)(ROUNDED)))
996
997 /* This says how to output an assembler line
998 to define a local common symbol. */
999
1000 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1001 ( fputs (".lcomm ", (FILE)), \
1002 assemble_name ((FILE), (NAME)), \
1003 fprintf ((FILE), ",%u\n", (int)(ROUNDED)))
1004
1005 /* Store in OUTPUT a string (made with alloca) containing
1006 an assembler-name for a local static variable named NAME.
1007 LABELNO is an integer which is different for each call. */
1008
1009 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1010 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1011 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1012
1013 /* Print an instruction operand X on file FILE.
1014 CODE is the code from the %-spec that requested printing this operand;
1015 if `%z3' was used to print operand 3, then CODE is 'z'.
1016
1017 VAX operand formatting codes:
1018
1019 letter print
1020 C reverse branch condition
1021 D 64-bit immediate operand
1022 B the low 8 bits of the complement of a constant operand
1023 H the low 16 bits of the complement of a constant operand
1024 M a mask for the N highest bits of a word
1025 N the complement of a constant integer operand
1026 P constant operand plus 1
1027 R 32 - constant operand
1028 b the low 8 bits of a negated constant operand
1029 h the low 16 bits of a negated constant operand
1030 # 'd' or 'g' depending on whether dfloat or gfloat is used
1031 | register prefix */
1032
1033 /* The purpose of D is to get around a quirk or bug in VAX assembler
1034 whereby -1 in a 64-bit immediate operand means 0x00000000ffffffff,
1035 which is not a 64-bit minus one. As a workaround, we output negative
1036 values in hex. */
1037 #if HOST_BITS_PER_WIDE_INT == 64
1038 # define NEG_HWI_PRINT_HEX16 HOST_WIDE_INT_PRINT_HEX
1039 #else
1040 # define NEG_HWI_PRINT_HEX16 "0xffffffff%08lx"
1041 #endif
1042
1043 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1044 ((CODE) == '#' || (CODE) == '|')
1045
1046 #define PRINT_OPERAND(FILE, X, CODE) \
1047 { if (CODE == '#') fputc (ASM_DOUBLE_CHAR, FILE); \
1048 else if (CODE == '|') \
1049 fputs (REGISTER_PREFIX, FILE); \
1050 else if (CODE == 'C') \
1051 fputs (rev_cond_name (X), FILE); \
1052 else if (CODE == 'D' && GET_CODE (X) == CONST_INT && INTVAL (X) < 0) \
1053 fprintf (FILE, "$" NEG_HWI_PRINT_HEX16, INTVAL (X)); \
1054 else if (CODE == 'P' && GET_CODE (X) == CONST_INT) \
1055 fprintf (FILE, "$" HOST_WIDE_INT_PRINT_DEC, INTVAL (X) + 1); \
1056 else if (CODE == 'N' && GET_CODE (X) == CONST_INT) \
1057 fprintf (FILE, "$" HOST_WIDE_INT_PRINT_DEC, ~ INTVAL (X)); \
1058 /* rotl instruction cannot deal with negative arguments. */ \
1059 else if (CODE == 'R' && GET_CODE (X) == CONST_INT) \
1060 fprintf (FILE, "$" HOST_WIDE_INT_PRINT_DEC, 32 - INTVAL (X)); \
1061 else if (CODE == 'H' && GET_CODE (X) == CONST_INT) \
1062 fprintf (FILE, "$%d", (int) (0xffff & ~ INTVAL (X))); \
1063 else if (CODE == 'h' && GET_CODE (X) == CONST_INT) \
1064 fprintf (FILE, "$%d", (short) - INTVAL (x)); \
1065 else if (CODE == 'B' && GET_CODE (X) == CONST_INT) \
1066 fprintf (FILE, "$%d", (int) (0xff & ~ INTVAL (X))); \
1067 else if (CODE == 'b' && GET_CODE (X) == CONST_INT) \
1068 fprintf (FILE, "$%d", (int) (0xff & - INTVAL (X))); \
1069 else if (CODE == 'M' && GET_CODE (X) == CONST_INT) \
1070 fprintf (FILE, "$%d", ~((1 << INTVAL (x)) - 1)); \
1071 else if (GET_CODE (X) == REG) \
1072 fprintf (FILE, "%s", reg_names[REGNO (X)]); \
1073 else if (GET_CODE (X) == MEM) \
1074 output_address (XEXP (X, 0)); \
1075 else if (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) == SFmode) \
1076 { char dstr[30]; \
1077 real_to_decimal (dstr, CONST_DOUBLE_REAL_VALUE (X), \
1078 sizeof (dstr), 0, 1); \
1079 fprintf (FILE, "$0f%s", dstr); } \
1080 else if (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) == DFmode) \
1081 { char dstr[30]; \
1082 real_to_decimal (dstr, CONST_DOUBLE_REAL_VALUE (X), \
1083 sizeof (dstr), 0, 1); \
1084 fprintf (FILE, "$0%c%s", ASM_DOUBLE_CHAR, dstr); } \
1085 else { putc ('$', FILE); output_addr_const (FILE, X); }}
1086
1087 /* Print a memory operand whose address is X, on file FILE.
1088 This uses a function in output-vax.c. */
1089
1090 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1091 print_operand_address (FILE, ADDR)
1092
1093 /* This is a blatent lie. However, it's good enough, since we don't
1094 actually have any code whatsoever for which this isn't overridden
1095 by the proper FDE definition. */
1096 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, PC_REGNUM)