1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987-2020 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
31 #include "insn-config.h"
37 #include "cfgcleanup.h"
40 #include "rtlhooks-def.h"
41 #include "tree-pass.h"
45 #include "function-abi.h"
47 /* The basic idea of common subexpression elimination is to go
48 through the code, keeping a record of expressions that would
49 have the same value at the current scan point, and replacing
50 expressions encountered with the cheapest equivalent expression.
52 It is too complicated to keep track of the different possibilities
53 when control paths merge in this code; so, at each label, we forget all
54 that is known and start fresh. This can be described as processing each
55 extended basic block separately. We have a separate pass to perform
58 Note CSE can turn a conditional or computed jump into a nop or
59 an unconditional jump. When this occurs we arrange to run the jump
60 optimizer after CSE to delete the unreachable code.
62 We use two data structures to record the equivalent expressions:
63 a hash table for most expressions, and a vector of "quantity
64 numbers" to record equivalent (pseudo) registers.
66 The use of the special data structure for registers is desirable
67 because it is faster. It is possible because registers references
68 contain a fairly small number, the register number, taken from
69 a contiguously allocated series, and two register references are
70 identical if they have the same number. General expressions
71 do not have any such thing, so the only way to retrieve the
72 information recorded on an expression other than a register
73 is to keep it in a hash table.
75 Registers and "quantity numbers":
77 At the start of each basic block, all of the (hardware and pseudo)
78 registers used in the function are given distinct quantity
79 numbers to indicate their contents. During scan, when the code
80 copies one register into another, we copy the quantity number.
81 When a register is loaded in any other way, we allocate a new
82 quantity number to describe the value generated by this operation.
83 `REG_QTY (N)' records what quantity register N is currently thought
86 All real quantity numbers are greater than or equal to zero.
87 If register N has not been assigned a quantity, `REG_QTY (N)' will
88 equal -N - 1, which is always negative.
90 Quantity numbers below zero do not exist and none of the `qty_table'
91 entries should be referenced with a negative index.
93 We also maintain a bidirectional chain of registers for each
94 quantity number. The `qty_table` members `first_reg' and `last_reg',
95 and `reg_eqv_table' members `next' and `prev' hold these chains.
97 The first register in a chain is the one whose lifespan is least local.
98 Among equals, it is the one that was seen first.
99 We replace any equivalent register with that one.
101 If two registers have the same quantity number, it must be true that
102 REG expressions with qty_table `mode' must be in the hash table for both
103 registers and must be in the same class.
105 The converse is not true. Since hard registers may be referenced in
106 any mode, two REG expressions might be equivalent in the hash table
107 but not have the same quantity number if the quantity number of one
108 of the registers is not the same mode as those expressions.
110 Constants and quantity numbers
112 When a quantity has a known constant value, that value is stored
113 in the appropriate qty_table `const_rtx'. This is in addition to
114 putting the constant in the hash table as is usual for non-regs.
116 Whether a reg or a constant is preferred is determined by the configuration
117 macro CONST_COSTS and will often depend on the constant value. In any
118 event, expressions containing constants can be simplified, by fold_rtx.
120 When a quantity has a known nearly constant value (such as an address
121 of a stack slot), that value is stored in the appropriate qty_table
124 Integer constants don't have a machine mode. However, cse
125 determines the intended machine mode from the destination
126 of the instruction that moves the constant. The machine mode
127 is recorded in the hash table along with the actual RTL
128 constant expression so that different modes are kept separate.
132 To record known equivalences among expressions in general
133 we use a hash table called `table'. It has a fixed number of buckets
134 that contain chains of `struct table_elt' elements for expressions.
135 These chains connect the elements whose expressions have the same
138 Other chains through the same elements connect the elements which
139 currently have equivalent values.
141 Register references in an expression are canonicalized before hashing
142 the expression. This is done using `reg_qty' and qty_table `first_reg'.
143 The hash code of a register reference is computed using the quantity
144 number, not the register number.
146 When the value of an expression changes, it is necessary to remove from the
147 hash table not just that expression but all expressions whose values
148 could be different as a result.
150 1. If the value changing is in memory, except in special cases
151 ANYTHING referring to memory could be changed. That is because
152 nobody knows where a pointer does not point.
153 The function `invalidate_memory' removes what is necessary.
155 The special cases are when the address is constant or is
156 a constant plus a fixed register such as the frame pointer
157 or a static chain pointer. When such addresses are stored in,
158 we can tell exactly which other such addresses must be invalidated
159 due to overlap. `invalidate' does this.
160 All expressions that refer to non-constant
161 memory addresses are also invalidated. `invalidate_memory' does this.
163 2. If the value changing is a register, all expressions
164 containing references to that register, and only those,
167 Because searching the entire hash table for expressions that contain
168 a register is very slow, we try to figure out when it isn't necessary.
169 Precisely, this is necessary only when expressions have been
170 entered in the hash table using this register, and then the value has
171 changed, and then another expression wants to be added to refer to
172 the register's new value. This sequence of circumstances is rare
173 within any one basic block.
175 `REG_TICK' and `REG_IN_TABLE', accessors for members of
176 cse_reg_info, are used to detect this case. REG_TICK (i) is
177 incremented whenever a value is stored in register i.
178 REG_IN_TABLE (i) holds -1 if no references to register i have been
179 entered in the table; otherwise, it contains the value REG_TICK (i)
180 had when the references were entered. If we want to enter a
181 reference and REG_IN_TABLE (i) != REG_TICK (i), we must scan and
182 remove old references. Until we want to enter a new entry, the
183 mere fact that the two vectors don't match makes the entries be
184 ignored if anyone tries to match them.
186 Registers themselves are entered in the hash table as well as in
187 the equivalent-register chains. However, `REG_TICK' and
188 `REG_IN_TABLE' do not apply to expressions which are simple
189 register references. These expressions are removed from the table
190 immediately when they become invalid, and this can be done even if
191 we do not immediately search for all the expressions that refer to
194 A CLOBBER rtx in an instruction invalidates its operand for further
195 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
196 invalidates everything that resides in memory.
200 Constant expressions that differ only by an additive integer
201 are called related. When a constant expression is put in
202 the table, the related expression with no constant term
203 is also entered. These are made to point at each other
204 so that it is possible to find out if there exists any
205 register equivalent to an expression related to a given expression. */
207 /* Length of qty_table vector. We know in advance we will not need
208 a quantity number this big. */
212 /* Next quantity number to be allocated.
213 This is 1 + the largest number needed so far. */
217 /* Per-qty information tracking.
219 `first_reg' and `last_reg' track the head and tail of the
220 chain of registers which currently contain this quantity.
222 `mode' contains the machine mode of this quantity.
224 `const_rtx' holds the rtx of the constant value of this
225 quantity, if known. A summations of the frame/arg pointer
226 and a constant can also be entered here. When this holds
227 a known value, `const_insn' is the insn which stored the
230 `comparison_{code,const,qty}' are used to track when a
231 comparison between a quantity and some constant or register has
232 been passed. In such a case, we know the results of the comparison
233 in case we see it again. These members record a comparison that
234 is known to be true. `comparison_code' holds the rtx code of such
235 a comparison, else it is set to UNKNOWN and the other two
236 comparison members are undefined. `comparison_const' holds
237 the constant being compared against, or zero if the comparison
238 is not against a constant. `comparison_qty' holds the quantity
239 being compared against when the result is known. If the comparison
240 is not with a register, `comparison_qty' is -1. */
242 struct qty_table_elem
245 rtx_insn
*const_insn
;
246 rtx comparison_const
;
248 unsigned int first_reg
, last_reg
;
249 /* The sizes of these fields should match the sizes of the
250 code and mode fields of struct rtx_def (see rtl.h). */
251 ENUM_BITFIELD(rtx_code
) comparison_code
: 16;
252 ENUM_BITFIELD(machine_mode
) mode
: 8;
255 /* The table of all qtys, indexed by qty number. */
256 static struct qty_table_elem
*qty_table
;
258 /* For machines that have a CC0, we do not record its value in the hash
259 table since its use is guaranteed to be the insn immediately following
260 its definition and any other insn is presumed to invalidate it.
262 Instead, we store below the current and last value assigned to CC0.
263 If it should happen to be a constant, it is stored in preference
264 to the actual assigned value. In case it is a constant, we store
265 the mode in which the constant should be interpreted. */
267 static rtx this_insn_cc0
, prev_insn_cc0
;
268 static machine_mode this_insn_cc0_mode
, prev_insn_cc0_mode
;
270 /* Insn being scanned. */
272 static rtx_insn
*this_insn
;
273 static bool optimize_this_for_speed_p
;
275 /* Index by register number, gives the number of the next (or
276 previous) register in the chain of registers sharing the same
279 Or -1 if this register is at the end of the chain.
281 If REG_QTY (N) == -N - 1, reg_eqv_table[N].next is undefined. */
283 /* Per-register equivalence chain. */
289 /* The table of all register equivalence chains. */
290 static struct reg_eqv_elem
*reg_eqv_table
;
294 /* The timestamp at which this register is initialized. */
295 unsigned int timestamp
;
297 /* The quantity number of the register's current contents. */
300 /* The number of times the register has been altered in the current
304 /* The REG_TICK value at which rtx's containing this register are
305 valid in the hash table. If this does not equal the current
306 reg_tick value, such expressions existing in the hash table are
310 /* The SUBREG that was set when REG_TICK was last incremented. Set
311 to -1 if the last store was to the whole register, not a subreg. */
312 unsigned int subreg_ticked
;
315 /* A table of cse_reg_info indexed by register numbers. */
316 static struct cse_reg_info
*cse_reg_info_table
;
318 /* The size of the above table. */
319 static unsigned int cse_reg_info_table_size
;
321 /* The index of the first entry that has not been initialized. */
322 static unsigned int cse_reg_info_table_first_uninitialized
;
324 /* The timestamp at the beginning of the current run of
325 cse_extended_basic_block. We increment this variable at the beginning of
326 the current run of cse_extended_basic_block. The timestamp field of a
327 cse_reg_info entry matches the value of this variable if and only
328 if the entry has been initialized during the current run of
329 cse_extended_basic_block. */
330 static unsigned int cse_reg_info_timestamp
;
332 /* A HARD_REG_SET containing all the hard registers for which there is
333 currently a REG expression in the hash table. Note the difference
334 from the above variables, which indicate if the REG is mentioned in some
335 expression in the table. */
337 static HARD_REG_SET hard_regs_in_table
;
339 /* True if CSE has altered the CFG. */
340 static bool cse_cfg_altered
;
342 /* True if CSE has altered conditional jump insns in such a way
343 that jump optimization should be redone. */
344 static bool cse_jumps_altered
;
346 /* True if we put a LABEL_REF into the hash table for an INSN
347 without a REG_LABEL_OPERAND, we have to rerun jump after CSE
348 to put in the note. */
349 static bool recorded_label_ref
;
351 /* canon_hash stores 1 in do_not_record
352 if it notices a reference to CC0, PC, or some other volatile
355 static int do_not_record
;
357 /* canon_hash stores 1 in hash_arg_in_memory
358 if it notices a reference to memory within the expression being hashed. */
360 static int hash_arg_in_memory
;
362 /* The hash table contains buckets which are chains of `struct table_elt's,
363 each recording one expression's information.
364 That expression is in the `exp' field.
366 The canon_exp field contains a canonical (from the point of view of
367 alias analysis) version of the `exp' field.
369 Those elements with the same hash code are chained in both directions
370 through the `next_same_hash' and `prev_same_hash' fields.
372 Each set of expressions with equivalent values
373 are on a two-way chain through the `next_same_value'
374 and `prev_same_value' fields, and all point with
375 the `first_same_value' field at the first element in
376 that chain. The chain is in order of increasing cost.
377 Each element's cost value is in its `cost' field.
379 The `in_memory' field is nonzero for elements that
380 involve any reference to memory. These elements are removed
381 whenever a write is done to an unidentified location in memory.
382 To be safe, we assume that a memory address is unidentified unless
383 the address is either a symbol constant or a constant plus
384 the frame pointer or argument pointer.
386 The `related_value' field is used to connect related expressions
387 (that differ by adding an integer).
388 The related expressions are chained in a circular fashion.
389 `related_value' is zero for expressions for which this
392 The `cost' field stores the cost of this element's expression.
393 The `regcost' field stores the value returned by approx_reg_cost for
394 this element's expression.
396 The `is_const' flag is set if the element is a constant (including
399 The `flag' field is used as a temporary during some search routines.
401 The `mode' field is usually the same as GET_MODE (`exp'), but
402 if `exp' is a CONST_INT and has no machine mode then the `mode'
403 field is the mode it was being used as. Each constant is
404 recorded separately for each mode it is used with. */
410 struct table_elt
*next_same_hash
;
411 struct table_elt
*prev_same_hash
;
412 struct table_elt
*next_same_value
;
413 struct table_elt
*prev_same_value
;
414 struct table_elt
*first_same_value
;
415 struct table_elt
*related_value
;
418 /* The size of this field should match the size
419 of the mode field of struct rtx_def (see rtl.h). */
420 ENUM_BITFIELD(machine_mode
) mode
: 8;
426 /* We don't want a lot of buckets, because we rarely have very many
427 things stored in the hash table, and a lot of buckets slows
428 down a lot of loops that happen frequently. */
430 #define HASH_SIZE (1 << HASH_SHIFT)
431 #define HASH_MASK (HASH_SIZE - 1)
433 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
434 register (hard registers may require `do_not_record' to be set). */
437 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
438 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
439 : canon_hash (X, M)) & HASH_MASK)
441 /* Like HASH, but without side-effects. */
442 #define SAFE_HASH(X, M) \
443 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
444 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
445 : safe_hash (X, M)) & HASH_MASK)
447 /* Determine whether register number N is considered a fixed register for the
448 purpose of approximating register costs.
449 It is desirable to replace other regs with fixed regs, to reduce need for
451 A reg wins if it is either the frame pointer or designated as fixed. */
452 #define FIXED_REGNO_P(N) \
453 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
454 || fixed_regs[N] || global_regs[N])
456 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
457 hard registers and pointers into the frame are the cheapest with a cost
458 of 0. Next come pseudos with a cost of one and other hard registers with
459 a cost of 2. Aside from these special cases, call `rtx_cost'. */
461 #define CHEAP_REGNO(N) \
462 (REGNO_PTR_FRAME_P (N) \
463 || (HARD_REGISTER_NUM_P (N) \
464 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
466 #define COST(X, MODE) \
467 (REG_P (X) ? 0 : notreg_cost (X, MODE, SET, 1))
468 #define COST_IN(X, MODE, OUTER, OPNO) \
469 (REG_P (X) ? 0 : notreg_cost (X, MODE, OUTER, OPNO))
471 /* Get the number of times this register has been updated in this
474 #define REG_TICK(N) (get_cse_reg_info (N)->reg_tick)
476 /* Get the point at which REG was recorded in the table. */
478 #define REG_IN_TABLE(N) (get_cse_reg_info (N)->reg_in_table)
480 /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a
483 #define SUBREG_TICKED(N) (get_cse_reg_info (N)->subreg_ticked)
485 /* Get the quantity number for REG. */
487 #define REG_QTY(N) (get_cse_reg_info (N)->reg_qty)
489 /* Determine if the quantity number for register X represents a valid index
490 into the qty_table. */
492 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) >= 0)
494 /* Compare table_elt X and Y and return true iff X is cheaper than Y. */
496 #define CHEAPER(X, Y) \
497 (preferable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
499 static struct table_elt
*table
[HASH_SIZE
];
501 /* Chain of `struct table_elt's made so far for this function
502 but currently removed from the table. */
504 static struct table_elt
*free_element_chain
;
506 /* Set to the cost of a constant pool reference if one was found for a
507 symbolic constant. If this was found, it means we should try to
508 convert constants into constant pool entries if they don't fit in
511 static int constant_pool_entries_cost
;
512 static int constant_pool_entries_regcost
;
514 /* Trace a patch through the CFG. */
518 /* The basic block for this path entry. */
522 /* This data describes a block that will be processed by
523 cse_extended_basic_block. */
525 struct cse_basic_block_data
527 /* Total number of SETs in block. */
529 /* Size of current branch path, if any. */
531 /* Current path, indicating which basic_blocks will be processed. */
532 struct branch_path
*path
;
536 /* Pointers to the live in/live out bitmaps for the boundaries of the
538 static bitmap cse_ebb_live_in
, cse_ebb_live_out
;
540 /* A simple bitmap to track which basic blocks have been visited
541 already as part of an already processed extended basic block. */
542 static sbitmap cse_visited_basic_blocks
;
544 static bool fixed_base_plus_p (rtx x
);
545 static int notreg_cost (rtx
, machine_mode
, enum rtx_code
, int);
546 static int preferable (int, int, int, int);
547 static void new_basic_block (void);
548 static void make_new_qty (unsigned int, machine_mode
);
549 static void make_regs_eqv (unsigned int, unsigned int);
550 static void delete_reg_equiv (unsigned int);
551 static int mention_regs (rtx
);
552 static int insert_regs (rtx
, struct table_elt
*, int);
553 static void remove_from_table (struct table_elt
*, unsigned);
554 static void remove_pseudo_from_table (rtx
, unsigned);
555 static struct table_elt
*lookup (rtx
, unsigned, machine_mode
);
556 static struct table_elt
*lookup_for_remove (rtx
, unsigned, machine_mode
);
557 static rtx
lookup_as_function (rtx
, enum rtx_code
);
558 static struct table_elt
*insert_with_costs (rtx
, struct table_elt
*, unsigned,
559 machine_mode
, int, int);
560 static struct table_elt
*insert (rtx
, struct table_elt
*, unsigned,
562 static void merge_equiv_classes (struct table_elt
*, struct table_elt
*);
563 static void invalidate (rtx
, machine_mode
);
564 static void remove_invalid_refs (unsigned int);
565 static void remove_invalid_subreg_refs (unsigned int, poly_uint64
,
567 static void rehash_using_reg (rtx
);
568 static void invalidate_memory (void);
569 static rtx
use_related_value (rtx
, struct table_elt
*);
571 static inline unsigned canon_hash (rtx
, machine_mode
);
572 static inline unsigned safe_hash (rtx
, machine_mode
);
573 static inline unsigned hash_rtx_string (const char *);
575 static rtx
canon_reg (rtx
, rtx_insn
*);
576 static enum rtx_code
find_comparison_args (enum rtx_code
, rtx
*, rtx
*,
579 static rtx
fold_rtx (rtx
, rtx_insn
*);
580 static rtx
equiv_constant (rtx
);
581 static void record_jump_equiv (rtx_insn
*, bool);
582 static void record_jump_cond (enum rtx_code
, machine_mode
, rtx
, rtx
,
584 static void cse_insn (rtx_insn
*);
585 static void cse_prescan_path (struct cse_basic_block_data
*);
586 static void invalidate_from_clobbers (rtx_insn
*);
587 static void invalidate_from_sets_and_clobbers (rtx_insn
*);
588 static rtx
cse_process_notes (rtx
, rtx
, bool *);
589 static void cse_extended_basic_block (struct cse_basic_block_data
*);
590 extern void dump_class (struct table_elt
*);
591 static void get_cse_reg_info_1 (unsigned int regno
);
592 static struct cse_reg_info
* get_cse_reg_info (unsigned int regno
);
594 static void flush_hash_table (void);
595 static bool insn_live_p (rtx_insn
*, int *);
596 static bool set_live_p (rtx
, rtx_insn
*, int *);
597 static void cse_change_cc_mode_insn (rtx_insn
*, rtx
);
598 static void cse_change_cc_mode_insns (rtx_insn
*, rtx_insn
*, rtx
);
599 static machine_mode
cse_cc_succs (basic_block
, basic_block
, rtx
, rtx
,
603 #undef RTL_HOOKS_GEN_LOWPART
604 #define RTL_HOOKS_GEN_LOWPART gen_lowpart_if_possible
606 static const struct rtl_hooks cse_rtl_hooks
= RTL_HOOKS_INITIALIZER
;
608 /* Nonzero if X has the form (PLUS frame-pointer integer). */
611 fixed_base_plus_p (rtx x
)
613 switch (GET_CODE (x
))
616 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
)
618 if (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
])
623 if (!CONST_INT_P (XEXP (x
, 1)))
625 return fixed_base_plus_p (XEXP (x
, 0));
632 /* Dump the expressions in the equivalence class indicated by CLASSP.
633 This function is used only for debugging. */
635 dump_class (struct table_elt
*classp
)
637 struct table_elt
*elt
;
639 fprintf (stderr
, "Equivalence chain for ");
640 print_rtl (stderr
, classp
->exp
);
641 fprintf (stderr
, ": \n");
643 for (elt
= classp
->first_same_value
; elt
; elt
= elt
->next_same_value
)
645 print_rtl (stderr
, elt
->exp
);
646 fprintf (stderr
, "\n");
650 /* Return an estimate of the cost of the registers used in an rtx.
651 This is mostly the number of different REG expressions in the rtx;
652 however for some exceptions like fixed registers we use a cost of
653 0. If any other hard register reference occurs, return MAX_COST. */
656 approx_reg_cost (const_rtx x
)
659 subrtx_iterator::array_type array
;
660 FOR_EACH_SUBRTX (iter
, array
, x
, NONCONST
)
665 unsigned int regno
= REGNO (x
);
666 if (!CHEAP_REGNO (regno
))
668 if (regno
< FIRST_PSEUDO_REGISTER
)
670 if (targetm
.small_register_classes_for_mode_p (GET_MODE (x
)))
682 /* Return a negative value if an rtx A, whose costs are given by COST_A
683 and REGCOST_A, is more desirable than an rtx B.
684 Return a positive value if A is less desirable, or 0 if the two are
687 preferable (int cost_a
, int regcost_a
, int cost_b
, int regcost_b
)
689 /* First, get rid of cases involving expressions that are entirely
691 if (cost_a
!= cost_b
)
693 if (cost_a
== MAX_COST
)
695 if (cost_b
== MAX_COST
)
699 /* Avoid extending lifetimes of hardregs. */
700 if (regcost_a
!= regcost_b
)
702 if (regcost_a
== MAX_COST
)
704 if (regcost_b
== MAX_COST
)
708 /* Normal operation costs take precedence. */
709 if (cost_a
!= cost_b
)
710 return cost_a
- cost_b
;
711 /* Only if these are identical consider effects on register pressure. */
712 if (regcost_a
!= regcost_b
)
713 return regcost_a
- regcost_b
;
717 /* Internal function, to compute cost when X is not a register; called
718 from COST macro to keep it simple. */
721 notreg_cost (rtx x
, machine_mode mode
, enum rtx_code outer
, int opno
)
723 scalar_int_mode int_mode
, inner_mode
;
724 return ((GET_CODE (x
) == SUBREG
725 && REG_P (SUBREG_REG (x
))
726 && is_int_mode (mode
, &int_mode
)
727 && is_int_mode (GET_MODE (SUBREG_REG (x
)), &inner_mode
)
728 && GET_MODE_SIZE (int_mode
) < GET_MODE_SIZE (inner_mode
)
729 && subreg_lowpart_p (x
)
730 && TRULY_NOOP_TRUNCATION_MODES_P (int_mode
, inner_mode
))
732 : rtx_cost (x
, mode
, outer
, opno
, optimize_this_for_speed_p
) * 2);
736 /* Initialize CSE_REG_INFO_TABLE. */
739 init_cse_reg_info (unsigned int nregs
)
741 /* Do we need to grow the table? */
742 if (nregs
> cse_reg_info_table_size
)
744 unsigned int new_size
;
746 if (cse_reg_info_table_size
< 2048)
748 /* Compute a new size that is a power of 2 and no smaller
749 than the large of NREGS and 64. */
750 new_size
= (cse_reg_info_table_size
751 ? cse_reg_info_table_size
: 64);
753 while (new_size
< nregs
)
758 /* If we need a big table, allocate just enough to hold
763 /* Reallocate the table with NEW_SIZE entries. */
764 free (cse_reg_info_table
);
765 cse_reg_info_table
= XNEWVEC (struct cse_reg_info
, new_size
);
766 cse_reg_info_table_size
= new_size
;
767 cse_reg_info_table_first_uninitialized
= 0;
770 /* Do we have all of the first NREGS entries initialized? */
771 if (cse_reg_info_table_first_uninitialized
< nregs
)
773 unsigned int old_timestamp
= cse_reg_info_timestamp
- 1;
776 /* Put the old timestamp on newly allocated entries so that they
777 will all be considered out of date. We do not touch those
778 entries beyond the first NREGS entries to be nice to the
780 for (i
= cse_reg_info_table_first_uninitialized
; i
< nregs
; i
++)
781 cse_reg_info_table
[i
].timestamp
= old_timestamp
;
783 cse_reg_info_table_first_uninitialized
= nregs
;
787 /* Given REGNO, initialize the cse_reg_info entry for REGNO. */
790 get_cse_reg_info_1 (unsigned int regno
)
792 /* Set TIMESTAMP field to CSE_REG_INFO_TIMESTAMP so that this
793 entry will be considered to have been initialized. */
794 cse_reg_info_table
[regno
].timestamp
= cse_reg_info_timestamp
;
796 /* Initialize the rest of the entry. */
797 cse_reg_info_table
[regno
].reg_tick
= 1;
798 cse_reg_info_table
[regno
].reg_in_table
= -1;
799 cse_reg_info_table
[regno
].subreg_ticked
= -1;
800 cse_reg_info_table
[regno
].reg_qty
= -regno
- 1;
803 /* Find a cse_reg_info entry for REGNO. */
805 static inline struct cse_reg_info
*
806 get_cse_reg_info (unsigned int regno
)
808 struct cse_reg_info
*p
= &cse_reg_info_table
[regno
];
810 /* If this entry has not been initialized, go ahead and initialize
812 if (p
->timestamp
!= cse_reg_info_timestamp
)
813 get_cse_reg_info_1 (regno
);
818 /* Clear the hash table and initialize each register with its own quantity,
819 for a new basic block. */
822 new_basic_block (void)
828 /* Invalidate cse_reg_info_table. */
829 cse_reg_info_timestamp
++;
831 /* Clear out hash table state for this pass. */
832 CLEAR_HARD_REG_SET (hard_regs_in_table
);
834 /* The per-quantity values used to be initialized here, but it is
835 much faster to initialize each as it is made in `make_new_qty'. */
837 for (i
= 0; i
< HASH_SIZE
; i
++)
839 struct table_elt
*first
;
844 struct table_elt
*last
= first
;
848 while (last
->next_same_hash
!= NULL
)
849 last
= last
->next_same_hash
;
851 /* Now relink this hash entire chain into
852 the free element list. */
854 last
->next_same_hash
= free_element_chain
;
855 free_element_chain
= first
;
862 /* Say that register REG contains a quantity in mode MODE not in any
863 register before and initialize that quantity. */
866 make_new_qty (unsigned int reg
, machine_mode mode
)
869 struct qty_table_elem
*ent
;
870 struct reg_eqv_elem
*eqv
;
872 gcc_assert (next_qty
< max_qty
);
874 q
= REG_QTY (reg
) = next_qty
++;
876 ent
->first_reg
= reg
;
879 ent
->const_rtx
= ent
->const_insn
= NULL
;
880 ent
->comparison_code
= UNKNOWN
;
882 eqv
= ®_eqv_table
[reg
];
883 eqv
->next
= eqv
->prev
= -1;
886 /* Make reg NEW equivalent to reg OLD.
887 OLD is not changing; NEW is. */
890 make_regs_eqv (unsigned int new_reg
, unsigned int old_reg
)
892 unsigned int lastr
, firstr
;
893 int q
= REG_QTY (old_reg
);
894 struct qty_table_elem
*ent
;
898 /* Nothing should become eqv until it has a "non-invalid" qty number. */
899 gcc_assert (REGNO_QTY_VALID_P (old_reg
));
901 REG_QTY (new_reg
) = q
;
902 firstr
= ent
->first_reg
;
903 lastr
= ent
->last_reg
;
905 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
906 hard regs. Among pseudos, if NEW will live longer than any other reg
907 of the same qty, and that is beyond the current basic block,
908 make it the new canonical replacement for this qty. */
909 if (! (firstr
< FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (firstr
))
910 /* Certain fixed registers might be of the class NO_REGS. This means
911 that not only can they not be allocated by the compiler, but
912 they cannot be used in substitutions or canonicalizations
914 && (new_reg
>= FIRST_PSEUDO_REGISTER
|| REGNO_REG_CLASS (new_reg
) != NO_REGS
)
915 && ((new_reg
< FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (new_reg
))
916 || (new_reg
>= FIRST_PSEUDO_REGISTER
917 && (firstr
< FIRST_PSEUDO_REGISTER
918 || (bitmap_bit_p (cse_ebb_live_out
, new_reg
)
919 && !bitmap_bit_p (cse_ebb_live_out
, firstr
))
920 || (bitmap_bit_p (cse_ebb_live_in
, new_reg
)
921 && !bitmap_bit_p (cse_ebb_live_in
, firstr
))))))
923 reg_eqv_table
[firstr
].prev
= new_reg
;
924 reg_eqv_table
[new_reg
].next
= firstr
;
925 reg_eqv_table
[new_reg
].prev
= -1;
926 ent
->first_reg
= new_reg
;
930 /* If NEW is a hard reg (known to be non-fixed), insert at end.
931 Otherwise, insert before any non-fixed hard regs that are at the
932 end. Registers of class NO_REGS cannot be used as an
933 equivalent for anything. */
934 while (lastr
< FIRST_PSEUDO_REGISTER
&& reg_eqv_table
[lastr
].prev
>= 0
935 && (REGNO_REG_CLASS (lastr
) == NO_REGS
|| ! FIXED_REGNO_P (lastr
))
936 && new_reg
>= FIRST_PSEUDO_REGISTER
)
937 lastr
= reg_eqv_table
[lastr
].prev
;
938 reg_eqv_table
[new_reg
].next
= reg_eqv_table
[lastr
].next
;
939 if (reg_eqv_table
[lastr
].next
>= 0)
940 reg_eqv_table
[reg_eqv_table
[lastr
].next
].prev
= new_reg
;
942 qty_table
[q
].last_reg
= new_reg
;
943 reg_eqv_table
[lastr
].next
= new_reg
;
944 reg_eqv_table
[new_reg
].prev
= lastr
;
948 /* Remove REG from its equivalence class. */
951 delete_reg_equiv (unsigned int reg
)
953 struct qty_table_elem
*ent
;
954 int q
= REG_QTY (reg
);
957 /* If invalid, do nothing. */
958 if (! REGNO_QTY_VALID_P (reg
))
963 p
= reg_eqv_table
[reg
].prev
;
964 n
= reg_eqv_table
[reg
].next
;
967 reg_eqv_table
[n
].prev
= p
;
971 reg_eqv_table
[p
].next
= n
;
975 REG_QTY (reg
) = -reg
- 1;
978 /* Remove any invalid expressions from the hash table
979 that refer to any of the registers contained in expression X.
981 Make sure that newly inserted references to those registers
982 as subexpressions will be considered valid.
984 mention_regs is not called when a register itself
985 is being stored in the table.
987 Return 1 if we have done something that may have changed the hash code
1001 code
= GET_CODE (x
);
1004 unsigned int regno
= REGNO (x
);
1005 unsigned int endregno
= END_REGNO (x
);
1008 for (i
= regno
; i
< endregno
; i
++)
1010 if (REG_IN_TABLE (i
) >= 0 && REG_IN_TABLE (i
) != REG_TICK (i
))
1011 remove_invalid_refs (i
);
1013 REG_IN_TABLE (i
) = REG_TICK (i
);
1014 SUBREG_TICKED (i
) = -1;
1020 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1021 pseudo if they don't use overlapping words. We handle only pseudos
1022 here for simplicity. */
1023 if (code
== SUBREG
&& REG_P (SUBREG_REG (x
))
1024 && REGNO (SUBREG_REG (x
)) >= FIRST_PSEUDO_REGISTER
)
1026 unsigned int i
= REGNO (SUBREG_REG (x
));
1028 if (REG_IN_TABLE (i
) >= 0 && REG_IN_TABLE (i
) != REG_TICK (i
))
1030 /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and
1031 the last store to this register really stored into this
1032 subreg, then remove the memory of this subreg.
1033 Otherwise, remove any memory of the entire register and
1034 all its subregs from the table. */
1035 if (REG_TICK (i
) - REG_IN_TABLE (i
) > 1
1036 || SUBREG_TICKED (i
) != REGNO (SUBREG_REG (x
)))
1037 remove_invalid_refs (i
);
1039 remove_invalid_subreg_refs (i
, SUBREG_BYTE (x
), GET_MODE (x
));
1042 REG_IN_TABLE (i
) = REG_TICK (i
);
1043 SUBREG_TICKED (i
) = REGNO (SUBREG_REG (x
));
1047 /* If X is a comparison or a COMPARE and either operand is a register
1048 that does not have a quantity, give it one. This is so that a later
1049 call to record_jump_equiv won't cause X to be assigned a different
1050 hash code and not found in the table after that call.
1052 It is not necessary to do this here, since rehash_using_reg can
1053 fix up the table later, but doing this here eliminates the need to
1054 call that expensive function in the most common case where the only
1055 use of the register is in the comparison. */
1057 if (code
== COMPARE
|| COMPARISON_P (x
))
1059 if (REG_P (XEXP (x
, 0))
1060 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0))))
1061 if (insert_regs (XEXP (x
, 0), NULL
, 0))
1063 rehash_using_reg (XEXP (x
, 0));
1067 if (REG_P (XEXP (x
, 1))
1068 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1))))
1069 if (insert_regs (XEXP (x
, 1), NULL
, 0))
1071 rehash_using_reg (XEXP (x
, 1));
1076 fmt
= GET_RTX_FORMAT (code
);
1077 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1079 changed
|= mention_regs (XEXP (x
, i
));
1080 else if (fmt
[i
] == 'E')
1081 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1082 changed
|= mention_regs (XVECEXP (x
, i
, j
));
1087 /* Update the register quantities for inserting X into the hash table
1088 with a value equivalent to CLASSP.
1089 (If the class does not contain a REG, it is irrelevant.)
1090 If MODIFIED is nonzero, X is a destination; it is being modified.
1091 Note that delete_reg_equiv should be called on a register
1092 before insert_regs is done on that register with MODIFIED != 0.
1094 Nonzero value means that elements of reg_qty have changed
1095 so X's hash code may be different. */
1098 insert_regs (rtx x
, struct table_elt
*classp
, int modified
)
1102 unsigned int regno
= REGNO (x
);
1105 /* If REGNO is in the equivalence table already but is of the
1106 wrong mode for that equivalence, don't do anything here. */
1108 qty_valid
= REGNO_QTY_VALID_P (regno
);
1111 struct qty_table_elem
*ent
= &qty_table
[REG_QTY (regno
)];
1113 if (ent
->mode
!= GET_MODE (x
))
1117 if (modified
|| ! qty_valid
)
1120 for (classp
= classp
->first_same_value
;
1122 classp
= classp
->next_same_value
)
1123 if (REG_P (classp
->exp
)
1124 && GET_MODE (classp
->exp
) == GET_MODE (x
))
1126 unsigned c_regno
= REGNO (classp
->exp
);
1128 gcc_assert (REGNO_QTY_VALID_P (c_regno
));
1130 /* Suppose that 5 is hard reg and 100 and 101 are
1133 (set (reg:si 100) (reg:si 5))
1134 (set (reg:si 5) (reg:si 100))
1135 (set (reg:di 101) (reg:di 5))
1137 We would now set REG_QTY (101) = REG_QTY (5), but the
1138 entry for 5 is in SImode. When we use this later in
1139 copy propagation, we get the register in wrong mode. */
1140 if (qty_table
[REG_QTY (c_regno
)].mode
!= GET_MODE (x
))
1143 make_regs_eqv (regno
, c_regno
);
1147 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1148 than REG_IN_TABLE to find out if there was only a single preceding
1149 invalidation - for the SUBREG - or another one, which would be
1150 for the full register. However, if we find here that REG_TICK
1151 indicates that the register is invalid, it means that it has
1152 been invalidated in a separate operation. The SUBREG might be used
1153 now (then this is a recursive call), or we might use the full REG
1154 now and a SUBREG of it later. So bump up REG_TICK so that
1155 mention_regs will do the right thing. */
1157 && REG_IN_TABLE (regno
) >= 0
1158 && REG_TICK (regno
) == REG_IN_TABLE (regno
) + 1)
1160 make_new_qty (regno
, GET_MODE (x
));
1167 /* If X is a SUBREG, we will likely be inserting the inner register in the
1168 table. If that register doesn't have an assigned quantity number at
1169 this point but does later, the insertion that we will be doing now will
1170 not be accessible because its hash code will have changed. So assign
1171 a quantity number now. */
1173 else if (GET_CODE (x
) == SUBREG
&& REG_P (SUBREG_REG (x
))
1174 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x
))))
1176 insert_regs (SUBREG_REG (x
), NULL
, 0);
1181 return mention_regs (x
);
1185 /* Compute upper and lower anchors for CST. Also compute the offset of CST
1186 from these anchors/bases such that *_BASE + *_OFFS = CST. Return false iff
1187 CST is equal to an anchor. */
1190 compute_const_anchors (rtx cst
,
1191 HOST_WIDE_INT
*lower_base
, HOST_WIDE_INT
*lower_offs
,
1192 HOST_WIDE_INT
*upper_base
, HOST_WIDE_INT
*upper_offs
)
1194 HOST_WIDE_INT n
= INTVAL (cst
);
1196 *lower_base
= n
& ~(targetm
.const_anchor
- 1);
1197 if (*lower_base
== n
)
1201 (n
+ (targetm
.const_anchor
- 1)) & ~(targetm
.const_anchor
- 1);
1202 *upper_offs
= n
- *upper_base
;
1203 *lower_offs
= n
- *lower_base
;
1207 /* Insert the equivalence between ANCHOR and (REG + OFF) in mode MODE. */
1210 insert_const_anchor (HOST_WIDE_INT anchor
, rtx reg
, HOST_WIDE_INT offs
,
1213 struct table_elt
*elt
;
1218 anchor_exp
= GEN_INT (anchor
);
1219 hash
= HASH (anchor_exp
, mode
);
1220 elt
= lookup (anchor_exp
, hash
, mode
);
1222 elt
= insert (anchor_exp
, NULL
, hash
, mode
);
1224 exp
= plus_constant (mode
, reg
, offs
);
1225 /* REG has just been inserted and the hash codes recomputed. */
1227 hash
= HASH (exp
, mode
);
1229 /* Use the cost of the register rather than the whole expression. When
1230 looking up constant anchors we will further offset the corresponding
1231 expression therefore it does not make sense to prefer REGs over
1232 reg-immediate additions. Prefer instead the oldest expression. Also
1233 don't prefer pseudos over hard regs so that we derive constants in
1234 argument registers from other argument registers rather than from the
1235 original pseudo that was used to synthesize the constant. */
1236 insert_with_costs (exp
, elt
, hash
, mode
, COST (reg
, mode
), 1);
1239 /* The constant CST is equivalent to the register REG. Create
1240 equivalences between the two anchors of CST and the corresponding
1241 register-offset expressions using REG. */
1244 insert_const_anchors (rtx reg
, rtx cst
, machine_mode mode
)
1246 HOST_WIDE_INT lower_base
, lower_offs
, upper_base
, upper_offs
;
1248 if (!compute_const_anchors (cst
, &lower_base
, &lower_offs
,
1249 &upper_base
, &upper_offs
))
1252 /* Ignore anchors of value 0. Constants accessible from zero are
1254 if (lower_base
!= 0)
1255 insert_const_anchor (lower_base
, reg
, -lower_offs
, mode
);
1257 if (upper_base
!= 0)
1258 insert_const_anchor (upper_base
, reg
, -upper_offs
, mode
);
1261 /* We need to express ANCHOR_ELT->exp + OFFS. Walk the equivalence list of
1262 ANCHOR_ELT and see if offsetting any of the entries by OFFS would create a
1263 valid expression. Return the cheapest and oldest of such expressions. In
1264 *OLD, return how old the resulting expression is compared to the other
1265 equivalent expressions. */
1268 find_reg_offset_for_const (struct table_elt
*anchor_elt
, HOST_WIDE_INT offs
,
1271 struct table_elt
*elt
;
1273 struct table_elt
*match_elt
;
1276 /* Find the cheapest and *oldest* expression to maximize the chance of
1277 reusing the same pseudo. */
1281 for (elt
= anchor_elt
->first_same_value
, idx
= 0;
1283 elt
= elt
->next_same_value
, idx
++)
1285 if (match_elt
&& CHEAPER (match_elt
, elt
))
1288 if (REG_P (elt
->exp
)
1289 || (GET_CODE (elt
->exp
) == PLUS
1290 && REG_P (XEXP (elt
->exp
, 0))
1291 && GET_CODE (XEXP (elt
->exp
, 1)) == CONST_INT
))
1295 /* Ignore expressions that are no longer valid. */
1296 if (!REG_P (elt
->exp
) && !exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
1299 x
= plus_constant (GET_MODE (elt
->exp
), elt
->exp
, offs
);
1301 || (GET_CODE (x
) == PLUS
1302 && IN_RANGE (INTVAL (XEXP (x
, 1)),
1303 -targetm
.const_anchor
,
1304 targetm
.const_anchor
- 1)))
1316 /* Try to express the constant SRC_CONST using a register+offset expression
1317 derived from a constant anchor. Return it if successful or NULL_RTX,
1321 try_const_anchors (rtx src_const
, machine_mode mode
)
1323 struct table_elt
*lower_elt
, *upper_elt
;
1324 HOST_WIDE_INT lower_base
, lower_offs
, upper_base
, upper_offs
;
1325 rtx lower_anchor_rtx
, upper_anchor_rtx
;
1326 rtx lower_exp
= NULL_RTX
, upper_exp
= NULL_RTX
;
1327 unsigned lower_old
, upper_old
;
1329 /* CONST_INT is used for CC modes, but we should leave those alone. */
1330 if (GET_MODE_CLASS (mode
) == MODE_CC
)
1333 gcc_assert (SCALAR_INT_MODE_P (mode
));
1334 if (!compute_const_anchors (src_const
, &lower_base
, &lower_offs
,
1335 &upper_base
, &upper_offs
))
1338 lower_anchor_rtx
= GEN_INT (lower_base
);
1339 upper_anchor_rtx
= GEN_INT (upper_base
);
1340 lower_elt
= lookup (lower_anchor_rtx
, HASH (lower_anchor_rtx
, mode
), mode
);
1341 upper_elt
= lookup (upper_anchor_rtx
, HASH (upper_anchor_rtx
, mode
), mode
);
1344 lower_exp
= find_reg_offset_for_const (lower_elt
, lower_offs
, &lower_old
);
1346 upper_exp
= find_reg_offset_for_const (upper_elt
, upper_offs
, &upper_old
);
1353 /* Return the older expression. */
1354 return (upper_old
> lower_old
? upper_exp
: lower_exp
);
1357 /* Look in or update the hash table. */
1359 /* Remove table element ELT from use in the table.
1360 HASH is its hash code, made using the HASH macro.
1361 It's an argument because often that is known in advance
1362 and we save much time not recomputing it. */
1365 remove_from_table (struct table_elt
*elt
, unsigned int hash
)
1370 /* Mark this element as removed. See cse_insn. */
1371 elt
->first_same_value
= 0;
1373 /* Remove the table element from its equivalence class. */
1376 struct table_elt
*prev
= elt
->prev_same_value
;
1377 struct table_elt
*next
= elt
->next_same_value
;
1380 next
->prev_same_value
= prev
;
1383 prev
->next_same_value
= next
;
1386 struct table_elt
*newfirst
= next
;
1389 next
->first_same_value
= newfirst
;
1390 next
= next
->next_same_value
;
1395 /* Remove the table element from its hash bucket. */
1398 struct table_elt
*prev
= elt
->prev_same_hash
;
1399 struct table_elt
*next
= elt
->next_same_hash
;
1402 next
->prev_same_hash
= prev
;
1405 prev
->next_same_hash
= next
;
1406 else if (table
[hash
] == elt
)
1410 /* This entry is not in the proper hash bucket. This can happen
1411 when two classes were merged by `merge_equiv_classes'. Search
1412 for the hash bucket that it heads. This happens only very
1413 rarely, so the cost is acceptable. */
1414 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
1415 if (table
[hash
] == elt
)
1420 /* Remove the table element from its related-value circular chain. */
1422 if (elt
->related_value
!= 0 && elt
->related_value
!= elt
)
1424 struct table_elt
*p
= elt
->related_value
;
1426 while (p
->related_value
!= elt
)
1427 p
= p
->related_value
;
1428 p
->related_value
= elt
->related_value
;
1429 if (p
->related_value
== p
)
1430 p
->related_value
= 0;
1433 /* Now add it to the free element chain. */
1434 elt
->next_same_hash
= free_element_chain
;
1435 free_element_chain
= elt
;
1438 /* Same as above, but X is a pseudo-register. */
1441 remove_pseudo_from_table (rtx x
, unsigned int hash
)
1443 struct table_elt
*elt
;
1445 /* Because a pseudo-register can be referenced in more than one
1446 mode, we might have to remove more than one table entry. */
1447 while ((elt
= lookup_for_remove (x
, hash
, VOIDmode
)))
1448 remove_from_table (elt
, hash
);
1451 /* Look up X in the hash table and return its table element,
1452 or 0 if X is not in the table.
1454 MODE is the machine-mode of X, or if X is an integer constant
1455 with VOIDmode then MODE is the mode with which X will be used.
1457 Here we are satisfied to find an expression whose tree structure
1460 static struct table_elt
*
1461 lookup (rtx x
, unsigned int hash
, machine_mode mode
)
1463 struct table_elt
*p
;
1465 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1466 if (mode
== p
->mode
&& ((x
== p
->exp
&& REG_P (x
))
1467 || exp_equiv_p (x
, p
->exp
, !REG_P (x
), false)))
1473 /* Like `lookup' but don't care whether the table element uses invalid regs.
1474 Also ignore discrepancies in the machine mode of a register. */
1476 static struct table_elt
*
1477 lookup_for_remove (rtx x
, unsigned int hash
, machine_mode mode
)
1479 struct table_elt
*p
;
1483 unsigned int regno
= REGNO (x
);
1485 /* Don't check the machine mode when comparing registers;
1486 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1487 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1489 && REGNO (p
->exp
) == regno
)
1494 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1496 && (x
== p
->exp
|| exp_equiv_p (x
, p
->exp
, 0, false)))
1503 /* Look for an expression equivalent to X and with code CODE.
1504 If one is found, return that expression. */
1507 lookup_as_function (rtx x
, enum rtx_code code
)
1510 = lookup (x
, SAFE_HASH (x
, VOIDmode
), GET_MODE (x
));
1515 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
1516 if (GET_CODE (p
->exp
) == code
1517 /* Make sure this is a valid entry in the table. */
1518 && exp_equiv_p (p
->exp
, p
->exp
, 1, false))
1524 /* Insert X in the hash table, assuming HASH is its hash code and
1525 CLASSP is an element of the class it should go in (or 0 if a new
1526 class should be made). COST is the code of X and reg_cost is the
1527 cost of registers in X. It is inserted at the proper position to
1528 keep the class in the order cheapest first.
1530 MODE is the machine-mode of X, or if X is an integer constant
1531 with VOIDmode then MODE is the mode with which X will be used.
1533 For elements of equal cheapness, the most recent one
1534 goes in front, except that the first element in the list
1535 remains first unless a cheaper element is added. The order of
1536 pseudo-registers does not matter, as canon_reg will be called to
1537 find the cheapest when a register is retrieved from the table.
1539 The in_memory field in the hash table element is set to 0.
1540 The caller must set it nonzero if appropriate.
1542 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1543 and if insert_regs returns a nonzero value
1544 you must then recompute its hash code before calling here.
1546 If necessary, update table showing constant values of quantities. */
1548 static struct table_elt
*
1549 insert_with_costs (rtx x
, struct table_elt
*classp
, unsigned int hash
,
1550 machine_mode mode
, int cost
, int reg_cost
)
1552 struct table_elt
*elt
;
1554 /* If X is a register and we haven't made a quantity for it,
1555 something is wrong. */
1556 gcc_assert (!REG_P (x
) || REGNO_QTY_VALID_P (REGNO (x
)));
1558 /* If X is a hard register, show it is being put in the table. */
1559 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1560 add_to_hard_reg_set (&hard_regs_in_table
, GET_MODE (x
), REGNO (x
));
1562 /* Put an element for X into the right hash bucket. */
1564 elt
= free_element_chain
;
1566 free_element_chain
= elt
->next_same_hash
;
1568 elt
= XNEW (struct table_elt
);
1571 elt
->canon_exp
= NULL_RTX
;
1573 elt
->regcost
= reg_cost
;
1574 elt
->next_same_value
= 0;
1575 elt
->prev_same_value
= 0;
1576 elt
->next_same_hash
= table
[hash
];
1577 elt
->prev_same_hash
= 0;
1578 elt
->related_value
= 0;
1581 elt
->is_const
= (CONSTANT_P (x
) || fixed_base_plus_p (x
));
1584 table
[hash
]->prev_same_hash
= elt
;
1587 /* Put it into the proper value-class. */
1590 classp
= classp
->first_same_value
;
1591 if (CHEAPER (elt
, classp
))
1592 /* Insert at the head of the class. */
1594 struct table_elt
*p
;
1595 elt
->next_same_value
= classp
;
1596 classp
->prev_same_value
= elt
;
1597 elt
->first_same_value
= elt
;
1599 for (p
= classp
; p
; p
= p
->next_same_value
)
1600 p
->first_same_value
= elt
;
1604 /* Insert not at head of the class. */
1605 /* Put it after the last element cheaper than X. */
1606 struct table_elt
*p
, *next
;
1609 (next
= p
->next_same_value
) && CHEAPER (next
, elt
);
1613 /* Put it after P and before NEXT. */
1614 elt
->next_same_value
= next
;
1616 next
->prev_same_value
= elt
;
1618 elt
->prev_same_value
= p
;
1619 p
->next_same_value
= elt
;
1620 elt
->first_same_value
= classp
;
1624 elt
->first_same_value
= elt
;
1626 /* If this is a constant being set equivalent to a register or a register
1627 being set equivalent to a constant, note the constant equivalence.
1629 If this is a constant, it cannot be equivalent to a different constant,
1630 and a constant is the only thing that can be cheaper than a register. So
1631 we know the register is the head of the class (before the constant was
1634 If this is a register that is not already known equivalent to a
1635 constant, we must check the entire class.
1637 If this is a register that is already known equivalent to an insn,
1638 update the qtys `const_insn' to show that `this_insn' is the latest
1639 insn making that quantity equivalent to the constant. */
1641 if (elt
->is_const
&& classp
&& REG_P (classp
->exp
)
1644 int exp_q
= REG_QTY (REGNO (classp
->exp
));
1645 struct qty_table_elem
*exp_ent
= &qty_table
[exp_q
];
1647 exp_ent
->const_rtx
= gen_lowpart (exp_ent
->mode
, x
);
1648 exp_ent
->const_insn
= this_insn
;
1653 && ! qty_table
[REG_QTY (REGNO (x
))].const_rtx
1656 struct table_elt
*p
;
1658 for (p
= classp
; p
!= 0; p
= p
->next_same_value
)
1660 if (p
->is_const
&& !REG_P (p
->exp
))
1662 int x_q
= REG_QTY (REGNO (x
));
1663 struct qty_table_elem
*x_ent
= &qty_table
[x_q
];
1666 = gen_lowpart (GET_MODE (x
), p
->exp
);
1667 x_ent
->const_insn
= this_insn
;
1674 && qty_table
[REG_QTY (REGNO (x
))].const_rtx
1675 && GET_MODE (x
) == qty_table
[REG_QTY (REGNO (x
))].mode
)
1676 qty_table
[REG_QTY (REGNO (x
))].const_insn
= this_insn
;
1678 /* If this is a constant with symbolic value,
1679 and it has a term with an explicit integer value,
1680 link it up with related expressions. */
1681 if (GET_CODE (x
) == CONST
)
1683 rtx subexp
= get_related_value (x
);
1685 struct table_elt
*subelt
, *subelt_prev
;
1689 /* Get the integer-free subexpression in the hash table. */
1690 subhash
= SAFE_HASH (subexp
, mode
);
1691 subelt
= lookup (subexp
, subhash
, mode
);
1693 subelt
= insert (subexp
, NULL
, subhash
, mode
);
1694 /* Initialize SUBELT's circular chain if it has none. */
1695 if (subelt
->related_value
== 0)
1696 subelt
->related_value
= subelt
;
1697 /* Find the element in the circular chain that precedes SUBELT. */
1698 subelt_prev
= subelt
;
1699 while (subelt_prev
->related_value
!= subelt
)
1700 subelt_prev
= subelt_prev
->related_value
;
1701 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1702 This way the element that follows SUBELT is the oldest one. */
1703 elt
->related_value
= subelt_prev
->related_value
;
1704 subelt_prev
->related_value
= elt
;
1711 /* Wrap insert_with_costs by passing the default costs. */
1713 static struct table_elt
*
1714 insert (rtx x
, struct table_elt
*classp
, unsigned int hash
,
1717 return insert_with_costs (x
, classp
, hash
, mode
,
1718 COST (x
, mode
), approx_reg_cost (x
));
1722 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1723 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1724 the two classes equivalent.
1726 CLASS1 will be the surviving class; CLASS2 should not be used after this
1729 Any invalid entries in CLASS2 will not be copied. */
1732 merge_equiv_classes (struct table_elt
*class1
, struct table_elt
*class2
)
1734 struct table_elt
*elt
, *next
, *new_elt
;
1736 /* Ensure we start with the head of the classes. */
1737 class1
= class1
->first_same_value
;
1738 class2
= class2
->first_same_value
;
1740 /* If they were already equal, forget it. */
1741 if (class1
== class2
)
1744 for (elt
= class2
; elt
; elt
= next
)
1748 machine_mode mode
= elt
->mode
;
1750 next
= elt
->next_same_value
;
1752 /* Remove old entry, make a new one in CLASS1's class.
1753 Don't do this for invalid entries as we cannot find their
1754 hash code (it also isn't necessary). */
1755 if (REG_P (exp
) || exp_equiv_p (exp
, exp
, 1, false))
1757 bool need_rehash
= false;
1759 hash_arg_in_memory
= 0;
1760 hash
= HASH (exp
, mode
);
1764 need_rehash
= REGNO_QTY_VALID_P (REGNO (exp
));
1765 delete_reg_equiv (REGNO (exp
));
1768 if (REG_P (exp
) && REGNO (exp
) >= FIRST_PSEUDO_REGISTER
)
1769 remove_pseudo_from_table (exp
, hash
);
1771 remove_from_table (elt
, hash
);
1773 if (insert_regs (exp
, class1
, 0) || need_rehash
)
1775 rehash_using_reg (exp
);
1776 hash
= HASH (exp
, mode
);
1778 new_elt
= insert (exp
, class1
, hash
, mode
);
1779 new_elt
->in_memory
= hash_arg_in_memory
;
1780 if (GET_CODE (exp
) == ASM_OPERANDS
&& elt
->cost
== MAX_COST
)
1781 new_elt
->cost
= MAX_COST
;
1786 /* Flush the entire hash table. */
1789 flush_hash_table (void)
1792 struct table_elt
*p
;
1794 for (i
= 0; i
< HASH_SIZE
; i
++)
1795 for (p
= table
[i
]; p
; p
= table
[i
])
1797 /* Note that invalidate can remove elements
1798 after P in the current hash chain. */
1800 invalidate (p
->exp
, VOIDmode
);
1802 remove_from_table (p
, i
);
1806 /* Check whether an anti dependence exists between X and EXP. MODE and
1807 ADDR are as for canon_anti_dependence. */
1810 check_dependence (const_rtx x
, rtx exp
, machine_mode mode
, rtx addr
)
1812 subrtx_iterator::array_type array
;
1813 FOR_EACH_SUBRTX (iter
, array
, x
, NONCONST
)
1815 const_rtx x
= *iter
;
1816 if (MEM_P (x
) && canon_anti_dependence (x
, true, exp
, mode
, addr
))
1822 /* Remove from the hash table, or mark as invalid, all expressions whose
1823 values could be altered by storing in register X. */
1826 invalidate_reg (rtx x
)
1828 gcc_assert (GET_CODE (x
) == REG
);
1830 /* If X is a register, dependencies on its contents are recorded
1831 through the qty number mechanism. Just change the qty number of
1832 the register, mark it as invalid for expressions that refer to it,
1833 and remove it itself. */
1834 unsigned int regno
= REGNO (x
);
1835 unsigned int hash
= HASH (x
, GET_MODE (x
));
1837 /* Remove REGNO from any quantity list it might be on and indicate
1838 that its value might have changed. If it is a pseudo, remove its
1839 entry from the hash table.
1841 For a hard register, we do the first two actions above for any
1842 additional hard registers corresponding to X. Then, if any of these
1843 registers are in the table, we must remove any REG entries that
1844 overlap these registers. */
1846 delete_reg_equiv (regno
);
1848 SUBREG_TICKED (regno
) = -1;
1850 if (regno
>= FIRST_PSEUDO_REGISTER
)
1851 remove_pseudo_from_table (x
, hash
);
1854 HOST_WIDE_INT in_table
= TEST_HARD_REG_BIT (hard_regs_in_table
, regno
);
1855 unsigned int endregno
= END_REGNO (x
);
1857 struct table_elt
*p
, *next
;
1859 CLEAR_HARD_REG_BIT (hard_regs_in_table
, regno
);
1861 for (rn
= regno
+ 1; rn
< endregno
; rn
++)
1863 in_table
|= TEST_HARD_REG_BIT (hard_regs_in_table
, rn
);
1864 CLEAR_HARD_REG_BIT (hard_regs_in_table
, rn
);
1865 delete_reg_equiv (rn
);
1867 SUBREG_TICKED (rn
) = -1;
1871 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
1872 for (p
= table
[hash
]; p
; p
= next
)
1874 next
= p
->next_same_hash
;
1876 if (!REG_P (p
->exp
) || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1879 unsigned int tregno
= REGNO (p
->exp
);
1880 unsigned int tendregno
= END_REGNO (p
->exp
);
1881 if (tendregno
> regno
&& tregno
< endregno
)
1882 remove_from_table (p
, hash
);
1887 /* Remove from the hash table, or mark as invalid, all expressions whose
1888 values could be altered by storing in X. X is a register, a subreg, or
1889 a memory reference with nonvarying address (because, when a memory
1890 reference with a varying address is stored in, all memory references are
1891 removed by invalidate_memory so specific invalidation is superfluous).
1892 FULL_MODE, if not VOIDmode, indicates that this much should be
1893 invalidated instead of just the amount indicated by the mode of X. This
1894 is only used for bitfield stores into memory.
1896 A nonvarying address may be just a register or just a symbol reference,
1897 or it may be either of those plus a numeric offset. */
1900 invalidate (rtx x
, machine_mode full_mode
)
1903 struct table_elt
*p
;
1906 switch (GET_CODE (x
))
1913 invalidate (SUBREG_REG (x
), VOIDmode
);
1917 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; --i
)
1918 invalidate (XVECEXP (x
, 0, i
), VOIDmode
);
1922 /* This is part of a disjoint return value; extract the location in
1923 question ignoring the offset. */
1924 invalidate (XEXP (x
, 0), VOIDmode
);
1928 addr
= canon_rtx (get_addr (XEXP (x
, 0)));
1929 /* Calculate the canonical version of X here so that
1930 true_dependence doesn't generate new RTL for X on each call. */
1933 /* Remove all hash table elements that refer to overlapping pieces of
1935 if (full_mode
== VOIDmode
)
1936 full_mode
= GET_MODE (x
);
1938 for (i
= 0; i
< HASH_SIZE
; i
++)
1940 struct table_elt
*next
;
1942 for (p
= table
[i
]; p
; p
= next
)
1944 next
= p
->next_same_hash
;
1947 /* Just canonicalize the expression once;
1948 otherwise each time we call invalidate
1949 true_dependence will canonicalize the
1950 expression again. */
1952 p
->canon_exp
= canon_rtx (p
->exp
);
1953 if (check_dependence (p
->canon_exp
, x
, full_mode
, addr
))
1954 remove_from_table (p
, i
);
1965 /* Invalidate DEST. Used when DEST is not going to be added
1966 into the hash table for some reason, e.g. do_not_record
1970 invalidate_dest (rtx dest
)
1973 || GET_CODE (dest
) == SUBREG
1975 invalidate (dest
, VOIDmode
);
1976 else if (GET_CODE (dest
) == STRICT_LOW_PART
1977 || GET_CODE (dest
) == ZERO_EXTRACT
)
1978 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
1981 /* Remove all expressions that refer to register REGNO,
1982 since they are already invalid, and we are about to
1983 mark that register valid again and don't want the old
1984 expressions to reappear as valid. */
1987 remove_invalid_refs (unsigned int regno
)
1990 struct table_elt
*p
, *next
;
1992 for (i
= 0; i
< HASH_SIZE
; i
++)
1993 for (p
= table
[i
]; p
; p
= next
)
1995 next
= p
->next_same_hash
;
1996 if (!REG_P (p
->exp
) && refers_to_regno_p (regno
, p
->exp
))
1997 remove_from_table (p
, i
);
2001 /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
2004 remove_invalid_subreg_refs (unsigned int regno
, poly_uint64 offset
,
2008 struct table_elt
*p
, *next
;
2010 for (i
= 0; i
< HASH_SIZE
; i
++)
2011 for (p
= table
[i
]; p
; p
= next
)
2014 next
= p
->next_same_hash
;
2017 && (GET_CODE (exp
) != SUBREG
2018 || !REG_P (SUBREG_REG (exp
))
2019 || REGNO (SUBREG_REG (exp
)) != regno
2020 || ranges_maybe_overlap_p (SUBREG_BYTE (exp
),
2021 GET_MODE_SIZE (GET_MODE (exp
)),
2022 offset
, GET_MODE_SIZE (mode
)))
2023 && refers_to_regno_p (regno
, p
->exp
))
2024 remove_from_table (p
, i
);
2028 /* Recompute the hash codes of any valid entries in the hash table that
2029 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
2031 This is called when we make a jump equivalence. */
2034 rehash_using_reg (rtx x
)
2037 struct table_elt
*p
, *next
;
2040 if (GET_CODE (x
) == SUBREG
)
2043 /* If X is not a register or if the register is known not to be in any
2044 valid entries in the table, we have no work to do. */
2047 || REG_IN_TABLE (REGNO (x
)) < 0
2048 || REG_IN_TABLE (REGNO (x
)) != REG_TICK (REGNO (x
)))
2051 /* Scan all hash chains looking for valid entries that mention X.
2052 If we find one and it is in the wrong hash chain, move it. */
2054 for (i
= 0; i
< HASH_SIZE
; i
++)
2055 for (p
= table
[i
]; p
; p
= next
)
2057 next
= p
->next_same_hash
;
2058 if (reg_mentioned_p (x
, p
->exp
)
2059 && exp_equiv_p (p
->exp
, p
->exp
, 1, false)
2060 && i
!= (hash
= SAFE_HASH (p
->exp
, p
->mode
)))
2062 if (p
->next_same_hash
)
2063 p
->next_same_hash
->prev_same_hash
= p
->prev_same_hash
;
2065 if (p
->prev_same_hash
)
2066 p
->prev_same_hash
->next_same_hash
= p
->next_same_hash
;
2068 table
[i
] = p
->next_same_hash
;
2070 p
->next_same_hash
= table
[hash
];
2071 p
->prev_same_hash
= 0;
2073 table
[hash
]->prev_same_hash
= p
;
2079 /* Remove from the hash table any expression that is a call-clobbered
2080 register in INSN. Also update their TICK values. */
2083 invalidate_for_call (rtx_insn
*insn
)
2087 struct table_elt
*p
, *next
;
2089 hard_reg_set_iterator hrsi
;
2091 /* Go through all the hard registers. For each that might be clobbered
2092 in call insn INSN, remove the register from quantity chains and update
2093 reg_tick if defined. Also see if any of these registers is currently
2096 ??? We could be more precise for partially-clobbered registers,
2097 and only invalidate values that actually occupy the clobbered part
2098 of the registers. It doesn't seem worth the effort though, since
2099 we shouldn't see this situation much before RA. Whatever choice
2100 we make here has to be consistent with the table walk below,
2101 so any change to this test will require a change there too. */
2102 HARD_REG_SET callee_clobbers
2103 = insn_callee_abi (insn
).full_and_partial_reg_clobbers ();
2104 EXECUTE_IF_SET_IN_HARD_REG_SET (callee_clobbers
, 0, regno
, hrsi
)
2106 delete_reg_equiv (regno
);
2107 if (REG_TICK (regno
) >= 0)
2110 SUBREG_TICKED (regno
) = -1;
2112 in_table
|= (TEST_HARD_REG_BIT (hard_regs_in_table
, regno
) != 0);
2115 /* In the case where we have no call-clobbered hard registers in the
2116 table, we are done. Otherwise, scan the table and remove any
2117 entry that overlaps a call-clobbered register. */
2120 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
2121 for (p
= table
[hash
]; p
; p
= next
)
2123 next
= p
->next_same_hash
;
2126 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
2129 /* This must use the same test as above rather than the
2130 more accurate clobbers_reg_p. */
2131 if (overlaps_hard_reg_set_p (callee_clobbers
, GET_MODE (p
->exp
),
2133 remove_from_table (p
, hash
);
2137 /* Given an expression X of type CONST,
2138 and ELT which is its table entry (or 0 if it
2139 is not in the hash table),
2140 return an alternate expression for X as a register plus integer.
2141 If none can be found, return 0. */
2144 use_related_value (rtx x
, struct table_elt
*elt
)
2146 struct table_elt
*relt
= 0;
2147 struct table_elt
*p
, *q
;
2148 HOST_WIDE_INT offset
;
2150 /* First, is there anything related known?
2151 If we have a table element, we can tell from that.
2152 Otherwise, must look it up. */
2154 if (elt
!= 0 && elt
->related_value
!= 0)
2156 else if (elt
== 0 && GET_CODE (x
) == CONST
)
2158 rtx subexp
= get_related_value (x
);
2160 relt
= lookup (subexp
,
2161 SAFE_HASH (subexp
, GET_MODE (subexp
)),
2168 /* Search all related table entries for one that has an
2169 equivalent register. */
2174 /* This loop is strange in that it is executed in two different cases.
2175 The first is when X is already in the table. Then it is searching
2176 the RELATED_VALUE list of X's class (RELT). The second case is when
2177 X is not in the table. Then RELT points to a class for the related
2180 Ensure that, whatever case we are in, that we ignore classes that have
2181 the same value as X. */
2183 if (rtx_equal_p (x
, p
->exp
))
2186 for (q
= p
->first_same_value
; q
; q
= q
->next_same_value
)
2193 p
= p
->related_value
;
2195 /* We went all the way around, so there is nothing to be found.
2196 Alternatively, perhaps RELT was in the table for some other reason
2197 and it has no related values recorded. */
2198 if (p
== relt
|| p
== 0)
2205 offset
= (get_integer_term (x
) - get_integer_term (p
->exp
));
2206 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2207 return plus_constant (q
->mode
, q
->exp
, offset
);
2211 /* Hash a string. Just add its bytes up. */
2212 static inline unsigned
2213 hash_rtx_string (const char *ps
)
2216 const unsigned char *p
= (const unsigned char *) ps
;
2225 /* Same as hash_rtx, but call CB on each rtx if it is not NULL.
2226 When the callback returns true, we continue with the new rtx. */
2229 hash_rtx_cb (const_rtx x
, machine_mode mode
,
2230 int *do_not_record_p
, int *hash_arg_in_memory_p
,
2231 bool have_reg_qty
, hash_rtx_callback_function cb
)
2237 machine_mode newmode
;
2240 /* Used to turn recursion into iteration. We can't rely on GCC's
2241 tail-recursion elimination since we need to keep accumulating values
2247 /* Invoke the callback first. */
2249 && ((*cb
) (x
, mode
, &newx
, &newmode
)))
2251 hash
+= hash_rtx_cb (newx
, newmode
, do_not_record_p
,
2252 hash_arg_in_memory_p
, have_reg_qty
, cb
);
2256 code
= GET_CODE (x
);
2261 unsigned int regno
= REGNO (x
);
2263 if (do_not_record_p
&& !reload_completed
)
2265 /* On some machines, we can't record any non-fixed hard register,
2266 because extending its life will cause reload problems. We
2267 consider ap, fp, sp, gp to be fixed for this purpose.
2269 We also consider CCmode registers to be fixed for this purpose;
2270 failure to do so leads to failure to simplify 0<100 type of
2273 On all machines, we can't record any global registers.
2274 Nor should we record any register that is in a small
2275 class, as defined by TARGET_CLASS_LIKELY_SPILLED_P. */
2278 if (regno
>= FIRST_PSEUDO_REGISTER
)
2280 else if (x
== frame_pointer_rtx
2281 || x
== hard_frame_pointer_rtx
2282 || x
== arg_pointer_rtx
2283 || x
== stack_pointer_rtx
2284 || x
== pic_offset_table_rtx
)
2286 else if (global_regs
[regno
])
2288 else if (fixed_regs
[regno
])
2290 else if (GET_MODE_CLASS (GET_MODE (x
)) == MODE_CC
)
2292 else if (targetm
.small_register_classes_for_mode_p (GET_MODE (x
)))
2294 else if (targetm
.class_likely_spilled_p (REGNO_REG_CLASS (regno
)))
2301 *do_not_record_p
= 1;
2306 hash
+= ((unsigned int) REG
<< 7);
2307 hash
+= (have_reg_qty
? (unsigned) REG_QTY (regno
) : regno
);
2311 /* We handle SUBREG of a REG specially because the underlying
2312 reg changes its hash value with every value change; we don't
2313 want to have to forget unrelated subregs when one subreg changes. */
2316 if (REG_P (SUBREG_REG (x
)))
2318 hash
+= (((unsigned int) SUBREG
<< 7)
2319 + REGNO (SUBREG_REG (x
))
2320 + (constant_lower_bound (SUBREG_BYTE (x
))
2328 hash
+= (((unsigned int) CONST_INT
<< 7) + (unsigned int) mode
2329 + (unsigned int) INTVAL (x
));
2332 case CONST_WIDE_INT
:
2333 for (i
= 0; i
< CONST_WIDE_INT_NUNITS (x
); i
++)
2334 hash
+= CONST_WIDE_INT_ELT (x
, i
);
2337 case CONST_POLY_INT
:
2341 for (unsigned int i
= 0; i
< NUM_POLY_INT_COEFFS
; ++i
)
2342 h
.add_wide_int (CONST_POLY_INT_COEFFS (x
)[i
]);
2347 /* This is like the general case, except that it only counts
2348 the integers representing the constant. */
2349 hash
+= (unsigned int) code
+ (unsigned int) GET_MODE (x
);
2350 if (TARGET_SUPPORTS_WIDE_INT
== 0 && GET_MODE (x
) == VOIDmode
)
2351 hash
+= ((unsigned int) CONST_DOUBLE_LOW (x
)
2352 + (unsigned int) CONST_DOUBLE_HIGH (x
));
2354 hash
+= real_hash (CONST_DOUBLE_REAL_VALUE (x
));
2358 hash
+= (unsigned int) code
+ (unsigned int) GET_MODE (x
);
2359 hash
+= fixed_hash (CONST_FIXED_VALUE (x
));
2367 units
= const_vector_encoded_nelts (x
);
2369 for (i
= 0; i
< units
; ++i
)
2371 elt
= CONST_VECTOR_ENCODED_ELT (x
, i
);
2372 hash
+= hash_rtx_cb (elt
, GET_MODE (elt
),
2373 do_not_record_p
, hash_arg_in_memory_p
,
2380 /* Assume there is only one rtx object for any given label. */
2382 /* We don't hash on the address of the CODE_LABEL to avoid bootstrap
2383 differences and differences between each stage's debugging dumps. */
2384 hash
+= (((unsigned int) LABEL_REF
<< 7)
2385 + CODE_LABEL_NUMBER (label_ref_label (x
)));
2390 /* Don't hash on the symbol's address to avoid bootstrap differences.
2391 Different hash values may cause expressions to be recorded in
2392 different orders and thus different registers to be used in the
2393 final assembler. This also avoids differences in the dump files
2394 between various stages. */
2396 const unsigned char *p
= (const unsigned char *) XSTR (x
, 0);
2399 h
+= (h
<< 7) + *p
++; /* ??? revisit */
2401 hash
+= ((unsigned int) SYMBOL_REF
<< 7) + h
;
2406 /* We don't record if marked volatile or if BLKmode since we don't
2407 know the size of the move. */
2408 if (do_not_record_p
&& (MEM_VOLATILE_P (x
) || GET_MODE (x
) == BLKmode
))
2410 *do_not_record_p
= 1;
2413 if (hash_arg_in_memory_p
&& !MEM_READONLY_P (x
))
2414 *hash_arg_in_memory_p
= 1;
2416 /* Now that we have already found this special case,
2417 might as well speed it up as much as possible. */
2418 hash
+= (unsigned) MEM
;
2423 /* A USE that mentions non-volatile memory needs special
2424 handling since the MEM may be BLKmode which normally
2425 prevents an entry from being made. Pure calls are
2426 marked by a USE which mentions BLKmode memory.
2427 See calls.c:emit_call_1. */
2428 if (MEM_P (XEXP (x
, 0))
2429 && ! MEM_VOLATILE_P (XEXP (x
, 0)))
2431 hash
+= (unsigned) USE
;
2434 if (hash_arg_in_memory_p
&& !MEM_READONLY_P (x
))
2435 *hash_arg_in_memory_p
= 1;
2437 /* Now that we have already found this special case,
2438 might as well speed it up as much as possible. */
2439 hash
+= (unsigned) MEM
;
2454 case UNSPEC_VOLATILE
:
2455 if (do_not_record_p
) {
2456 *do_not_record_p
= 1;
2464 if (do_not_record_p
&& MEM_VOLATILE_P (x
))
2466 *do_not_record_p
= 1;
2471 /* We don't want to take the filename and line into account. */
2472 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
)
2473 + hash_rtx_string (ASM_OPERANDS_TEMPLATE (x
))
2474 + hash_rtx_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x
))
2475 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x
);
2477 if (ASM_OPERANDS_INPUT_LENGTH (x
))
2479 for (i
= 1; i
< ASM_OPERANDS_INPUT_LENGTH (x
); i
++)
2481 hash
+= (hash_rtx_cb (ASM_OPERANDS_INPUT (x
, i
),
2482 GET_MODE (ASM_OPERANDS_INPUT (x
, i
)),
2483 do_not_record_p
, hash_arg_in_memory_p
,
2486 (ASM_OPERANDS_INPUT_CONSTRAINT (x
, i
)));
2489 hash
+= hash_rtx_string (ASM_OPERANDS_INPUT_CONSTRAINT (x
, 0));
2490 x
= ASM_OPERANDS_INPUT (x
, 0);
2491 mode
= GET_MODE (x
);
2503 i
= GET_RTX_LENGTH (code
) - 1;
2504 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
);
2505 fmt
= GET_RTX_FORMAT (code
);
2511 /* If we are about to do the last recursive call
2512 needed at this level, change it into iteration.
2513 This function is called enough to be worth it. */
2520 hash
+= hash_rtx_cb (XEXP (x
, i
), VOIDmode
, do_not_record_p
,
2521 hash_arg_in_memory_p
,
2526 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2527 hash
+= hash_rtx_cb (XVECEXP (x
, i
, j
), VOIDmode
, do_not_record_p
,
2528 hash_arg_in_memory_p
,
2533 hash
+= hash_rtx_string (XSTR (x
, i
));
2537 hash
+= (unsigned int) XINT (x
, i
);
2541 hash
+= constant_lower_bound (SUBREG_BYTE (x
));
2556 /* Hash an rtx. We are careful to make sure the value is never negative.
2557 Equivalent registers hash identically.
2558 MODE is used in hashing for CONST_INTs only;
2559 otherwise the mode of X is used.
2561 Store 1 in DO_NOT_RECORD_P if any subexpression is volatile.
2563 If HASH_ARG_IN_MEMORY_P is not NULL, store 1 in it if X contains
2564 a MEM rtx which does not have the MEM_READONLY_P flag set.
2566 Note that cse_insn knows that the hash code of a MEM expression
2567 is just (int) MEM plus the hash code of the address. */
2570 hash_rtx (const_rtx x
, machine_mode mode
, int *do_not_record_p
,
2571 int *hash_arg_in_memory_p
, bool have_reg_qty
)
2573 return hash_rtx_cb (x
, mode
, do_not_record_p
,
2574 hash_arg_in_memory_p
, have_reg_qty
, NULL
);
2577 /* Hash an rtx X for cse via hash_rtx.
2578 Stores 1 in do_not_record if any subexpression is volatile.
2579 Stores 1 in hash_arg_in_memory if X contains a mem rtx which
2580 does not have the MEM_READONLY_P flag set. */
2582 static inline unsigned
2583 canon_hash (rtx x
, machine_mode mode
)
2585 return hash_rtx (x
, mode
, &do_not_record
, &hash_arg_in_memory
, true);
2588 /* Like canon_hash but with no side effects, i.e. do_not_record
2589 and hash_arg_in_memory are not changed. */
2591 static inline unsigned
2592 safe_hash (rtx x
, machine_mode mode
)
2594 int dummy_do_not_record
;
2595 return hash_rtx (x
, mode
, &dummy_do_not_record
, NULL
, true);
2598 /* Return 1 iff X and Y would canonicalize into the same thing,
2599 without actually constructing the canonicalization of either one.
2600 If VALIDATE is nonzero,
2601 we assume X is an expression being processed from the rtl
2602 and Y was found in the hash table. We check register refs
2603 in Y for being marked as valid.
2605 If FOR_GCSE is true, we compare X and Y for equivalence for GCSE. */
2608 exp_equiv_p (const_rtx x
, const_rtx y
, int validate
, bool for_gcse
)
2614 /* Note: it is incorrect to assume an expression is equivalent to itself
2615 if VALIDATE is nonzero. */
2616 if (x
== y
&& !validate
)
2619 if (x
== 0 || y
== 0)
2622 code
= GET_CODE (x
);
2623 if (code
!= GET_CODE (y
))
2626 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2627 if (GET_MODE (x
) != GET_MODE (y
))
2630 /* MEMs referring to different address space are not equivalent. */
2631 if (code
== MEM
&& MEM_ADDR_SPACE (x
) != MEM_ADDR_SPACE (y
))
2642 return label_ref_label (x
) == label_ref_label (y
);
2645 return XSTR (x
, 0) == XSTR (y
, 0);
2649 return REGNO (x
) == REGNO (y
);
2652 unsigned int regno
= REGNO (y
);
2654 unsigned int endregno
= END_REGNO (y
);
2656 /* If the quantities are not the same, the expressions are not
2657 equivalent. If there are and we are not to validate, they
2658 are equivalent. Otherwise, ensure all regs are up-to-date. */
2660 if (REG_QTY (REGNO (x
)) != REG_QTY (regno
))
2666 for (i
= regno
; i
< endregno
; i
++)
2667 if (REG_IN_TABLE (i
) != REG_TICK (i
))
2676 /* A volatile mem should not be considered equivalent to any
2678 if (MEM_VOLATILE_P (x
) || MEM_VOLATILE_P (y
))
2681 /* Can't merge two expressions in different alias sets, since we
2682 can decide that the expression is transparent in a block when
2683 it isn't, due to it being set with the different alias set.
2685 Also, can't merge two expressions with different MEM_ATTRS.
2686 They could e.g. be two different entities allocated into the
2687 same space on the stack (see e.g. PR25130). In that case, the
2688 MEM addresses can be the same, even though the two MEMs are
2689 absolutely not equivalent.
2691 But because really all MEM attributes should be the same for
2692 equivalent MEMs, we just use the invariant that MEMs that have
2693 the same attributes share the same mem_attrs data structure. */
2694 if (!mem_attrs_eq_p (MEM_ATTRS (x
), MEM_ATTRS (y
)))
2697 /* If we are handling exceptions, we cannot consider two expressions
2698 with different trapping status as equivalent, because simple_mem
2699 might accept one and reject the other. */
2700 if (cfun
->can_throw_non_call_exceptions
2701 && (MEM_NOTRAP_P (x
) != MEM_NOTRAP_P (y
)))
2706 /* For commutative operations, check both orders. */
2714 return ((exp_equiv_p (XEXP (x
, 0), XEXP (y
, 0),
2716 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 1),
2717 validate
, for_gcse
))
2718 || (exp_equiv_p (XEXP (x
, 0), XEXP (y
, 1),
2720 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 0),
2721 validate
, for_gcse
)));
2724 /* We don't use the generic code below because we want to
2725 disregard filename and line numbers. */
2727 /* A volatile asm isn't equivalent to any other. */
2728 if (MEM_VOLATILE_P (x
) || MEM_VOLATILE_P (y
))
2731 if (GET_MODE (x
) != GET_MODE (y
)
2732 || strcmp (ASM_OPERANDS_TEMPLATE (x
), ASM_OPERANDS_TEMPLATE (y
))
2733 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x
),
2734 ASM_OPERANDS_OUTPUT_CONSTRAINT (y
))
2735 || ASM_OPERANDS_OUTPUT_IDX (x
) != ASM_OPERANDS_OUTPUT_IDX (y
)
2736 || ASM_OPERANDS_INPUT_LENGTH (x
) != ASM_OPERANDS_INPUT_LENGTH (y
))
2739 if (ASM_OPERANDS_INPUT_LENGTH (x
))
2741 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
2742 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x
, i
),
2743 ASM_OPERANDS_INPUT (y
, i
),
2745 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x
, i
),
2746 ASM_OPERANDS_INPUT_CONSTRAINT (y
, i
)))
2756 /* Compare the elements. If any pair of corresponding elements
2757 fail to match, return 0 for the whole thing. */
2759 fmt
= GET_RTX_FORMAT (code
);
2760 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2765 if (! exp_equiv_p (XEXP (x
, i
), XEXP (y
, i
),
2766 validate
, for_gcse
))
2771 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2773 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2774 if (! exp_equiv_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
),
2775 validate
, for_gcse
))
2780 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
2785 if (XINT (x
, i
) != XINT (y
, i
))
2790 if (XWINT (x
, i
) != XWINT (y
, i
))
2795 if (maybe_ne (SUBREG_BYTE (x
), SUBREG_BYTE (y
)))
2811 /* Subroutine of canon_reg. Pass *XLOC through canon_reg, and validate
2812 the result if necessary. INSN is as for canon_reg. */
2815 validate_canon_reg (rtx
*xloc
, rtx_insn
*insn
)
2819 rtx new_rtx
= canon_reg (*xloc
, insn
);
2821 /* If replacing pseudo with hard reg or vice versa, ensure the
2822 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2823 gcc_assert (insn
&& new_rtx
);
2824 validate_change (insn
, xloc
, new_rtx
, 1);
2828 /* Canonicalize an expression:
2829 replace each register reference inside it
2830 with the "oldest" equivalent register.
2832 If INSN is nonzero validate_change is used to ensure that INSN remains valid
2833 after we make our substitution. The calls are made with IN_GROUP nonzero
2834 so apply_change_group must be called upon the outermost return from this
2835 function (unless INSN is zero). The result of apply_change_group can
2836 generally be discarded since the changes we are making are optional. */
2839 canon_reg (rtx x
, rtx_insn
*insn
)
2848 code
= GET_CODE (x
);
2865 struct qty_table_elem
*ent
;
2867 /* Never replace a hard reg, because hard regs can appear
2868 in more than one machine mode, and we must preserve the mode
2869 of each occurrence. Also, some hard regs appear in
2870 MEMs that are shared and mustn't be altered. Don't try to
2871 replace any reg that maps to a reg of class NO_REGS. */
2872 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
2873 || ! REGNO_QTY_VALID_P (REGNO (x
)))
2876 q
= REG_QTY (REGNO (x
));
2877 ent
= &qty_table
[q
];
2878 first
= ent
->first_reg
;
2879 return (first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
2880 : REGNO_REG_CLASS (first
) == NO_REGS
? x
2881 : gen_rtx_REG (ent
->mode
, first
));
2888 fmt
= GET_RTX_FORMAT (code
);
2889 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2894 validate_canon_reg (&XEXP (x
, i
), insn
);
2895 else if (fmt
[i
] == 'E')
2896 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2897 validate_canon_reg (&XVECEXP (x
, i
, j
), insn
);
2903 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2904 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2905 what values are being compared.
2907 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2908 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2909 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2910 compared to produce cc0.
2912 The return value is the comparison operator and is either the code of
2913 A or the code corresponding to the inverse of the comparison. */
2915 static enum rtx_code
2916 find_comparison_args (enum rtx_code code
, rtx
*parg1
, rtx
*parg2
,
2917 machine_mode
*pmode1
, machine_mode
*pmode2
)
2920 hash_set
<rtx
> *visited
= NULL
;
2921 /* Set nonzero when we find something of interest. */
2924 arg1
= *parg1
, arg2
= *parg2
;
2926 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2928 while (arg2
== CONST0_RTX (GET_MODE (arg1
)))
2930 int reverse_code
= 0;
2931 struct table_elt
*p
= 0;
2933 /* Remember state from previous iteration. */
2937 visited
= new hash_set
<rtx
>;
2942 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2943 On machines with CC0, this is the only case that can occur, since
2944 fold_rtx will return the COMPARE or item being compared with zero
2947 if (GET_CODE (arg1
) == COMPARE
&& arg2
== const0_rtx
)
2950 /* If ARG1 is a comparison operator and CODE is testing for
2951 STORE_FLAG_VALUE, get the inner arguments. */
2953 else if (COMPARISON_P (arg1
))
2955 #ifdef FLOAT_STORE_FLAG_VALUE
2956 REAL_VALUE_TYPE fsfv
;
2960 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2961 && code
== LT
&& STORE_FLAG_VALUE
== -1)
2962 #ifdef FLOAT_STORE_FLAG_VALUE
2963 || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1
))
2964 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
2965 REAL_VALUE_NEGATIVE (fsfv
)))
2970 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2971 && code
== GE
&& STORE_FLAG_VALUE
== -1)
2972 #ifdef FLOAT_STORE_FLAG_VALUE
2973 || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1
))
2974 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
2975 REAL_VALUE_NEGATIVE (fsfv
)))
2978 x
= arg1
, reverse_code
= 1;
2981 /* ??? We could also check for
2983 (ne (and (eq (...) (const_int 1))) (const_int 0))
2985 and related forms, but let's wait until we see them occurring. */
2988 /* Look up ARG1 in the hash table and see if it has an equivalence
2989 that lets us see what is being compared. */
2990 p
= lookup (arg1
, SAFE_HASH (arg1
, GET_MODE (arg1
)), GET_MODE (arg1
));
2993 p
= p
->first_same_value
;
2995 /* If what we compare is already known to be constant, that is as
2997 We need to break the loop in this case, because otherwise we
2998 can have an infinite loop when looking at a reg that is known
2999 to be a constant which is the same as a comparison of a reg
3000 against zero which appears later in the insn stream, which in
3001 turn is constant and the same as the comparison of the first reg
3007 for (; p
; p
= p
->next_same_value
)
3009 machine_mode inner_mode
= GET_MODE (p
->exp
);
3010 #ifdef FLOAT_STORE_FLAG_VALUE
3011 REAL_VALUE_TYPE fsfv
;
3014 /* If the entry isn't valid, skip it. */
3015 if (! exp_equiv_p (p
->exp
, p
->exp
, 1, false))
3018 /* If it's a comparison we've used before, skip it. */
3019 if (visited
&& visited
->contains (p
->exp
))
3022 if (GET_CODE (p
->exp
) == COMPARE
3023 /* Another possibility is that this machine has a compare insn
3024 that includes the comparison code. In that case, ARG1 would
3025 be equivalent to a comparison operation that would set ARG1 to
3026 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3027 ORIG_CODE is the actual comparison being done; if it is an EQ,
3028 we must reverse ORIG_CODE. On machine with a negative value
3029 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3032 && val_signbit_known_set_p (inner_mode
,
3034 #ifdef FLOAT_STORE_FLAG_VALUE
3036 && SCALAR_FLOAT_MODE_P (inner_mode
)
3037 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3038 REAL_VALUE_NEGATIVE (fsfv
)))
3041 && COMPARISON_P (p
->exp
)))
3046 else if ((code
== EQ
3048 && val_signbit_known_set_p (inner_mode
,
3050 #ifdef FLOAT_STORE_FLAG_VALUE
3052 && SCALAR_FLOAT_MODE_P (inner_mode
)
3053 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3054 REAL_VALUE_NEGATIVE (fsfv
)))
3057 && COMPARISON_P (p
->exp
))
3064 /* If this non-trapping address, e.g. fp + constant, the
3065 equivalent is a better operand since it may let us predict
3066 the value of the comparison. */
3067 else if (!rtx_addr_can_trap_p (p
->exp
))
3074 /* If we didn't find a useful equivalence for ARG1, we are done.
3075 Otherwise, set up for the next iteration. */
3079 /* If we need to reverse the comparison, make sure that is
3080 possible -- we can't necessarily infer the value of GE from LT
3081 with floating-point operands. */
3084 enum rtx_code reversed
= reversed_comparison_code (x
, NULL
);
3085 if (reversed
== UNKNOWN
)
3090 else if (COMPARISON_P (x
))
3091 code
= GET_CODE (x
);
3092 arg1
= XEXP (x
, 0), arg2
= XEXP (x
, 1);
3095 /* Return our results. Return the modes from before fold_rtx
3096 because fold_rtx might produce const_int, and then it's too late. */
3097 *pmode1
= GET_MODE (arg1
), *pmode2
= GET_MODE (arg2
);
3098 *parg1
= fold_rtx (arg1
, 0), *parg2
= fold_rtx (arg2
, 0);
3105 /* If X is a nontrivial arithmetic operation on an argument for which
3106 a constant value can be determined, return the result of operating
3107 on that value, as a constant. Otherwise, return X, possibly with
3108 one or more operands changed to a forward-propagated constant.
3110 If X is a register whose contents are known, we do NOT return
3111 those contents here; equiv_constant is called to perform that task.
3112 For SUBREGs and MEMs, we do that both here and in equiv_constant.
3114 INSN is the insn that we may be modifying. If it is 0, make a copy
3115 of X before modifying it. */
3118 fold_rtx (rtx x
, rtx_insn
*insn
)
3128 /* Operands of X. */
3129 /* Workaround -Wmaybe-uninitialized false positive during
3130 profiledbootstrap by initializing them. */
3131 rtx folded_arg0
= NULL_RTX
;
3132 rtx folded_arg1
= NULL_RTX
;
3134 /* Constant equivalents of first three operands of X;
3135 0 when no such equivalent is known. */
3140 /* The mode of the first operand of X. We need this for sign and zero
3142 machine_mode mode_arg0
;
3147 /* Try to perform some initial simplifications on X. */
3148 code
= GET_CODE (x
);
3153 /* The first operand of a SIGN/ZERO_EXTRACT has a different meaning
3154 than it would in other contexts. Basically its mode does not
3155 signify the size of the object read. That information is carried
3156 by size operand. If we happen to have a MEM of the appropriate
3157 mode in our tables with a constant value we could simplify the
3158 extraction incorrectly if we allowed substitution of that value
3162 if ((new_rtx
= equiv_constant (x
)) != NULL_RTX
)
3172 /* No use simplifying an EXPR_LIST
3173 since they are used only for lists of args
3174 in a function call's REG_EQUAL note. */
3179 return prev_insn_cc0
;
3184 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
3185 validate_change (insn
, &ASM_OPERANDS_INPUT (x
, i
),
3186 fold_rtx (ASM_OPERANDS_INPUT (x
, i
), insn
), 0);
3191 if (NO_FUNCTION_CSE
&& CONSTANT_P (XEXP (XEXP (x
, 0), 0)))
3195 /* Anything else goes through the loop below. */
3200 mode
= GET_MODE (x
);
3204 mode_arg0
= VOIDmode
;
3206 /* Try folding our operands.
3207 Then see which ones have constant values known. */
3209 fmt
= GET_RTX_FORMAT (code
);
3210 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3213 rtx folded_arg
= XEXP (x
, i
), const_arg
;
3214 machine_mode mode_arg
= GET_MODE (folded_arg
);
3216 switch (GET_CODE (folded_arg
))
3221 const_arg
= equiv_constant (folded_arg
);
3228 const_arg
= folded_arg
;
3232 /* The cc0-user and cc0-setter may be in different blocks if
3233 the cc0-setter potentially traps. In that case PREV_INSN_CC0
3234 will have been cleared as we exited the block with the
3237 While we could potentially track cc0 in this case, it just
3238 doesn't seem to be worth it given that cc0 targets are not
3239 terribly common or important these days and trapping math
3240 is rarely used. The combination of those two conditions
3241 necessary to trip this situation is exceedingly rare in the
3245 const_arg
= NULL_RTX
;
3249 folded_arg
= prev_insn_cc0
;
3250 mode_arg
= prev_insn_cc0_mode
;
3251 const_arg
= equiv_constant (folded_arg
);
3256 folded_arg
= fold_rtx (folded_arg
, insn
);
3257 const_arg
= equiv_constant (folded_arg
);
3261 /* For the first three operands, see if the operand
3262 is constant or equivalent to a constant. */
3266 folded_arg0
= folded_arg
;
3267 const_arg0
= const_arg
;
3268 mode_arg0
= mode_arg
;
3271 folded_arg1
= folded_arg
;
3272 const_arg1
= const_arg
;
3275 const_arg2
= const_arg
;
3279 /* Pick the least expensive of the argument and an equivalent constant
3282 && const_arg
!= folded_arg
3283 && (COST_IN (const_arg
, mode_arg
, code
, i
)
3284 <= COST_IN (folded_arg
, mode_arg
, code
, i
))
3286 /* It's not safe to substitute the operand of a conversion
3287 operator with a constant, as the conversion's identity
3288 depends upon the mode of its operand. This optimization
3289 is handled by the call to simplify_unary_operation. */
3290 && (GET_RTX_CLASS (code
) != RTX_UNARY
3291 || GET_MODE (const_arg
) == mode_arg0
3292 || (code
!= ZERO_EXTEND
3293 && code
!= SIGN_EXTEND
3295 && code
!= FLOAT_TRUNCATE
3296 && code
!= FLOAT_EXTEND
3299 && code
!= UNSIGNED_FLOAT
3300 && code
!= UNSIGNED_FIX
)))
3301 folded_arg
= const_arg
;
3303 if (folded_arg
== XEXP (x
, i
))
3306 if (insn
== NULL_RTX
&& !changed
)
3309 validate_unshare_change (insn
, &XEXP (x
, i
), folded_arg
, 1);
3314 /* Canonicalize X if necessary, and keep const_argN and folded_argN
3315 consistent with the order in X. */
3316 if (canonicalize_change_group (insn
, x
))
3318 std::swap (const_arg0
, const_arg1
);
3319 std::swap (folded_arg0
, folded_arg1
);
3322 apply_change_group ();
3325 /* If X is an arithmetic operation, see if we can simplify it. */
3327 switch (GET_RTX_CLASS (code
))
3331 /* We can't simplify extension ops unless we know the
3333 if ((code
== ZERO_EXTEND
|| code
== SIGN_EXTEND
)
3334 && mode_arg0
== VOIDmode
)
3337 new_rtx
= simplify_unary_operation (code
, mode
,
3338 const_arg0
? const_arg0
: folded_arg0
,
3344 case RTX_COMM_COMPARE
:
3345 /* See what items are actually being compared and set FOLDED_ARG[01]
3346 to those values and CODE to the actual comparison code. If any are
3347 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3348 do anything if both operands are already known to be constant. */
3350 /* ??? Vector mode comparisons are not supported yet. */
3351 if (VECTOR_MODE_P (mode
))
3354 if (const_arg0
== 0 || const_arg1
== 0)
3356 struct table_elt
*p0
, *p1
;
3357 rtx true_rtx
, false_rtx
;
3358 machine_mode mode_arg1
;
3360 if (SCALAR_FLOAT_MODE_P (mode
))
3362 #ifdef FLOAT_STORE_FLAG_VALUE
3363 true_rtx
= (const_double_from_real_value
3364 (FLOAT_STORE_FLAG_VALUE (mode
), mode
));
3366 true_rtx
= NULL_RTX
;
3368 false_rtx
= CONST0_RTX (mode
);
3372 true_rtx
= const_true_rtx
;
3373 false_rtx
= const0_rtx
;
3376 code
= find_comparison_args (code
, &folded_arg0
, &folded_arg1
,
3377 &mode_arg0
, &mode_arg1
);
3379 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3380 what kinds of things are being compared, so we can't do
3381 anything with this comparison. */
3383 if (mode_arg0
== VOIDmode
|| GET_MODE_CLASS (mode_arg0
) == MODE_CC
)
3386 const_arg0
= equiv_constant (folded_arg0
);
3387 const_arg1
= equiv_constant (folded_arg1
);
3389 /* If we do not now have two constants being compared, see
3390 if we can nevertheless deduce some things about the
3392 if (const_arg0
== 0 || const_arg1
== 0)
3394 if (const_arg1
!= NULL
)
3396 rtx cheapest_simplification
;
3399 struct table_elt
*p
;
3401 /* See if we can find an equivalent of folded_arg0
3402 that gets us a cheaper expression, possibly a
3403 constant through simplifications. */
3404 p
= lookup (folded_arg0
, SAFE_HASH (folded_arg0
, mode_arg0
),
3409 cheapest_simplification
= x
;
3410 cheapest_cost
= COST (x
, mode
);
3412 for (p
= p
->first_same_value
; p
!= NULL
; p
= p
->next_same_value
)
3416 /* If the entry isn't valid, skip it. */
3417 if (! exp_equiv_p (p
->exp
, p
->exp
, 1, false))
3420 /* Try to simplify using this equivalence. */
3422 = simplify_relational_operation (code
, mode
,
3427 if (simp_result
== NULL
)
3430 cost
= COST (simp_result
, mode
);
3431 if (cost
< cheapest_cost
)
3433 cheapest_cost
= cost
;
3434 cheapest_simplification
= simp_result
;
3438 /* If we have a cheaper expression now, use that
3439 and try folding it further, from the top. */
3440 if (cheapest_simplification
!= x
)
3441 return fold_rtx (copy_rtx (cheapest_simplification
),
3446 /* See if the two operands are the same. */
3448 if ((REG_P (folded_arg0
)
3449 && REG_P (folded_arg1
)
3450 && (REG_QTY (REGNO (folded_arg0
))
3451 == REG_QTY (REGNO (folded_arg1
))))
3452 || ((p0
= lookup (folded_arg0
,
3453 SAFE_HASH (folded_arg0
, mode_arg0
),
3455 && (p1
= lookup (folded_arg1
,
3456 SAFE_HASH (folded_arg1
, mode_arg0
),
3458 && p0
->first_same_value
== p1
->first_same_value
))
3459 folded_arg1
= folded_arg0
;
3461 /* If FOLDED_ARG0 is a register, see if the comparison we are
3462 doing now is either the same as we did before or the reverse
3463 (we only check the reverse if not floating-point). */
3464 else if (REG_P (folded_arg0
))
3466 int qty
= REG_QTY (REGNO (folded_arg0
));
3468 if (REGNO_QTY_VALID_P (REGNO (folded_arg0
)))
3470 struct qty_table_elem
*ent
= &qty_table
[qty
];
3472 if ((comparison_dominates_p (ent
->comparison_code
, code
)
3473 || (! FLOAT_MODE_P (mode_arg0
)
3474 && comparison_dominates_p (ent
->comparison_code
,
3475 reverse_condition (code
))))
3476 && (rtx_equal_p (ent
->comparison_const
, folded_arg1
)
3478 && rtx_equal_p (ent
->comparison_const
,
3480 || (REG_P (folded_arg1
)
3481 && (REG_QTY (REGNO (folded_arg1
)) == ent
->comparison_qty
))))
3483 if (comparison_dominates_p (ent
->comparison_code
, code
))
3498 /* If we are comparing against zero, see if the first operand is
3499 equivalent to an IOR with a constant. If so, we may be able to
3500 determine the result of this comparison. */
3501 if (const_arg1
== const0_rtx
&& !const_arg0
)
3503 rtx y
= lookup_as_function (folded_arg0
, IOR
);
3507 && (inner_const
= equiv_constant (XEXP (y
, 1))) != 0
3508 && CONST_INT_P (inner_const
)
3509 && INTVAL (inner_const
) != 0)
3510 folded_arg0
= gen_rtx_IOR (mode_arg0
, XEXP (y
, 0), inner_const
);
3514 rtx op0
= const_arg0
? const_arg0
: copy_rtx (folded_arg0
);
3515 rtx op1
= const_arg1
? const_arg1
: copy_rtx (folded_arg1
);
3516 new_rtx
= simplify_relational_operation (code
, mode
, mode_arg0
,
3522 case RTX_COMM_ARITH
:
3526 /* If the second operand is a LABEL_REF, see if the first is a MINUS
3527 with that LABEL_REF as its second operand. If so, the result is
3528 the first operand of that MINUS. This handles switches with an
3529 ADDR_DIFF_VEC table. */
3530 if (const_arg1
&& GET_CODE (const_arg1
) == LABEL_REF
)
3533 = GET_CODE (folded_arg0
) == MINUS
? folded_arg0
3534 : lookup_as_function (folded_arg0
, MINUS
);
3536 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
3537 && label_ref_label (XEXP (y
, 1)) == label_ref_label (const_arg1
))
3540 /* Now try for a CONST of a MINUS like the above. */
3541 if ((y
= (GET_CODE (folded_arg0
) == CONST
? folded_arg0
3542 : lookup_as_function (folded_arg0
, CONST
))) != 0
3543 && GET_CODE (XEXP (y
, 0)) == MINUS
3544 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
3545 && label_ref_label (XEXP (XEXP (y
, 0), 1)) == label_ref_label (const_arg1
))
3546 return XEXP (XEXP (y
, 0), 0);
3549 /* Likewise if the operands are in the other order. */
3550 if (const_arg0
&& GET_CODE (const_arg0
) == LABEL_REF
)
3553 = GET_CODE (folded_arg1
) == MINUS
? folded_arg1
3554 : lookup_as_function (folded_arg1
, MINUS
);
3556 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
3557 && label_ref_label (XEXP (y
, 1)) == label_ref_label (const_arg0
))
3560 /* Now try for a CONST of a MINUS like the above. */
3561 if ((y
= (GET_CODE (folded_arg1
) == CONST
? folded_arg1
3562 : lookup_as_function (folded_arg1
, CONST
))) != 0
3563 && GET_CODE (XEXP (y
, 0)) == MINUS
3564 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
3565 && label_ref_label (XEXP (XEXP (y
, 0), 1)) == label_ref_label (const_arg0
))
3566 return XEXP (XEXP (y
, 0), 0);
3569 /* If second operand is a register equivalent to a negative
3570 CONST_INT, see if we can find a register equivalent to the
3571 positive constant. Make a MINUS if so. Don't do this for
3572 a non-negative constant since we might then alternate between
3573 choosing positive and negative constants. Having the positive
3574 constant previously-used is the more common case. Be sure
3575 the resulting constant is non-negative; if const_arg1 were
3576 the smallest negative number this would overflow: depending
3577 on the mode, this would either just be the same value (and
3578 hence not save anything) or be incorrect. */
3579 if (const_arg1
!= 0 && CONST_INT_P (const_arg1
)
3580 && INTVAL (const_arg1
) < 0
3581 /* This used to test
3583 -INTVAL (const_arg1) >= 0
3585 But The Sun V5.0 compilers mis-compiled that test. So
3586 instead we test for the problematic value in a more direct
3587 manner and hope the Sun compilers get it correct. */
3588 && INTVAL (const_arg1
) !=
3589 (HOST_WIDE_INT_1
<< (HOST_BITS_PER_WIDE_INT
- 1))
3590 && REG_P (folded_arg1
))
3592 rtx new_const
= GEN_INT (-INTVAL (const_arg1
));
3594 = lookup (new_const
, SAFE_HASH (new_const
, mode
), mode
);
3597 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
3599 return simplify_gen_binary (MINUS
, mode
, folded_arg0
,
3600 canon_reg (p
->exp
, NULL
));
3605 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
3606 If so, produce (PLUS Z C2-C). */
3607 if (const_arg1
!= 0 && poly_int_rtx_p (const_arg1
, &xval
))
3609 rtx y
= lookup_as_function (XEXP (x
, 0), PLUS
);
3610 if (y
&& poly_int_rtx_p (XEXP (y
, 1)))
3611 return fold_rtx (plus_constant (mode
, copy_rtx (y
), -xval
),
3618 case SMIN
: case SMAX
: case UMIN
: case UMAX
:
3619 case IOR
: case AND
: case XOR
:
3621 case ASHIFT
: case LSHIFTRT
: case ASHIFTRT
:
3622 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
3623 is known to be of similar form, we may be able to replace the
3624 operation with a combined operation. This may eliminate the
3625 intermediate operation if every use is simplified in this way.
3626 Note that the similar optimization done by combine.c only works
3627 if the intermediate operation's result has only one reference. */
3629 if (REG_P (folded_arg0
)
3630 && const_arg1
&& CONST_INT_P (const_arg1
))
3633 = (code
== ASHIFT
|| code
== ASHIFTRT
|| code
== LSHIFTRT
);
3634 rtx y
, inner_const
, new_const
;
3635 rtx canon_const_arg1
= const_arg1
;
3636 enum rtx_code associate_code
;
3639 && (INTVAL (const_arg1
) >= GET_MODE_UNIT_PRECISION (mode
)
3640 || INTVAL (const_arg1
) < 0))
3642 if (SHIFT_COUNT_TRUNCATED
)
3643 canon_const_arg1
= gen_int_shift_amount
3644 (mode
, (INTVAL (const_arg1
)
3645 & (GET_MODE_UNIT_BITSIZE (mode
) - 1)));
3650 y
= lookup_as_function (folded_arg0
, code
);
3654 /* If we have compiled a statement like
3655 "if (x == (x & mask1))", and now are looking at
3656 "x & mask2", we will have a case where the first operand
3657 of Y is the same as our first operand. Unless we detect
3658 this case, an infinite loop will result. */
3659 if (XEXP (y
, 0) == folded_arg0
)
3662 inner_const
= equiv_constant (fold_rtx (XEXP (y
, 1), 0));
3663 if (!inner_const
|| !CONST_INT_P (inner_const
))
3666 /* Don't associate these operations if they are a PLUS with the
3667 same constant and it is a power of two. These might be doable
3668 with a pre- or post-increment. Similarly for two subtracts of
3669 identical powers of two with post decrement. */
3671 if (code
== PLUS
&& const_arg1
== inner_const
3672 && ((HAVE_PRE_INCREMENT
3673 && pow2p_hwi (INTVAL (const_arg1
)))
3674 || (HAVE_POST_INCREMENT
3675 && pow2p_hwi (INTVAL (const_arg1
)))
3676 || (HAVE_PRE_DECREMENT
3677 && pow2p_hwi (- INTVAL (const_arg1
)))
3678 || (HAVE_POST_DECREMENT
3679 && pow2p_hwi (- INTVAL (const_arg1
)))))
3682 /* ??? Vector mode shifts by scalar
3683 shift operand are not supported yet. */
3684 if (is_shift
&& VECTOR_MODE_P (mode
))
3688 && (INTVAL (inner_const
) >= GET_MODE_UNIT_PRECISION (mode
)
3689 || INTVAL (inner_const
) < 0))
3691 if (SHIFT_COUNT_TRUNCATED
)
3692 inner_const
= gen_int_shift_amount
3693 (mode
, (INTVAL (inner_const
)
3694 & (GET_MODE_UNIT_BITSIZE (mode
) - 1)));
3699 /* Compute the code used to compose the constants. For example,
3700 A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */
3702 associate_code
= (is_shift
|| code
== MINUS
? PLUS
: code
);
3704 new_const
= simplify_binary_operation (associate_code
, mode
,
3711 /* If we are associating shift operations, don't let this
3712 produce a shift of the size of the object or larger.
3713 This could occur when we follow a sign-extend by a right
3714 shift on a machine that does a sign-extend as a pair
3718 && CONST_INT_P (new_const
)
3719 && INTVAL (new_const
) >= GET_MODE_UNIT_PRECISION (mode
))
3721 /* As an exception, we can turn an ASHIFTRT of this
3722 form into a shift of the number of bits - 1. */
3723 if (code
== ASHIFTRT
)
3724 new_const
= gen_int_shift_amount
3725 (mode
, GET_MODE_UNIT_BITSIZE (mode
) - 1);
3726 else if (!side_effects_p (XEXP (y
, 0)))
3727 return CONST0_RTX (mode
);
3732 y
= copy_rtx (XEXP (y
, 0));
3734 /* If Y contains our first operand (the most common way this
3735 can happen is if Y is a MEM), we would do into an infinite
3736 loop if we tried to fold it. So don't in that case. */
3738 if (! reg_mentioned_p (folded_arg0
, y
))
3739 y
= fold_rtx (y
, insn
);
3741 return simplify_gen_binary (code
, mode
, y
, new_const
);
3745 case DIV
: case UDIV
:
3746 /* ??? The associative optimization performed immediately above is
3747 also possible for DIV and UDIV using associate_code of MULT.
3748 However, we would need extra code to verify that the
3749 multiplication does not overflow, that is, there is no overflow
3750 in the calculation of new_const. */
3757 new_rtx
= simplify_binary_operation (code
, mode
,
3758 const_arg0
? const_arg0
: folded_arg0
,
3759 const_arg1
? const_arg1
: folded_arg1
);
3763 /* (lo_sum (high X) X) is simply X. */
3764 if (code
== LO_SUM
&& const_arg0
!= 0
3765 && GET_CODE (const_arg0
) == HIGH
3766 && rtx_equal_p (XEXP (const_arg0
, 0), const_arg1
))
3771 case RTX_BITFIELD_OPS
:
3772 new_rtx
= simplify_ternary_operation (code
, mode
, mode_arg0
,
3773 const_arg0
? const_arg0
: folded_arg0
,
3774 const_arg1
? const_arg1
: folded_arg1
,
3775 const_arg2
? const_arg2
: XEXP (x
, 2));
3782 return new_rtx
? new_rtx
: x
;
3785 /* Return a constant value currently equivalent to X.
3786 Return 0 if we don't know one. */
3789 equiv_constant (rtx x
)
3792 && REGNO_QTY_VALID_P (REGNO (x
)))
3794 int x_q
= REG_QTY (REGNO (x
));
3795 struct qty_table_elem
*x_ent
= &qty_table
[x_q
];
3797 if (x_ent
->const_rtx
)
3798 x
= gen_lowpart (GET_MODE (x
), x_ent
->const_rtx
);
3801 if (x
== 0 || CONSTANT_P (x
))
3804 if (GET_CODE (x
) == SUBREG
)
3806 machine_mode mode
= GET_MODE (x
);
3807 machine_mode imode
= GET_MODE (SUBREG_REG (x
));
3810 /* See if we previously assigned a constant value to this SUBREG. */
3811 if ((new_rtx
= lookup_as_function (x
, CONST_INT
)) != 0
3812 || (new_rtx
= lookup_as_function (x
, CONST_WIDE_INT
)) != 0
3813 || (NUM_POLY_INT_COEFFS
> 1
3814 && (new_rtx
= lookup_as_function (x
, CONST_POLY_INT
)) != 0)
3815 || (new_rtx
= lookup_as_function (x
, CONST_DOUBLE
)) != 0
3816 || (new_rtx
= lookup_as_function (x
, CONST_FIXED
)) != 0)
3819 /* If we didn't and if doing so makes sense, see if we previously
3820 assigned a constant value to the enclosing word mode SUBREG. */
3821 if (known_lt (GET_MODE_SIZE (mode
), UNITS_PER_WORD
)
3822 && known_lt (UNITS_PER_WORD
, GET_MODE_SIZE (imode
)))
3824 poly_int64 byte
= (SUBREG_BYTE (x
)
3825 - subreg_lowpart_offset (mode
, word_mode
));
3826 if (known_ge (byte
, 0) && multiple_p (byte
, UNITS_PER_WORD
))
3828 rtx y
= gen_rtx_SUBREG (word_mode
, SUBREG_REG (x
), byte
);
3829 new_rtx
= lookup_as_function (y
, CONST_INT
);
3831 return gen_lowpart (mode
, new_rtx
);
3835 /* Otherwise see if we already have a constant for the inner REG,
3836 and if that is enough to calculate an equivalent constant for
3837 the subreg. Note that the upper bits of paradoxical subregs
3838 are undefined, so they cannot be said to equal anything. */
3839 if (REG_P (SUBREG_REG (x
))
3840 && !paradoxical_subreg_p (x
)
3841 && (new_rtx
= equiv_constant (SUBREG_REG (x
))) != 0)
3842 return simplify_subreg (mode
, new_rtx
, imode
, SUBREG_BYTE (x
));
3847 /* If X is a MEM, see if it is a constant-pool reference, or look it up in
3848 the hash table in case its value was seen before. */
3852 struct table_elt
*elt
;
3854 x
= avoid_constant_pool_reference (x
);
3858 elt
= lookup (x
, SAFE_HASH (x
, GET_MODE (x
)), GET_MODE (x
));
3862 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
3863 if (elt
->is_const
&& CONSTANT_P (elt
->exp
))
3870 /* Given INSN, a jump insn, TAKEN indicates if we are following the
3873 In certain cases, this can cause us to add an equivalence. For example,
3874 if we are following the taken case of
3876 we can add the fact that `i' and '2' are now equivalent.
3878 In any case, we can record that this comparison was passed. If the same
3879 comparison is seen later, we will know its value. */
3882 record_jump_equiv (rtx_insn
*insn
, bool taken
)
3884 int cond_known_true
;
3887 machine_mode mode
, mode0
, mode1
;
3888 int reversed_nonequality
= 0;
3891 /* Ensure this is the right kind of insn. */
3892 gcc_assert (any_condjump_p (insn
));
3894 set
= pc_set (insn
);
3896 /* See if this jump condition is known true or false. */
3898 cond_known_true
= (XEXP (SET_SRC (set
), 2) == pc_rtx
);
3900 cond_known_true
= (XEXP (SET_SRC (set
), 1) == pc_rtx
);
3902 /* Get the type of comparison being done and the operands being compared.
3903 If we had to reverse a non-equality condition, record that fact so we
3904 know that it isn't valid for floating-point. */
3905 code
= GET_CODE (XEXP (SET_SRC (set
), 0));
3906 op0
= fold_rtx (XEXP (XEXP (SET_SRC (set
), 0), 0), insn
);
3907 op1
= fold_rtx (XEXP (XEXP (SET_SRC (set
), 0), 1), insn
);
3909 /* On a cc0 target the cc0-setter and cc0-user may end up in different
3910 blocks. When that happens the tracking of the cc0-setter via
3911 PREV_INSN_CC0 is spoiled. That means that fold_rtx may return
3912 NULL_RTX. In those cases, there's nothing to record. */
3913 if (op0
== NULL_RTX
|| op1
== NULL_RTX
)
3916 code
= find_comparison_args (code
, &op0
, &op1
, &mode0
, &mode1
);
3917 if (! cond_known_true
)
3919 code
= reversed_comparison_code_parts (code
, op0
, op1
, insn
);
3921 /* Don't remember if we can't find the inverse. */
3922 if (code
== UNKNOWN
)
3926 /* The mode is the mode of the non-constant. */
3928 if (mode1
!= VOIDmode
)
3931 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
);
3934 /* Yet another form of subreg creation. In this case, we want something in
3935 MODE, and we should assume OP has MODE iff it is naturally modeless. */
3938 record_jump_cond_subreg (machine_mode mode
, rtx op
)
3940 machine_mode op_mode
= GET_MODE (op
);
3941 if (op_mode
== mode
|| op_mode
== VOIDmode
)
3943 return lowpart_subreg (mode
, op
, op_mode
);
3946 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
3947 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
3948 Make any useful entries we can with that information. Called from
3949 above function and called recursively. */
3952 record_jump_cond (enum rtx_code code
, machine_mode mode
, rtx op0
,
3953 rtx op1
, int reversed_nonequality
)
3955 unsigned op0_hash
, op1_hash
;
3956 int op0_in_memory
, op1_in_memory
;
3957 struct table_elt
*op0_elt
, *op1_elt
;
3959 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
3960 we know that they are also equal in the smaller mode (this is also
3961 true for all smaller modes whether or not there is a SUBREG, but
3962 is not worth testing for with no SUBREG). */
3964 /* Note that GET_MODE (op0) may not equal MODE. */
3965 if (code
== EQ
&& paradoxical_subreg_p (op0
))
3967 machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
3968 rtx tem
= record_jump_cond_subreg (inner_mode
, op1
);
3970 record_jump_cond (code
, mode
, SUBREG_REG (op0
), tem
,
3971 reversed_nonequality
);
3974 if (code
== EQ
&& paradoxical_subreg_p (op1
))
3976 machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
3977 rtx tem
= record_jump_cond_subreg (inner_mode
, op0
);
3979 record_jump_cond (code
, mode
, SUBREG_REG (op1
), tem
,
3980 reversed_nonequality
);
3983 /* Similarly, if this is an NE comparison, and either is a SUBREG
3984 making a smaller mode, we know the whole thing is also NE. */
3986 /* Note that GET_MODE (op0) may not equal MODE;
3987 if we test MODE instead, we can get an infinite recursion
3988 alternating between two modes each wider than MODE. */
3991 && partial_subreg_p (op0
)
3992 && subreg_lowpart_p (op0
))
3994 machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
3995 rtx tem
= record_jump_cond_subreg (inner_mode
, op1
);
3997 record_jump_cond (code
, mode
, SUBREG_REG (op0
), tem
,
3998 reversed_nonequality
);
4002 && partial_subreg_p (op1
)
4003 && subreg_lowpart_p (op1
))
4005 machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
4006 rtx tem
= record_jump_cond_subreg (inner_mode
, op0
);
4008 record_jump_cond (code
, mode
, SUBREG_REG (op1
), tem
,
4009 reversed_nonequality
);
4012 /* Hash both operands. */
4015 hash_arg_in_memory
= 0;
4016 op0_hash
= HASH (op0
, mode
);
4017 op0_in_memory
= hash_arg_in_memory
;
4023 hash_arg_in_memory
= 0;
4024 op1_hash
= HASH (op1
, mode
);
4025 op1_in_memory
= hash_arg_in_memory
;
4030 /* Look up both operands. */
4031 op0_elt
= lookup (op0
, op0_hash
, mode
);
4032 op1_elt
= lookup (op1
, op1_hash
, mode
);
4034 /* If both operands are already equivalent or if they are not in the
4035 table but are identical, do nothing. */
4036 if ((op0_elt
!= 0 && op1_elt
!= 0
4037 && op0_elt
->first_same_value
== op1_elt
->first_same_value
)
4038 || op0
== op1
|| rtx_equal_p (op0
, op1
))
4041 /* If we aren't setting two things equal all we can do is save this
4042 comparison. Similarly if this is floating-point. In the latter
4043 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4044 If we record the equality, we might inadvertently delete code
4045 whose intent was to change -0 to +0. */
4047 if (code
!= EQ
|| FLOAT_MODE_P (GET_MODE (op0
)))
4049 struct qty_table_elem
*ent
;
4052 /* If we reversed a floating-point comparison, if OP0 is not a
4053 register, or if OP1 is neither a register or constant, we can't
4057 op1
= equiv_constant (op1
);
4059 if ((reversed_nonequality
&& FLOAT_MODE_P (mode
))
4060 || !REG_P (op0
) || op1
== 0)
4063 /* Put OP0 in the hash table if it isn't already. This gives it a
4064 new quantity number. */
4067 if (insert_regs (op0
, NULL
, 0))
4069 rehash_using_reg (op0
);
4070 op0_hash
= HASH (op0
, mode
);
4072 /* If OP0 is contained in OP1, this changes its hash code
4073 as well. Faster to rehash than to check, except
4074 for the simple case of a constant. */
4075 if (! CONSTANT_P (op1
))
4076 op1_hash
= HASH (op1
,mode
);
4079 op0_elt
= insert (op0
, NULL
, op0_hash
, mode
);
4080 op0_elt
->in_memory
= op0_in_memory
;
4083 qty
= REG_QTY (REGNO (op0
));
4084 ent
= &qty_table
[qty
];
4086 ent
->comparison_code
= code
;
4089 /* Look it up again--in case op0 and op1 are the same. */
4090 op1_elt
= lookup (op1
, op1_hash
, mode
);
4092 /* Put OP1 in the hash table so it gets a new quantity number. */
4095 if (insert_regs (op1
, NULL
, 0))
4097 rehash_using_reg (op1
);
4098 op1_hash
= HASH (op1
, mode
);
4101 op1_elt
= insert (op1
, NULL
, op1_hash
, mode
);
4102 op1_elt
->in_memory
= op1_in_memory
;
4105 ent
->comparison_const
= NULL_RTX
;
4106 ent
->comparison_qty
= REG_QTY (REGNO (op1
));
4110 ent
->comparison_const
= op1
;
4111 ent
->comparison_qty
= -1;
4117 /* If either side is still missing an equivalence, make it now,
4118 then merge the equivalences. */
4122 if (insert_regs (op0
, NULL
, 0))
4124 rehash_using_reg (op0
);
4125 op0_hash
= HASH (op0
, mode
);
4128 op0_elt
= insert (op0
, NULL
, op0_hash
, mode
);
4129 op0_elt
->in_memory
= op0_in_memory
;
4134 if (insert_regs (op1
, NULL
, 0))
4136 rehash_using_reg (op1
);
4137 op1_hash
= HASH (op1
, mode
);
4140 op1_elt
= insert (op1
, NULL
, op1_hash
, mode
);
4141 op1_elt
->in_memory
= op1_in_memory
;
4144 merge_equiv_classes (op0_elt
, op1_elt
);
4147 /* CSE processing for one instruction.
4149 Most "true" common subexpressions are mostly optimized away in GIMPLE,
4150 but the few that "leak through" are cleaned up by cse_insn, and complex
4151 addressing modes are often formed here.
4153 The main function is cse_insn, and between here and that function
4154 a couple of helper functions is defined to keep the size of cse_insn
4155 within reasonable proportions.
4157 Data is shared between the main and helper functions via STRUCT SET,
4158 that contains all data related for every set in the instruction that
4161 Note that cse_main processes all sets in the instruction. Most
4162 passes in GCC only process simple SET insns or single_set insns, but
4163 CSE processes insns with multiple sets as well. */
4165 /* Data on one SET contained in the instruction. */
4169 /* The SET rtx itself. */
4171 /* The SET_SRC of the rtx (the original value, if it is changing). */
4173 /* The hash-table element for the SET_SRC of the SET. */
4174 struct table_elt
*src_elt
;
4175 /* Hash value for the SET_SRC. */
4177 /* Hash value for the SET_DEST. */
4179 /* The SET_DEST, with SUBREG, etc., stripped. */
4181 /* Nonzero if the SET_SRC is in memory. */
4183 /* Nonzero if the SET_SRC contains something
4184 whose value cannot be predicted and understood. */
4186 /* Original machine mode, in case it becomes a CONST_INT.
4187 The size of this field should match the size of the mode
4188 field of struct rtx_def (see rtl.h). */
4189 ENUM_BITFIELD(machine_mode
) mode
: 8;
4190 /* Hash value of constant equivalent for SET_SRC. */
4191 unsigned src_const_hash
;
4192 /* A constant equivalent for SET_SRC, if any. */
4194 /* Table entry for constant equivalent for SET_SRC, if any. */
4195 struct table_elt
*src_const_elt
;
4196 /* Table entry for the destination address. */
4197 struct table_elt
*dest_addr_elt
;
4200 /* Special handling for (set REG0 REG1) where REG0 is the
4201 "cheapest", cheaper than REG1. After cse, REG1 will probably not
4202 be used in the sequel, so (if easily done) change this insn to
4203 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
4204 that computed their value. Then REG1 will become a dead store
4205 and won't cloud the situation for later optimizations.
4207 Do not make this change if REG1 is a hard register, because it will
4208 then be used in the sequel and we may be changing a two-operand insn
4209 into a three-operand insn.
4211 This is the last transformation that cse_insn will try to do. */
4214 try_back_substitute_reg (rtx set
, rtx_insn
*insn
)
4216 rtx dest
= SET_DEST (set
);
4217 rtx src
= SET_SRC (set
);
4220 && REG_P (src
) && ! HARD_REGISTER_P (src
)
4221 && REGNO_QTY_VALID_P (REGNO (src
)))
4223 int src_q
= REG_QTY (REGNO (src
));
4224 struct qty_table_elem
*src_ent
= &qty_table
[src_q
];
4226 if (src_ent
->first_reg
== REGNO (dest
))
4228 /* Scan for the previous nonnote insn, but stop at a basic
4230 rtx_insn
*prev
= insn
;
4231 rtx_insn
*bb_head
= BB_HEAD (BLOCK_FOR_INSN (insn
));
4234 prev
= PREV_INSN (prev
);
4236 while (prev
!= bb_head
&& (NOTE_P (prev
) || DEBUG_INSN_P (prev
)));
4238 /* Do not swap the registers around if the previous instruction
4239 attaches a REG_EQUIV note to REG1.
4241 ??? It's not entirely clear whether we can transfer a REG_EQUIV
4242 from the pseudo that originally shadowed an incoming argument
4243 to another register. Some uses of REG_EQUIV might rely on it
4244 being attached to REG1 rather than REG2.
4246 This section previously turned the REG_EQUIV into a REG_EQUAL
4247 note. We cannot do that because REG_EQUIV may provide an
4248 uninitialized stack slot when REG_PARM_STACK_SPACE is used. */
4249 if (NONJUMP_INSN_P (prev
)
4250 && GET_CODE (PATTERN (prev
)) == SET
4251 && SET_DEST (PATTERN (prev
)) == src
4252 && ! find_reg_note (prev
, REG_EQUIV
, NULL_RTX
))
4256 validate_change (prev
, &SET_DEST (PATTERN (prev
)), dest
, 1);
4257 validate_change (insn
, &SET_DEST (set
), src
, 1);
4258 validate_change (insn
, &SET_SRC (set
), dest
, 1);
4259 apply_change_group ();
4261 /* If INSN has a REG_EQUAL note, and this note mentions
4262 REG0, then we must delete it, because the value in
4263 REG0 has changed. If the note's value is REG1, we must
4264 also delete it because that is now this insn's dest. */
4265 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
4267 && (reg_mentioned_p (dest
, XEXP (note
, 0))
4268 || rtx_equal_p (src
, XEXP (note
, 0))))
4269 remove_note (insn
, note
);
4271 /* If INSN has a REG_ARGS_SIZE note, move it to PREV. */
4272 note
= find_reg_note (insn
, REG_ARGS_SIZE
, NULL_RTX
);
4275 remove_note (insn
, note
);
4276 gcc_assert (!find_reg_note (prev
, REG_ARGS_SIZE
, NULL_RTX
));
4277 set_unique_reg_note (prev
, REG_ARGS_SIZE
, XEXP (note
, 0));
4284 /* Record all the SETs in this instruction into SETS_PTR,
4285 and return the number of recorded sets. */
4287 find_sets_in_insn (rtx_insn
*insn
, struct set
**psets
)
4289 struct set
*sets
= *psets
;
4291 rtx x
= PATTERN (insn
);
4293 if (GET_CODE (x
) == SET
)
4295 /* Ignore SETs that are unconditional jumps.
4296 They never need cse processing, so this does not hurt.
4297 The reason is not efficiency but rather
4298 so that we can test at the end for instructions
4299 that have been simplified to unconditional jumps
4300 and not be misled by unchanged instructions
4301 that were unconditional jumps to begin with. */
4302 if (SET_DEST (x
) == pc_rtx
4303 && GET_CODE (SET_SRC (x
)) == LABEL_REF
)
4305 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4306 The hard function value register is used only once, to copy to
4307 someplace else, so it isn't worth cse'ing. */
4308 else if (GET_CODE (SET_SRC (x
)) == CALL
)
4311 sets
[n_sets
++].rtl
= x
;
4313 else if (GET_CODE (x
) == PARALLEL
)
4315 int i
, lim
= XVECLEN (x
, 0);
4317 /* Go over the expressions of the PARALLEL in forward order, to
4318 put them in the same order in the SETS array. */
4319 for (i
= 0; i
< lim
; i
++)
4321 rtx y
= XVECEXP (x
, 0, i
);
4322 if (GET_CODE (y
) == SET
)
4324 /* As above, we ignore unconditional jumps and call-insns and
4325 ignore the result of apply_change_group. */
4326 if (SET_DEST (y
) == pc_rtx
4327 && GET_CODE (SET_SRC (y
)) == LABEL_REF
)
4329 else if (GET_CODE (SET_SRC (y
)) == CALL
)
4332 sets
[n_sets
++].rtl
= y
;
4340 /* Subroutine of canonicalize_insn. X is an ASM_OPERANDS in INSN. */
4343 canon_asm_operands (rtx x
, rtx_insn
*insn
)
4345 for (int i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
4347 rtx input
= ASM_OPERANDS_INPUT (x
, i
);
4348 if (!(REG_P (input
) && HARD_REGISTER_P (input
)))
4350 input
= canon_reg (input
, insn
);
4351 validate_change (insn
, &ASM_OPERANDS_INPUT (x
, i
), input
, 1);
4356 /* Where possible, substitute every register reference in the N_SETS
4357 number of SETS in INSN with the canonical register.
4359 Register canonicalization propagatest the earliest register (i.e.
4360 one that is set before INSN) with the same value. This is a very
4361 useful, simple form of CSE, to clean up warts from expanding GIMPLE
4362 to RTL. For instance, a CONST for an address is usually expanded
4363 multiple times to loads into different registers, thus creating many
4364 subexpressions of the form:
4366 (set (reg1) (some_const))
4367 (set (mem (... reg1 ...) (thing)))
4368 (set (reg2) (some_const))
4369 (set (mem (... reg2 ...) (thing)))
4371 After canonicalizing, the code takes the following form:
4373 (set (reg1) (some_const))
4374 (set (mem (... reg1 ...) (thing)))
4375 (set (reg2) (some_const))
4376 (set (mem (... reg1 ...) (thing)))
4378 The set to reg2 is now trivially dead, and the memory reference (or
4379 address, or whatever) may be a candidate for further CSEing.
4381 In this function, the result of apply_change_group can be ignored;
4385 canonicalize_insn (rtx_insn
*insn
, struct set
**psets
, int n_sets
)
4387 struct set
*sets
= *psets
;
4389 rtx x
= PATTERN (insn
);
4394 for (tem
= CALL_INSN_FUNCTION_USAGE (insn
); tem
; tem
= XEXP (tem
, 1))
4395 if (GET_CODE (XEXP (tem
, 0)) != SET
)
4396 XEXP (tem
, 0) = canon_reg (XEXP (tem
, 0), insn
);
4399 if (GET_CODE (x
) == SET
&& GET_CODE (SET_SRC (x
)) == CALL
)
4401 canon_reg (SET_SRC (x
), insn
);
4402 apply_change_group ();
4403 fold_rtx (SET_SRC (x
), insn
);
4405 else if (GET_CODE (x
) == CLOBBER
)
4407 /* If we clobber memory, canon the address.
4408 This does nothing when a register is clobbered
4409 because we have already invalidated the reg. */
4410 if (MEM_P (XEXP (x
, 0)))
4411 canon_reg (XEXP (x
, 0), insn
);
4413 else if (GET_CODE (x
) == USE
4414 && ! (REG_P (XEXP (x
, 0))
4415 && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
))
4416 /* Canonicalize a USE of a pseudo register or memory location. */
4417 canon_reg (x
, insn
);
4418 else if (GET_CODE (x
) == ASM_OPERANDS
)
4419 canon_asm_operands (x
, insn
);
4420 else if (GET_CODE (x
) == CALL
)
4422 canon_reg (x
, insn
);
4423 apply_change_group ();
4426 else if (DEBUG_INSN_P (insn
))
4427 canon_reg (PATTERN (insn
), insn
);
4428 else if (GET_CODE (x
) == PARALLEL
)
4430 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
4432 rtx y
= XVECEXP (x
, 0, i
);
4433 if (GET_CODE (y
) == SET
&& GET_CODE (SET_SRC (y
)) == CALL
)
4435 canon_reg (SET_SRC (y
), insn
);
4436 apply_change_group ();
4437 fold_rtx (SET_SRC (y
), insn
);
4439 else if (GET_CODE (y
) == CLOBBER
)
4441 if (MEM_P (XEXP (y
, 0)))
4442 canon_reg (XEXP (y
, 0), insn
);
4444 else if (GET_CODE (y
) == USE
4445 && ! (REG_P (XEXP (y
, 0))
4446 && REGNO (XEXP (y
, 0)) < FIRST_PSEUDO_REGISTER
))
4447 canon_reg (y
, insn
);
4448 else if (GET_CODE (y
) == ASM_OPERANDS
)
4449 canon_asm_operands (y
, insn
);
4450 else if (GET_CODE (y
) == CALL
)
4452 canon_reg (y
, insn
);
4453 apply_change_group ();
4459 if (n_sets
== 1 && REG_NOTES (insn
) != 0
4460 && (tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
)) != 0)
4462 /* We potentially will process this insn many times. Therefore,
4463 drop the REG_EQUAL note if it is equal to the SET_SRC of the
4466 Do not do so if the REG_EQUAL note is for a STRICT_LOW_PART,
4467 because cse_insn handles those specially. */
4468 if (GET_CODE (SET_DEST (sets
[0].rtl
)) != STRICT_LOW_PART
4469 && rtx_equal_p (XEXP (tem
, 0), SET_SRC (sets
[0].rtl
)))
4470 remove_note (insn
, tem
);
4473 canon_reg (XEXP (tem
, 0), insn
);
4474 apply_change_group ();
4475 XEXP (tem
, 0) = fold_rtx (XEXP (tem
, 0), insn
);
4476 df_notes_rescan (insn
);
4480 /* Canonicalize sources and addresses of destinations.
4481 We do this in a separate pass to avoid problems when a MATCH_DUP is
4482 present in the insn pattern. In that case, we want to ensure that
4483 we don't break the duplicate nature of the pattern. So we will replace
4484 both operands at the same time. Otherwise, we would fail to find an
4485 equivalent substitution in the loop calling validate_change below.
4487 We used to suppress canonicalization of DEST if it appears in SRC,
4488 but we don't do this any more. */
4490 for (i
= 0; i
< n_sets
; i
++)
4492 rtx dest
= SET_DEST (sets
[i
].rtl
);
4493 rtx src
= SET_SRC (sets
[i
].rtl
);
4494 rtx new_rtx
= canon_reg (src
, insn
);
4496 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new_rtx
, 1);
4498 if (GET_CODE (dest
) == ZERO_EXTRACT
)
4500 validate_change (insn
, &XEXP (dest
, 1),
4501 canon_reg (XEXP (dest
, 1), insn
), 1);
4502 validate_change (insn
, &XEXP (dest
, 2),
4503 canon_reg (XEXP (dest
, 2), insn
), 1);
4506 while (GET_CODE (dest
) == SUBREG
4507 || GET_CODE (dest
) == ZERO_EXTRACT
4508 || GET_CODE (dest
) == STRICT_LOW_PART
)
4509 dest
= XEXP (dest
, 0);
4512 canon_reg (dest
, insn
);
4515 /* Now that we have done all the replacements, we can apply the change
4516 group and see if they all work. Note that this will cause some
4517 canonicalizations that would have worked individually not to be applied
4518 because some other canonicalization didn't work, but this should not
4521 The result of apply_change_group can be ignored; see canon_reg. */
4523 apply_change_group ();
4526 /* Main function of CSE.
4527 First simplify sources and addresses of all assignments
4528 in the instruction, using previously-computed equivalents values.
4529 Then install the new sources and destinations in the table
4530 of available values. */
4533 cse_insn (rtx_insn
*insn
)
4535 rtx x
= PATTERN (insn
);
4541 struct table_elt
*src_eqv_elt
= 0;
4542 int src_eqv_volatile
= 0;
4543 int src_eqv_in_memory
= 0;
4544 unsigned src_eqv_hash
= 0;
4546 struct set
*sets
= (struct set
*) 0;
4548 if (GET_CODE (x
) == SET
)
4549 sets
= XALLOCA (struct set
);
4550 else if (GET_CODE (x
) == PARALLEL
)
4551 sets
= XALLOCAVEC (struct set
, XVECLEN (x
, 0));
4554 /* Records what this insn does to set CC0. */
4556 this_insn_cc0_mode
= VOIDmode
;
4558 /* Find all regs explicitly clobbered in this insn,
4559 to ensure they are not replaced with any other regs
4560 elsewhere in this insn. */
4561 invalidate_from_sets_and_clobbers (insn
);
4563 /* Record all the SETs in this instruction. */
4564 n_sets
= find_sets_in_insn (insn
, &sets
);
4566 /* Substitute the canonical register where possible. */
4567 canonicalize_insn (insn
, &sets
, n_sets
);
4569 /* If this insn has a REG_EQUAL note, store the equivalent value in SRC_EQV,
4570 if different, or if the DEST is a STRICT_LOW_PART/ZERO_EXTRACT. The
4571 latter condition is necessary because SRC_EQV is handled specially for
4572 this case, and if it isn't set, then there will be no equivalence
4573 for the destination. */
4574 if (n_sets
== 1 && REG_NOTES (insn
) != 0
4575 && (tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
)) != 0)
4578 if (GET_CODE (SET_DEST (sets
[0].rtl
)) != ZERO_EXTRACT
4579 && (! rtx_equal_p (XEXP (tem
, 0), SET_SRC (sets
[0].rtl
))
4580 || GET_CODE (SET_DEST (sets
[0].rtl
)) == STRICT_LOW_PART
))
4581 src_eqv
= copy_rtx (XEXP (tem
, 0));
4582 /* If DEST is of the form ZERO_EXTACT, as in:
4583 (set (zero_extract:SI (reg:SI 119)
4584 (const_int 16 [0x10])
4585 (const_int 16 [0x10]))
4586 (const_int 51154 [0xc7d2]))
4587 REG_EQUAL note will specify the value of register (reg:SI 119) at this
4588 point. Note that this is different from SRC_EQV. We can however
4589 calculate SRC_EQV with the position and width of ZERO_EXTRACT. */
4590 else if (GET_CODE (SET_DEST (sets
[0].rtl
)) == ZERO_EXTRACT
4591 && CONST_INT_P (XEXP (tem
, 0))
4592 && CONST_INT_P (XEXP (SET_DEST (sets
[0].rtl
), 1))
4593 && CONST_INT_P (XEXP (SET_DEST (sets
[0].rtl
), 2)))
4595 rtx dest_reg
= XEXP (SET_DEST (sets
[0].rtl
), 0);
4596 /* This is the mode of XEXP (tem, 0) as well. */
4597 scalar_int_mode dest_mode
4598 = as_a
<scalar_int_mode
> (GET_MODE (dest_reg
));
4599 rtx width
= XEXP (SET_DEST (sets
[0].rtl
), 1);
4600 rtx pos
= XEXP (SET_DEST (sets
[0].rtl
), 2);
4601 HOST_WIDE_INT val
= INTVAL (XEXP (tem
, 0));
4604 if (BITS_BIG_ENDIAN
)
4605 shift
= (GET_MODE_PRECISION (dest_mode
)
4606 - INTVAL (pos
) - INTVAL (width
));
4608 shift
= INTVAL (pos
);
4609 if (INTVAL (width
) == HOST_BITS_PER_WIDE_INT
)
4610 mask
= HOST_WIDE_INT_M1
;
4612 mask
= (HOST_WIDE_INT_1
<< INTVAL (width
)) - 1;
4613 val
= (val
>> shift
) & mask
;
4614 src_eqv
= GEN_INT (val
);
4618 /* Set sets[i].src_elt to the class each source belongs to.
4619 Detect assignments from or to volatile things
4620 and set set[i] to zero so they will be ignored
4621 in the rest of this function.
4623 Nothing in this loop changes the hash table or the register chains. */
4625 for (i
= 0; i
< n_sets
; i
++)
4627 bool repeat
= false;
4628 bool noop_insn
= false;
4631 struct table_elt
*elt
= 0, *p
;
4635 rtx src_related
= 0;
4636 bool src_related_is_const_anchor
= false;
4637 struct table_elt
*src_const_elt
= 0;
4638 int src_cost
= MAX_COST
;
4639 int src_eqv_cost
= MAX_COST
;
4640 int src_folded_cost
= MAX_COST
;
4641 int src_related_cost
= MAX_COST
;
4642 int src_elt_cost
= MAX_COST
;
4643 int src_regcost
= MAX_COST
;
4644 int src_eqv_regcost
= MAX_COST
;
4645 int src_folded_regcost
= MAX_COST
;
4646 int src_related_regcost
= MAX_COST
;
4647 int src_elt_regcost
= MAX_COST
;
4648 /* Set nonzero if we need to call force_const_mem on with the
4649 contents of src_folded before using it. */
4650 int src_folded_force_flag
= 0;
4651 scalar_int_mode int_mode
;
4653 dest
= SET_DEST (sets
[i
].rtl
);
4654 src
= SET_SRC (sets
[i
].rtl
);
4656 /* If SRC is a constant that has no machine mode,
4657 hash it with the destination's machine mode.
4658 This way we can keep different modes separate. */
4660 mode
= GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
4661 sets
[i
].mode
= mode
;
4665 machine_mode eqvmode
= mode
;
4666 if (GET_CODE (dest
) == STRICT_LOW_PART
)
4667 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
4669 hash_arg_in_memory
= 0;
4670 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
4672 /* Find the equivalence class for the equivalent expression. */
4675 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, eqvmode
);
4677 src_eqv_volatile
= do_not_record
;
4678 src_eqv_in_memory
= hash_arg_in_memory
;
4681 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4682 value of the INNER register, not the destination. So it is not
4683 a valid substitution for the source. But save it for later. */
4684 if (GET_CODE (dest
) == STRICT_LOW_PART
)
4687 src_eqv_here
= src_eqv
;
4689 /* Simplify and foldable subexpressions in SRC. Then get the fully-
4690 simplified result, which may not necessarily be valid. */
4691 src_folded
= fold_rtx (src
, NULL
);
4694 /* ??? This caused bad code to be generated for the m68k port with -O2.
4695 Suppose src is (CONST_INT -1), and that after truncation src_folded
4696 is (CONST_INT 3). Suppose src_folded is then used for src_const.
4697 At the end we will add src and src_const to the same equivalence
4698 class. We now have 3 and -1 on the same equivalence class. This
4699 causes later instructions to be mis-optimized. */
4700 /* If storing a constant in a bitfield, pre-truncate the constant
4701 so we will be able to record it later. */
4702 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
)
4704 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
4706 if (CONST_INT_P (src
)
4707 && CONST_INT_P (width
)
4708 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
4709 && (INTVAL (src
) & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
4711 = GEN_INT (INTVAL (src
) & ((HOST_WIDE_INT_1
4712 << INTVAL (width
)) - 1));
4716 /* Compute SRC's hash code, and also notice if it
4717 should not be recorded at all. In that case,
4718 prevent any further processing of this assignment. */
4720 hash_arg_in_memory
= 0;
4723 sets
[i
].src_hash
= HASH (src
, mode
);
4724 sets
[i
].src_volatile
= do_not_record
;
4725 sets
[i
].src_in_memory
= hash_arg_in_memory
;
4727 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
4728 a pseudo, do not record SRC. Using SRC as a replacement for
4729 anything else will be incorrect in that situation. Note that
4730 this usually occurs only for stack slots, in which case all the
4731 RTL would be referring to SRC, so we don't lose any optimization
4732 opportunities by not having SRC in the hash table. */
4735 && find_reg_note (insn
, REG_EQUIV
, NULL_RTX
) != 0
4737 && REGNO (dest
) >= FIRST_PSEUDO_REGISTER
)
4738 sets
[i
].src_volatile
= 1;
4740 else if (GET_CODE (src
) == ASM_OPERANDS
4741 && GET_CODE (x
) == PARALLEL
)
4743 /* Do not record result of a non-volatile inline asm with
4744 more than one result. */
4746 sets
[i
].src_volatile
= 1;
4748 int j
, lim
= XVECLEN (x
, 0);
4749 for (j
= 0; j
< lim
; j
++)
4751 rtx y
= XVECEXP (x
, 0, j
);
4752 /* And do not record result of a non-volatile inline asm
4753 with "memory" clobber. */
4754 if (GET_CODE (y
) == CLOBBER
&& MEM_P (XEXP (y
, 0)))
4756 sets
[i
].src_volatile
= 1;
4763 /* It is no longer clear why we used to do this, but it doesn't
4764 appear to still be needed. So let's try without it since this
4765 code hurts cse'ing widened ops. */
4766 /* If source is a paradoxical subreg (such as QI treated as an SI),
4767 treat it as volatile. It may do the work of an SI in one context
4768 where the extra bits are not being used, but cannot replace an SI
4770 if (paradoxical_subreg_p (src
))
4771 sets
[i
].src_volatile
= 1;
4774 /* Locate all possible equivalent forms for SRC. Try to replace
4775 SRC in the insn with each cheaper equivalent.
4777 We have the following types of equivalents: SRC itself, a folded
4778 version, a value given in a REG_EQUAL note, or a value related
4781 Each of these equivalents may be part of an additional class
4782 of equivalents (if more than one is in the table, they must be in
4783 the same class; we check for this).
4785 If the source is volatile, we don't do any table lookups.
4787 We note any constant equivalent for possible later use in a
4790 if (!sets
[i
].src_volatile
)
4791 elt
= lookup (src
, sets
[i
].src_hash
, mode
);
4793 sets
[i
].src_elt
= elt
;
4795 if (elt
&& src_eqv_here
&& src_eqv_elt
)
4797 if (elt
->first_same_value
!= src_eqv_elt
->first_same_value
)
4799 /* The REG_EQUAL is indicating that two formerly distinct
4800 classes are now equivalent. So merge them. */
4801 merge_equiv_classes (elt
, src_eqv_elt
);
4802 src_eqv_hash
= HASH (src_eqv
, elt
->mode
);
4803 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, elt
->mode
);
4809 else if (src_eqv_elt
)
4812 /* Try to find a constant somewhere and record it in `src_const'.
4813 Record its table element, if any, in `src_const_elt'. Look in
4814 any known equivalences first. (If the constant is not in the
4815 table, also set `sets[i].src_const_hash'). */
4817 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
4821 src_const_elt
= elt
;
4826 && (CONSTANT_P (src_folded
)
4827 /* Consider (minus (label_ref L1) (label_ref L2)) as
4828 "constant" here so we will record it. This allows us
4829 to fold switch statements when an ADDR_DIFF_VEC is used. */
4830 || (GET_CODE (src_folded
) == MINUS
4831 && GET_CODE (XEXP (src_folded
, 0)) == LABEL_REF
4832 && GET_CODE (XEXP (src_folded
, 1)) == LABEL_REF
)))
4833 src_const
= src_folded
, src_const_elt
= elt
;
4834 else if (src_const
== 0 && src_eqv_here
&& CONSTANT_P (src_eqv_here
))
4835 src_const
= src_eqv_here
, src_const_elt
= src_eqv_elt
;
4837 /* If we don't know if the constant is in the table, get its
4838 hash code and look it up. */
4839 if (src_const
&& src_const_elt
== 0)
4841 sets
[i
].src_const_hash
= HASH (src_const
, mode
);
4842 src_const_elt
= lookup (src_const
, sets
[i
].src_const_hash
, mode
);
4845 sets
[i
].src_const
= src_const
;
4846 sets
[i
].src_const_elt
= src_const_elt
;
4848 /* If the constant and our source are both in the table, mark them as
4849 equivalent. Otherwise, if a constant is in the table but the source
4850 isn't, set ELT to it. */
4851 if (src_const_elt
&& elt
4852 && src_const_elt
->first_same_value
!= elt
->first_same_value
)
4853 merge_equiv_classes (elt
, src_const_elt
);
4854 else if (src_const_elt
&& elt
== 0)
4855 elt
= src_const_elt
;
4857 /* See if there is a register linearly related to a constant
4858 equivalent of SRC. */
4860 && (GET_CODE (src_const
) == CONST
4861 || (src_const_elt
&& src_const_elt
->related_value
!= 0)))
4863 src_related
= use_related_value (src_const
, src_const_elt
);
4866 struct table_elt
*src_related_elt
4867 = lookup (src_related
, HASH (src_related
, mode
), mode
);
4868 if (src_related_elt
&& elt
)
4870 if (elt
->first_same_value
4871 != src_related_elt
->first_same_value
)
4872 /* This can occur when we previously saw a CONST
4873 involving a SYMBOL_REF and then see the SYMBOL_REF
4874 twice. Merge the involved classes. */
4875 merge_equiv_classes (elt
, src_related_elt
);
4878 src_related_elt
= 0;
4880 else if (src_related_elt
&& elt
== 0)
4881 elt
= src_related_elt
;
4885 /* See if we have a CONST_INT that is already in a register in a
4888 if (src_const
&& src_related
== 0 && CONST_INT_P (src_const
)
4889 && is_int_mode (mode
, &int_mode
)
4890 && GET_MODE_PRECISION (int_mode
) < BITS_PER_WORD
)
4892 opt_scalar_int_mode wider_mode_iter
;
4893 FOR_EACH_WIDER_MODE (wider_mode_iter
, int_mode
)
4895 scalar_int_mode wider_mode
= wider_mode_iter
.require ();
4896 if (GET_MODE_PRECISION (wider_mode
) > BITS_PER_WORD
)
4899 struct table_elt
*const_elt
4900 = lookup (src_const
, HASH (src_const
, wider_mode
), wider_mode
);
4905 for (const_elt
= const_elt
->first_same_value
;
4906 const_elt
; const_elt
= const_elt
->next_same_value
)
4907 if (REG_P (const_elt
->exp
))
4909 src_related
= gen_lowpart (int_mode
, const_elt
->exp
);
4913 if (src_related
!= 0)
4918 /* Another possibility is that we have an AND with a constant in
4919 a mode narrower than a word. If so, it might have been generated
4920 as part of an "if" which would narrow the AND. If we already
4921 have done the AND in a wider mode, we can use a SUBREG of that
4924 if (flag_expensive_optimizations
&& ! src_related
4925 && is_a
<scalar_int_mode
> (mode
, &int_mode
)
4926 && GET_CODE (src
) == AND
&& CONST_INT_P (XEXP (src
, 1))
4927 && GET_MODE_SIZE (int_mode
) < UNITS_PER_WORD
)
4929 opt_scalar_int_mode tmode_iter
;
4930 rtx new_and
= gen_rtx_AND (VOIDmode
, NULL_RTX
, XEXP (src
, 1));
4932 FOR_EACH_WIDER_MODE (tmode_iter
, int_mode
)
4934 scalar_int_mode tmode
= tmode_iter
.require ();
4935 if (GET_MODE_SIZE (tmode
) > UNITS_PER_WORD
)
4938 rtx inner
= gen_lowpart (tmode
, XEXP (src
, 0));
4939 struct table_elt
*larger_elt
;
4943 PUT_MODE (new_and
, tmode
);
4944 XEXP (new_and
, 0) = inner
;
4945 larger_elt
= lookup (new_and
, HASH (new_and
, tmode
), tmode
);
4946 if (larger_elt
== 0)
4949 for (larger_elt
= larger_elt
->first_same_value
;
4950 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
4951 if (REG_P (larger_elt
->exp
))
4954 = gen_lowpart (int_mode
, larger_elt
->exp
);
4964 /* See if a MEM has already been loaded with a widening operation;
4965 if it has, we can use a subreg of that. Many CISC machines
4966 also have such operations, but this is only likely to be
4967 beneficial on these machines. */
4970 if (flag_expensive_optimizations
&& src_related
== 0
4971 && MEM_P (src
) && ! do_not_record
4972 && is_a
<scalar_int_mode
> (mode
, &int_mode
)
4973 && (extend_op
= load_extend_op (int_mode
)) != UNKNOWN
)
4975 struct rtx_def memory_extend_buf
;
4976 rtx memory_extend_rtx
= &memory_extend_buf
;
4978 /* Set what we are trying to extend and the operation it might
4979 have been extended with. */
4980 memset (memory_extend_rtx
, 0, sizeof (*memory_extend_rtx
));
4981 PUT_CODE (memory_extend_rtx
, extend_op
);
4982 XEXP (memory_extend_rtx
, 0) = src
;
4984 opt_scalar_int_mode tmode_iter
;
4985 FOR_EACH_WIDER_MODE (tmode_iter
, int_mode
)
4987 struct table_elt
*larger_elt
;
4989 scalar_int_mode tmode
= tmode_iter
.require ();
4990 if (GET_MODE_SIZE (tmode
) > UNITS_PER_WORD
)
4993 PUT_MODE (memory_extend_rtx
, tmode
);
4994 larger_elt
= lookup (memory_extend_rtx
,
4995 HASH (memory_extend_rtx
, tmode
), tmode
);
4996 if (larger_elt
== 0)
4999 for (larger_elt
= larger_elt
->first_same_value
;
5000 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
5001 if (REG_P (larger_elt
->exp
))
5003 src_related
= gen_lowpart (int_mode
, larger_elt
->exp
);
5012 /* Try to express the constant using a register+offset expression
5013 derived from a constant anchor. */
5015 if (targetm
.const_anchor
5018 && GET_CODE (src_const
) == CONST_INT
)
5020 src_related
= try_const_anchors (src_const
, mode
);
5021 src_related_is_const_anchor
= src_related
!= NULL_RTX
;
5025 if (src
== src_folded
)
5028 /* At this point, ELT, if nonzero, points to a class of expressions
5029 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
5030 and SRC_RELATED, if nonzero, each contain additional equivalent
5031 expressions. Prune these latter expressions by deleting expressions
5032 already in the equivalence class.
5034 Check for an equivalent identical to the destination. If found,
5035 this is the preferred equivalent since it will likely lead to
5036 elimination of the insn. Indicate this by placing it in
5040 elt
= elt
->first_same_value
;
5041 for (p
= elt
; p
; p
= p
->next_same_value
)
5043 enum rtx_code code
= GET_CODE (p
->exp
);
5045 /* If the expression is not valid, ignore it. Then we do not
5046 have to check for validity below. In most cases, we can use
5047 `rtx_equal_p', since canonicalization has already been done. */
5048 if (code
!= REG
&& ! exp_equiv_p (p
->exp
, p
->exp
, 1, false))
5051 /* Also skip paradoxical subregs, unless that's what we're
5053 if (paradoxical_subreg_p (p
->exp
)
5055 && GET_CODE (src
) == SUBREG
5056 && GET_MODE (src
) == GET_MODE (p
->exp
)
5057 && partial_subreg_p (GET_MODE (SUBREG_REG (src
)),
5058 GET_MODE (SUBREG_REG (p
->exp
)))))
5061 if (src
&& GET_CODE (src
) == code
&& rtx_equal_p (src
, p
->exp
))
5063 else if (src_folded
&& GET_CODE (src_folded
) == code
5064 && rtx_equal_p (src_folded
, p
->exp
))
5066 else if (src_eqv_here
&& GET_CODE (src_eqv_here
) == code
5067 && rtx_equal_p (src_eqv_here
, p
->exp
))
5069 else if (src_related
&& GET_CODE (src_related
) == code
5070 && rtx_equal_p (src_related
, p
->exp
))
5073 /* This is the same as the destination of the insns, we want
5074 to prefer it. Copy it to src_related. The code below will
5075 then give it a negative cost. */
5076 if (GET_CODE (dest
) == code
&& rtx_equal_p (p
->exp
, dest
))
5080 /* Find the cheapest valid equivalent, trying all the available
5081 possibilities. Prefer items not in the hash table to ones
5082 that are when they are equal cost. Note that we can never
5083 worsen an insn as the current contents will also succeed.
5084 If we find an equivalent identical to the destination, use it as best,
5085 since this insn will probably be eliminated in that case. */
5088 if (rtx_equal_p (src
, dest
))
5089 src_cost
= src_regcost
= -1;
5092 src_cost
= COST (src
, mode
);
5093 src_regcost
= approx_reg_cost (src
);
5099 if (rtx_equal_p (src_eqv_here
, dest
))
5100 src_eqv_cost
= src_eqv_regcost
= -1;
5103 src_eqv_cost
= COST (src_eqv_here
, mode
);
5104 src_eqv_regcost
= approx_reg_cost (src_eqv_here
);
5110 if (rtx_equal_p (src_folded
, dest
))
5111 src_folded_cost
= src_folded_regcost
= -1;
5114 src_folded_cost
= COST (src_folded
, mode
);
5115 src_folded_regcost
= approx_reg_cost (src_folded
);
5121 if (rtx_equal_p (src_related
, dest
))
5122 src_related_cost
= src_related_regcost
= -1;
5125 src_related_cost
= COST (src_related
, mode
);
5126 src_related_regcost
= approx_reg_cost (src_related
);
5128 /* If a const-anchor is used to synthesize a constant that
5129 normally requires multiple instructions then slightly prefer
5130 it over the original sequence. These instructions are likely
5131 to become redundant now. We can't compare against the cost
5132 of src_eqv_here because, on MIPS for example, multi-insn
5133 constants have zero cost; they are assumed to be hoisted from
5135 if (src_related_is_const_anchor
5136 && src_related_cost
== src_cost
5142 /* If this was an indirect jump insn, a known label will really be
5143 cheaper even though it looks more expensive. */
5144 if (dest
== pc_rtx
&& src_const
&& GET_CODE (src_const
) == LABEL_REF
)
5145 src_folded
= src_const
, src_folded_cost
= src_folded_regcost
= -1;
5147 /* Terminate loop when replacement made. This must terminate since
5148 the current contents will be tested and will always be valid. */
5153 /* Skip invalid entries. */
5154 while (elt
&& !REG_P (elt
->exp
)
5155 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
5156 elt
= elt
->next_same_value
;
5158 /* A paradoxical subreg would be bad here: it'll be the right
5159 size, but later may be adjusted so that the upper bits aren't
5160 what we want. So reject it. */
5162 && paradoxical_subreg_p (elt
->exp
)
5163 /* It is okay, though, if the rtx we're trying to match
5164 will ignore any of the bits we can't predict. */
5166 && GET_CODE (src
) == SUBREG
5167 && GET_MODE (src
) == GET_MODE (elt
->exp
)
5168 && partial_subreg_p (GET_MODE (SUBREG_REG (src
)),
5169 GET_MODE (SUBREG_REG (elt
->exp
)))))
5171 elt
= elt
->next_same_value
;
5177 src_elt_cost
= elt
->cost
;
5178 src_elt_regcost
= elt
->regcost
;
5181 /* Find cheapest and skip it for the next time. For items
5182 of equal cost, use this order:
5183 src_folded, src, src_eqv, src_related and hash table entry. */
5185 && preferable (src_folded_cost
, src_folded_regcost
,
5186 src_cost
, src_regcost
) <= 0
5187 && preferable (src_folded_cost
, src_folded_regcost
,
5188 src_eqv_cost
, src_eqv_regcost
) <= 0
5189 && preferable (src_folded_cost
, src_folded_regcost
,
5190 src_related_cost
, src_related_regcost
) <= 0
5191 && preferable (src_folded_cost
, src_folded_regcost
,
5192 src_elt_cost
, src_elt_regcost
) <= 0)
5194 trial
= src_folded
, src_folded_cost
= MAX_COST
;
5195 if (src_folded_force_flag
)
5197 rtx forced
= force_const_mem (mode
, trial
);
5203 && preferable (src_cost
, src_regcost
,
5204 src_eqv_cost
, src_eqv_regcost
) <= 0
5205 && preferable (src_cost
, src_regcost
,
5206 src_related_cost
, src_related_regcost
) <= 0
5207 && preferable (src_cost
, src_regcost
,
5208 src_elt_cost
, src_elt_regcost
) <= 0)
5209 trial
= src
, src_cost
= MAX_COST
;
5210 else if (src_eqv_here
5211 && preferable (src_eqv_cost
, src_eqv_regcost
,
5212 src_related_cost
, src_related_regcost
) <= 0
5213 && preferable (src_eqv_cost
, src_eqv_regcost
,
5214 src_elt_cost
, src_elt_regcost
) <= 0)
5215 trial
= src_eqv_here
, src_eqv_cost
= MAX_COST
;
5216 else if (src_related
5217 && preferable (src_related_cost
, src_related_regcost
,
5218 src_elt_cost
, src_elt_regcost
) <= 0)
5219 trial
= src_related
, src_related_cost
= MAX_COST
;
5223 elt
= elt
->next_same_value
;
5224 src_elt_cost
= MAX_COST
;
5228 (set (reg:M N) (const_int A))
5229 (set (reg:M2 O) (const_int B))
5230 (set (zero_extract:M2 (reg:M N) (const_int C) (const_int D))
5232 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
5233 && CONST_INT_P (trial
)
5234 && CONST_INT_P (XEXP (SET_DEST (sets
[i
].rtl
), 1))
5235 && CONST_INT_P (XEXP (SET_DEST (sets
[i
].rtl
), 2))
5236 && REG_P (XEXP (SET_DEST (sets
[i
].rtl
), 0))
5238 (GET_MODE_PRECISION (GET_MODE (SET_DEST (sets
[i
].rtl
))),
5239 INTVAL (XEXP (SET_DEST (sets
[i
].rtl
), 1))))
5240 && ((unsigned) INTVAL (XEXP (SET_DEST (sets
[i
].rtl
), 1))
5241 + (unsigned) INTVAL (XEXP (SET_DEST (sets
[i
].rtl
), 2))
5242 <= HOST_BITS_PER_WIDE_INT
))
5244 rtx dest_reg
= XEXP (SET_DEST (sets
[i
].rtl
), 0);
5245 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
5246 rtx pos
= XEXP (SET_DEST (sets
[i
].rtl
), 2);
5247 unsigned int dest_hash
= HASH (dest_reg
, GET_MODE (dest_reg
));
5248 struct table_elt
*dest_elt
5249 = lookup (dest_reg
, dest_hash
, GET_MODE (dest_reg
));
5250 rtx dest_cst
= NULL
;
5253 for (p
= dest_elt
->first_same_value
; p
; p
= p
->next_same_value
)
5254 if (p
->is_const
&& CONST_INT_P (p
->exp
))
5261 HOST_WIDE_INT val
= INTVAL (dest_cst
);
5264 /* This is the mode of DEST_CST as well. */
5265 scalar_int_mode dest_mode
5266 = as_a
<scalar_int_mode
> (GET_MODE (dest_reg
));
5267 if (BITS_BIG_ENDIAN
)
5268 shift
= GET_MODE_PRECISION (dest_mode
)
5269 - INTVAL (pos
) - INTVAL (width
);
5271 shift
= INTVAL (pos
);
5272 if (INTVAL (width
) == HOST_BITS_PER_WIDE_INT
)
5273 mask
= HOST_WIDE_INT_M1
;
5275 mask
= (HOST_WIDE_INT_1
<< INTVAL (width
)) - 1;
5276 val
&= ~(mask
<< shift
);
5277 val
|= (INTVAL (trial
) & mask
) << shift
;
5278 val
= trunc_int_for_mode (val
, dest_mode
);
5279 validate_unshare_change (insn
, &SET_DEST (sets
[i
].rtl
),
5281 validate_unshare_change (insn
, &SET_SRC (sets
[i
].rtl
),
5283 if (apply_change_group ())
5285 rtx note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
5288 remove_note (insn
, note
);
5289 df_notes_rescan (insn
);
5293 src_eqv_volatile
= 0;
5294 src_eqv_in_memory
= 0;
5302 /* We don't normally have an insn matching (set (pc) (pc)), so
5303 check for this separately here. We will delete such an
5306 For other cases such as a table jump or conditional jump
5307 where we know the ultimate target, go ahead and replace the
5308 operand. While that may not make a valid insn, we will
5309 reemit the jump below (and also insert any necessary
5311 if (n_sets
== 1 && dest
== pc_rtx
5313 || (GET_CODE (trial
) == LABEL_REF
5314 && ! condjump_p (insn
))))
5316 /* Don't substitute non-local labels, this confuses CFG. */
5317 if (GET_CODE (trial
) == LABEL_REF
5318 && LABEL_REF_NONLOCAL_P (trial
))
5321 SET_SRC (sets
[i
].rtl
) = trial
;
5322 cse_jumps_altered
= true;
5326 /* Similarly, lots of targets don't allow no-op
5327 (set (mem x) (mem x)) moves. Even (set (reg x) (reg x))
5328 might be impossible for certain registers (like CC registers). */
5329 else if (n_sets
== 1
5331 && (MEM_P (trial
) || REG_P (trial
))
5333 && rtx_equal_p (trial
, dest
)
5334 && !side_effects_p (dest
)
5335 && (cfun
->can_delete_dead_exceptions
5336 || insn_nothrow_p (insn
)))
5338 SET_SRC (sets
[i
].rtl
) = trial
;
5343 /* Reject certain invalid forms of CONST that we create. */
5344 else if (CONSTANT_P (trial
)
5345 && GET_CODE (trial
) == CONST
5346 /* Reject cases that will cause decode_rtx_const to
5347 die. On the alpha when simplifying a switch, we
5348 get (const (truncate (minus (label_ref)
5350 && (GET_CODE (XEXP (trial
, 0)) == TRUNCATE
5351 /* Likewise on IA-64, except without the
5353 || (GET_CODE (XEXP (trial
, 0)) == MINUS
5354 && GET_CODE (XEXP (XEXP (trial
, 0), 0)) == LABEL_REF
5355 && GET_CODE (XEXP (XEXP (trial
, 0), 1)) == LABEL_REF
)))
5356 /* Do nothing for this case. */
5359 /* Do not replace anything with a MEM, except the replacement
5360 is a no-op. This allows this loop to terminate. */
5361 else if (MEM_P (trial
) && !rtx_equal_p (trial
, SET_SRC(sets
[i
].rtl
)))
5362 /* Do nothing for this case. */
5365 /* Look for a substitution that makes a valid insn. */
5366 else if (validate_unshare_change (insn
, &SET_SRC (sets
[i
].rtl
),
5369 rtx new_rtx
= canon_reg (SET_SRC (sets
[i
].rtl
), insn
);
5371 /* The result of apply_change_group can be ignored; see
5374 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new_rtx
, 1);
5375 apply_change_group ();
5380 /* If we previously found constant pool entries for
5381 constants and this is a constant, try making a
5382 pool entry. Put it in src_folded unless we already have done
5383 this since that is where it likely came from. */
5385 else if (constant_pool_entries_cost
5386 && CONSTANT_P (trial
)
5388 || (!MEM_P (src_folded
)
5389 && ! src_folded_force_flag
))
5390 && GET_MODE_CLASS (mode
) != MODE_CC
5391 && mode
!= VOIDmode
)
5393 src_folded_force_flag
= 1;
5395 src_folded_cost
= constant_pool_entries_cost
;
5396 src_folded_regcost
= constant_pool_entries_regcost
;
5400 /* If we changed the insn too much, handle this set from scratch. */
5407 src
= SET_SRC (sets
[i
].rtl
);
5409 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5410 However, there is an important exception: If both are registers
5411 that are not the head of their equivalence class, replace SET_SRC
5412 with the head of the class. If we do not do this, we will have
5413 both registers live over a portion of the basic block. This way,
5414 their lifetimes will likely abut instead of overlapping. */
5416 && REGNO_QTY_VALID_P (REGNO (dest
)))
5418 int dest_q
= REG_QTY (REGNO (dest
));
5419 struct qty_table_elem
*dest_ent
= &qty_table
[dest_q
];
5421 if (dest_ent
->mode
== GET_MODE (dest
)
5422 && dest_ent
->first_reg
!= REGNO (dest
)
5423 && REG_P (src
) && REGNO (src
) == REGNO (dest
)
5424 /* Don't do this if the original insn had a hard reg as
5425 SET_SRC or SET_DEST. */
5426 && (!REG_P (sets
[i
].src
)
5427 || REGNO (sets
[i
].src
) >= FIRST_PSEUDO_REGISTER
)
5428 && (!REG_P (dest
) || REGNO (dest
) >= FIRST_PSEUDO_REGISTER
))
5429 /* We can't call canon_reg here because it won't do anything if
5430 SRC is a hard register. */
5432 int src_q
= REG_QTY (REGNO (src
));
5433 struct qty_table_elem
*src_ent
= &qty_table
[src_q
];
5434 int first
= src_ent
->first_reg
;
5436 = (first
>= FIRST_PSEUDO_REGISTER
5437 ? regno_reg_rtx
[first
] : gen_rtx_REG (GET_MODE (src
), first
));
5439 /* We must use validate-change even for this, because this
5440 might be a special no-op instruction, suitable only to
5442 if (validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new_src
, 0))
5445 /* If we had a constant that is cheaper than what we are now
5446 setting SRC to, use that constant. We ignored it when we
5447 thought we could make this into a no-op. */
5448 if (src_const
&& COST (src_const
, mode
) < COST (src
, mode
)
5449 && validate_change (insn
, &SET_SRC (sets
[i
].rtl
),
5456 /* If we made a change, recompute SRC values. */
5457 if (src
!= sets
[i
].src
)
5460 hash_arg_in_memory
= 0;
5462 sets
[i
].src_hash
= HASH (src
, mode
);
5463 sets
[i
].src_volatile
= do_not_record
;
5464 sets
[i
].src_in_memory
= hash_arg_in_memory
;
5465 sets
[i
].src_elt
= lookup (src
, sets
[i
].src_hash
, mode
);
5468 /* If this is a single SET, we are setting a register, and we have an
5469 equivalent constant, we want to add a REG_EQUAL note if the constant
5470 is different from the source. We don't want to do it for a constant
5471 pseudo since verifying that this pseudo hasn't been eliminated is a
5472 pain; moreover such a note won't help anything.
5474 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5475 which can be created for a reference to a compile time computable
5476 entry in a jump table. */
5480 && !REG_P (src_const
)
5481 && !(GET_CODE (src_const
) == SUBREG
5482 && REG_P (SUBREG_REG (src_const
)))
5483 && !(GET_CODE (src_const
) == CONST
5484 && GET_CODE (XEXP (src_const
, 0)) == MINUS
5485 && GET_CODE (XEXP (XEXP (src_const
, 0), 0)) == LABEL_REF
5486 && GET_CODE (XEXP (XEXP (src_const
, 0), 1)) == LABEL_REF
)
5487 && !rtx_equal_p (src
, src_const
))
5489 /* Make sure that the rtx is not shared. */
5490 src_const
= copy_rtx (src_const
);
5492 /* Record the actual constant value in a REG_EQUAL note,
5493 making a new one if one does not already exist. */
5494 set_unique_reg_note (insn
, REG_EQUAL
, src_const
);
5495 df_notes_rescan (insn
);
5498 /* Now deal with the destination. */
5501 /* Look within any ZERO_EXTRACT to the MEM or REG within it. */
5502 while (GET_CODE (dest
) == SUBREG
5503 || GET_CODE (dest
) == ZERO_EXTRACT
5504 || GET_CODE (dest
) == STRICT_LOW_PART
)
5505 dest
= XEXP (dest
, 0);
5507 sets
[i
].inner_dest
= dest
;
5511 #ifdef PUSH_ROUNDING
5512 /* Stack pushes invalidate the stack pointer. */
5513 rtx addr
= XEXP (dest
, 0);
5514 if (GET_RTX_CLASS (GET_CODE (addr
)) == RTX_AUTOINC
5515 && XEXP (addr
, 0) == stack_pointer_rtx
)
5516 invalidate (stack_pointer_rtx
, VOIDmode
);
5518 dest
= fold_rtx (dest
, insn
);
5521 /* Compute the hash code of the destination now,
5522 before the effects of this instruction are recorded,
5523 since the register values used in the address computation
5524 are those before this instruction. */
5525 sets
[i
].dest_hash
= HASH (dest
, mode
);
5527 /* Don't enter a bit-field in the hash table
5528 because the value in it after the store
5529 may not equal what was stored, due to truncation. */
5531 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
)
5533 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
5535 if (src_const
!= 0 && CONST_INT_P (src_const
)
5536 && CONST_INT_P (width
)
5537 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
5538 && ! (INTVAL (src_const
)
5539 & (HOST_WIDE_INT_M1U
<< INTVAL (width
))))
5540 /* Exception: if the value is constant,
5541 and it won't be truncated, record it. */
5545 /* This is chosen so that the destination will be invalidated
5546 but no new value will be recorded.
5547 We must invalidate because sometimes constant
5548 values can be recorded for bitfields. */
5549 sets
[i
].src_elt
= 0;
5550 sets
[i
].src_volatile
= 1;
5556 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5558 else if (n_sets
== 1 && dest
== pc_rtx
&& src
== pc_rtx
)
5560 /* One less use of the label this insn used to jump to. */
5561 cse_cfg_altered
|= delete_insn_and_edges (insn
);
5562 cse_jumps_altered
= true;
5563 /* No more processing for this set. */
5567 /* Similarly for no-op moves. */
5570 if (cfun
->can_throw_non_call_exceptions
&& can_throw_internal (insn
))
5571 cse_cfg_altered
= true;
5572 cse_cfg_altered
|= delete_insn_and_edges (insn
);
5573 /* No more processing for this set. */
5577 /* If this SET is now setting PC to a label, we know it used to
5578 be a conditional or computed branch. */
5579 else if (dest
== pc_rtx
&& GET_CODE (src
) == LABEL_REF
5580 && !LABEL_REF_NONLOCAL_P (src
))
5582 /* We reemit the jump in as many cases as possible just in
5583 case the form of an unconditional jump is significantly
5584 different than a computed jump or conditional jump.
5586 If this insn has multiple sets, then reemitting the
5587 jump is nontrivial. So instead we just force rerecognition
5588 and hope for the best. */
5591 rtx_jump_insn
*new_rtx
;
5594 rtx_insn
*seq
= targetm
.gen_jump (XEXP (src
, 0));
5595 new_rtx
= emit_jump_insn_before (seq
, insn
);
5596 JUMP_LABEL (new_rtx
) = XEXP (src
, 0);
5597 LABEL_NUSES (XEXP (src
, 0))++;
5599 /* Make sure to copy over REG_NON_LOCAL_GOTO. */
5600 note
= find_reg_note (insn
, REG_NON_LOCAL_GOTO
, 0);
5603 XEXP (note
, 1) = NULL_RTX
;
5604 REG_NOTES (new_rtx
) = note
;
5607 cse_cfg_altered
|= delete_insn_and_edges (insn
);
5611 INSN_CODE (insn
) = -1;
5613 /* Do not bother deleting any unreachable code, let jump do it. */
5614 cse_jumps_altered
= true;
5618 /* If destination is volatile, invalidate it and then do no further
5619 processing for this assignment. */
5621 else if (do_not_record
)
5623 invalidate_dest (dest
);
5627 if (sets
[i
].rtl
!= 0 && dest
!= SET_DEST (sets
[i
].rtl
))
5630 sets
[i
].dest_hash
= HASH (SET_DEST (sets
[i
].rtl
), mode
);
5633 invalidate_dest (SET_DEST (sets
[i
].rtl
));
5638 /* If setting CC0, record what it was set to, or a constant, if it
5639 is equivalent to a constant. If it is being set to a floating-point
5640 value, make a COMPARE with the appropriate constant of 0. If we
5641 don't do this, later code can interpret this as a test against
5642 const0_rtx, which can cause problems if we try to put it into an
5643 insn as a floating-point operand. */
5644 if (dest
== cc0_rtx
)
5646 this_insn_cc0
= src_const
&& mode
!= VOIDmode
? src_const
: src
;
5647 this_insn_cc0_mode
= mode
;
5648 if (FLOAT_MODE_P (mode
))
5649 this_insn_cc0
= gen_rtx_COMPARE (VOIDmode
, this_insn_cc0
,
5654 /* Now enter all non-volatile source expressions in the hash table
5655 if they are not already present.
5656 Record their equivalence classes in src_elt.
5657 This way we can insert the corresponding destinations into
5658 the same classes even if the actual sources are no longer in them
5659 (having been invalidated). */
5661 if (src_eqv
&& src_eqv_elt
== 0 && sets
[0].rtl
!= 0 && ! src_eqv_volatile
5662 && ! rtx_equal_p (src_eqv
, SET_DEST (sets
[0].rtl
)))
5664 struct table_elt
*elt
;
5665 struct table_elt
*classp
= sets
[0].src_elt
;
5666 rtx dest
= SET_DEST (sets
[0].rtl
);
5667 machine_mode eqvmode
= GET_MODE (dest
);
5669 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5671 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
5674 if (insert_regs (src_eqv
, classp
, 0))
5676 rehash_using_reg (src_eqv
);
5677 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
5679 elt
= insert (src_eqv
, classp
, src_eqv_hash
, eqvmode
);
5680 elt
->in_memory
= src_eqv_in_memory
;
5683 /* Check to see if src_eqv_elt is the same as a set source which
5684 does not yet have an elt, and if so set the elt of the set source
5686 for (i
= 0; i
< n_sets
; i
++)
5687 if (sets
[i
].rtl
&& sets
[i
].src_elt
== 0
5688 && rtx_equal_p (SET_SRC (sets
[i
].rtl
), src_eqv
))
5689 sets
[i
].src_elt
= src_eqv_elt
;
5692 for (i
= 0; i
< n_sets
; i
++)
5693 if (sets
[i
].rtl
&& ! sets
[i
].src_volatile
5694 && ! rtx_equal_p (SET_SRC (sets
[i
].rtl
), SET_DEST (sets
[i
].rtl
)))
5696 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == STRICT_LOW_PART
)
5698 /* REG_EQUAL in setting a STRICT_LOW_PART
5699 gives an equivalent for the entire destination register,
5700 not just for the subreg being stored in now.
5701 This is a more interesting equivalence, so we arrange later
5702 to treat the entire reg as the destination. */
5703 sets
[i
].src_elt
= src_eqv_elt
;
5704 sets
[i
].src_hash
= src_eqv_hash
;
5708 /* Insert source and constant equivalent into hash table, if not
5710 struct table_elt
*classp
= src_eqv_elt
;
5711 rtx src
= sets
[i
].src
;
5712 rtx dest
= SET_DEST (sets
[i
].rtl
);
5714 = GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
5716 /* It's possible that we have a source value known to be
5717 constant but don't have a REG_EQUAL note on the insn.
5718 Lack of a note will mean src_eqv_elt will be NULL. This
5719 can happen where we've generated a SUBREG to access a
5720 CONST_INT that is already in a register in a wider mode.
5721 Ensure that the source expression is put in the proper
5724 classp
= sets
[i
].src_const_elt
;
5726 if (sets
[i
].src_elt
== 0)
5728 struct table_elt
*elt
;
5730 /* Note that these insert_regs calls cannot remove
5731 any of the src_elt's, because they would have failed to
5732 match if not still valid. */
5733 if (insert_regs (src
, classp
, 0))
5735 rehash_using_reg (src
);
5736 sets
[i
].src_hash
= HASH (src
, mode
);
5738 elt
= insert (src
, classp
, sets
[i
].src_hash
, mode
);
5739 elt
->in_memory
= sets
[i
].src_in_memory
;
5740 /* If inline asm has any clobbers, ensure we only reuse
5741 existing inline asms and never try to put the ASM_OPERANDS
5742 into an insn that isn't inline asm. */
5743 if (GET_CODE (src
) == ASM_OPERANDS
5744 && GET_CODE (x
) == PARALLEL
)
5745 elt
->cost
= MAX_COST
;
5746 sets
[i
].src_elt
= classp
= elt
;
5748 if (sets
[i
].src_const
&& sets
[i
].src_const_elt
== 0
5749 && src
!= sets
[i
].src_const
5750 && ! rtx_equal_p (sets
[i
].src_const
, src
))
5751 sets
[i
].src_elt
= insert (sets
[i
].src_const
, classp
,
5752 sets
[i
].src_const_hash
, mode
);
5755 else if (sets
[i
].src_elt
== 0)
5756 /* If we did not insert the source into the hash table (e.g., it was
5757 volatile), note the equivalence class for the REG_EQUAL value, if any,
5758 so that the destination goes into that class. */
5759 sets
[i
].src_elt
= src_eqv_elt
;
5761 /* Record destination addresses in the hash table. This allows us to
5762 check if they are invalidated by other sets. */
5763 for (i
= 0; i
< n_sets
; i
++)
5767 rtx x
= sets
[i
].inner_dest
;
5768 struct table_elt
*elt
;
5775 mode
= GET_MODE (x
);
5776 hash
= HASH (x
, mode
);
5777 elt
= lookup (x
, hash
, mode
);
5780 if (insert_regs (x
, NULL
, 0))
5782 rtx dest
= SET_DEST (sets
[i
].rtl
);
5784 rehash_using_reg (x
);
5785 hash
= HASH (x
, mode
);
5786 sets
[i
].dest_hash
= HASH (dest
, GET_MODE (dest
));
5788 elt
= insert (x
, NULL
, hash
, mode
);
5791 sets
[i
].dest_addr_elt
= elt
;
5794 sets
[i
].dest_addr_elt
= NULL
;
5798 invalidate_from_clobbers (insn
);
5800 /* Some registers are invalidated by subroutine calls. Memory is
5801 invalidated by non-constant calls. */
5805 if (!(RTL_CONST_OR_PURE_CALL_P (insn
)))
5806 invalidate_memory ();
5808 /* For const/pure calls, invalidate any argument slots, because
5809 those are owned by the callee. */
5810 for (tem
= CALL_INSN_FUNCTION_USAGE (insn
); tem
; tem
= XEXP (tem
, 1))
5811 if (GET_CODE (XEXP (tem
, 0)) == USE
5812 && MEM_P (XEXP (XEXP (tem
, 0), 0)))
5813 invalidate (XEXP (XEXP (tem
, 0), 0), VOIDmode
);
5814 invalidate_for_call (insn
);
5817 /* Now invalidate everything set by this instruction.
5818 If a SUBREG or other funny destination is being set,
5819 sets[i].rtl is still nonzero, so here we invalidate the reg
5820 a part of which is being set. */
5822 for (i
= 0; i
< n_sets
; i
++)
5825 /* We can't use the inner dest, because the mode associated with
5826 a ZERO_EXTRACT is significant. */
5827 rtx dest
= SET_DEST (sets
[i
].rtl
);
5829 /* Needed for registers to remove the register from its
5830 previous quantity's chain.
5831 Needed for memory if this is a nonvarying address, unless
5832 we have just done an invalidate_memory that covers even those. */
5833 if (REG_P (dest
) || GET_CODE (dest
) == SUBREG
)
5834 invalidate (dest
, VOIDmode
);
5835 else if (MEM_P (dest
))
5836 invalidate (dest
, VOIDmode
);
5837 else if (GET_CODE (dest
) == STRICT_LOW_PART
5838 || GET_CODE (dest
) == ZERO_EXTRACT
)
5839 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
5842 /* Don't cse over a call to setjmp; on some machines (eg VAX)
5843 the regs restored by the longjmp come from a later time
5845 if (CALL_P (insn
) && find_reg_note (insn
, REG_SETJMP
, NULL
))
5847 flush_hash_table ();
5851 /* Make sure registers mentioned in destinations
5852 are safe for use in an expression to be inserted.
5853 This removes from the hash table
5854 any invalid entry that refers to one of these registers.
5856 We don't care about the return value from mention_regs because
5857 we are going to hash the SET_DEST values unconditionally. */
5859 for (i
= 0; i
< n_sets
; i
++)
5863 rtx x
= SET_DEST (sets
[i
].rtl
);
5869 /* We used to rely on all references to a register becoming
5870 inaccessible when a register changes to a new quantity,
5871 since that changes the hash code. However, that is not
5872 safe, since after HASH_SIZE new quantities we get a
5873 hash 'collision' of a register with its own invalid
5874 entries. And since SUBREGs have been changed not to
5875 change their hash code with the hash code of the register,
5876 it wouldn't work any longer at all. So we have to check
5877 for any invalid references lying around now.
5878 This code is similar to the REG case in mention_regs,
5879 but it knows that reg_tick has been incremented, and
5880 it leaves reg_in_table as -1 . */
5881 unsigned int regno
= REGNO (x
);
5882 unsigned int endregno
= END_REGNO (x
);
5885 for (i
= regno
; i
< endregno
; i
++)
5887 if (REG_IN_TABLE (i
) >= 0)
5889 remove_invalid_refs (i
);
5890 REG_IN_TABLE (i
) = -1;
5897 /* We may have just removed some of the src_elt's from the hash table.
5898 So replace each one with the current head of the same class.
5899 Also check if destination addresses have been removed. */
5901 for (i
= 0; i
< n_sets
; i
++)
5904 if (sets
[i
].dest_addr_elt
5905 && sets
[i
].dest_addr_elt
->first_same_value
== 0)
5907 /* The elt was removed, which means this destination is not
5908 valid after this instruction. */
5909 sets
[i
].rtl
= NULL_RTX
;
5911 else if (sets
[i
].src_elt
&& sets
[i
].src_elt
->first_same_value
== 0)
5912 /* If elt was removed, find current head of same class,
5913 or 0 if nothing remains of that class. */
5915 struct table_elt
*elt
= sets
[i
].src_elt
;
5917 while (elt
&& elt
->prev_same_value
)
5918 elt
= elt
->prev_same_value
;
5920 while (elt
&& elt
->first_same_value
== 0)
5921 elt
= elt
->next_same_value
;
5922 sets
[i
].src_elt
= elt
? elt
->first_same_value
: 0;
5926 /* Now insert the destinations into their equivalence classes. */
5928 for (i
= 0; i
< n_sets
; i
++)
5931 rtx dest
= SET_DEST (sets
[i
].rtl
);
5932 struct table_elt
*elt
;
5934 /* Don't record value if we are not supposed to risk allocating
5935 floating-point values in registers that might be wider than
5937 if ((flag_float_store
5939 && FLOAT_MODE_P (GET_MODE (dest
)))
5940 /* Don't record BLKmode values, because we don't know the
5941 size of it, and can't be sure that other BLKmode values
5942 have the same or smaller size. */
5943 || GET_MODE (dest
) == BLKmode
5944 /* If we didn't put a REG_EQUAL value or a source into the hash
5945 table, there is no point is recording DEST. */
5946 || sets
[i
].src_elt
== 0)
5949 /* STRICT_LOW_PART isn't part of the value BEING set,
5950 and neither is the SUBREG inside it.
5951 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
5952 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5953 dest
= SUBREG_REG (XEXP (dest
, 0));
5955 if (REG_P (dest
) || GET_CODE (dest
) == SUBREG
)
5956 /* Registers must also be inserted into chains for quantities. */
5957 if (insert_regs (dest
, sets
[i
].src_elt
, 1))
5959 /* If `insert_regs' changes something, the hash code must be
5961 rehash_using_reg (dest
);
5962 sets
[i
].dest_hash
= HASH (dest
, GET_MODE (dest
));
5965 /* If DEST is a paradoxical SUBREG, don't record DEST since the bits
5966 outside the mode of GET_MODE (SUBREG_REG (dest)) are undefined. */
5967 if (paradoxical_subreg_p (dest
))
5970 elt
= insert (dest
, sets
[i
].src_elt
,
5971 sets
[i
].dest_hash
, GET_MODE (dest
));
5973 /* If this is a constant, insert the constant anchors with the
5974 equivalent register-offset expressions using register DEST. */
5975 if (targetm
.const_anchor
5977 && SCALAR_INT_MODE_P (GET_MODE (dest
))
5978 && GET_CODE (sets
[i
].src_elt
->exp
) == CONST_INT
)
5979 insert_const_anchors (dest
, sets
[i
].src_elt
->exp
, GET_MODE (dest
));
5981 elt
->in_memory
= (MEM_P (sets
[i
].inner_dest
)
5982 && !MEM_READONLY_P (sets
[i
].inner_dest
));
5984 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
5985 narrower than M2, and both M1 and M2 are the same number of words,
5986 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
5987 make that equivalence as well.
5989 However, BAR may have equivalences for which gen_lowpart
5990 will produce a simpler value than gen_lowpart applied to
5991 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
5992 BAR's equivalences. If we don't get a simplified form, make
5993 the SUBREG. It will not be used in an equivalence, but will
5994 cause two similar assignments to be detected.
5996 Note the loop below will find SUBREG_REG (DEST) since we have
5997 already entered SRC and DEST of the SET in the table. */
5999 if (GET_CODE (dest
) == SUBREG
6000 && (known_equal_after_align_down
6001 (GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))) - 1,
6002 GET_MODE_SIZE (GET_MODE (dest
)) - 1,
6004 && !partial_subreg_p (dest
)
6005 && sets
[i
].src_elt
!= 0)
6007 machine_mode new_mode
= GET_MODE (SUBREG_REG (dest
));
6008 struct table_elt
*elt
, *classp
= 0;
6010 for (elt
= sets
[i
].src_elt
->first_same_value
; elt
;
6011 elt
= elt
->next_same_value
)
6015 struct table_elt
*src_elt
;
6017 /* Ignore invalid entries. */
6018 if (!REG_P (elt
->exp
)
6019 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
6022 /* We may have already been playing subreg games. If the
6023 mode is already correct for the destination, use it. */
6024 if (GET_MODE (elt
->exp
) == new_mode
)
6029 = subreg_lowpart_offset (new_mode
, GET_MODE (dest
));
6030 new_src
= simplify_gen_subreg (new_mode
, elt
->exp
,
6031 GET_MODE (dest
), byte
);
6034 /* The call to simplify_gen_subreg fails if the value
6035 is VOIDmode, yet we can't do any simplification, e.g.
6036 for EXPR_LISTs denoting function call results.
6037 It is invalid to construct a SUBREG with a VOIDmode
6038 SUBREG_REG, hence a zero new_src means we can't do
6039 this substitution. */
6043 src_hash
= HASH (new_src
, new_mode
);
6044 src_elt
= lookup (new_src
, src_hash
, new_mode
);
6046 /* Put the new source in the hash table is if isn't
6050 if (insert_regs (new_src
, classp
, 0))
6052 rehash_using_reg (new_src
);
6053 src_hash
= HASH (new_src
, new_mode
);
6055 src_elt
= insert (new_src
, classp
, src_hash
, new_mode
);
6056 src_elt
->in_memory
= elt
->in_memory
;
6057 if (GET_CODE (new_src
) == ASM_OPERANDS
6058 && elt
->cost
== MAX_COST
)
6059 src_elt
->cost
= MAX_COST
;
6061 else if (classp
&& classp
!= src_elt
->first_same_value
)
6062 /* Show that two things that we've seen before are
6063 actually the same. */
6064 merge_equiv_classes (src_elt
, classp
);
6066 classp
= src_elt
->first_same_value
;
6067 /* Ignore invalid entries. */
6069 && !REG_P (classp
->exp
)
6070 && ! exp_equiv_p (classp
->exp
, classp
->exp
, 1, false))
6071 classp
= classp
->next_same_value
;
6076 /* Special handling for (set REG0 REG1) where REG0 is the
6077 "cheapest", cheaper than REG1. After cse, REG1 will probably not
6078 be used in the sequel, so (if easily done) change this insn to
6079 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
6080 that computed their value. Then REG1 will become a dead store
6081 and won't cloud the situation for later optimizations.
6083 Do not make this change if REG1 is a hard register, because it will
6084 then be used in the sequel and we may be changing a two-operand insn
6085 into a three-operand insn.
6087 Also do not do this if we are operating on a copy of INSN. */
6089 if (n_sets
== 1 && sets
[0].rtl
)
6090 try_back_substitute_reg (sets
[0].rtl
, insn
);
6095 /* Remove from the hash table all expressions that reference memory. */
6098 invalidate_memory (void)
6101 struct table_elt
*p
, *next
;
6103 for (i
= 0; i
< HASH_SIZE
; i
++)
6104 for (p
= table
[i
]; p
; p
= next
)
6106 next
= p
->next_same_hash
;
6108 remove_from_table (p
, i
);
6112 /* Perform invalidation on the basis of everything about INSN,
6113 except for invalidating the actual places that are SET in it.
6114 This includes the places CLOBBERed, and anything that might
6115 alias with something that is SET or CLOBBERed. */
6118 invalidate_from_clobbers (rtx_insn
*insn
)
6120 rtx x
= PATTERN (insn
);
6122 if (GET_CODE (x
) == CLOBBER
)
6124 rtx ref
= XEXP (x
, 0);
6127 if (REG_P (ref
) || GET_CODE (ref
) == SUBREG
6129 invalidate (ref
, VOIDmode
);
6130 else if (GET_CODE (ref
) == STRICT_LOW_PART
6131 || GET_CODE (ref
) == ZERO_EXTRACT
)
6132 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
6135 else if (GET_CODE (x
) == PARALLEL
)
6138 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
6140 rtx y
= XVECEXP (x
, 0, i
);
6141 if (GET_CODE (y
) == CLOBBER
)
6143 rtx ref
= XEXP (y
, 0);
6144 if (REG_P (ref
) || GET_CODE (ref
) == SUBREG
6146 invalidate (ref
, VOIDmode
);
6147 else if (GET_CODE (ref
) == STRICT_LOW_PART
6148 || GET_CODE (ref
) == ZERO_EXTRACT
)
6149 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
6155 /* Perform invalidation on the basis of everything about INSN.
6156 This includes the places CLOBBERed, and anything that might
6157 alias with something that is SET or CLOBBERed. */
6160 invalidate_from_sets_and_clobbers (rtx_insn
*insn
)
6163 rtx x
= PATTERN (insn
);
6167 for (tem
= CALL_INSN_FUNCTION_USAGE (insn
); tem
; tem
= XEXP (tem
, 1))
6169 rtx temx
= XEXP (tem
, 0);
6170 if (GET_CODE (temx
) == CLOBBER
)
6171 invalidate (SET_DEST (temx
), VOIDmode
);
6175 /* Ensure we invalidate the destination register of a CALL insn.
6176 This is necessary for machines where this register is a fixed_reg,
6177 because no other code would invalidate it. */
6178 if (GET_CODE (x
) == SET
&& GET_CODE (SET_SRC (x
)) == CALL
)
6179 invalidate (SET_DEST (x
), VOIDmode
);
6181 else if (GET_CODE (x
) == PARALLEL
)
6185 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
6187 rtx y
= XVECEXP (x
, 0, i
);
6188 if (GET_CODE (y
) == CLOBBER
)
6190 rtx clobbered
= XEXP (y
, 0);
6192 if (REG_P (clobbered
)
6193 || GET_CODE (clobbered
) == SUBREG
)
6194 invalidate (clobbered
, VOIDmode
);
6195 else if (GET_CODE (clobbered
) == STRICT_LOW_PART
6196 || GET_CODE (clobbered
) == ZERO_EXTRACT
)
6197 invalidate (XEXP (clobbered
, 0), GET_MODE (clobbered
));
6199 else if (GET_CODE (y
) == SET
&& GET_CODE (SET_SRC (y
)) == CALL
)
6200 invalidate (SET_DEST (y
), VOIDmode
);
6205 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6206 and replace any registers in them with either an equivalent constant
6207 or the canonical form of the register. If we are inside an address,
6208 only do this if the address remains valid.
6210 OBJECT is 0 except when within a MEM in which case it is the MEM.
6212 Return the replacement for X. */
6215 cse_process_notes_1 (rtx x
, rtx object
, bool *changed
)
6217 enum rtx_code code
= GET_CODE (x
);
6218 const char *fmt
= GET_RTX_FORMAT (code
);
6233 validate_change (x
, &XEXP (x
, 0),
6234 cse_process_notes (XEXP (x
, 0), x
, changed
), 0);
6238 if (REG_NOTE_KIND (x
) == REG_EQUAL
)
6239 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), NULL_RTX
, changed
);
6245 XEXP (x
, 1) = cse_process_notes (XEXP (x
, 1), NULL_RTX
, changed
);
6252 rtx new_rtx
= cse_process_notes (XEXP (x
, 0), object
, changed
);
6253 /* We don't substitute VOIDmode constants into these rtx,
6254 since they would impede folding. */
6255 if (GET_MODE (new_rtx
) != VOIDmode
)
6256 validate_change (object
, &XEXP (x
, 0), new_rtx
, 0);
6260 case UNSIGNED_FLOAT
:
6262 rtx new_rtx
= cse_process_notes (XEXP (x
, 0), object
, changed
);
6263 /* We don't substitute negative VOIDmode constants into these rtx,
6264 since they would impede folding. */
6265 if (GET_MODE (new_rtx
) != VOIDmode
6266 || (CONST_INT_P (new_rtx
) && INTVAL (new_rtx
) >= 0)
6267 || (CONST_DOUBLE_P (new_rtx
) && CONST_DOUBLE_HIGH (new_rtx
) >= 0))
6268 validate_change (object
, &XEXP (x
, 0), new_rtx
, 0);
6273 i
= REG_QTY (REGNO (x
));
6275 /* Return a constant or a constant register. */
6276 if (REGNO_QTY_VALID_P (REGNO (x
)))
6278 struct qty_table_elem
*ent
= &qty_table
[i
];
6280 if (ent
->const_rtx
!= NULL_RTX
6281 && (CONSTANT_P (ent
->const_rtx
)
6282 || REG_P (ent
->const_rtx
)))
6284 rtx new_rtx
= gen_lowpart (GET_MODE (x
), ent
->const_rtx
);
6286 return copy_rtx (new_rtx
);
6290 /* Otherwise, canonicalize this register. */
6291 return canon_reg (x
, NULL
);
6297 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
6299 validate_change (object
, &XEXP (x
, i
),
6300 cse_process_notes (XEXP (x
, i
), object
, changed
), 0);
6306 cse_process_notes (rtx x
, rtx object
, bool *changed
)
6308 rtx new_rtx
= cse_process_notes_1 (x
, object
, changed
);
6315 /* Find a path in the CFG, starting with FIRST_BB to perform CSE on.
6317 DATA is a pointer to a struct cse_basic_block_data, that is used to
6319 It is filled with a queue of basic blocks, starting with FIRST_BB
6320 and following a trace through the CFG.
6322 If all paths starting at FIRST_BB have been followed, or no new path
6323 starting at FIRST_BB can be constructed, this function returns FALSE.
6324 Otherwise, DATA->path is filled and the function returns TRUE indicating
6325 that a path to follow was found.
6327 If FOLLOW_JUMPS is false, the maximum path length is 1 and the only
6328 block in the path will be FIRST_BB. */
6331 cse_find_path (basic_block first_bb
, struct cse_basic_block_data
*data
,
6338 bitmap_set_bit (cse_visited_basic_blocks
, first_bb
->index
);
6340 /* See if there is a previous path. */
6341 path_size
= data
->path_size
;
6343 /* There is a previous path. Make sure it started with FIRST_BB. */
6345 gcc_assert (data
->path
[0].bb
== first_bb
);
6347 /* There was only one basic block in the last path. Clear the path and
6348 return, so that paths starting at another basic block can be tried. */
6355 /* If the path was empty from the beginning, construct a new path. */
6357 data
->path
[path_size
++].bb
= first_bb
;
6360 /* Otherwise, path_size must be equal to or greater than 2, because
6361 a previous path exists that is at least two basic blocks long.
6363 Update the previous branch path, if any. If the last branch was
6364 previously along the branch edge, take the fallthrough edge now. */
6365 while (path_size
>= 2)
6367 basic_block last_bb_in_path
, previous_bb_in_path
;
6371 last_bb_in_path
= data
->path
[path_size
].bb
;
6372 previous_bb_in_path
= data
->path
[path_size
- 1].bb
;
6374 /* If we previously followed a path along the branch edge, try
6375 the fallthru edge now. */
6376 if (EDGE_COUNT (previous_bb_in_path
->succs
) == 2
6377 && any_condjump_p (BB_END (previous_bb_in_path
))
6378 && (e
= find_edge (previous_bb_in_path
, last_bb_in_path
))
6379 && e
== BRANCH_EDGE (previous_bb_in_path
))
6381 bb
= FALLTHRU_EDGE (previous_bb_in_path
)->dest
;
6382 if (bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
)
6383 && single_pred_p (bb
)
6384 /* We used to assert here that we would only see blocks
6385 that we have not visited yet. But we may end up
6386 visiting basic blocks twice if the CFG has changed
6387 in this run of cse_main, because when the CFG changes
6388 the topological sort of the CFG also changes. A basic
6389 blocks that previously had more than two predecessors
6390 may now have a single predecessor, and become part of
6391 a path that starts at another basic block.
6393 We still want to visit each basic block only once, so
6394 halt the path here if we have already visited BB. */
6395 && !bitmap_bit_p (cse_visited_basic_blocks
, bb
->index
))
6397 bitmap_set_bit (cse_visited_basic_blocks
, bb
->index
);
6398 data
->path
[path_size
++].bb
= bb
;
6403 data
->path
[path_size
].bb
= NULL
;
6406 /* If only one block remains in the path, bail. */
6414 /* Extend the path if possible. */
6417 bb
= data
->path
[path_size
- 1].bb
;
6418 while (bb
&& path_size
< param_max_cse_path_length
)
6420 if (single_succ_p (bb
))
6421 e
= single_succ_edge (bb
);
6422 else if (EDGE_COUNT (bb
->succs
) == 2
6423 && any_condjump_p (BB_END (bb
)))
6425 /* First try to follow the branch. If that doesn't lead
6426 to a useful path, follow the fallthru edge. */
6427 e
= BRANCH_EDGE (bb
);
6428 if (!single_pred_p (e
->dest
))
6429 e
= FALLTHRU_EDGE (bb
);
6435 && !((e
->flags
& EDGE_ABNORMAL_CALL
) && cfun
->has_nonlocal_label
)
6436 && e
->dest
!= EXIT_BLOCK_PTR_FOR_FN (cfun
)
6437 && single_pred_p (e
->dest
)
6438 /* Avoid visiting basic blocks twice. The large comment
6439 above explains why this can happen. */
6440 && !bitmap_bit_p (cse_visited_basic_blocks
, e
->dest
->index
))
6442 basic_block bb2
= e
->dest
;
6443 bitmap_set_bit (cse_visited_basic_blocks
, bb2
->index
);
6444 data
->path
[path_size
++].bb
= bb2
;
6453 data
->path_size
= path_size
;
6454 return path_size
!= 0;
6457 /* Dump the path in DATA to file F. NSETS is the number of sets
6461 cse_dump_path (struct cse_basic_block_data
*data
, int nsets
, FILE *f
)
6465 fprintf (f
, ";; Following path with %d sets: ", nsets
);
6466 for (path_entry
= 0; path_entry
< data
->path_size
; path_entry
++)
6467 fprintf (f
, "%d ", (data
->path
[path_entry
].bb
)->index
);
6473 /* Return true if BB has exception handling successor edges. */
6476 have_eh_succ_edges (basic_block bb
)
6481 FOR_EACH_EDGE (e
, ei
, bb
->succs
)
6482 if (e
->flags
& EDGE_EH
)
6489 /* Scan to the end of the path described by DATA. Return an estimate of
6490 the total number of SETs of all insns in the path. */
6493 cse_prescan_path (struct cse_basic_block_data
*data
)
6496 int path_size
= data
->path_size
;
6499 /* Scan to end of each basic block in the path. */
6500 for (path_entry
= 0; path_entry
< path_size
; path_entry
++)
6505 bb
= data
->path
[path_entry
].bb
;
6507 FOR_BB_INSNS (bb
, insn
)
6512 /* A PARALLEL can have lots of SETs in it,
6513 especially if it is really an ASM_OPERANDS. */
6514 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
6515 nsets
+= XVECLEN (PATTERN (insn
), 0);
6521 data
->nsets
= nsets
;
6524 /* Return true if the pattern of INSN uses a LABEL_REF for which
6525 there isn't a REG_LABEL_OPERAND note. */
6528 check_for_label_ref (rtx_insn
*insn
)
6530 /* If this insn uses a LABEL_REF and there isn't a REG_LABEL_OPERAND
6531 note for it, we must rerun jump since it needs to place the note. If
6532 this is a LABEL_REF for a CODE_LABEL that isn't in the insn chain,
6533 don't do this since no REG_LABEL_OPERAND will be added. */
6534 subrtx_iterator::array_type array
;
6535 FOR_EACH_SUBRTX (iter
, array
, PATTERN (insn
), ALL
)
6537 const_rtx x
= *iter
;
6538 if (GET_CODE (x
) == LABEL_REF
6539 && !LABEL_REF_NONLOCAL_P (x
)
6541 || !label_is_jump_target_p (label_ref_label (x
), insn
))
6542 && LABEL_P (label_ref_label (x
))
6543 && INSN_UID (label_ref_label (x
)) != 0
6544 && !find_reg_note (insn
, REG_LABEL_OPERAND
, label_ref_label (x
)))
6550 /* Process a single extended basic block described by EBB_DATA. */
6553 cse_extended_basic_block (struct cse_basic_block_data
*ebb_data
)
6555 int path_size
= ebb_data
->path_size
;
6559 /* Allocate the space needed by qty_table. */
6560 qty_table
= XNEWVEC (struct qty_table_elem
, max_qty
);
6563 cse_ebb_live_in
= df_get_live_in (ebb_data
->path
[0].bb
);
6564 cse_ebb_live_out
= df_get_live_out (ebb_data
->path
[path_size
- 1].bb
);
6565 for (path_entry
= 0; path_entry
< path_size
; path_entry
++)
6570 bb
= ebb_data
->path
[path_entry
].bb
;
6572 /* Invalidate recorded information for eh regs if there is an EH
6573 edge pointing to that bb. */
6574 if (bb_has_eh_pred (bb
))
6578 FOR_EACH_ARTIFICIAL_DEF (def
, bb
->index
)
6579 if (DF_REF_FLAGS (def
) & DF_REF_AT_TOP
)
6580 invalidate (DF_REF_REG (def
), GET_MODE (DF_REF_REG (def
)));
6583 optimize_this_for_speed_p
= optimize_bb_for_speed_p (bb
);
6584 FOR_BB_INSNS (bb
, insn
)
6586 /* If we have processed 1,000 insns, flush the hash table to
6587 avoid extreme quadratic behavior. We must not include NOTEs
6588 in the count since there may be more of them when generating
6589 debugging information. If we clear the table at different
6590 times, code generated with -g -O might be different than code
6591 generated with -O but not -g.
6593 FIXME: This is a real kludge and needs to be done some other
6595 if (NONDEBUG_INSN_P (insn
)
6596 && num_insns
++ > param_max_cse_insns
)
6598 flush_hash_table ();
6604 /* Process notes first so we have all notes in canonical forms
6605 when looking for duplicate operations. */
6606 if (REG_NOTES (insn
))
6608 bool changed
= false;
6609 REG_NOTES (insn
) = cse_process_notes (REG_NOTES (insn
),
6610 NULL_RTX
, &changed
);
6612 df_notes_rescan (insn
);
6617 /* If we haven't already found an insn where we added a LABEL_REF,
6619 if (INSN_P (insn
) && !recorded_label_ref
6620 && check_for_label_ref (insn
))
6621 recorded_label_ref
= true;
6623 if (HAVE_cc0
&& NONDEBUG_INSN_P (insn
))
6625 /* If the previous insn sets CC0 and this insn no
6626 longer references CC0, delete the previous insn.
6627 Here we use fact that nothing expects CC0 to be
6628 valid over an insn, which is true until the final
6630 rtx_insn
*prev_insn
;
6633 prev_insn
= prev_nonnote_nondebug_insn (insn
);
6634 if (prev_insn
&& NONJUMP_INSN_P (prev_insn
)
6635 && (tem
= single_set (prev_insn
)) != NULL_RTX
6636 && SET_DEST (tem
) == cc0_rtx
6637 && ! reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
6638 delete_insn (prev_insn
);
6640 /* If this insn is not the last insn in the basic
6641 block, it will be PREV_INSN(insn) in the next
6642 iteration. If we recorded any CC0-related
6643 information for this insn, remember it. */
6644 if (insn
!= BB_END (bb
))
6646 prev_insn_cc0
= this_insn_cc0
;
6647 prev_insn_cc0_mode
= this_insn_cc0_mode
;
6653 /* With non-call exceptions, we are not always able to update
6654 the CFG properly inside cse_insn. So clean up possibly
6655 redundant EH edges here. */
6656 if (cfun
->can_throw_non_call_exceptions
&& have_eh_succ_edges (bb
))
6657 cse_cfg_altered
|= purge_dead_edges (bb
);
6659 /* If we changed a conditional jump, we may have terminated
6660 the path we are following. Check that by verifying that
6661 the edge we would take still exists. If the edge does
6662 not exist anymore, purge the remainder of the path.
6663 Note that this will cause us to return to the caller. */
6664 if (path_entry
< path_size
- 1)
6666 basic_block next_bb
= ebb_data
->path
[path_entry
+ 1].bb
;
6667 if (!find_edge (bb
, next_bb
))
6673 /* If we truncate the path, we must also reset the
6674 visited bit on the remaining blocks in the path,
6675 or we will never visit them at all. */
6676 bitmap_clear_bit (cse_visited_basic_blocks
,
6677 ebb_data
->path
[path_size
].bb
->index
);
6678 ebb_data
->path
[path_size
].bb
= NULL
;
6680 while (path_size
- 1 != path_entry
);
6681 ebb_data
->path_size
= path_size
;
6685 /* If this is a conditional jump insn, record any known
6686 equivalences due to the condition being tested. */
6688 if (path_entry
< path_size
- 1
6689 && EDGE_COUNT (bb
->succs
) == 2
6691 && single_set (insn
)
6692 && any_condjump_p (insn
))
6694 basic_block next_bb
= ebb_data
->path
[path_entry
+ 1].bb
;
6695 bool taken
= (next_bb
== BRANCH_EDGE (bb
)->dest
);
6696 record_jump_equiv (insn
, taken
);
6699 /* Clear the CC0-tracking related insns, they can't provide
6700 useful information across basic block boundaries. */
6704 gcc_assert (next_qty
<= max_qty
);
6710 /* Perform cse on the instructions of a function.
6711 F is the first instruction.
6712 NREGS is one plus the highest pseudo-reg number used in the instruction.
6714 Return 2 if jump optimizations should be redone due to simplifications
6715 in conditional jump instructions.
6716 Return 1 if the CFG should be cleaned up because it has been modified.
6717 Return 0 otherwise. */
6720 cse_main (rtx_insn
*f ATTRIBUTE_UNUSED
, int nregs
)
6722 struct cse_basic_block_data ebb_data
;
6724 int *rc_order
= XNEWVEC (int, last_basic_block_for_fn (cfun
));
6727 /* CSE doesn't use dominane info but can invalidate it in different ways.
6728 For simplicity free dominance info here. */
6729 free_dominance_info (CDI_DOMINATORS
);
6731 df_set_flags (DF_LR_RUN_DCE
);
6732 df_note_add_problem ();
6734 df_set_flags (DF_DEFER_INSN_RESCAN
);
6736 reg_scan (get_insns (), max_reg_num ());
6737 init_cse_reg_info (nregs
);
6739 ebb_data
.path
= XNEWVEC (struct branch_path
,
6740 param_max_cse_path_length
);
6742 cse_cfg_altered
= false;
6743 cse_jumps_altered
= false;
6744 recorded_label_ref
= false;
6745 constant_pool_entries_cost
= 0;
6746 constant_pool_entries_regcost
= 0;
6747 ebb_data
.path_size
= 0;
6749 rtl_hooks
= cse_rtl_hooks
;
6752 init_alias_analysis ();
6754 reg_eqv_table
= XNEWVEC (struct reg_eqv_elem
, nregs
);
6756 /* Set up the table of already visited basic blocks. */
6757 cse_visited_basic_blocks
= sbitmap_alloc (last_basic_block_for_fn (cfun
));
6758 bitmap_clear (cse_visited_basic_blocks
);
6760 /* Loop over basic blocks in reverse completion order (RPO),
6761 excluding the ENTRY and EXIT blocks. */
6762 n_blocks
= pre_and_rev_post_order_compute (NULL
, rc_order
, false);
6764 while (i
< n_blocks
)
6766 /* Find the first block in the RPO queue that we have not yet
6767 processed before. */
6770 bb
= BASIC_BLOCK_FOR_FN (cfun
, rc_order
[i
++]);
6772 while (bitmap_bit_p (cse_visited_basic_blocks
, bb
->index
)
6775 /* Find all paths starting with BB, and process them. */
6776 while (cse_find_path (bb
, &ebb_data
, flag_cse_follow_jumps
))
6778 /* Pre-scan the path. */
6779 cse_prescan_path (&ebb_data
);
6781 /* If this basic block has no sets, skip it. */
6782 if (ebb_data
.nsets
== 0)
6785 /* Get a reasonable estimate for the maximum number of qty's
6786 needed for this path. For this, we take the number of sets
6787 and multiply that by MAX_RECOG_OPERANDS. */
6788 max_qty
= ebb_data
.nsets
* MAX_RECOG_OPERANDS
;
6790 /* Dump the path we're about to process. */
6792 cse_dump_path (&ebb_data
, ebb_data
.nsets
, dump_file
);
6794 cse_extended_basic_block (&ebb_data
);
6799 end_alias_analysis ();
6800 free (reg_eqv_table
);
6801 free (ebb_data
.path
);
6802 sbitmap_free (cse_visited_basic_blocks
);
6804 rtl_hooks
= general_rtl_hooks
;
6806 if (cse_jumps_altered
|| recorded_label_ref
)
6808 else if (cse_cfg_altered
)
6814 /* Count the number of times registers are used (not set) in X.
6815 COUNTS is an array in which we accumulate the count, INCR is how much
6816 we count each register usage.
6818 Don't count a usage of DEST, which is the SET_DEST of a SET which
6819 contains X in its SET_SRC. This is because such a SET does not
6820 modify the liveness of DEST.
6821 DEST is set to pc_rtx for a trapping insn, or for an insn with side effects.
6822 We must then count uses of a SET_DEST regardless, because the insn can't be
6826 count_reg_usage (rtx x
, int *counts
, rtx dest
, int incr
)
6836 switch (code
= GET_CODE (x
))
6840 counts
[REGNO (x
)] += incr
;
6852 /* If we are clobbering a MEM, mark any registers inside the address
6854 if (MEM_P (XEXP (x
, 0)))
6855 count_reg_usage (XEXP (XEXP (x
, 0), 0), counts
, NULL_RTX
, incr
);
6859 /* Unless we are setting a REG, count everything in SET_DEST. */
6860 if (!REG_P (SET_DEST (x
)))
6861 count_reg_usage (SET_DEST (x
), counts
, NULL_RTX
, incr
);
6862 count_reg_usage (SET_SRC (x
), counts
,
6863 dest
? dest
: SET_DEST (x
),
6873 /* We expect dest to be NULL_RTX here. If the insn may throw,
6874 or if it cannot be deleted due to side-effects, mark this fact
6875 by setting DEST to pc_rtx. */
6876 if ((!cfun
->can_delete_dead_exceptions
&& !insn_nothrow_p (x
))
6877 || side_effects_p (PATTERN (x
)))
6879 if (code
== CALL_INSN
)
6880 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x
), counts
, dest
, incr
);
6881 count_reg_usage (PATTERN (x
), counts
, dest
, incr
);
6883 /* Things used in a REG_EQUAL note aren't dead since loop may try to
6886 note
= find_reg_equal_equiv_note (x
);
6889 rtx eqv
= XEXP (note
, 0);
6891 if (GET_CODE (eqv
) == EXPR_LIST
)
6892 /* This REG_EQUAL note describes the result of a function call.
6893 Process all the arguments. */
6896 count_reg_usage (XEXP (eqv
, 0), counts
, dest
, incr
);
6897 eqv
= XEXP (eqv
, 1);
6899 while (eqv
&& GET_CODE (eqv
) == EXPR_LIST
);
6901 count_reg_usage (eqv
, counts
, dest
, incr
);
6906 if (REG_NOTE_KIND (x
) == REG_EQUAL
6907 || (REG_NOTE_KIND (x
) != REG_NONNEG
&& GET_CODE (XEXP (x
,0)) == USE
)
6908 /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)),
6909 involving registers in the address. */
6910 || GET_CODE (XEXP (x
, 0)) == CLOBBER
)
6911 count_reg_usage (XEXP (x
, 0), counts
, NULL_RTX
, incr
);
6913 count_reg_usage (XEXP (x
, 1), counts
, NULL_RTX
, incr
);
6917 /* Iterate over just the inputs, not the constraints as well. */
6918 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
6919 count_reg_usage (ASM_OPERANDS_INPUT (x
, i
), counts
, dest
, incr
);
6930 fmt
= GET_RTX_FORMAT (code
);
6931 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6934 count_reg_usage (XEXP (x
, i
), counts
, dest
, incr
);
6935 else if (fmt
[i
] == 'E')
6936 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6937 count_reg_usage (XVECEXP (x
, i
, j
), counts
, dest
, incr
);
6941 /* Return true if X is a dead register. */
6944 is_dead_reg (const_rtx x
, int *counts
)
6947 && REGNO (x
) >= FIRST_PSEUDO_REGISTER
6948 && counts
[REGNO (x
)] == 0);
6951 /* Return true if set is live. */
6953 set_live_p (rtx set
, rtx_insn
*insn ATTRIBUTE_UNUSED
, /* Only used with HAVE_cc0. */
6958 if (set_noop_p (set
))
6961 else if (GET_CODE (SET_DEST (set
)) == CC0
6962 && !side_effects_p (SET_SRC (set
))
6963 && ((tem
= next_nonnote_nondebug_insn (insn
)) == NULL_RTX
6965 || !reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
6967 else if (!is_dead_reg (SET_DEST (set
), counts
)
6968 || side_effects_p (SET_SRC (set
)))
6973 /* Return true if insn is live. */
6976 insn_live_p (rtx_insn
*insn
, int *counts
)
6979 if (!cfun
->can_delete_dead_exceptions
&& !insn_nothrow_p (insn
))
6981 else if (GET_CODE (PATTERN (insn
)) == SET
)
6982 return set_live_p (PATTERN (insn
), insn
, counts
);
6983 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
6985 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
6987 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
6989 if (GET_CODE (elt
) == SET
)
6991 if (set_live_p (elt
, insn
, counts
))
6994 else if (GET_CODE (elt
) != CLOBBER
&& GET_CODE (elt
) != USE
)
6999 else if (DEBUG_INSN_P (insn
))
7003 if (DEBUG_MARKER_INSN_P (insn
))
7006 for (next
= NEXT_INSN (insn
); next
; next
= NEXT_INSN (next
))
7009 else if (!DEBUG_INSN_P (next
))
7011 /* If we find an inspection point, such as a debug begin stmt,
7012 we want to keep the earlier debug insn. */
7013 else if (DEBUG_MARKER_INSN_P (next
))
7015 else if (INSN_VAR_LOCATION_DECL (insn
) == INSN_VAR_LOCATION_DECL (next
))
7024 /* Count the number of stores into pseudo. Callback for note_stores. */
7027 count_stores (rtx x
, const_rtx set ATTRIBUTE_UNUSED
, void *data
)
7029 int *counts
= (int *) data
;
7030 if (REG_P (x
) && REGNO (x
) >= FIRST_PSEUDO_REGISTER
)
7031 counts
[REGNO (x
)]++;
7034 /* Return if DEBUG_INSN pattern PAT needs to be reset because some dead
7035 pseudo doesn't have a replacement. COUNTS[X] is zero if register X
7036 is dead and REPLACEMENTS[X] is null if it has no replacemenet.
7037 Set *SEEN_REPL to true if we see a dead register that does have
7041 is_dead_debug_insn (const_rtx pat
, int *counts
, rtx
*replacements
,
7044 subrtx_iterator::array_type array
;
7045 FOR_EACH_SUBRTX (iter
, array
, pat
, NONCONST
)
7047 const_rtx x
= *iter
;
7048 if (is_dead_reg (x
, counts
))
7050 if (replacements
&& replacements
[REGNO (x
)] != NULL_RTX
)
7059 /* Replace a dead pseudo in a DEBUG_INSN with replacement DEBUG_EXPR.
7060 Callback for simplify_replace_fn_rtx. */
7063 replace_dead_reg (rtx x
, const_rtx old_rtx ATTRIBUTE_UNUSED
, void *data
)
7065 rtx
*replacements
= (rtx
*) data
;
7068 && REGNO (x
) >= FIRST_PSEUDO_REGISTER
7069 && replacements
[REGNO (x
)] != NULL_RTX
)
7071 if (GET_MODE (x
) == GET_MODE (replacements
[REGNO (x
)]))
7072 return replacements
[REGNO (x
)];
7073 return lowpart_subreg (GET_MODE (x
), replacements
[REGNO (x
)],
7074 GET_MODE (replacements
[REGNO (x
)]));
7079 /* Scan all the insns and delete any that are dead; i.e., they store a register
7080 that is never used or they copy a register to itself.
7082 This is used to remove insns made obviously dead by cse, loop or other
7083 optimizations. It improves the heuristics in loop since it won't try to
7084 move dead invariants out of loops or make givs for dead quantities. The
7085 remaining passes of the compilation are also sped up. */
7088 delete_trivially_dead_insns (rtx_insn
*insns
, int nreg
)
7091 rtx_insn
*insn
, *prev
;
7092 rtx
*replacements
= NULL
;
7095 timevar_push (TV_DELETE_TRIVIALLY_DEAD
);
7096 /* First count the number of times each register is used. */
7097 if (MAY_HAVE_DEBUG_BIND_INSNS
)
7099 counts
= XCNEWVEC (int, nreg
* 3);
7100 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
7101 if (DEBUG_BIND_INSN_P (insn
))
7102 count_reg_usage (INSN_VAR_LOCATION_LOC (insn
), counts
+ nreg
,
7104 else if (INSN_P (insn
))
7106 count_reg_usage (insn
, counts
, NULL_RTX
, 1);
7107 note_stores (insn
, count_stores
, counts
+ nreg
* 2);
7109 /* If there can be debug insns, COUNTS are 3 consecutive arrays.
7110 First one counts how many times each pseudo is used outside
7111 of debug insns, second counts how many times each pseudo is
7112 used in debug insns and third counts how many times a pseudo
7117 counts
= XCNEWVEC (int, nreg
);
7118 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
7120 count_reg_usage (insn
, counts
, NULL_RTX
, 1);
7121 /* If no debug insns can be present, COUNTS is just an array
7122 which counts how many times each pseudo is used. */
7124 /* Pseudo PIC register should be considered as used due to possible
7125 new usages generated. */
7126 if (!reload_completed
7127 && pic_offset_table_rtx
7128 && REGNO (pic_offset_table_rtx
) >= FIRST_PSEUDO_REGISTER
)
7129 counts
[REGNO (pic_offset_table_rtx
)]++;
7130 /* Go from the last insn to the first and delete insns that only set unused
7131 registers or copy a register to itself. As we delete an insn, remove
7132 usage counts for registers it uses.
7134 The first jump optimization pass may leave a real insn as the last
7135 insn in the function. We must not skip that insn or we may end
7136 up deleting code that is not really dead.
7138 If some otherwise unused register is only used in DEBUG_INSNs,
7139 try to create a DEBUG_EXPR temporary and emit a DEBUG_INSN before
7140 the setter. Then go through DEBUG_INSNs and if a DEBUG_EXPR
7141 has been created for the unused register, replace it with
7142 the DEBUG_EXPR, otherwise reset the DEBUG_INSN. */
7143 for (insn
= get_last_insn (); insn
; insn
= prev
)
7147 prev
= PREV_INSN (insn
);
7151 live_insn
= insn_live_p (insn
, counts
);
7153 /* If this is a dead insn, delete it and show registers in it aren't
7156 if (! live_insn
&& dbg_cnt (delete_trivial_dead
))
7158 if (DEBUG_INSN_P (insn
))
7160 if (DEBUG_BIND_INSN_P (insn
))
7161 count_reg_usage (INSN_VAR_LOCATION_LOC (insn
), counts
+ nreg
,
7167 if (MAY_HAVE_DEBUG_BIND_INSNS
7168 && (set
= single_set (insn
)) != NULL_RTX
7169 && is_dead_reg (SET_DEST (set
), counts
)
7170 /* Used at least once in some DEBUG_INSN. */
7171 && counts
[REGNO (SET_DEST (set
)) + nreg
] > 0
7172 /* And set exactly once. */
7173 && counts
[REGNO (SET_DEST (set
)) + nreg
* 2] == 1
7174 && !side_effects_p (SET_SRC (set
))
7175 && asm_noperands (PATTERN (insn
)) < 0)
7177 rtx dval
, bind_var_loc
;
7180 /* Create DEBUG_EXPR (and DEBUG_EXPR_DECL). */
7181 dval
= make_debug_expr_from_rtl (SET_DEST (set
));
7183 /* Emit a debug bind insn before the insn in which
7186 gen_rtx_VAR_LOCATION (GET_MODE (SET_DEST (set
)),
7187 DEBUG_EXPR_TREE_DECL (dval
),
7189 VAR_INIT_STATUS_INITIALIZED
);
7190 count_reg_usage (bind_var_loc
, counts
+ nreg
, NULL_RTX
, 1);
7192 bind
= emit_debug_insn_before (bind_var_loc
, insn
);
7193 df_insn_rescan (bind
);
7195 if (replacements
== NULL
)
7196 replacements
= XCNEWVEC (rtx
, nreg
);
7197 replacements
[REGNO (SET_DEST (set
))] = dval
;
7200 count_reg_usage (insn
, counts
, NULL_RTX
, -1);
7203 cse_cfg_altered
|= delete_insn_and_edges (insn
);
7207 if (MAY_HAVE_DEBUG_BIND_INSNS
)
7209 for (insn
= get_last_insn (); insn
; insn
= PREV_INSN (insn
))
7210 if (DEBUG_BIND_INSN_P (insn
))
7212 /* If this debug insn references a dead register that wasn't replaced
7213 with an DEBUG_EXPR, reset the DEBUG_INSN. */
7214 bool seen_repl
= false;
7215 if (is_dead_debug_insn (INSN_VAR_LOCATION_LOC (insn
),
7216 counts
, replacements
, &seen_repl
))
7218 INSN_VAR_LOCATION_LOC (insn
) = gen_rtx_UNKNOWN_VAR_LOC ();
7219 df_insn_rescan (insn
);
7223 INSN_VAR_LOCATION_LOC (insn
)
7224 = simplify_replace_fn_rtx (INSN_VAR_LOCATION_LOC (insn
),
7225 NULL_RTX
, replace_dead_reg
,
7227 df_insn_rescan (insn
);
7230 free (replacements
);
7233 if (dump_file
&& ndead
)
7234 fprintf (dump_file
, "Deleted %i trivially dead insns\n",
7238 timevar_pop (TV_DELETE_TRIVIALLY_DEAD
);
7242 /* If LOC contains references to NEWREG in a different mode, change them
7243 to use NEWREG instead. */
7246 cse_change_cc_mode (subrtx_ptr_iterator::array_type
&array
,
7247 rtx
*loc
, rtx_insn
*insn
, rtx newreg
)
7249 FOR_EACH_SUBRTX_PTR (iter
, array
, loc
, NONCONST
)
7255 && REGNO (x
) == REGNO (newreg
)
7256 && GET_MODE (x
) != GET_MODE (newreg
))
7258 validate_change (insn
, loc
, newreg
, 1);
7259 iter
.skip_subrtxes ();
7264 /* Change the mode of any reference to the register REGNO (NEWREG) to
7265 GET_MODE (NEWREG) in INSN. */
7268 cse_change_cc_mode_insn (rtx_insn
*insn
, rtx newreg
)
7275 subrtx_ptr_iterator::array_type array
;
7276 cse_change_cc_mode (array
, &PATTERN (insn
), insn
, newreg
);
7277 cse_change_cc_mode (array
, ®_NOTES (insn
), insn
, newreg
);
7279 /* If the following assertion was triggered, there is most probably
7280 something wrong with the cc_modes_compatible back end function.
7281 CC modes only can be considered compatible if the insn - with the mode
7282 replaced by any of the compatible modes - can still be recognized. */
7283 success
= apply_change_group ();
7284 gcc_assert (success
);
7287 /* Change the mode of any reference to the register REGNO (NEWREG) to
7288 GET_MODE (NEWREG), starting at START. Stop before END. Stop at
7289 any instruction which modifies NEWREG. */
7292 cse_change_cc_mode_insns (rtx_insn
*start
, rtx_insn
*end
, rtx newreg
)
7296 for (insn
= start
; insn
!= end
; insn
= NEXT_INSN (insn
))
7298 if (! INSN_P (insn
))
7301 if (reg_set_p (newreg
, insn
))
7304 cse_change_cc_mode_insn (insn
, newreg
);
7308 /* BB is a basic block which finishes with CC_REG as a condition code
7309 register which is set to CC_SRC. Look through the successors of BB
7310 to find blocks which have a single predecessor (i.e., this one),
7311 and look through those blocks for an assignment to CC_REG which is
7312 equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are
7313 permitted to change the mode of CC_SRC to a compatible mode. This
7314 returns VOIDmode if no equivalent assignments were found.
7315 Otherwise it returns the mode which CC_SRC should wind up with.
7316 ORIG_BB should be the same as BB in the outermost cse_cc_succs call,
7317 but is passed unmodified down to recursive calls in order to prevent
7320 The main complexity in this function is handling the mode issues.
7321 We may have more than one duplicate which we can eliminate, and we
7322 try to find a mode which will work for multiple duplicates. */
7325 cse_cc_succs (basic_block bb
, basic_block orig_bb
, rtx cc_reg
, rtx cc_src
,
7326 bool can_change_mode
)
7330 unsigned int insn_count
;
7333 machine_mode modes
[2];
7334 rtx_insn
*last_insns
[2];
7339 /* We expect to have two successors. Look at both before picking
7340 the final mode for the comparison. If we have more successors
7341 (i.e., some sort of table jump, although that seems unlikely),
7342 then we require all beyond the first two to use the same
7345 found_equiv
= false;
7346 mode
= GET_MODE (cc_src
);
7348 FOR_EACH_EDGE (e
, ei
, bb
->succs
)
7353 if (e
->flags
& EDGE_COMPLEX
)
7356 if (EDGE_COUNT (e
->dest
->preds
) != 1
7357 || e
->dest
== EXIT_BLOCK_PTR_FOR_FN (cfun
)
7358 /* Avoid endless recursion on unreachable blocks. */
7359 || e
->dest
== orig_bb
)
7362 end
= NEXT_INSN (BB_END (e
->dest
));
7363 for (insn
= BB_HEAD (e
->dest
); insn
!= end
; insn
= NEXT_INSN (insn
))
7367 if (! INSN_P (insn
))
7370 /* If CC_SRC is modified, we have to stop looking for
7371 something which uses it. */
7372 if (modified_in_p (cc_src
, insn
))
7375 /* Check whether INSN sets CC_REG to CC_SRC. */
7376 set
= single_set (insn
);
7378 && REG_P (SET_DEST (set
))
7379 && REGNO (SET_DEST (set
)) == REGNO (cc_reg
))
7382 machine_mode set_mode
;
7383 machine_mode comp_mode
;
7386 set_mode
= GET_MODE (SET_SRC (set
));
7387 comp_mode
= set_mode
;
7388 if (rtx_equal_p (cc_src
, SET_SRC (set
)))
7390 else if (GET_CODE (cc_src
) == COMPARE
7391 && GET_CODE (SET_SRC (set
)) == COMPARE
7393 && rtx_equal_p (XEXP (cc_src
, 0),
7394 XEXP (SET_SRC (set
), 0))
7395 && rtx_equal_p (XEXP (cc_src
, 1),
7396 XEXP (SET_SRC (set
), 1)))
7399 comp_mode
= targetm
.cc_modes_compatible (mode
, set_mode
);
7400 if (comp_mode
!= VOIDmode
7401 && (can_change_mode
|| comp_mode
== mode
))
7408 if (insn_count
< ARRAY_SIZE (insns
))
7410 insns
[insn_count
] = insn
;
7411 modes
[insn_count
] = set_mode
;
7412 last_insns
[insn_count
] = end
;
7415 if (mode
!= comp_mode
)
7417 gcc_assert (can_change_mode
);
7420 /* The modified insn will be re-recognized later. */
7421 PUT_MODE (cc_src
, mode
);
7426 if (set_mode
!= mode
)
7428 /* We found a matching expression in the
7429 wrong mode, but we don't have room to
7430 store it in the array. Punt. This case
7434 /* INSN sets CC_REG to a value equal to CC_SRC
7435 with the right mode. We can simply delete
7440 /* We found an instruction to delete. Keep looking,
7441 in the hopes of finding a three-way jump. */
7445 /* We found an instruction which sets the condition
7446 code, so don't look any farther. */
7450 /* If INSN sets CC_REG in some other way, don't look any
7452 if (reg_set_p (cc_reg
, insn
))
7456 /* If we fell off the bottom of the block, we can keep looking
7457 through successors. We pass CAN_CHANGE_MODE as false because
7458 we aren't prepared to handle compatibility between the
7459 further blocks and this block. */
7462 machine_mode submode
;
7464 submode
= cse_cc_succs (e
->dest
, orig_bb
, cc_reg
, cc_src
, false);
7465 if (submode
!= VOIDmode
)
7467 gcc_assert (submode
== mode
);
7469 can_change_mode
= false;
7477 /* Now INSN_COUNT is the number of instructions we found which set
7478 CC_REG to a value equivalent to CC_SRC. The instructions are in
7479 INSNS. The modes used by those instructions are in MODES. */
7482 for (i
= 0; i
< insn_count
; ++i
)
7484 if (modes
[i
] != mode
)
7486 /* We need to change the mode of CC_REG in INSNS[i] and
7487 subsequent instructions. */
7490 if (GET_MODE (cc_reg
) == mode
)
7493 newreg
= gen_rtx_REG (mode
, REGNO (cc_reg
));
7495 cse_change_cc_mode_insns (NEXT_INSN (insns
[i
]), last_insns
[i
],
7499 cse_cfg_altered
|= delete_insn_and_edges (insns
[i
]);
7505 /* If we have a fixed condition code register (or two), walk through
7506 the instructions and try to eliminate duplicate assignments. */
7509 cse_condition_code_reg (void)
7511 unsigned int cc_regno_1
;
7512 unsigned int cc_regno_2
;
7517 if (! targetm
.fixed_condition_code_regs (&cc_regno_1
, &cc_regno_2
))
7520 cc_reg_1
= gen_rtx_REG (CCmode
, cc_regno_1
);
7521 if (cc_regno_2
!= INVALID_REGNUM
)
7522 cc_reg_2
= gen_rtx_REG (CCmode
, cc_regno_2
);
7524 cc_reg_2
= NULL_RTX
;
7526 FOR_EACH_BB_FN (bb
, cfun
)
7528 rtx_insn
*last_insn
;
7531 rtx_insn
*cc_src_insn
;
7534 machine_mode orig_mode
;
7536 /* Look for blocks which end with a conditional jump based on a
7537 condition code register. Then look for the instruction which
7538 sets the condition code register. Then look through the
7539 successor blocks for instructions which set the condition
7540 code register to the same value. There are other possible
7541 uses of the condition code register, but these are by far the
7542 most common and the ones which we are most likely to be able
7545 last_insn
= BB_END (bb
);
7546 if (!JUMP_P (last_insn
))
7549 if (reg_referenced_p (cc_reg_1
, PATTERN (last_insn
)))
7551 else if (cc_reg_2
&& reg_referenced_p (cc_reg_2
, PATTERN (last_insn
)))
7558 for (insn
= PREV_INSN (last_insn
);
7559 insn
&& insn
!= PREV_INSN (BB_HEAD (bb
));
7560 insn
= PREV_INSN (insn
))
7564 if (! INSN_P (insn
))
7566 set
= single_set (insn
);
7568 && REG_P (SET_DEST (set
))
7569 && REGNO (SET_DEST (set
)) == REGNO (cc_reg
))
7572 cc_src
= SET_SRC (set
);
7575 else if (reg_set_p (cc_reg
, insn
))
7582 if (modified_between_p (cc_src
, cc_src_insn
, NEXT_INSN (last_insn
)))
7585 /* Now CC_REG is a condition code register used for a
7586 conditional jump at the end of the block, and CC_SRC, in
7587 CC_SRC_INSN, is the value to which that condition code
7588 register is set, and CC_SRC is still meaningful at the end of
7591 orig_mode
= GET_MODE (cc_src
);
7592 mode
= cse_cc_succs (bb
, bb
, cc_reg
, cc_src
, true);
7593 if (mode
!= VOIDmode
)
7595 gcc_assert (mode
== GET_MODE (cc_src
));
7596 if (mode
!= orig_mode
)
7598 rtx newreg
= gen_rtx_REG (mode
, REGNO (cc_reg
));
7600 cse_change_cc_mode_insn (cc_src_insn
, newreg
);
7602 /* Do the same in the following insns that use the
7603 current value of CC_REG within BB. */
7604 cse_change_cc_mode_insns (NEXT_INSN (cc_src_insn
),
7605 NEXT_INSN (last_insn
),
7613 /* Perform common subexpression elimination. Nonzero value from
7614 `cse_main' means that jumps were simplified and some code may now
7615 be unreachable, so do jump optimization again. */
7617 rest_of_handle_cse (void)
7622 dump_flow_info (dump_file
, dump_flags
);
7624 tem
= cse_main (get_insns (), max_reg_num ());
7626 /* If we are not running more CSE passes, then we are no longer
7627 expecting CSE to be run. But always rerun it in a cheap mode. */
7628 cse_not_expected
= !flag_rerun_cse_after_loop
&& !flag_gcse
;
7632 timevar_push (TV_JUMP
);
7633 rebuild_jump_labels (get_insns ());
7634 cse_cfg_altered
|= cleanup_cfg (CLEANUP_CFG_CHANGED
);
7635 timevar_pop (TV_JUMP
);
7637 else if (tem
== 1 || optimize
> 1)
7638 cse_cfg_altered
|= cleanup_cfg (0);
7645 const pass_data pass_data_cse
=
7647 RTL_PASS
, /* type */
7649 OPTGROUP_NONE
, /* optinfo_flags */
7651 0, /* properties_required */
7652 0, /* properties_provided */
7653 0, /* properties_destroyed */
7654 0, /* todo_flags_start */
7655 TODO_df_finish
, /* todo_flags_finish */
7658 class pass_cse
: public rtl_opt_pass
7661 pass_cse (gcc::context
*ctxt
)
7662 : rtl_opt_pass (pass_data_cse
, ctxt
)
7665 /* opt_pass methods: */
7666 virtual bool gate (function
*) { return optimize
> 0; }
7667 virtual unsigned int execute (function
*) { return rest_of_handle_cse (); }
7669 }; // class pass_cse
7674 make_pass_cse (gcc::context
*ctxt
)
7676 return new pass_cse (ctxt
);
7680 /* Run second CSE pass after loop optimizations. */
7682 rest_of_handle_cse2 (void)
7687 dump_flow_info (dump_file
, dump_flags
);
7689 tem
= cse_main (get_insns (), max_reg_num ());
7691 /* Run a pass to eliminate duplicated assignments to condition code
7692 registers. We have to run this after bypass_jumps, because it
7693 makes it harder for that pass to determine whether a jump can be
7695 cse_condition_code_reg ();
7697 delete_trivially_dead_insns (get_insns (), max_reg_num ());
7701 timevar_push (TV_JUMP
);
7702 rebuild_jump_labels (get_insns ());
7703 cse_cfg_altered
|= cleanup_cfg (CLEANUP_CFG_CHANGED
);
7704 timevar_pop (TV_JUMP
);
7706 else if (tem
== 1 || cse_cfg_altered
)
7707 cse_cfg_altered
|= cleanup_cfg (0);
7709 cse_not_expected
= 1;
7716 const pass_data pass_data_cse2
=
7718 RTL_PASS
, /* type */
7720 OPTGROUP_NONE
, /* optinfo_flags */
7721 TV_CSE2
, /* tv_id */
7722 0, /* properties_required */
7723 0, /* properties_provided */
7724 0, /* properties_destroyed */
7725 0, /* todo_flags_start */
7726 TODO_df_finish
, /* todo_flags_finish */
7729 class pass_cse2
: public rtl_opt_pass
7732 pass_cse2 (gcc::context
*ctxt
)
7733 : rtl_opt_pass (pass_data_cse2
, ctxt
)
7736 /* opt_pass methods: */
7737 virtual bool gate (function
*)
7739 return optimize
> 0 && flag_rerun_cse_after_loop
;
7742 virtual unsigned int execute (function
*) { return rest_of_handle_cse2 (); }
7744 }; // class pass_cse2
7749 make_pass_cse2 (gcc::context
*ctxt
)
7751 return new pass_cse2 (ctxt
);
7754 /* Run second CSE pass after loop optimizations. */
7756 rest_of_handle_cse_after_global_opts (void)
7761 /* We only want to do local CSE, so don't follow jumps. */
7762 save_cfj
= flag_cse_follow_jumps
;
7763 flag_cse_follow_jumps
= 0;
7765 rebuild_jump_labels (get_insns ());
7766 tem
= cse_main (get_insns (), max_reg_num ());
7767 cse_cfg_altered
|= purge_all_dead_edges ();
7768 delete_trivially_dead_insns (get_insns (), max_reg_num ());
7770 cse_not_expected
= !flag_rerun_cse_after_loop
;
7772 /* If cse altered any jumps, rerun jump opts to clean things up. */
7775 timevar_push (TV_JUMP
);
7776 rebuild_jump_labels (get_insns ());
7777 cse_cfg_altered
|= cleanup_cfg (CLEANUP_CFG_CHANGED
);
7778 timevar_pop (TV_JUMP
);
7780 else if (tem
== 1 || cse_cfg_altered
)
7781 cse_cfg_altered
|= cleanup_cfg (0);
7783 flag_cse_follow_jumps
= save_cfj
;
7789 const pass_data pass_data_cse_after_global_opts
=
7791 RTL_PASS
, /* type */
7792 "cse_local", /* name */
7793 OPTGROUP_NONE
, /* optinfo_flags */
7795 0, /* properties_required */
7796 0, /* properties_provided */
7797 0, /* properties_destroyed */
7798 0, /* todo_flags_start */
7799 TODO_df_finish
, /* todo_flags_finish */
7802 class pass_cse_after_global_opts
: public rtl_opt_pass
7805 pass_cse_after_global_opts (gcc::context
*ctxt
)
7806 : rtl_opt_pass (pass_data_cse_after_global_opts
, ctxt
)
7809 /* opt_pass methods: */
7810 virtual bool gate (function
*)
7812 return optimize
> 0 && flag_rerun_cse_after_global_opts
;
7815 virtual unsigned int execute (function
*)
7817 return rest_of_handle_cse_after_global_opts ();
7820 }; // class pass_cse_after_global_opts
7825 make_pass_cse_after_global_opts (gcc::context
*ctxt
)
7827 return new pass_cse_after_global_opts (ctxt
);